Trng i hc Bch Khoa i hc quc gia TP HCMKhoa in-in T-B Mn in
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BAO CAO BI TP DIMN: IN T NG DNG TI 23 GVHD: Thy Lu Ph SVTH:
Nguyn Huy Trung Nguyn Vn Ton Nguyn Ngc Hong Nhm 20
Tp.HCM,21/05/2015
Phn 1: Cm bin (D203B)1. Gii thiu v cm bin hng ngoi th ng (PIR)-
PIR sensor l b cm bin th ng dng ngun kch thch l tia hng ngoi.Tia
hng ngoi (IR) chnh l cc tia nhit pht ra t cc vt th nng. Trong cc c
th sng, trong chng ta lun c thn nhit (thng thng l 37 C), v t c th
chng ta s lun pht ra cc tia nhit, hay cn gi l cc tia hng ngoi, ngi
ta s dng mt t bo in chuyn i tia nhit ra dng tn hiu in v nh m c th
lm ra cm bin pht hin cc vt th nng ang chuyn ng. Cm bin ny gi l th
ng v n khng dng ngun nhit t pht (lm ngun tch cc, hay ch ng) m ch ph
thuc vo cc ngun tha nhit, l thn nhit ca cc thc th khc, nh con ngi
con vt...-Cu trc cm bin PIR
a) Cm bin PIR D203Bb) Thu knh Fresnel (tng nhy)2. Nguyn l lm
vic:
Cc ngun nhit (vi ngi v con vt l ngun thn nhit) u pht ra tia hng
ngoi, qua knh Fresnel, qua kch lc ly tia hng ngoi, n c cho tiu t
trn 2 cm bin hng ngoi gn trong u d, v to ra in p c khuch i vi FET.
Khi c mt ngun nhit i ngang qua, t 2 cm bin ny s cho xut hin 2 tn
hiu lm cho FET hot ng v xut ra xung. tng khong cch d tn hiu, ta s
dng mch khuch i c bin cao v a vo mch so p tc ng vo mt thit b iu
khin.Da vo s khuch i trong Datasheet ca DB203 ta c s :
3. Phn tch cc khi trong s mch:a) Khi khuch i 1:
V tn hiu ra ca cm bin PIR c tn s thp. Nn ta c mch khuch i v kt
hp vi b lc thng di lc nhiu khng cn thit. Tn s ct:
flow1=1/(2R4C4)=1.6 Hz; fhigh1=1/(2R3C3)=16 Hz. li:
Gain1=1+R3/R4=101b) Khi khuch i 2
Tng t nh phn a, mch c chc nng khuch i v lc nhiu: Tn s ct:
flow1=1/(2R5C5)=1.6 Hz ; fhigh1=1/(2R8C8)=16 Hz ; li:
Gain1=R8/R5=100c) Khi so snh :
Sau khi khuch i tn hiu, tn hiu s snh vi ngng v xut ra mc logic a
vo MCU x l.
Phn2: iu khin ng m ca t ng 1. Gii thiu vi iu khin AT89C518051 l
vi iu khin u tin ca h vi iu khin MCS51 c Intel sn xut vo nm 1980. H
MCS51 l h 8-bit c kh nng nh a ch 64KB b nh chng trnh v 64KB b nh d
liu.Mt s chip 8051 thng dng:
2. Kin trc phn cng:
3. Cu hnh chn:
-VCC: in p cung cp.-GND: c ni t.-RST : ng vo RESET, chn RESET mc
cao trong 2 chu k my khi b dao ng ang chy s RESET chip.-PSEN
(Program Store ENable): c ni vi chn OE ca chip d liu bn ngoi,-ALE :
(ALE : Adress Latch Enable) l tn hiu iu khin xut ra ca 8051, n cho
php phn knh gia bus a ch v bus d liu trn PORT0.-EA : (External
Access): chn b nh giao tip. EA=1: chn b nh ni, EA=0: chn b nh
ngoi.Cu hnh chn b nh ngoi:
-PORT 0:Port 0 l mt cng 8 bit I/O 2 chiu, Khi mc logic 1 c vit
vo cc PIN ca PORT 0, Pin c th c s dng l cng vo tr khng cao.Port 0
cng c th c cu hnh thnh bus ghp knh 8 bit a ch/d liu thp trong qu
trnh truy nhp b nh ngoi, ch ny cc PIN ca PORT 0 s c ko ln bn
trong.Ngoi ra PORT 0 cng c s dng np d liu cho chip.-PORT 1:Port 1 l
cng I/O 2 chiu c tr treo bn trong. Khi mc logic 1 c vit vo PIN ca
PORT 1, PIN c ko ln bi 1 tr treo bn trong, v c th c s dng l cng
vo.Ngoi ra cc PIN P1.0 v P1.1 c th c cu hnh l u vo ca b Timer 2
(AT89S52, AT89C52). Cc pin P1.5, P1.6, P1.7 (AT89S51, AT89S52) ln
lt l cc PIN MOSI, MISO, SCK khi s dng np cho chip qua ISP (In-
System Programing).-PORT 2 :Port 2 l cng I/O 2 chiu c tr treo bn
trong. Khi mc logic 1 c vit vo PIN ca PORT 2, PIN c ko ln bi 1 tr
treo bn trong, v c th c s dng l cng vo.Port 2 cng c th c cu hnh
thnh bus ghp knh 8 bit a ch cao trong qu trnh truy nhp b nh ngoi vi
16 bit a ch.-PORT 3 :Port 3 l cng I/O 2 chiu c tr treo bn trong.
Khi mc logic 1 c vit vo PIN ca PORT 3, PIN c ko ln bi 1 tr treo bn
trong, v c th c s dng l cng vo.Ngoi ra cc Pin ca PORT 3 cng c thm
cc chc nng c bit khc:
I. ENCODER.ng c s dng Encoder tng i l loi c s dng rng ri nht hin
nay.
Khi Encoder s c 2 phn l: a quay: cu to gm N rnh hoc l (hay phn
gii ca Encoder) Cc cp thu pht hng ngoi.Khi ng c quay khi Encoder s
xut ra 2 tn hiu dng xung A v B cng tn s, lch pha 90 (do s b tr lch
nhau ca 2 cp thu pht hng ngoi). Vi 2 tn hiu A, B ny mnh s xc nh c
tc v chiu quay ca ng c ti 1 thi im.
-Nguyn l o tc ng c:Khi tia hng ngoi t Led pht i qua 1 rnh trn a
Encoder n Led thu th trn knh A (B) s to ra 1 xung vung, nh vy khi a
quay quay c 1 vng th trn knh A (B)s c N xung. Gi tc ng c lV(vng/s),
s xung Encoder m c trong 1s ln, ta c cng thc tnh tc ng c:V=n/N
(vng/s) Cch xc nh chiu quay ca ng c:Nh trn ni, khi Encoder xut ra 2
xung A,B lch pha 90 , t c im ny, khi ng c ang 1 v tr bt k mnh s xc
nh c chiu quay ca ng c:Quay thun: Knh B trng thi mc cao khi knh A c
cnh xung.Quay nghch: Knh B trng thi mc thp khi knh A c cnh
xung.(trong bi ton ca mnh khng c ci ny).Tm li, o c tc ng c, bn ch
cn m c trong 1s Encoder xut ra bao nhiu xung hay ni cch khc chng ta
quy v bi ton o tn s xung vung trn knh A (hoc knh B) ca Encoder.
II. IC L298.IC L298 l mt IC tch hp nguyn khi gm 2 mch cu H bn
trong. Vi in p lm tng cng sut u ra t 5V 47V , dng ln n 4A, L298 rt
thch hp trong nhng ng dng cng sut nh nh ng c DC loi va
Mnh tm tt qua chc nng cc chn ca L298:-4 chn INPUT:IN1, IN2, IN3,
IN4c ni ln lt vi cc chn 5, 7, 10, 12 ca L298. y l cc chn nhn tn hiu
iu khin.-4 chn OUTPUT:OUT1, OUT2, OUT3, OUT4(tng ng vi cc chn
INPUT) c ni vi cc chn 2, 3, 13, 14 ca L298. Cc chn ny s c ni vi ng
c.-Hai chnENAvENBdung iu khin cc mch cu H trong L298. Nu mc logic 1
(ni vi ngun 5V) th cho php mch cu H hot ng, nu mc logic 0 th mch cu
H khng hot ng.
Vi bi ton ca em trn, cc bn ch cn lu n cch iu khin chiu quay vi
L298:-Khi ENA = 0: ng c khng quay vi mi u vo .-Khi ENA = 1:INT1 =
1; INT2 = 0: ng c quay thun.INT1 = 0; INT2 = 1: ng c quay
nghch.INT1 = INT2: ng c dng ngay tc th.(tng t vi cc chn ENB, INT3,
INT4).
Trong bi ton ny em s dng module L298 V1 iu khin chiu quay ca ng
c DC.S nguyn l:
III.S gii thut.Cm bin ngi
Lu cm binS
M ca
SV >5Dng ng c
SCm bin ngi
PWM
SDelay 15s
ng ca SV=0
SV>5
SDng ng cPWM
Lu PWMDem=0TH0=TL0=0x9bTH1=0x9b
TF0=1
PWM=1
PWM=0Dem
