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BI.DIS PFNs and KSW painting bumpers L4 BCC, 09.12.2010 L. Sermeus, A. Fowler, W. Weterings TE/ABT

BI.DIS PFNs and KSW painting bumpers

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BI.DIS PFNs and KSW painting bumpers. L4 BCC, 09.12.2010 L. Sermeus, A. Fowler, W. Weterings TE/ABT. Contents. BI.DIS power converters KSW magnet status KSW power converters. H - Booster Injection.DIStributor. 5 magnets 5 PFN type power converters - PowerPoint PPT Presentation

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Page 1: BI.DIS PFNs and KSW painting bumpers

BI.DIS PFNs and KSW painting bumpers

L4 BCC, 09.12.2010L. Sermeus, A. Fowler, W. WeteringsTE/ABT

Page 2: BI.DIS PFNs and KSW painting bumpers

Contents

BI.DIS power convertersKSW magnet statusKSW power converters

L4 BCC 09.12.2010L. Sermeus 2

Page 3: BI.DIS PFNs and KSW painting bumpers

H- Booster Injection.DIStributor

L4 BCC 09.12.2010L. Sermeus 3

• 5 magnets• 5 PFN type power converters• PFN electrical lengths vary from ~420 µs to ~20 µs (100 µs step)

BI.DIS BI.DVT40 SMV3

TAIL DUMP

HEAD DUMP

SMV1 SMV2

BI.DIS0 BI.DIS1 BI.DIS2 BI.DIS3 BI.DIS4 BI.DVT40

Page 4: BI.DIS PFNs and KSW painting bumpers

p BI.DIS present layout

L4 BCC 09.12.2010L. Sermeus 4

Features: • 5 Pulse Forming Networks 25 Ω (one per magnet)• PFN voltage up to 25 kV• thyratron switch• fixed duration (different for each PFN, max 200 µs)• terminated magnet

Present BI.DIS systems

This equipment can’t be upgraded because:• pulse length and current must double• capacitors are too old, many are leaking• the thyratron I.t product can’t be increased

Page 5: BI.DIS PFNs and KSW painting bumpers

H- BI.DIS proposed layout

L4 BCC 09.12.2010L. Sermeus 5

Features:Proposed BI.DIS systems

• 5 Pulse Forming Networks 6.25 Ω (one per magnet)• PFN voltage up to 10 kV ( ~6.25 kV nominal with H- operation)• IGBT switch• fixed duration (different for each PFN, max 420 µs) with possibility of

shortening by IGBT switch-off• short-circuited magnet• recuperation of a large fraction of the PFN stored energy

Page 6: BI.DIS PFNs and KSW painting bumpers

BI.DIS PFN data (preliminary) 37 cells (for a PFN of 420 µs) Split in three lengths of ~2 m Nominal voltage/current: 6.25 kV/1000 A Stored energy at nominal voltage: ~800 J Power dissipation at 1.1 Hz: ~1 kW

(without recuperation) Energy recuperation: > 50 % Charging power supply current: 450 mA Charging time from 0 to 6.25 kV: ~550 ms Kick rise time (1% - 99%): < 1 µs Flat-top ripple: ±1 %

L4 BCC 09.12.2010L. Sermeus 6

Page 7: BI.DIS PFNs and KSW painting bumpers

BI.DIS PFN status

Tests on a modified short PFN performed.IGBT and fast diodes selection done.Preliminary inquiries for capacitors will be

sent in January 2011.Prototype design will start in February

2011.Prototype validation expected by the end

of 2011.

L4 BCC 09.12.2010L. Sermeus 7

Page 8: BI.DIS PFNs and KSW painting bumpers

BI.DIS PFN issues, questions (1)

Space availability in BCER. Present BI.DIS rack space may not be sufficient.

L4 BCC 09.12.2010L. Sermeus 8

PFNs

Present control racks

Old control racks(not used anymore)

Minimal zone needed

Page 9: BI.DIS PFNs and KSW painting bumpers

Is the tail clipper BI.DIS0 absolutely necessary? It could be used as a direct spare for the other ones in case of failure. If not, a sixth generator has to be built and an intervention in the ring is needed to swap transmission cables.To avoid intervention in the ring, a cable junction box under the BCER floor is another option, adding potential contact and matching problems.

Is a kick duration of 420 µs max sufficient? An increased duration has a large impact on PFN cost (more cells) and size.

L4 BCC 09.12.2010L. Sermeus 9

BI.DIS PFN issues, questions (2)

Page 10: BI.DIS PFNs and KSW painting bumpers

KSW magnets (1)

L4 BCC 09.12.2010L. Sermeus 10

New magnets in 16L1 section to replace 1L1 ones

TE/ABT will only provide the magnets with supporting frame and ceramic vacuum chambers .Other vacuum modifications won’t be included.

Page 11: BI.DIS PFNs and KSW painting bumpers

KSW magnets (2)

L4 BCC 09.12.2010L. Sermeus 11

Present state: • CATIA 3D models of existing magnetshave been produced.

• 2D manufacturing drawings will be subcontracted to an external firm for availability by end of march 2011.

Page 12: BI.DIS PFNs and KSW painting bumpers

KSW magnets (3)

L4 BCC 09.12.2010L. Sermeus 12

Kick requirements are not frozen yet.

Magnet kick [mrad] B [T] Gap [mm]

KSW16L1 8.74 0.045 132

KSW1L4 2.55 0.013 132

KSW2L1 2.55 0.013 132

KSW16L4 8.74 0.045 132

For 55 mm orbit at stripping foil For 35 mm orbit at stripping foilMagnet kick [mrad] B [T] Gap [mm]

KSW16L1 5.56 0.029 132

KSW1L4 1.62 0.008 132

KSW2L1 1.62 0.008 132

KSW16L4 5.56 0.029 132

Data from C. Bracco (12/2010)

Present magnets have a different number of turns in each straight section.1L4 has 48 turns, 2L1 24 turns and 16L4 12 turns per half magnet.The magnet halves are powered in parallel.New 16L1 magnets could be made identical to 16L4 ones.It is highly desirable to have all magnets identical or no more than two different types to guarantee the same kick shape for all.

Page 13: BI.DIS PFNs and KSW painting bumpers

KSW power supplies

L4 BCC 09.12.2010L. Sermeus 13

Time [us]t2 tfall

KSW

Str

ength

t1

Imax

I1I2

t1

Kick pulse shape (optimum for the beam in cyan)(easiest to achieve in red)

Each parameter (currents, times) must vary ppm according to the beam type.exponential

linear

Data from C. Bracco (12/2010)

The most flexible option is to supply each magnet independently from a dedicated generator.

Power supply conceptual design for three linear slopes

Page 14: BI.DIS PFNs and KSW painting bumpers

L4 BCC 09.12.2010L. Sermeus 14

KSW conclusion

•As the components are very much dependant on the kick waveform, the magnet inductance (driven by the number of turns, the other parameters being fixed) has to be determined according to the power supply feasibility study.

•The number of magnets to be (re)built will also depend on the power supply study.

•There is a high probability that sixteen new magnets (+ spares) will have to be made.

•The final desired kick waveform is urgently needed to allow progress on the hardware design.