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BiTS Workshop 2008 Archive Keynote Speaker ARCHIVE 2008 “Packaging & Assembly in Pursuit of Moore’s Law and Beyond” Karl Johnson Ph.D. Vice President and Senior Fellow Advanced Packaging Systems Integration Laboratory Freescale Semiconductor As the semiconductor industry continues in its pursuit along the curve of Moore’s Law from 65 nm to 45 nm, 32 nm and beyond, the challenges for packaging and assembly technologies are becoming significant. Packaging can no longer be thought of as a back end process largely independent of the silicon and product definition. The assembly and packaging technologies have become an integral component in the overall performance, figures of merit and cost competitiveness of these new generations of products. Further, market trends and customer expectations are moving rapidly into higher levels of system integration and system solutions. This trend is moving products toward greater levels of integration and diversification beyond the scaling of Moore’s Law. Rapid market growth in areas beyond the traditional drivers for the semiconductor industry, such as computer and industrial applications, into consumer applications with semiconductor based systems becoming pervasive in all aspects of our lives is placing additional demands on packaging. These demands include but are not limited to lower cost, shorter time to market and greater flexibility and reuse. This presentation addresses these new challenges, the trends in packaging and assembly and some unique solutions that are being developed and implemented. A broad spectrum of products solutions from system-on-chip, 3D, system-in-package as well as “wafer level” assembly are discussed. Dr. Johnson leads the Advanced Packaging Systems Integration Laboratory (APSL) within the Freescale Technology Solutions Organization. This laboratory is responsible for the development and implementation of a broad spectrum of packaging advances in support of Freescale Semiconductor’s business and strategy. These innovations are in areas which include analog power, RF and sensor modules, automotive applications and advanced wirebond and flip chip packages. COPYRIGHT NOTICE The papers in this publication comprise the proceedings of the 2008 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the authors. There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies. All photographs in this archive are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in & Test Socket Workshop’ are trademarks of BiTS Workshop LLC.

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Page 1: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

BiTS Workshop 2008 Archive

����������Keynote Speaker

ARCHIVE 2008

“Packaging & Assembly in Pursuit of Moore’s Law and Beyond” Karl Johnson Ph.D.

Vice President and Senior Fellow Advanced Packaging Systems Integration Laboratory

Freescale Semiconductor

As the semiconductor industry continues in its pursuit along the curve of Moore’s Law from 65 nm to 45 nm, 32 nm and beyond, the challenges for packaging and assembly technologies are becoming

significant. Packaging can no longer be thought of as a back end process largely independent of the silicon and product definition. The assembly and packaging technologies have become an integral

component in the overall performance, figures of merit and cost competitiveness of these new generations of products. Further, market trends and customer expectations are moving rapidly into

higher levels of system integration and system solutions. This trend is moving products toward greater levels of integration and diversification beyond the scaling of Moore’s Law.

Rapid market growth in areas beyond the traditional drivers for the semiconductor industry, such as computer and industrial applications, into consumer applications with semiconductor based systems

becoming pervasive in all aspects of our lives is placing additional demands on packaging. These demands include but are not limited to lower cost, shorter time to market and greater flexibility and

reuse.

This presentation addresses these new challenges, the trends in packaging and assembly and some unique solutions that are being developed and implemented. A broad spectrum of products solutions

from system-on-chip, 3D, system-in-package as well as “wafer level” assembly are discussed.

Dr. Johnson leads the Advanced Packaging Systems Integration Laboratory (APSL) within the Freescale Technology Solutions Organization. This laboratory is responsible for the development and implementation of a broad spectrum of packaging advances in support of Freescale Semiconductor’s business and strategy. These innovations are in areas which include analog power, RF and sensor

modules, automotive applications and advanced wirebond and flip chip packages.

COPYRIGHT NOTICE

The papers in this publication comprise the proceedings of the 2008 BiTS Workshop. They reflect the authors’ opinions and are reproduced as presented , without change. Their inclusion in this publication does not constitute an endorsement by the BiTS Workshop, the sponsors, BiTS Workshop LLC, or the

authors.

There is NO copyright protection claimed by this publication or the authors. However, each presentation is the work of the authors and their respective companies: as such, it is strongly suggested that any use

reflect proper acknowledgement to the appropriate source. Any questions regarding the use of any materials presented should be directed to the author/s or their companies.

All photographs in this archive are copyrighted by BiTS Workshop LLC. The BiTS logo and ‘Burn-in & Test Socket Workshop’ are trademarks of BiTS Workshop LLC.

Page 2: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 1

TM

Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.

Packaging & Assembly in Pursuit of Moore’s Law and Beyond

BiTS Workshop 2008 – Phoenix, AZDr. Karl J Johnson – Vice President/Senior FellowFreescale Semiconductor, Inc

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 2

Outline

• Packaging Evolution

• Market / IDM Evolution

• Challenges

• Advanced Package Development

• Freescale’s Redistributed Chip Package (RCP)

• Conclusion

Agenda

Page 3: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 2

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 3

Analog/RF Passives HV Power SensorsActuators Biochips

(Source: 2005 ITRS)

More than Moore: Diversification

Mor

e M

oore

: Min

iatu

rizat

ion

130nm

90nm

65nm

45nm

32nm

22nm

Bas

elin

e C

MO

S: C

PU, M

emor

y, L

ogic

Information Processing

Digital contentSystem-on-chip

(SoC)

Interacting with people and environment

Non-digital content System-in-package

(SiP)

Combining SoC and SiP: Higher Value Systems

Low PowerCMOS

Low PowerCMOS

SMOSAnalogPower

SMOSAnalogPower

RF CMOSRF CMOS PackagingPackagingGaAsRF

GaAsRF

SensorsSensors

NonVolatileMemory

NonVolatileMemory

High Perform.

SOI

High Perform.

SOI

Evolution of Semiconductor Solutions

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 4

X2 47µm Probe

44µm Wire Pitch

47µm Probe Wire Bond Pitch

Bond and Probe Over Passivation

Bond Over Active

Dual In-linePGE Wire

Bond

37µm Wire PitchPGE 40µm probe

RF Contact less Probe

Wire Bond Technology Developments

Technology

More of Moore

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20082008 Keynote Address

March 9 - 12, 2008 3

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 5

Pb-free 1.27mm pitch sphere

Pb-free 1.00 mmpitch sphere

Pb-free 0.80 mm pitch sphere

Pb-free < 0.80 mm pitch sphere

180μm C4 bump pitch

MSL 3 245 C°

MSL3 260 C°

150 μm C4 bump pitch

Interconnect pitch / density

Technology

More of Moore

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 6

Outline

• The market drivers have evolved:Industrial

ComputerWireless

AutomotiveCustomer

• The market demands system solutions• Greater functionality with software• Faster Time to Market (product refresh)• Cost, Cost, Cost• Flexibility and reuse

• Society demands “Green” solutions

Market / IDM Evolution

Page 5: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 4

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 7

Power Amp Module -Organic Substrate

Front End Module –LTCC SubstrateEmbedded passives

Radio Modules

ThroughHole

Flip Chip

SMT Passive Discrete

PrintedResistor

Via

Inductor

Bare Die

Capacitor

Extreme RadioRadio + Modem

Integration

TRXFC HDI substrate

RF Module Technology Developments

Technology Integration

More than Moore

Cellular Evolution

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 8

AMPD Packaging Challenge Due to Integration• Automotive & Analog

Market DemandsSmaller Form Factor: (0.4mm lead pitch, WLCSP, Flip-Chip on Lead,

System in a Package – etc.)

Zero Defect

Increased Thermal Performance

Increasing voltage capability

Increased Functionality: Power Management, MCU, High-performance Analog, Memory, Sensor interface and integration

MLFSOT/8C

CABGASOIC

MQFP3.93mm

MQFP2.33mm

LQFP TSOP1.6mm 0.9mm

0.8mm0.6mm

TSOP TSQFP1.2mm

TSSOP 1.2mm

Consumer products need small form-factor of

QFN/ WLCSP packages

System-in-a-package

Impact

Power Gold Process

CTE Compensation

Organic substrate Insert for stress-free mounting

Flip Chip

Chip On-lead

Page 6: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 5

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 9

Outline

• System on a Chip (More of Moore)• Compromised subsystem performance• Signal integrity

• parasitics, cross coupling• Power and ground (core @ 1.0 volt)

• Parasitics – inductances to ground, IR drop• Design Cost • Time to Market• Decreasing flexibility and reuse• Pad Limited Designs

Challenges

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Packaging Cost Trends

0

10

20

30

40

50

60

70

2002 2003 2004 2005 2006 2007

% o

f Dev

ice

AS

other package test silicon

C180

C130C90

C65C45

C250

Page 7: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 6

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 11

Package Technology Generations

Short term packaging needs will be met by incremental improvements of current generations of technology.

BGA

QFP

DIP

Stacked Die

WL-CSP

Module

What’s Next?

??Future package needs will require new technology to meet continuing package demands.

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 12

PCB Embedded Die

PCB Embedded Die• Stacked package on/in package• Single chip systems• RF modules• Goal: smaller area, lower height,

less costDevelopment Work• Companies: Casio, Imbera• Universities: Fraunhofer

Page 8: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 7

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 13

Casio EWLP RF Module

Main die embedded in PCB (EWLP)• Other die on top of board (WLP)• Passives/packaged discretes on top of board (SMT)• Target: phones, Bluetooth, GPS, TV tuner• Joint development of Casio and CMK

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 14

TI Package on Package (PoP)

TI Stacked PoP• Baseband processor on bottom• Three-die stacked memory on top• Both packages are 14 x 14mm

Sony PoP

Page 9: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 8

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 15

STMicro Stacked Chip Scale Package

Stacked CSP:

Wirebond SRAM + Flash DRAM

Up to 8 die stacked

Thinned die to 40um

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 16

Qualcomm Package in Package (PiP)

Package in Package:

Digital baseband + analog baseband + memory

Page 10: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 9

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 17

Innovation in Packaging

Freescale’s Redistributed Chip Package Technology

Panel Array

Die Encapsulant Routing BGA

GSM EDGE i.275Radio in Package

LTE2 MAPBGA13mm x 13mm x 1mm

LTE2 RCP9mm x 9mm x 0.7mm

Benefits• Industry Leading Miniaturization –

30% size reduction, 30% in thickness vs. PBGA

• Ultra Low k compatible• Green (halogen and Pb free)• Eliminates package substrate, wire

bonds and flip chip bumps • Flexible technology

• Single, Multi Chip, SiP• Good Thermal Management• PoP, MEM compatible

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 18

Redistributed Chip Packaging

Existing Packaging TechnologyRF ModulesWire Bond Package Flip Chip Package

Freescale’s RCP Packaging Technology

Panel Array

Die Encapsulant Routing BGA

Die

Build-up

Page 11: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 10

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 19

Redistributed Chip Package – 200 mm Panel

200 mm round panel17 x 17 mm packages208 IO, 1.0 mm pitch82 packages/panel2 layer build-up

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 20

RCP RF Transceivers• Packaging Requirements

Passives in build-upGood RF electrical performanceFuture generation size and cost shrink

• RCP AdvantagesShorter development cycle timeImprovement in isolation over HDI design through a higher density of grounding vias possible with RCP.Size Reduction

> 0.80mm v. 1.20mm in thickness (33% height reduction)

> potential area shrink of ~20%RCP Build-Up• VCO Inductors built in M1 layer.• V1, M1 and V2 shown. critical distance to ground plane

Page 12: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 11

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 21

RCP Integration Capabilities

GSM-EDGE Radio-in-Package

3G UMTS Radio-in-Package

i.275 Transceiver - RCP3G BASE BAND

WM SG 060 6

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 22

RCP System Integration for Radio-in-Package

All ‘sub-assemblies’are fully tested using traditional ‘non-integrated’ test methodologies AND using conventional lowest test cost (ATE) platforms

20 mm

FLASHPSRAM

BaseBand

PowerMgmt

< 1.

4 m

m

TRX

Memory BaseMemory Base

Transceiver & PATransceiver & PA

Baseband ProcessorBaseband Processor

Power ManagementPower Management

P/A

FLASHPSRAM

Power MgmtBaseband Processor

NOW READY FOR SYSTEM

INTEGRATION

18 m

m

(animated slide)(animated slide)

1.4mmprofile view

18mm

top view

20mm

Page 13: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 12

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 23

45x90mm

440 - peripheral components10 - layer PCB

30x30mm

86 - embedded peripheral components36 - SMT peripheral componentsTotal of 122 peripheral componentsDoes not include PA or power FETS3-4 layer PCB required for HIF

3G-UMTSRadio

Three Key Benefits of RCP are…

Miniaturization

Integration

Elimination

~75% reduction in area~70% peripheral components eliminated!

(animated slide)(animated slide)

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 24

Outline

Market Demands:

• Systems Integration with increasing functionality

• Speed of design (Time to Market)

• Flexibility

• Reuse

• Cost, Cost, Cost

Are necessitating a revolution in packaging and assembly technologies

Conclusions

Page 14: BiTS 2008 Archive · BiTS Workshop 2008 Archive ... market trends and customer expectations are moving rapidly into ... • The market drivers have evolved: Industrial

20082008 Keynote Address

March 9 - 12, 2008 13

TMFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 25

TM