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January 2002 PMP Battery Management

User’s Guide

SLUU097

IMPORTANT NOTICE

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Copyright 2002, Texas Instruments Incorporated

Contents

iii

Contents

1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Kit Contents 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Performance Specification Summary 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2 Test Summary 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1 Setup 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Setup and Test Procedure for Li-Ion/Li-Pol Applications 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Test Procedure for NiCd/NiMH Applications 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3 Board Layouts, Bill of Materials, and Schematic 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Board Layout 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Bill of Materials 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3 Schematic 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.4 Reference 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Figures

3–1 Board Layout (Top Layer) 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2 Board Layout (Bottom Layer) 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3 Top Assembly View 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4 EVM Schematic Diagram 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables

1–1 Feature Sets of the bq24700 and bq24701 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2 Performance Specification Summary 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1 I/O Connections 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2 Jumper Selectable Configuration (Factory Set to Bold Selections) 2-2. . . . . . . . . . . . . . . . . . . 2–3 Battery Pack: Four 4.2-V Cells (16.8-V Pack) 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1 Bill of Materials 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents

iv

1-1

Introduction

The bq2470x evaluation module (SLUU097) is a complete, designed-and-tested charger for evaluating a multichemistry charge-management solutionfor notebook PC applications using the bq2470x product family. The chargerdelivers up to 3 A of continuous charge current for three- or four-cell Li-Ion (orLi-Pol) or five- to ten-cell NiCd/NiMH applications.

The bq2470x is a highly integrated battery charge controller and selector fornotebook and subnotebook PC applications. For details, see the bq2470x datasheet (literature number SLUS452A).

Topic Page

1.1 Features 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2 Kit Contents 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3 Performance Specification Summary 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 1

Features

1-2

1.1 Features

Up to 3 A charge current

Programmable adapter current, charge current, and charge voltage andbattery depletion levels

Support for single-chemistry and multichemistry applications

Depleted battery detection and indication to protect battery from overdis-charge

Charge-enable and ac-select inputs

1.2 Kit Contents

bq2470x evaluation module

Support documentation

Table 1–1.Feature Sets of the bq24700 and bq24701

Condition Selector Operation

Battery as power source Battery removal Automatically selects ac

Battery re-inserted Selection based on selector inputs

AC as power source AC removal Automatically selects battery

AC Reapplied Selection based on selector inputs

Depleted battery Battery as power source Sends alarm signalAutomatically selects ac (bq24701 only)

AC as power source Sends alarm signal

1.3 Performance Specification Summary

This section summarizes the performance specifications of the SLUU097EVM. Table 1–2 gives the performance specifications of the hubs.

Table 1–2.Performance Specification Summary†

Specification Test Conditions Min Max Unit

Input adapter voltage, VADP VBAT+1.0‡ 28 V

Battery charge current, ICHG Set by host or jumper1 1 3 Amps

System current, ISYS Set by host or jumper2 1 3 Amps

Battery voltage regulation, VBAT Set by host or jumper3 9 16.8 V

Battery depletion level, VDEP Set by jumper4 4.8 V

† Electrical characteristics over recommended operating temperature (–40°C to 85°C)‡ Minimum voltage due to valley of ripple voltage

2-1Test Summary

Test Summary

This chapter shows the test setups and the tests performed in designing theSLUU097 EVM.

Topic Page

2.1 Setup 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2 Setup and Test Procedure for Li-Ion/Li-Pol Applications 2-3. . . . . . . . . .

2.3 Test Procedure for NiCd/NiMH Applications 2-5. . . . . . . . . . . . . . . . . . . . .

Chapter 2

Setup

2-2

2.1 Setup

The bq2470X EVM board requires a dc power source to provide input power,and a load resistor or battery pack to charge.

The test setup connections and jumper setting selections are listed inTable 2–1 and 2–2..

Table 2–1. I/O Connections

Jack Connect To

J1–Vin Power source positive output

J1–GND Power source negative output

J2–SYS Positive output to system. For setup, do not make a connection until instructed.

J2–GND Return output to system. For setup, do not make a connection until instructed.

J2–VBAT Positive output to battery pack. For setup procedure, connect 100-Ω, 5-W resistor, with respectto GND

J2–GND Negative output to battery pack. For setup procedure, connect 100-Ω, 5-W resistor with respectto VBAT.

J3–ENABLE 0 Vdc: disable; 5Vdc: enable. Use JMPR J4 for local control only.

J3–ACSEL 0 Vdc: disable; 5 Vdc: enable. Use JMPR J5 for local control only.

J7–SRSET V(srset) = 25 × Rs⋅× Ibat; V(srset) < 2.0 V

J7–ACSET V(acset) = 25 × R × Ibat; V(acset) < 2.0 V

J7–BATSET 5 Vdc < V(batset) < 0.25 Vdc enabled; V(batset) < 0.25 V disabled and uses fixed internalreference.

J7–GND Signal return

J11–ALARM TTL HIGH is a battery depletion alarm.

J11–ACPRES TTL high implies input power good to charge.

J11–IBAT Relative indication for battery charge current. See data sheet for more detail.

J11–GND Signal return

Table 2–2.Jumper Selectable Configuration (Factory Set to Bold Selections)

Jumper Selection

J4 ENABLE, local control, ON | OFF†

J5 ACSEL, local control, ON | OFF†

J6 VS, set for ADJ or OFF

J8 SRSET, set for EXT or LCL control.

J9 ACSET, set for EXT or LCL control.

J10 BATSET, set for EXT or LCL control.

† Do not use jumper if using external control.

Setup and Test Procedure for Li-Ion/Li-Pol Applications

2-3Test Summary

2.2 Setup and Test Procedure for Li-Ion/Li-Pol Applications

The bq2470XEVM is configured from the factory as shown in Table 2–3.

Table 2–3.Battery Pack: Four 4.2-V Cells (16.8-V Pack)

Potentiometer Adjustment Threshold Setting

R9 – ACDET ADJ. (power present threshold) 17.8 V

R31 – BATSET ADJ. (fixed/adjustable reference) If VBATSET ≤ 0.25 V, then VREF = 1.25 V;If VBATSET > 0.25 V, then VREF = VBATSET

R29 – ACSET ADJ. (input current limit) 3A

R27 – SRSET ADJ. (battery charge current limit) 2 A

R24 – BATP ADJ. (battery regulation voltage) 16.8 V

R22 – BATDEP ADJ. (depletion alarm threshold) 12 V

R18 – VS ADJ. (break before make system power threshold) 16.8 V

This procedure configures the evaluation board and evaluates the IC usingthe EVM as a stand-alone unit. The board was originally configured accordingto Table 2–3. To configure the board differently, make sure the EVM is set upas shown in the I/O and jumper tables above. An external power source (20 V,3 A) and a 100 Ω, 5-W resistor are needed to set up the EVM. To evaluate theEVM, use an electronic load, a battery pack, and a current meter. The inputs(SRSET, ACSET, BATSET, ENABLE, and ACSEL) can be controlledexternally via the connectors and by proper placement of the jumpers.

1) Adjust the BATSET potentiometer R31 fully counter clockwise.

2) Set the power source for the minimum input voltage to be used to fullycharge the battery pack. Vin(min) = V(reg) + 1 Vdc. For setup procedure, donot let the input exceed 19 Vdc. If BATP and BATSET potentiometers areboth adjusted for maximum values, then the regulation voltage is set over19 V, which exceeds the maximum voltage on the SR sense pins. Oncethe regulation is set, the input (after this procedure) can be set within theoperating range of the EVM.

3) Adjust R9 (AC DET) until TP2 measures 1.235 V.

4) Adjust the ACSET potentiometer R29 fully clockwise.

5) Adjust the SRSET potentiometer R27 fully clockwise.

6) Set the battery regulation voltage by first replacing the battery pack witha load resistor (100 Ω, 5 W). The regulation voltage can be set by eitherof two methods:

a) Using the internal reference (BATSET adjusted fully counterclockwise, V(batset) = 0 Vdc), adjust the BATP potentiometer R24 forthe desired regulation voltage. This method is preferred for a singlefixed regulation.

b) Using the external reference (Adjust R24 (BATP) fully clockwise), ad-just BATSET potentiometer, R31, until the desired regulation voltageis reached.

Setup and Test Procedure for Li-Ion/Li-Pol Applications

2-4

Note:

Until V(batset) is greater than 0.25V, the BATSET pin is not in control. Theregulation voltage drops significantly once this threshold is exceeded.Continue adjustment until the desired regulation voltage is achieved. Thismethod is preferred for multiple regulation settings, usually controlledexternally by a microcontroller.

7) Adjust the BAT DEP potentiometer R22, until TP14 measures thecalculated voltage.

V(batdep) (V(tp14)) = 1.22 × V(reg)/V(dep)

Example for 3 Li Ion cells: V(batdep) = 1×22⋅(3×4.2)/(3×3.0) = 1.22×4.2V/3.0 V = 1.71 V

Note:

The VBAT output has to be at the regulation voltage during this adjustmentto get the correct scaling for BAT DEP.

8) Adjust the VS potentiometer, R18, until V(vs) (TP6) measures thecalculated value.

V(vs) = 1.22 × V(sys)/V(reg). Example for V(sys) = 18 V, V(reg) = 12.6 V:

V(vs) = 1.22 × 18 V/12.6 V = 1.74 V. Note that V(sys) is the input voltageminus the drops and should be measured at J2–SYS.

9) Adjust the SRSET potentiometer, R27, until V(srset) (TP16) measuresthe calculated value.

V(srset) = 25R(s)⋅×(bat). Example for 2 amp charge:V(srset) = 25 × 025×2 = 1.25 V. Note, an electronic load can replace the100-Ω resistor to load the output and set/verify the current.

10) Adjust the ACSET potentiometer, R29, until Vacset (TP17) measures thecalculated value.

V(acset) = 25×R(s2)×I(adpt)

Example for 3-A maximum adapter current: V(acset) = 25×0.025×3 = 1.875 V

Note:

An electronic load placed on the SYS output can set the adapter current,while monitoring the input current.

The adapter input current is a function of both the battery current and thesystem current.

Test Procedure for NiCd/NiMH Applications

2-5Test Summary

2.3 Test Procedure for NiCd/NiMH Applications

This procedure configures the evaluation board and evaluates the IC, usingthe EVM as a stand-alone unit. The board was originally configured as inTable 2–3. To configure the board differently, make sure the EVM has been setup as shown in the I/O and jumper tables. An external power source (20 V, 3 A)and a 100-Ω, 5-W resistor are needed to set up the EVM. To evaluate the EVM,an electronic load, a battery pack, and a current meter are required. The inputs(SRSET, ACSET, BATSET, ENABLE, and ACSEL) can be controlledexternally, by the connectors, and by proper placement of the jumpers.

1) Adjust the BATSET potentiometer R31 fully CCW, V(batset) = 0 Vdc.

2) Set the power source for the minimum input voltage required to fullycharge the battery pack. VI(min) = V(reg) + 1 Vdc. For setup procedure, donot let the input exceed 19 Vdc. If BATP and BATSET potentiometers areboth adjusted for maximum values, then the float voltage is set over 19 V,which exceeds the maximum voltage on the SR sense pins. Once the floatvoltage is set, the input (after this procedure) can be set within theoperating range of the EVM.

3) Adjust R9 (AC DET) until TP2 measures 1.235 Vdc.

4) Adjust the ACSET potentiometer R29 fully CW.

5) Adjust the SRSET potentiometer R27 fully CW.

6) Set the battery float voltage by first replacing the battery pack with a loadresistor (100 Ω, 5 W). The regulation voltage can be set by either of twomethods:

a) Using the internal reference (BATSET adjusted fully CCW, V(batset) =0 Vdc). Adjust the BATP potentiometer, R24, for the desired floatvoltage. This method is preferred for a single fixed regulation.

b) Using the external reference (Adjust R24 (BATP) fully CW). AdjustBATSET potentiometer, R31, until the desired float voltage is reached.Note that until V(batset) is greater than 0.25 V, the BATSET pin is notin control. The float voltage drops significantly once this threshold isexceeded. Continue adjustment until the desired regulation voltage isachieved. This method is preferred for multiple regulation settings,usually controlled externally by a microcontroller.

7) Adjust BAT DEP, R22, until TP14 measures the calculated voltage.

V(batdep) (V(tp14)) = 1.22 × V(float)/V(dep)

Example for 8 NiCd cells:V(batdep) = 1.22 × (8 × 1.8)/(8 × 1.0) = 1.22 × 1.8 V/1 V = 2.20 V

Note:

The VBAT output has to be at the float voltage during this adjustment to getthe correct scaling for BAT DEP.

Test Procedure for NiCd/NiMH Applications

2-6

8) Adjust the VS potentiometer, R18, until Vvs (TP6) measures thecalculated value.

V(vs) = 1.22×Vsys/V(float)

Example for Vsys = 18 V, 8 NiCd cells: V(float) = 1.8 V/cell × # of cell = 1.8 V/cell×8cells= 14.4 V, Vvs = 1.22 × 18 V/14.4 V = 1.53 V

Note:

Vsys is the input voltage minus the drops and should be measured atJ2–SYS.

9) Adjust the SRSET potentiometer, R27, until Vsrset (TP16) measures thecalculated value. Vsrset = 25×Rs×Ibat.

Example for 2 amp charge:V(srset) = 25 × 0.025 × 2 = 1.25 V.

Note:

An electronic load can be used, in place of the 100-Ω resistor to load the out-put and set/verify the current.

10) Adjust the ACSET potentiometer, R29, until V(acset) (TP17) measuresthe calculated value.

V(acset) = 25 × Rs2 × I(adpt).

Example for 3-A maximum adapter current: V(acset) = 25 × 0.025 × 3 = 1.875 V.

Note:

An electronic load can be placed on the SYS output to set the adapter currentwhile monitoring the input current.

Note:

The adapter input current is a function of both the battery current and thesystem current.

3-1Board Layouts, Bill of Materials, and Schematic

Board Layouts, Bill of Materials, andSchematic

This chapter contains the physical layouts, the bill of materials, and theschematic for the EVM.

Topic Page

3.1 Board Layouts 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.2 Bill of Materials 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.3 Schematic 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.4 Reference 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Chapter 3

Board Layout

3-2

3.1 Board Layout

Figure 3–1 shows the top layer of the EVM. Figure 3–2 shows the bottom layer.Figure 3–3 shows the top assembly view.

Figure 3–1. Board Layout (Top Layer)

Figure 3–2. Board Layout (Bottom Layer)

Board Layout

3-3Board Layouts, Bill of Materials, and Schematic

Figure 3–3. Top Assembly View

Bill of Materials

3-4

3.2 Bill of Materials

Table 3–1 lists materials required for the SLUU097 EVM.

Table 3–1.Bill of Materials

–0 Qty. –1 Qty. RefDes Description Size MFR Part Number

2 2 C1, C2 Capacitor, aluminum, SM,330 µF, 3.5 V, 150 mΩ, FC series

10x12mm Panasonic EEV–FC1V331P

1 1 C3 Capacitor, ceramic, 1 µF,16 V, XR7, 10%

1206 std std

4 4 C4, C8,C11, C12

Capacitor, ceramic, 0.1 µF, 50 V, XR7, 10%

805 std std

1 1 C5 Capacitor, aluminum, 22 µF, 35 V, 20%, FC Series

0.335 x 0.374 Panasonic EEVFC1V220P

2 2 C6, C7 Capacitor, tantalum, 4.7 µF, 25 V, 20%

Panasonic ECS–T1EX475R

2 2 C9, C10 Capacitor, tantalum, 10 µF, 16 V, 20%

1210 Panasonic ECS–T1CX106R

2 2 D1, D3 Diode, dual Schottky, 6 A,40 V

DPAK On Semi MBRD640CTT4

2 2 D2, D4 Diode, switching, 10 mA,85 V, 350 mW

SOT23 Vishay–Liteon BAS16

3 3 D5, D6,D7

Diode, Zener, 18 V, 19 mA, 350 mW

SOT23 GeneralSemiconductor

MMBZ5248

2 2 J1, J3 Terminal block, 2 pin, 6 A,3.5 mm

75525 OST ED1514

3 3 J2, J7, J11 Terminal block, 4 pin, 6 A,3.5 mm

148400 OST ED1516

6 6 J4, J5, J6,J8, J9, J10

Header, 3 pin, 100milspacing

34100 Sullins PTC36SAAN

1 1 L1 Inductor, SMT, 33 µH, 3 A,50 mΩ

0.472 sq Sumida CDRH127–330

1 1 R1 Resistor, Chip, 54.9 kΩ,0.1 W, 5%

805 Std Std

3 3 R10, R11,R16

Resistor, chip, 100 kΩ, 0.1 W, 5%

805 Std Std

3 3 R12, R13,R15

Resistor, chip, 100 Ω, 0.1 W, 5%

805 Std Std

1 1 R14 Resistor, chip, 4 kΩ, 0.1 W, 5%

805 Std Std

1 1 R17 Resistor, chip, 10 Ω, 0.1 W, 5%

805 Std Std

2 2 R19, R23 Resistor, chip, 604 Ω, 0.1 W, 5%

805 Std Std

Bill of Materials

3-5Board Layouts, Bill of Materials, and Schematic

Table 3–1. Bill of Materials (Continued)

–0 Qty. –1 Qty. RefDes Description Size MFR Part Number

2 2 R20, R25 Resistor, chip, 45.3 kΩ,1/10 W, 5%

805 Std Std

1 1 R21 Resistor, chip, 274 kΩ,1/10 W, 5%

805 Std Std

2 2 R26, R28 Resistor, chip, 75 kΩ, 1/10 W, 1%

805 Std Std

3 3 R27, R29,R31

Potentiometer, 50 k, 1/4Cermet

Top-Adjust Bourns 3266W–503

1 1 R3 Resistor, chip, 768 kΩ,1/10 W, 5%

805 Std Std

5 5 R30, R32,R33, R34,R35

Resistor, chip, 49.9 kΩ,1/10 W, 5%

805 Std Std

2 2 R4, R8 Resistor, chip, 0.25 Ω, 1/2W, 1%

2010 Vishay – Dale WSL2010.025±1%

1 1 R5 Resistor, chip, 1 kΩ, 0.1 W, 5%

805 Std Std

2 2 R6, R7 Resistor, chip, 0.00 Ω, 0.1 W

805 Std Std

4 4 R9, R18,R22, R24

Potentiometer, 100 kΩ, 1/4Cermet

Top-Adjust Bourns 3266W–104

3 3 U1, U2,U3

MOSFET, P–ch, 30 V, 8.0 A, 20 mΩ

SO8 Siliconix Si4435DY

1 0 U3 IC, battery charge controller/selector w/DPM

TSSOP23 TI bq24700PW

0 1 U4 IC, battery charge controller/selector w/DPM

TSSOP24 TI bq24701PW

Schematic

3-6

3.3 Schematic

This section contains the schematic diagram for the EVM

Figure 3–4. EVM Schematic Diagram

GN

D

IBA

T

Gnd

2

543

4

1

1 2

3

5

TP

8

BA

TS

ET

SR

SE

T

Ala

rm

AC

SE

L

Vin

TP

6

Vba

t

Gnd

Vsy

s

AC

SE

T

AC

PR

ES

Ena

ble

Gnd

1 2 3

J6

1 2 3

J10

TP

191 2 3

J8

R35

49.9

k

TP

11

TP

10

1 2 3

J4

TP

16

R34

49.9

k

R11

100kR10

200

TP

1

TP

12

R1

54.9

k

R3

768k

TP

2

TP

17

+4.

7uF

C7

R12

100

TP

3

R30

49.9

k

BA

S16

D2

TP

4

C4

.1uF

TP

5T

P7

TP

15

D9

TP

9

Gnd

1 2 3

J9

1 2 3

J5

50k

R27

+C

6

4.7u

F

49.9

k

R33

R2

100k

R9

R15

100

R7

0

+

C1 35

V

330u

F+

C2

330u

F35

V

2

C10

45.3

k

R25

100k

R24

R23

604k

1 2

D8

1234

J2

604k

R19

75k

R26

R32

49.9

k

TP

13

21J3

.01u

F

C12

21J1

50k

R31

C9

10uF

25V

R16

100k

8765

4

1 2 3U2

Si4

435D

YR

13

100

1kR5

33uHL1

.025

R4

100k

R22

TP

14

D7

18V

+C

522

uF35

V

8765

4

1 2 3

U3

Si4

435D

Y

.025R

8

1 2 3 4

J7

R28

75k

R14 4k

D1

MB

RD

640C

TT

4

D4

BA

S16

C8

150p

F

TP

18

18VD5

8765

4

1 2 3

U1

Si4

435D

Y

R6 0

1uF

C3

10R17

D3

MB

RD

640C

TT

4

12

L2

274k

R21

100k

R18

45.3

k

R20

D6

18V

1 2 3 4

J11

12A

CP

11A

CN

1A

CD

ET

8E

NA

BLE

3A

CS

EL

19A

LAR

M

6A

CS

ET

5S

RS

ET

2A

CP

RE

S14

IBA

T7

VR

EF

10C

OM

P

24A

CD

RV

22V

CC

21P

WM

15S

RN

16S

RP

13B

AT

P23

BA

TD

RV

18V

S20

VH

SP

9B

AT

SE

T4

BA

TD

EP

17G

ND

bq24

70x

U4

VS

jmpr

. (hi

gh)

C10

IS A

10u

F, C

ER

AM

IC, X

7R, O

PT

ION

AL

FO

R F

ILT

ER

ING

.

D8

(MB

RD

640C

TT

4) M

AY

BE

US

ED

IN P

LAC

E O

F U

3.

BA

TS

ET

JM

PR

. LC

L.

BA

TS

ET

JM

PR

. EX

T.

AC

SE

T J

MP

R. L

CL.

AC

SE

T J

MP

R. E

XT.

SR

SE

T J

MP

R. E

XT.

AC

SE

L O

FF

(Lo

w)

Ena

bled

(H

igh)

VS

jmpr

. (lo

w)

D9

IS A

MO

ME

NTA

RY

OV

ER

VO

LTA

GE

PR

OT

EC

TIO

N F

OR

PIN

SS

RN

AN

D S

RP.

IT S

HO

ULD

N’T

BE

NE

ED

ED

FO

R A

CO

MP

LET

ED

DE

SIG

N.

50k

R29

ALT

ER

NA

TE

PA

RT

CA

N B

E S

UB

ST

ITU

TE

D F

OR

L1.

CO

ILC

RA

FT

DO

5022

2P–3

33, 3

3uH

.C

OM

PO

NE

NT

R3

MA

Y B

E M

OV

ED

TO

R2

TO

DE

TE

CT

VO

LTA

GE

UP

ST

RE

AM

OF

DIO

DE

D1.

SE

E D

ATA

SH

EE

T F

OR

DIS

CU

SS

ION

.

SR

SE

T J

MP

R. L

CL.

C11

180p

F

AC

SE

L O

N (

Hig

h)

Dis

able

d (L

ow)

Reference

3-7Board Layouts, Bill of Materials, and Schematic

3.4 Reference

1. bq2470x data sheet (literature number SLUS452A)

3-8