INTERLEAVED ZERO VOLTAGE SWITCHING COUPLED INDUCTORBUCK CONVERTER FOR LOW VOLTAGE-HIGH CURRENT

APPLICATIONS

DOMAIN

Power electronics

OBJECTIVE:

The main object of the proposed converter is to reduce the input current ripple,

interleaving approach is employed.

.

INTRODUCTION:Fast development of microprocessor teleology has resulted in serious challenges for

their power supplies. Actually, these challenges began with the introduction of high performance

Pentium processors supplied with less than 5V. Due to very small operating duty cycle of the

buck converter which is equal to the ratio of the output to input voltage, the regulation period is

very short. Consequently, gate drive of the main switch is difficult to realize, switch current level

is very high and thus, the efficiency is low. Tapped inductor (TI) can be used in the buck

converter to extend the duty cycle.

EXISTING SYSTEM:

Buck converter with synchronous rectifier is applied to most of the VRM topologies A

large output filter is required to reduce the output ripple in the VRM module. However, the VRM

size must be small because of space limitations, especially in laptop application. Increasing the

switching frequency is the best solution to reduce size and weight. However, the switching losses

and the synchronous switch body diode reverse-recovery losses would increase proportional to

the increased switching frequency

DRAWBACKS:

Due to very small operating duty cycle of the buck converter which is equal to the ratio

of the output to input voltage, the regulation period is very short.

PROPOSED SYSTEM:AIM:

The main aim of this project is to Applying coupled inductor structure to buck converter

increases the duty cycle which results in reduced input current ripple.

ABSTRACT:

In this project an interleaved zero-voltage-switching coupled inductor buck converter

is proposed for low voltage high current applications. Applying coupled inductor structure to a

buck converter increases the duty cycle which results in reduced input current ripple. In order to

achieve zero-voltage-switching conditions or both main and synchronous switches, the proposed

converter operates at the boundary of DCM/CCM. To further reduce the input current ripple,

interleaving approach is employed.

METHODOLOGY:

In this proposed converter Coupled inductor is utilized to extend the duty cycle of the

synchronous buck converter and lossless clamp circuit removes the leakage inductance energy

problem.

CIRCUIT DIAGRAM:

BLOCK DIAGRAM:

Ac supply Bridgerectifierwith Filter

Full bridgeInverter

Rectifier Filter

CRO

Output

Driver circuit(12v)

PIC controller(5v)

HARDWARE/SOFTWARE REQUIREMENTS

SOFTWARE REQUIREMENTS:

MATLAB SIMULINK

Or cad / P Spice

HARDWARE REQUIREMENTS:

PIC Controller

ADVANTAGES:

It prevents the current from flowing back to the source.

The efficiency of the converter is increased.

APPLICATIONS:

Laptop

Desktop

Low voltage Applications

High current applications

REFERENCES:

[1] M. T. Zhang, M. M. Jovanovic, and F. C. Lee, "Design considerations for low-voltage on-

board DCfDC modules for next generations of data processing circuits," IEEE Trans. Power

Electron., vol. II, pp. 32S-337, Mar. 1996.

[2] X. Zhou, P. Wong, P. Xu, F. C. Lee, and A. Q. Huang, "Investigation of candidate VRM

topologies for future microprocessors," IEEE Trans. Power Electron., pp. 1172-11S2, Nov. 2000.

[3] P. Xu ,.I. Wei, and F. C. Lee, "Multiphase coupled-buck converterA novel high efficient 12

V voltage regulator module," IEEE Trans. Power Electron. , vol. IS, no. I, JAN. 2003

[4] K. Yao, "High frequency and high performance VRM design for the next generation of

processors" PhD. dissertation, Dep. Elec. Eng. Virginia Univ., Blacksburg, Apr, 2004.

[5] Sh. Ye, W. Eberle, and Y-F. Liu, "A novel non-isolated full bridge topology for VRM

applications,"lEEE Tr.w. Power Electron. , vol. 23, no. I, JAN 200S