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8/12/2019 Ch_11=Displacement Slide No 16
http://slidepdf.com/reader/full/ch11displacement-slide-no-16 1/35
Computer Architecture
and Organization
Instruction Sets:
Addressing Modes and Formats
8/12/2019 Ch_11=Displacement Slide No 16
http://slidepdf.com/reader/full/ch11displacement-slide-no-16 2/35
Addressing Modes
• Immediate
• Direct
• Indirect
• Register
• Register Indirect
• Displacement (Indexed)
• Stack
8/12/2019 Ch_11=Displacement Slide No 16
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Immediate Addressing
• Operand is part of instruction
• Operand = address field
• e.g. ADD 5
—Add 5 to contents of accumulator
—5 is operand
• No memory reference to fetch data
• Fast
• Limited range
8/12/2019 Ch_11=Displacement Slide No 16
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Immediate Addressing Diagram
OperandOpcode
Instruction
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Direct Addressing
• Address field contains address of operand
• Effective address (EA) = address field (A)
• e.g. ADD A
—Add contents of cell A to accumulator
—Look in memory at address A for operand
• Single memory reference to access data
• No additional calculations to work out
effective address• Limited address space
8/12/2019 Ch_11=Displacement Slide No 16
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Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
8/12/2019 Ch_11=Displacement Slide No 16
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Indirect Addressing
• Memory cell pointed to by address fieldcontains the address of (pointer to) theoperand
• EA = (A)
—Look in A, find address (A) and look there foroperand
• e.g. ADD (A)
—Add contents of cell pointed to by contents of
A to accumulator
8/12/2019 Ch_11=Displacement Slide No 16
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Indirect Addressing
• Large address space
• 2n where n = word length
• May be nested, multilevel, cascaded
—e.g. EA = (((A)))
– Draw the diagram yourself
• Multiple memory accesses to find operand
• Hence slower
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Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
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Register Addressing
• Operand is held in register named inaddress filed
• EA = R
• Limited number of registers
• Very small address field needed—Shorter instructions
—Faster instruction fetch
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Register Addressing
• No memory access
• Very fast execution
• Very limited address space
• Multiple registers helps performance
—Requires good assembly programming orcompiler writing
—N.B. C programming
– register int a;
• c.f. Direct addressing
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Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
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Register Indirect Addressing
• C.f. indirect addressing
• EA = (R)
• Operand is in memory cell pointed to bycontents of register R
• Large address space (2n)
• One fewer memory access than indirectaddressing
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Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Register Indirect Addressing Diagram
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Displacement Addressing
• EA = A + (R)
• Address field hold two values
—A = base value
—R = register that holds displacement
—or vice versa
8/12/2019 Ch_11=Displacement Slide No 16
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Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
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Relative Addressing
• A version of displacement addressing
• R = Program counter, PC
• EA = A + (PC)
• i.e. get operand from A cells from current
location pointed to by PC• c.f locality of reference & cache usage
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Base-Register Addressing
• A holds displacement
• R holds pointer to base address
• R may be explicit or implicit
• e.g. segment registers in 80x86
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Indexed Addressing
• A = base
• R = displacement
• EA = A + R
• Good for accessing arrays
—EA = A + R
—R++
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Combinations
• Postindex
• EA = (A) + (R)
• Preindex
• EA = (A+(R))
• (Draw the diagrams)
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8/12/2019 Ch_11=Displacement Slide No 16
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Pentium Addressing Modes
• Virtual or effective address is offset into segment
—Starting address plus offset gives linear address
—This goes through page translation if paging enabled
• 12 addressing modes available
—Immediate
—Register operand—Displacement
—Base
—Base with displacement
—Scaled index with displacement
—Base with index and displacement
—Base scaled index with displacement
—Relative
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Pentium Addressing Mode Calculation
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PowerPC Addressing Modes
• Load/store architecture
—Indirect– Instruction includes 16 bit displacement to be added to
base register (may be GP register)
– Can replace base register content with new address
—Indirect indexed
–
Instruction references base register and index register(both may be GP)
– EA is sum of contents
• Branch address—Absolute
—
Relative—Indirect
• Arithmetic—Operands in registers or part of instruction
—Floating point is register only
P PC M O d
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PowerPC Memory Operand
Addressing Modes
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Instruction Formats
• Layout of bits in an instruction
• Includes opcode
• Includes (implicit or explicit) operand(s)
• Usually more than one instruction format
in an instruction set
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Instruction Length
• Affected by and affects:
—Memory size
—Memory organization
—Bus structure
—
CPU complexity—CPU speed
• Trade off between powerful instructionrepertoire and saving space
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Allocation of Bits
• Number of addressing modes
• Number of operands
• Register versus memory
• Number of register sets
• Address range
• Address granularity
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PDP-8 Instruction Format
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PDP-10 Instruction Format
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PDP-11 Instruction Format
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Pentium Instruction Format
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PowerPC Instruction Formats
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PowerPC Instruction Formats