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Challenges of Heterogeneous Integrationfor Power Electronics
Driving Force and Enabling Technology for Systems of the Future hhttttpp::////eeppss..iieeeeee..oorrgg//tteecchhnnoollooggyy//hheetteerrooggeenneeoouuss--iinntteeggrraattiioonn--rrooaaddmmaapp..hhttmmll
Bill [email protected]
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IITTRRSS –– aa BBrriieeff HHiissttoorryy
1991 to July 8th , 2016Guided by Moore’s Law we knew the challenges
well in advance and metrology and characterization tools were available
The path to progress was known, difficult challenges were known and all things were right
with the world
International Technology Roadmap for Semiconductors
Moore’s Law nearing its Economic End of Life Source; Economists March 2016
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52 Years After Moore’s Law The World Has Changed.....CMOS Scaling Is no longer Driving The Pace of Progress
The ITRS Is Over
We are entering a period of technology chaos driving new ideas that increase the pace of innovation
….the world has evolved and is
changing in ways never imagined.
Path Forward“The path forward is not as clear as it was during the Moore’s Law era. However, there is enormous potential for economic and societal benefits—some that are envisioned and others yet to be imagine…
Heterogeneous Integration Roadmap Founded with Initiatives from three IEEE Societies (EPS, EDS, Phtonics), SEMI & ASME EPPD, and expanded to embrace innovation wherever it arises and promote collaboration wherever possible to accelerate progress in the disruptive digital market landscape
At this pivotal point, progress requires industry, government, and academia to step up …..to be a key player in the spectrum of activities that will be necessary, from fundamental
scientific research to commercial application.” SEMICONDUCTOR RESEARCH OPPORTUNITIES, An Industry Vision & Guide. SIA & SRC March 2017
2006 DEC. 2016
• Exxon Mobil• General Electric• GazpromØMicrosoft• Citicorp• Bank of America• Royal Dutch Shell• BP• Petro China• HSBC
2017 April 7, 2017
ØAppleØAlphabet (Google)ØMicrosoftØAmazon• Berkshire HathawayØFacebook• Exxon Mobile• Johnson & Johnson• JP Morgan ChaseØTencent Holdings
Companies In The Increasingly Connected WorldSources: The Economist, Statista
This change is driven by an explosive growth in data generated & global network traffic
Issues Are Driving Data Growth And Innovation
• Migration of Data, Logic and Applications to the Cloud
üThe Internet of Everything
üConsumerization of IT with the rise of Social Media
üRevolution in our Mobile Devices
üThe Internet of Things
üBig Data and Artificial Intelligence
Inside a Data Center
“The rate at which we are seeing progress with AI is amazing, which is why we are really excited about combining it with hardware and software to bring it together for our users.”
Sundar Pichai, Chief Executive Officer, Google Inc.October 3, 2017
AI is Coming
The New Driving Forces are Changing Everything
Expansion of IT driven product innovation is fundamentally changing our society and the world
we live in
There is nothing that will not be touched by the impact of this IT innovation
New System Architectures & System Integration
Technologies are needed To Meet Future Market Demand
Heterogeneous System Integration
Die/Package,HeterogeneousComponents System-in-Package(SiP)
Die128nm/Fab1Digital
Die240nm/Fab2Analog
+Die320nm/Fab3Memory
+
Die414nm/Fab4Power
SAW
Filt
er
MEMSSensor
+ +++ + +
Die128nm/Fab1Digital Die3
20nm/Fab3Memory
Die240nm/Fab2Analog
Die414nm/Fab4Power
SAW
Filt
er
MEMSSensor
Heterogeneous by material, component type, circuit type, node and bonding/interconnect method
Today’s Multi-die Packaging Integration Spectrum
Source: Babak Sabi, Intel Corporate VP, Semicon West SEMI & IEEE EPS Session July 11, 2017Copyright 2017 Intel Corporation
Organic FCXGAA, FCCSP
IO/mm/lyr = 28-34IO/mm2 = 83-123
Bump Pitch = 110-90µm
IO/mm = N/AIO/mm2 = 625
Bump Pitch = 40µm
High Density Organic Interposer
IO/mm/lyr = 100+*IO/mm2 = 331
Bump Pitch = 55µm
Si Interposer,
IO/mm/lyr = 250IO/mm2 ≥ 331
Bump Pitch ≤ 55µm
Package Stacking
2D/2.5D (Side by Side MCPs) 3D (Die &/Or Package Stacking)
3/3 L/S
PoP Pitch 0.27mm
Many Package Options Exist!!Designers Pick the Optimal Solution for a Specific System
Die Stacking
Intel EMIB
* Oi et. al. 2014 ECTC report 2mmm L/S, 25mmm pad
Intel Embedded Multi-die Interconnect BridgeThe Next Generation of Implementation
Intel Introduced the next generation of EMIB at Hot Chips 2017• Many die in one piece without large area interposer• Components of different nodes in one piece• Rapid deployment of advanced nodes• Heterogeneous integration
Available to 14nm Foundry Customers now
GPU and Stacked Memory HBM Integration (2.5D)Source: ASE
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Decoupling capacitor
Decoupling capacitor
stiffener Stacked memory GPU (Graphic Processor Unit) stiffener
Package Substrate
Stacked memory
GPU dieStacked memoryHBM (High Bandwidth Memory) Stacked memory
HBM (High Bandwidth Memory)
Source: Christopher Mims WSJ March 19, 2017
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Jen-Hsun Huang, founder and chief executive of Nvidia, held up a Nvidia
Xavier AI car supercomputer while delivering his January 4 keynote address
at CES, the consumer electronics show in Las Vegas.
PHOTO: RICK WILKING/REUTERS
Processor Memory Heterogeneous IntegrationGPU – Memory Stack 2.5D Package
NVIDIA PASCAL GPU PACKAGE GPU and Stacked Memory on Silicon Interposer on BGA Substrate
– 3+ TeraFLOPS Peak Performance – 1TB/s bandwidth to 16GB Memory – 4x more energy efficient per bit – 80-200GB/s interconnect GPU-GPU and GPU-CPU
Pascal GPU
– 16nm TSMC FinFet – 15.3Bn transistors – 610mm2 die – 300W TDP
4-High HBM2 Memory Stack with Base Die
Pascal GPU
GPU Flip Chip Bump
Silicon Interposer
BGA Substrate
Silicon Interposer Bumps
Source: Prismark Partners February 2017
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Nvidia Drive PX2 for use in Tesla cars
CEO Huang: “It’s just one nice little lunch box in back and it’s a supercomputer.”
Liquid cooled for 250W TDP
Source: Prismark Partners February 2017
Heterogeneous Integration Has Replaced Moore’s Law Scaling As The “Low Hanging Fruit” In The Drive To
Maintain The Pace Of Progress
Example of Heterogeneous IntegrationSource Prismark Partners
APPLE IPHONE 8 MAIN BOARD ASSEMBLY
1. Apple A11/DRAM (InFO PoP) 2. Samsung Flash (Stacked die) 3. Qualcomm MDM9655 BBP/Memory (stacked die) 4. Qualcomm WTR5975 TRx (WLP) 5. Skyworks GSM PA (SiP) 6. Skyworks 3G/4G PAD (SiP) 7. Broadcom 3G/4G PAD (SiP) 8. Skyworks Diversity Rx Module (SiP) 9. Skyworks Diversity Rx Module (SiP) 10. Qualcomm Envelope Tracker (SiP) 11. USI WLAN/BT Module (SiP) 12. Qualcomm PMD9655 Power Manager (WLP) 13. Power Manager (WLP) 14. Audio Codec (WLP) 15. Audio Amplifier (WLP) 16. Audio Amplifier (WLP) 17. Audio Amplifier (WLP) 18. Broadcom Wireless Charger (WLP) 19. TI Battery Charger (WLP) 20. NXP Display Controller (WLP) 21. NXP NFC Controller (WLP) 22. Bosch MEMS Accel/Gyro (SiP)
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A Quote from Gordon Moore’s 1965 Paper“Cramming more components onto integrated circuits” Gordon Moore, Electronics, April 19, 1965
“It may prove to be more economical to build large systems out of smaller functions, which are separately packaged and interconnected. The availability of large functions, combined with functional design and construction, should allow the manufacturer of large systems to design and construct a considerable variety of equipment both rapidly and economically.”
Was Dr Moore thinking & talking about SiP & Heterogeneous Integration in systems & system integration?
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Initiative to continue Heterogeneous Roadmap Mission • IEEE Societies have a long history of collaboration with ITRS Assembly &
Packaging & Heterogeneous Integration Focus Team. • In 2015 EPS established collaboration agreement with Heterogeneous Integration
Focus Team with approval of SIA.• In fall of 2015, with knowledge of closure of ITRS 2.0 by SIA (Semiconductor Industry
Assoc.), EPS initiated outreach & dialog for continuation of Heterogeneous Integration Roadmap in collaboration with societies & other entities with the same vision.
• Today five organizations IEEE EPS, EDS & Photonics Societies, together with SEMI and ASME EPPD are working in collaboration in this Heterogeneous Integration Roadmap to serve our profession, industry, academia, and research institutes, to meet the challenges of this new world of rapid market disruption and bold technology innovation.
Heterogeneous Integration Roadmap
§ Volunteer driven transparent Roadmap organization
§ Roadmap Web Linkhttp://eps.ieee.org/technology/heterogeneous-integration-roadmap.html
• Background• Mission• Purpose• Committee• Scope• Schedule
HIR International Roadmap Committee
• William (Bill) Chen , ASE Fellow & Senior Technical Advisor, (Chair)• W. R Bottoms, Chairman 3MTS (Co-Chair representing EPS)• Subramanian Iyer, Distinguished Professor UCLA (representing EDS)• Amr Helmy, Chair Professor , U Toronto (Representing Photonics) • Tom Salmon, VP SEMI Collaboration Platform (Representing SEMI)• Ravi Mahajan, INTEL Fellow (Representing ASME EPPD)• Gamal Refai-Ahmed, Distinguished Engineer Xilinx (ASME EPPD alternate)
HIR Global Advisory Council
• Ajit Manocha - President and CEO of SEMI. Former CEO of GlobalFoundries and served as chair of SIA. Also served in executive roles at Philips/NXP & Spansion.
• Nicky Lu - Founder and Chairman of Etron Technology in Taiwan. Served as chair of TSIA and WSC and is a member of the US National Academy of Engineering.
• Babak Sabi - Intel Corporation Corporate Vice President, General Manager, Assembly Test Technology Development.
• Hubert Lakner - Board of Directors Chairman, Fraunhofer Microelectronics Group and Founding Director of Fraunhofer Institute of Photonic Microsystems (IPMS) in Dresden.
HI for Market Applications• Mobile
• IoT
• Medical, Health & Wearables
• Automotive
• High Performance Computing & Data Center
• Aerospace & Defense
Heterogeneous Integration Components• Single Chip and Multi Chip Packaging
(including Substrates)
• Integrated Photonics
• Integrated Power Electronics
• MEMS & Sensor integration
• RF and Analog Mixed Signal
Cross Cutting topics• Materials & Emerging Research Materials
• Emerging Research Devices
• Interconnect
• Test
• Supply Chain
• Security
• Thermal Management
Integration Processes• SiP
• 3D +2.5D
• WLP (fan in and fan out)
Design• Co-Design & Simulation – Tools & Practice
HIR Technical Working Groups3-8-2018
2017 HIR Events
1. Eurosimm Dresden April 62. ICEP 2017 (JIEP) Yamagata Japan 4/19-223. ECTC Orlando, FL, USA 5/30-6/044. JIC (Jisso International Council) Spring Meeting
6/125. NordPac Gothenburg, Sweden 6/18-206. Palo Alto Workshop before SEMICON WEST, Palo
Alto, CA, USA 7/97. SEMICON WEST San Francisco, CA USA 7/108. InterPACK (ASME) San Francisco, CA, USA 8/29-
9/19. ELECTRONICS PACKAGING SYMPOSIUM ,
Niskayuna NY, USA 9/19-2010. IEEE PHOTONICS CONFERENCE, Lake Buena
Vista, FL, USA, 10/1-5
11. Photonics meeting 10/10-11 ((HIR Workshop 10/11) CNSE NY
12. IMPACT Taipei, Taiwan 10/25-2613. Heterogeneous Integration Workshop (proposed Nov 1
2017) UCLA14. Semicon Europa Munich 11/ 14 – 1715. ICSJ Kyoto, Japan 11/20-2216. EPTC Singapore 12/3-517. IEDM San Francisco 12/218. Semicon Japan at Tokyo Big Sight 12/119. Asia Workshops
A. ICEPT, Harbin China 8/17B. Tokyo workshop with CPMT Japan, JIEP & SEMI Japan 8/10C. Hong Kong Workshop 8/14D ITRI in Hsinchu, Taiwan/8/11
HIR:Full Ecosystem Collaboration
EcosystemDesign
Materials
Equipment
IDM/Foundry OSAT
Fabless
EMS/PCB Assembly
System-OEM
Integrated Device ManufacturerOutsourced Assembly and TestElectronics Manufacturing Services
Summary – HIR A New Generation Of Roadmapping
• Progress paced by Moore’s Law with focus on CMOS scaling is reaching its economic end
• The expanding digital economy: connectivity & network platforms, driving IoT to IoE, Smart Devices, Data to the Cloud, & Autonomous Vehicles are fast changing the electronics industry landscape.
• In the digital disruptive markets, each have its own metric for performance, reliability, volume & cost tradeoffs. There is immense need for pre-competitive technology roadmap addressing future vision, difficult challenges & potential solutions. .
• Roadmaps for the future are focused on system level integration & advanced packaging addressing expanding markets, enabling continued progress as the past 50 year following Moore’s Law.
Heterogeneous Integration is essential to maintain the pace of progress with higher performance, lower latency, smaller size, lighter weight, lower power requirement per function, lower cost
IInntteelllliiggeennccee CCoolllleeccttiioonn
GPS navigation, sensors, camera, memory, radio, remote control
TomorrowToday
We would like to invite you all to join in the work on Heterogeneous Integration Roadmap.
