Chapter 3:Chapter 3:Digital LogicDigital Logic

Dr Mohamed MenacerDr Mohamed MenacerTaibah UniversityTaibah University

2007-20082007-2008

Analysis of Combinational LogicAnalysis of Combinational Logic

Combinational logic deals with the method of Combinational logic deals with the method of “combining” basic gates into circuits that carry out a “combining” basic gates into circuits that carry out a desired application. desired application.

Examples of combinational circuits :Examples of combinational circuits : decoders, encoders, multiplexers, adders, decoders, encoders, multiplexers, adders,

subtractors, multipliers, comparators, etc.subtractors, multipliers, comparators, etc.

Logic circuits that contain no memory (ability to Logic circuits that contain no memory (ability to store information) are combinationalstore information) are combinational.. Those that contain memory, including flip-flops are Those that contain memory, including flip-flops are

said to be sequentialsaid to be sequential

Logic FunctionsLogic FunctionsAny logic function can be implemented Any logic function can be implemented with AND, OR, and NOT.with AND, OR, and NOT.

One standard form is the sum of productsOne standard form is the sum of productsExample: Y = (A • B + C • D)Example: Y = (A • B + C • D)

Inputs AND gates OR gates Inverters Outputs

Logic FunctionLogic Function

Logic can be described in several waysLogic can be described in several ways

Logic DiagramLogic Diagram

Boolean AlgebraBoolean Algebra

Truth TableTruth Table

Universal Logic GateUniversal Logic Gate

Some other logic functionsSome other logic functions NOR ::= Negative ORNOR ::= Negative OR

Y = ( A + B )´Y = ( A + B )´ NAND ::= Negative ANDNAND ::= Negative AND

Y = ( A • B )´Y = ( A • B )´ MultiplexorMultiplexor

Y = A • S + B • S´Y = A • S + B • S´ Look up table (LUT)Look up table (LUT)

Small memorySmall memory

Universal Logic GateUniversal Logic GateNOR FunctionNOR Function

NOR ::= Negative ORNOR ::= Negative ORY = ( A + B )´Y = ( A + B )´

NOT

OR

AND

Universal Logic GateUniversal Logic GateNAND FunctionNAND Function

NAND ::= Negative ANDNAND ::= Negative ANDY = ( A • B )´Y = ( A • B )´

NOT

OR

AND

Universal Logic ElementUniversal Logic Element

Boolean AlgebraBoolean Algebra

Boolean AlgebraBoolean Algebra

Suppose two variables: a and b, which have only two Suppose two variables: a and b, which have only two probable values: 1 and 0. To understand the Boolean probable values: 1 and 0. To understand the Boolean rules better, compare the variables with the switches rules better, compare the variables with the switches shown in the following circuits:shown in the following circuits:

a b

a . b

a

b

a + b

Boolean Algebra (continued…)Boolean Algebra (continued…)

Boolean rules:Boolean rules:

).().().()13

)).(().()12

)())(11

)9

0)7

1.)4

)1

cabacba

cabacba

cbacba

abba

aa

aa

aa

)..()..)(10

..)8

11)5

.)2

cbacba

abba

a

aaa

00.)6

)3

a

aaa

Boolean Algebra (continued…)Boolean Algebra (continued…)

14) Duality: The dual of a true expression is also true 14) Duality: The dual of a true expression is also true and can be formed by replacing and’s with or’s (and and can be formed by replacing and’s with or’s (and vice versa), 0’s with 1’s (and vice versa).vice versa), 0’s with 1’s (and vice versa).

15) Demorgan’s Law:15) Demorgan’s Law:

Precedence of operators:Precedence of operators: 1.not 2.and 3.or1.not 2.and 3.orExample: Example:

baba . baba .

cbacbacba ).(...

Decreasing the Use of Decreasing the Use of Transistors in Overflow Detector Transistors in Overflow Detector

by the Boolean Algebra by the Boolean Algebra Manipulation of an expression will be a worthy act as it Manipulation of an expression will be a worthy act as it can be used to reduce time and energy consumption in can be used to reduce time and energy consumption in the circuit.the circuit.Example:Example:

aababaabaa 1.)1.(.1..)1

ba

aabbbababababa

bababababbabaa

).().(....

....).(.)2

Decreasing the Use of Transistors in Decreasing the Use of Transistors in Overflow Detector by the Boolean Overflow Detector by the Boolean

AlgebraAlgebraUsing less transistors to realize a circuit usually means Using less transistors to realize a circuit usually means less delay and power consumption too.less delay and power consumption too.Example: If we realize the hardware directly from this Example: If we realize the hardware directly from this expression we will need 26 transistors. We will now try to expression we will need 26 transistors. We will now try to decrease this amount by using Boolean algebra:decrease this amount by using Boolean algebra:

zxzyyxF ...

.zx x.y .z x x.y y) .z.(x

z) x.y.( .z.x .z.y x x.y.z x.y.

.z x .z.yx x.y.z x.y .z x ) x y.z.(x x.y F

1

111

The last expression will only need 14 transistors to realize.The last expression will only need 14 transistors to realize.

Truth TableTruth Table

Karnaugh MapKarnaugh Map

Using Boolean algebra for minimization causes Using Boolean algebra for minimization causes it’s own problem because of it mainly being a it’s own problem because of it mainly being a trial and error process, and we can almost trial and error process, and we can almost never be sure that we have reached a minimal never be sure that we have reached a minimal representation.representation.

A Karnaugh Map allows us to find input variable A Karnaugh Map allows us to find input variable redundancies, thus help reduce output redundancies, thus help reduce output equation.equation.

The K-map method is easy and straightforward.The K-map method is easy and straightforward.

Karnaugh Map (continued…)Karnaugh Map (continued…)

We can come close to our aim by using a graphical We can come close to our aim by using a graphical notation named Karnaugh Map shown as follows:notation named Karnaugh Map shown as follows:

ab w

20

a

b0

0

1

1

0

1 3

a b w

1

0

0

0

0

00

1

1 1

1

0

10

Truth TableKarnaugh Map

0

Karnaugh Map (continued…)Karnaugh Map (continued…)

As it can be seen, each box of the Karnaugh map As it can be seen, each box of the Karnaugh map corresponds to a row of the truth table and has been corresponds to a row of the truth table and has been numbered accordingly. numbered accordingly. In the following example, the truth table and the Karnaugh In the following example, the truth table and the Karnaugh map correspond in the above mentioned manner:map correspond in the above mentioned manner:

This form of representing w in the following example is This form of representing w in the following example is called a Sum of Product (SOP).called a Sum of Product (SOP).

20

a

b0

0

1

1

0

1 3

a b w

1

1

1

0

0

00

1

1 1

1

0

11

Truth TableKarnaugh Map

1

W = a b + a b + a bp p p

Sum ofProduct

ab w

Karnaugh Map (continued…)Karnaugh Map (continued…)

When attempting to minimize a function with Boolean algebra, writing the When attempting to minimize a function with Boolean algebra, writing the expression in standard SOP form will make the rest of the process easier.expression in standard SOP form will make the rest of the process easier.For instance:For instance:

b a) a b.(a) ba.(b

b a..b a a.b a.b b a..b a a.b

According to the facts mentioned According to the facts mentioned above, in order to use the Karnaugh above, in order to use the Karnaugh maps for minimizing a function, it’s maps for minimizing a function, it’s enough to map the physical adjacent enough to map the physical adjacent 1’s in the Karnaugh map and write the 1’s in the Karnaugh map and write the relative Boolean expressions of the relative Boolean expressions of the maps as it’s shown in the following maps as it’s shown in the following

example:example:

20

a

b0

0

1

1

0

1 31

1

1

a + b

Examples of K-Maps:Examples of K-Maps:

Examples: Cell numbers are written in the cells.Examples: Cell numbers are written in the cells. 2-variable K-map2-variable K-map

3322

11000

1

0 1A

B

A K-map for a function of n variables consists of:

• 2n cells, and,• in every row and column, two adjacent cells should differ in the value of only one of the logic variables.

3 and 4 -Variable 3 and 4 -Variable K-MapK-Map

3-variable K-map3-variable K-map

00 11 33 22

44 55 77 66

00 01 11 10

01

ABC

00 11 33 22

44 55 77 66

1212 1313 1515 1414

88 99 1111 1010

00 01 11 10

0001

1110

ABCD

4-variable K-map4-variable K-map

Karnaugh Map Methods Karnaugh Map Methods

Can form final simplified expression from the Can form final simplified expression from the minimum number of circles required to encompass minimum number of circles required to encompass all the ones.all the ones.

  

  

minimum expression minimum expression

   we could also include the third circle and thus we could also include the third circle and thus

but this is not a minimum expression.but this is not a minimum expression.

Two loops cover all the ones.Two loops cover all the ones.

1 1

0 0

BC

A 00 01 11 10

0

1

1

1

0

0

BCBAZ

BCACBAZ

Karnaugh Map Methods Karnaugh Map Methods

for which an implementation would be

1 1

0 0

CD

AB 00 01 11 10

00

01

1

1

0

0

1 1

1

0

0 0

0

0

11

10

CBABDCDZ

CDBAABCDDCABBCDADCBADCBACDBAZ

Karnaugh Map Methods Karnaugh Map Methods

or we could loop the zeros. or we could loop the zeros.

1 1

0 0

CD

AB 00 01 11 10

00

01

1

1

0

0

1 1

1

0

0 0

0

0

11

10

DABCDCZ

Karnaugh Map Methods Karnaugh Map Methods

for which an implementation would be for which an implementation would be

DABCDCZ

DABCDCZ