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MSI Logic
The complexity of a chip
Scale of integration:
• SSI 1 - 10 gates
• MSI 10 - 100 gates
• LSI 100 - 1000 gates
• VLSI > 1000 gates
Specialized MSI components
• Encoders
• Decoders
• Multiplexers / Demultiplexer
• BCD-to-7-Segment Decoder and Liquid Crystal Displays
Encoders - Decoders
• Main function of encoder and decoder• The purpose is to reduce the number of wires required for
interconnection.
Decoder – logic circuit that activates an output that corresponds to a binary number on the input (set of inputs).
May not use all of the possible input codes– ENABLE inputs– The 74ALS138 decoder– BCD to decimal decoders (the 7442)– BCD to decimal decoder/driver (the 7445)– Decoder applications
Decoders
A 2n-to-n-line encoder symbol
Symbol for an n-to-2n-line decoder
Binary Decoders, N-to-2N decoders
• Accept a N-bit binary input code (number)
• Activate a 1-out-of-2Noutput code corresponding to the input code (number)
• Some decoders do not use all 2Ninput codes
3-Line to 8-Line Decoder
3-Line to 8-Line Decoder
Example
Example 74138 Decoder W/Enable
74138 Decoder
Example BCD-to-Decimal Decoders 74LS42 /
74HC42
BCD-to-7-SEGMENT
• 7-segment configuration- to form the decimal characters 0 -9 and sometimes the hex characters A –F.
• BCD-to-7-segment decoder/driver is used to take 4-bit BCD input and provide the outputs that will pass current through the appropriate segment to display the decimal digit.
BCD-to-7-SEGMENT
(a) BCD-to-7-segment decoder/driver driving a common-anode 7-segment LED display;
(b) segment patterns for all possible input codes.
Encoder
• The opposite of this decoding process is called encoding and is performed by a logic circuit called an encoder.
• Encoder has a number of input lines, only one of which is activated at a given time, and produces an N-bit output code depending on which input is activated.
• An 8-line-to-3-line encoder accepts 8 input lines and produces a 3-bit output code corresponding to the activated input.
Encoder
Following through the logic, verify that a LOW
at any input will produce the output binary code
corresponding to that input.
Note that A0 is not internally connected (A1…A7=1111111, then Q2Q1Q0=000
Only one input should be low. Example: If A3 = A5 =0, and all other are High, then Q2Q1Q0=0112 (=310), NOT ACCEPTABLE
Priority Encoders
• Include the necessary logic to ensure that when
2 or more inputs are activated, the output code
will correspond to the HIGHEST-NUMBERED
input.
• Example: A’3, and A’5 are LOW, the output code
will be 101(5).
• When A’6, A’2, and A’0 are all LOW, the output
code is 110(6).
• The 74148, 74LS148, and 74HC148 are all octal-
to-binary priority encoders
Encoder
74147 Decimal-to-BCD Priority Encoder
• Nine active low inputs representing decimal 1 thru 9• Output: inverted BCD code corresponding to the highest numbered
activated input. Outputs can be converted to normal BCD by putting each through an inverter.
• No A0. When all inputs are high, it corresponds to decimal 0
Switch Encoder
Multiplexers (Data Selector)
• Multiplexer (MUX)- it selects one of the several input
signal sand passes it on to the output.
• Multiplexing- multiplexer selects 1 out of N input data
sources and transmits the selected data to a single
• Digital multiplexer or data selector is a logic circuit
that accepts several digital data inputs and selects
one of them at any given time to pass on to the
output.
• The routing of the desired data input to the output is
controlled by SELECT inputs
Basic Two Input Multiplexer• The logic level applied to the S input determines
which AND gate is enable so that its data input passes through the OR gate to output Z.
Multiplexers (Data Selector)
Four Input Multiplexer
Multiplexers (Data Selector)
Four-input multiplexer: (a) using sum of products logic; (b) using tristate buffers.
Multiplexers
• Main function of multiplexer and demultiplexer• The purpose is to reduce the number of wires required
for interconnection• by making the signals to time-share the link.
A multiplexer/demultiplexer arrangement
for information transmission
Demultiplexer
A 2n-to-1-line multiplexer symbol
MUX implementation of a Boolean function
• Any Boolean function of n variables can be implemented by a multiplexer with n control inputs in a straightforward manner.
Eight Input Multiplexer- 74LS151(74HC151)
This multiplexer has an enable input E’ and provides both the normal and the inverted outputs.
Multiplexers (Data Selector)
E’=0, Select input S2S1S0 will select one data inputE’=1, multiplexer is disable
Quad Two Input MUX (74ALS157/HC157)
Multiplexers (Data Selector)
1. Data routing
2. Parallel-to-serial conversion
3. Operation Sequencing
4. Logic Function Generation
Multiplexer Applications
Logic Function Generation
1-Line-to-8-Line Demultiplexer
Clock Demultiplexer• 74ALS138 demultiplexer being used as a
clock demultiplexer • Under control of the SELECT lines, the clock
signal is routed to the desired destination.
• If S2S1S0 = 000, the clock signal applied to I will appear at output O’0.
• If S2S1S0 = 101, the clock signal applied to I will appear at output O’5.
Demux (Data Distributer)
Magnitude Comparator
• Magnitude comparator – combinational logic that compares two input binary quantities and generates outputs to indicate which one has the greater magnitude.
• Data inputs – 74HC85 compares two unsigned 4-bit binary numbers.– A3A2A1A0 which is called word A; the other B3B2B1B0
which is called word B• Outputs
– Has 3 active-HIGH outputs– Output OA>B will be HIGH when the magnitude of word A
is greater than the magnitude of word B– Output OA<B will be HIGH when magnitude of word A is
less than the magnitude of word B.– Output OA=B will be HIGH when magnitude of word A is
identical with the magnitude of word B.
Magnitude Comparator
• Cascading Inputs– Expanding the
comparison operation to more than 4 bits by cascading two or more 4-bit comparators.
– When 2 comparators are to be cascaded, the outputs of the lower-order comparator are connected to the corresponding inputs of higher-order comparator.
Code Converters
• Code converter is a logic circuit that changes data presented in one type of binary code to another type of binary code.
• BCD-to-7 segment decoder is a code converter because it changes a BCD input code to the 7 segment code needed by the LED.
• BCD-to-binary converter– 2 digit decimal values ranging from 00 to 99
can be represented in BCD by 2 4-bit code groups.
BCD-to-binary converter
Code Converters
Try this....
0,1;0,1 201123 AAAEEE
0,1;0,1 102123 AAAEEE
What’s the output, if 74ALS138
….
Figure 1
Determine the states of the 74147 decimal-to-BCD priority encoder outputs when are LOW and the other are HIGH. 762 ,, AAA
Try this....
Basic Adders
Half-Adder
0 + 0 = 00 + 0 = 0
0 + 1 = 10 + 1 = 1
1 + 0 = 11 + 0 = 1
1 + 1 = 101 + 1 = 10
Zero plus zero equals zeroZero plus zero equals zero
Zero plus one equals oneZero plus one equals one
One plus zero equals oneOne plus zero equals one
One plus one equals zero with a carry One plus one equals zero with a carry of oneof one
Simple Binary Addition
Half-Adder
Full-Adder
Full-Adder
• Full adder from two half-adder circuits
Parallel Binary Adders
Parallel Binary Adders
• Two-bit parallel binary adder
Parallel Binary Adders
• Four-bit parallel binary adder