What is setup and hold ?What are timing models ?What is
conjestion ?What is block lib and what it contains ?What is Process
in PVT and how it affects design timing ?What is jitter and how it
affects?If you do all the techniques you told to meet setup and if
still setup is violating what will you do ?If you taped out a chip
and it's not functing properly how will you say that it's because
of setup or hold ?
Block related questionsWhat was major challange in your block
?You had any Floorplan related issues in ur block ?How did you fix
conjestion in your block ?How did you fix setup and hold in your
block ?How to analyse timing report? and timing closure
techniques.What were the types of DRC's in your block ?What are the
output files you provided to the top level team after you
finishedyour block ?
