CMR Institute of Technology, Bengaluru.

Department of Electronics and Communication. Solution To VTU Exam (Jan./Feb. 2021) Question Paper on Power Electronics (17EC73).

Prepared By : (Dr.Ananth Kumar M.S. , Assistant Professor, ECE Dept., CMRIT).

Q1a)

Q1b)

• The operations of the power converters are based mainly on the switching of power

semiconductor devices.

• This introduces current & voltage harmonics into the supply system & on the output

of the converters.

• These can cause problems of :

✓ Distortion of the output voltage

✓ Harmonic generation into the supply system

✓ Interference with the communication & signaling circuits.

It is normally necessary to introduce filters on the input & output of a converter system.

This reduces the harmonic level to an acceptable magnitude.

Figure 1.11 shows the block diagram of a generalized power converter.

The application of power electronics to supply the sensitive electronic loads poses a

challenge on the power quality issues.

The input & output quantities of converters could be either ac or dc.

• Factors which are measures of the quality of a waveform are,

✓ Total Harmonic Distortion (THD).

✓ Displacement Factor (DF).

✓ Input Power Factor (IPF).

• To determine these factors, finding the harmonic content of the waveforms is

required.

• To evaluate the performance of a converter, the input & output voltages & currents

of a converter are expressed in a Fourier series.

• The quality of a power converter is judged by the quality of its voltage & current

waveforms.

The control strategy for the power converters plays an important part on the harmonic

generation & output waveform distortion.

This control strategy can be aimed to minimize or reduce these problems.

The power converters can cause radio-frequency interference due to electromagnetic

radiation.

This causes gating circuits to generate erroneous signals.

This interference can be avoided by grounded shielding.

• As shown in Figure 1.11, power flows from source side to the output side.

• The waveforms at different terminal points would be different as they go through

processing at each stage.

• There are 2 types of waveforms :

✓ One at the power level.

✓ Another from the low-level signal from the switching or gate control generator.

• These 2 voltage levels must be isolated from each other so that they do not interfere

with each other.

Q1c)

• Power Electronics has found an important place in modern technology.

• It is used in a great variety of high-power products, including –

✓ Heat Controls

✓ Light Controls

✓ Motor Controls

✓ Power Supplies

✓ Vehicle Propulsion Systems

✓ High-voltage direct-current (HVDC) systems

Q2a)

• Power transistors have controlled turn-on and turn-off characteristics.

• The transistors, which are used as switching elements, are operated in the saturation

region.

• This results in a low on-state voltage drop.

• The switching speed of modern transistors is much higher than that of thyristors.

• They are extensively employed in dc-dc & dc-ac converters.

• This is done with inverse parallel-connected diodes to provide bidirectional current

flow.

• However, their voltage & current ratings are lower than those of thyristors.

• Transistors are normally used in low-to medium-power applications.

• With the development of power semiconductor technology, the ratings of power

transistors are continuously being improved.

• IGBTs are being increasingly used in high-power applications.

• The power transistors can be broadly classified into 5 categories :

1) Metal oxide semiconductor field-effect transistors (MOSFETs).

2) COOLMOS.

3) Bipolar junction transistors (BJTs).

4) Insulated-gate bipolar transistors (IGBTs).

5) Static induction transistors (SITs).

MOSFETs, COOLMOS, BJTs, IGBTs, or SITs can be assumed as ideal switches to explain the

power conversion techniques.

A transistor can be operated as a switch.

Practical transistors differ from ideal devices.

The transistors have certain limitations & are restricted to some applications.

The characteristics & ratings of each type should be examined to determine its suitability to

a particular application.

The gating circuit is an integral part of a power converter that consists of power

semiconductor devices.

• The output of a converter that depends on how the gating circuit drives the

switching devices is a direct function of the switching.

• Therefore, the characteristics of the gating circuit are key elements in achieving the

desired output & the control requirements of any power converter.

• The design of a gating circuit requires knowledge of gate characteristics.

• It also requires a knowledge of needs of such devices as :

✓ Thyristors

✓ Gate-Turn-Off Thyristors (GTOs)

✓ Bipolar Junction Transistors (BJTs)

✓ Metal oxide semiconductor field-effect transistors (MOSFETs)

✓ Insulated-gate bipolar transistors (IGBTs)

Power electronics is increasingly used in applications that require gate-drive circuits.

These gate-drive circuits have advance control, high speed, high efficiency, and

compactness.

Hence, gate-drive integrated circuits (ICs) are becoming commercially available.

• A Bipolar Transistor is formed by adding a 2nd p- or n-region to a pn-junction diode.

• With 2 n-regions and 1 p-region, two junctions are formed & it is known as an NPN-

transistor, as shown in Figure 4.25a.

• With 2 p-regions and 1 n-region, two junctions are formed & it is known as a PNP-

transistor, as shown in Figure 4.25b.

• The 3 terminals are named collector, emitter, & base.

• A bipolar transistor has 2 junctions, a collector-base junction (CBJ) & a base-emitter

junction (BEJ).

• There are 3 possible configurations – Common Collector, Common Base & Common

Emitter.

• The Common Emitter, shown in Figure 4.28a for an NPN transistor, is generally used

in switching applications.

• The typical input characteristics of base current IB against base-emitter voltage VBE

are shown in Figure 4.28b.

• Figure 4.28c shows the typical output characteristics of collector current IC against

collector-emitter voltage VCE.

• For a PNP-transistor, the polarities of all currents and voltages are reversed.

• There are 3 operating regions of a transistor : Cutoff, Active & Saturation.

• In the cutoff region, the transistor is off.

• The base current is not enough to turn it on & hence both junctions are reverse

biased.

• In the active region, the transistor acts as an amplifier, where the base current is

amplified by a gain.

• The collector-emitter voltage decreases with the base current.

• The CBJ (Collector to Base Junction) is reverse biased & the BEJ (Base to Emitter

Junction) is forward biased.

• In the saturation region, the base current is sufficiently high.

• The collector-emitter voltage is low, & the transistor acts as a switch.

• Both junctions (CBJ & BEJ) are forward biased.

• The transfer characteristic, which is a plot of VCE against IB, is shown in Figure 4.29.

• The model of an NPN transistor is shown in Figure 4.30 under large-signal dc

operation.

• The equation relating the currents is

IE = I

C + I

B

➢ The base current is effectively the input current & the collector current is the output current.

➢ The ratio of the collector current IC to base current I

B is known as the forward current

gain, βF :

Q2b)

• Without any gate signal, the enhancement-type MOSFET may be considered as 2

diodes connected back to back.

• This is similar to an NPN-transistor.

• The gate structure has parasitic capacitances to the source, Cgs, & to the drain, Cgd.

• The NPN-transistor has a reverse-bias junction from the drain to the source & offers

a capacitance, Cds.

• Figure 4.8a shows the equivalent circuit of a parasitic bipolar transistor in parallel

with a MOSFET.

• The base-to-emitter region of an NPN-transistor is shorted at the chip.

• This is done by metalizing the source terminal & the resistance from the base to

emitter.

• This is because the bulk resistance of n- and p- regions, Rbe, is small.

• Hence, a MOSFET may be considered as having an internal diode & the equivalent

circuit is shown in Figure 4.8b.

• The parasitic capacitances are dependent on their respective voltages.

• The internal built-in diode is often called the body diode.

• The switching speed of the body diode is much slower than that of the MOSFET.

• Thus, an NMOS (n-channel metal oxide semiconductor) will behave as an

uncontrolled device.

• As a result, a current can flow from the source to drain if the circuit conditions

prevail for a negative current.

• This is true if the NMOS is switching power to an inductive load.

• In this case, the NMOS will act as a freewheeling diode & provide a path for current

flow from the source to the drain.

• The NMOS will behave as an uncontrolled device in the reverse direction.

• The NMOS data sheet would normally specify the current rating of the parasitic

diode.

• If the body diode Db is allowed to conduct, then a high peak current can occur during

the diode turn-off transition.

• Most MOSFETs are not rated to handle these currents, & device failure can occur.

• To avoid this situation, external series D2 & antiparallel diodes D1 can be added as in

Figure 4.8c.

• Power MOSFETs can be designed to have a built-in fast-recovery body diode.

• Also, they can be designed to operate reliably when the body diode is allowed to

conduct at the rated MOSFET current.

• However, the switching speed of such body diodes is still somewhat slow.

• This can result in significant switching loss due to diode stored charge.

• The designer should check the ratings & the speed of the body diode to handle the

operating requirements.

• The switching model of MOSFETs with parasitic capacitances is shown in Figure 4.9.

• The typical switching waveforms & times are shown in Figure 4.10.

• The turn-on delay td(on) is the time that is required to charge the input capacitance

to threshold voltage level.

• The rise time tr is the gate-charging time from the threshold level to the full-gate

voltage VGSP.

• This is required to drive the transistor into the linear region.

• The turn-off delay time td(off) is the time required for the input capacitance to

discharge from the overdrive gate voltage V1 to the pinch-off region.

• VGS must decrease significantly before VDS begins to rise.

• The fall time tf is the time that is required for the input capacitance to discharge

from the pinch-off region to threshold voltage.

• If VGS < VT, the transistor turns off.

Q3a)

• An elementary circuit diagram for obtaining static V-I characteristics of a thyristor is

shown in Fig.1.2.

• Here, the anode & cathode are connected to the main source through a load.

• The gate & cathode are fed from another source Eg.

• The static V-I characteristic of an SCR is shown in Fig.1.3.

• Here, Va is the anode-cathode voltage & Ia is the anode current.

• The thyristor V-I characteristic is divided into 3 regions of operation - Reverse

Blocking Region, Forward Blocking Region & Forward Conduction Region.

• These 3 regions of operation are described below.

1. Reverse Blocking Region :

➢ When the cathode is made positive wrt. anode with the switch s open (Fig.1.2), the

thyristor becomes reverse biased.

➢ In Fig.1.3, OP is the reverse blocking region.

➢ In this region, the thyristor exhibits a blocking characteristic similar to that of a

diode.

➢ In this reverse biased condition, the outer junctions J1 & J3 are reverse biased & the

middle junction J2 is forward biased.

➢ Hence, only a small leakage current (in mA) flows.

➢ If reverse voltage is increased, then at a critical breakdown level called Reverse

Breakdown Voltage VBR, an avalanche will occur at J1 & J3 increasing the current

sharply.

➢ If this current is not limited to a safe value, power dissipation will increase to a

dangerous level that may destroy the device.

➢ Region PQ is the reverse-avalanche region.

➢ If reverse voltage is below critical value, the device behaves as a high-impedance

device (i.e. essentially open) in the reverse direction.

➢ The inner 2 regions of the SCR are lightly doped compared to the outer layers.

➢ The forward break-over voltage VBO is generally higher than the reverse break-over

voltage VBR.

➢ This is because of thickness of J2 depletion layer (during forward biased condition)

will be greater than the total thickness of the 2 depletion layers at J1 & J3 (when the

device is reverse biased).

2. Forward Blocking Region :

➢ In this region, the anode is made positive wrt. the cathode.

➢ Hence, junctions J1 & J3 are forward biased while the junction J2 remains reverse

biased.

➢ Therefore, the anode current is a small forward leakage current.

➢ The region OM of the V-I characteristic is known as the forward blocking region

when the device does not conduct.

3. Forward Conduction Region :

➢ When the anode to cathode forward voltage is increased with the gate circuit kept

open, avalanche breakdown occurs.

➢ This occurs at the junction J2 at a critical forward break-over voltage (VBO).

➢ The SCR then switches into a low impedance condition (high conduction mode).

➢ In Fig.1.3, the forward breakover voltage is corresponding to the point M, when the

device latches on to the conducting state.

➢ The region MN of the characteristic shows that as soon as the device latches on to its

on state, the voltage across the device drops, from say, several hundred volts to 1-2

volt.

➢ This results in a very large amount of current suddenly flowing through the device.

➢ The part NK of the characteristic is called as the forward conduction state.

➢ In this high conduction mode, the external load impedance is essentially determines

the anode current (Thyristor can be regarded as a closed switch).

• Once the SCR is conducting a forward current that is greater than the minimum

value, called the latching current, the gate signal is not required to maintain the

device in its on state.

• Removal of the gate current does not affect the conduction of the anode current.

• The SCR will return to its original forward blocking state if the anode current falls

below a low level, called the holding current (Ih).

• Latching current is associated with the turn-on process & holding current with the

turn-off process.

• The holding current is usually lower than, but very close to the latching current.

Q3b)

• The operation of an SCR can be also explained in a very simple way by considering it

in terms of 2 transistors.

• This is known as the 2 transistor analogy of the SCR.

• The SCR can be considered as an npn & a pnp transistor, where the collector of one

transistor is attached to the base of the other & vice-versa, as shown in Fig.1.4.

• The model is obtained by splitting the 2 middle layers of the SCR into 2 separate

parts.

Q4a)

• The unijunction transistor, abbreviated UJT, is a three-terminal, single-junction

device.

• The basic UJT & its variations are essentially latching switches.

• Their operation is similar to the 4-layer diode.

• The most significant difference being that the UJT’s switching voltage can be easily

varied by the circuit designer.

• Like the 4-layer diode, the UJT is always operated as a switch.

• It has applications in oscillators, timing circuits & SCR/TRIAC trigger circuits.

• The basic circuit is shown in Fig.2.22.

• The B1 pulse output is used to trigger the SCR, a predetermined time after the switch

is closed.

• Thus, the 1st B1 pulse occurs T seconds after the 28 V is supplied to the UJT circuit.

• After the SCR has been triggered “on”, subsequent pulses at its gate have no effect.

• An important design consideration in this type of circuit concerns the premature

triggering of the SCR.

• The voltage at B1 when the UJT is “off”, must be smaller than the voltage needed to

trigger the SCR.

• Otherwise, the SCR will be triggered immediately upon switch closure.

• Thus, we have the requirement as follows:

Q4c)

• There are, in general, two methods by which a thyristor can be commutated.

• They are :

1) Natural Commutation

2) Forced Commutation

1) Natural Commutation

The simplest & most widely used method of commutation makes use of the alternating,

reversing nature of a.c. voltages to effect the current transfer.

In a.c. circuits, the current always passes through zero every half cycle.

As the current passes through natural zero, a reverse voltage will simultaneously appear

across the device.

This immediately turns off the device.

This process is called as natural commutation, since no external circuit is required for this

purpose.

This method may use a.c. mains supply voltages or the a.c. voltages generated by local

rotating machines or resonant circuits.

The line commutated converters and inverters comes under this category.

2) Forced Commutation Once thyristors are operating in the ON state, carrying forward current, they can only be turned OFF

by reducing the current flowing through them to zero.

This needs to be done for sufficient time to allow the removal of charged carriers.

In d.c. circuits, for switching off the thyristors, the forward current should be forced to be zero by

some external circuits.

This process is called forced commutation & the external circuits required for it are known as

commutation circuits.

The components (inductance & capacitance) which constitute the commutating circuits are called as

commutating components.

A reverse voltage is developed across the device by means of a commutating circuit.

This circuit immediately brings the forward current in the device to zero, thus turning off the device.

Producing reliable commutation is a difficult problem to be tackled while designing chopper &

inverter circuits.

Q5a)

• A single-phase semiconverter bridge with 2 thyristors & 3 diodes is shown in Fig.6.11(a).

• The 2 thyristors are T1, T2; the 2 diodes are D1,D2; the 3rd diode connected across load is

freewheeling diode FD.

• The load is of RLE type as for the full converter bridge.

• Various voltage & current waveforms for this converter are shown in Fig.6.11(b), where load

current is assumed continuous over the working range.

• After ωt=0, thyristor T1 is forward biased only when source voltage Vm sin ωt exceeds E.

• Thus, T1 is triggered at a firing angle delay α such that Vm sin α > E.

• With T1 on, load gets connected to source through T1 & D1.

• For the period ωt= α to π, load current io flows through RLE, D1, source & T1.

• The load terminal voltage vo is of the same waveshape as the ac source voltage vs.

• Soon after ωt= π, load voltage vo tends to reverse as the ac source voltage changes polarity.

• Just as vo tends to reverse (at ωt= π+), FD is forward biased & starts conducting.

• The load, or output, current io is transferred from T1, D1 to FD.

• As SCR T1 is reverse biased at ωt= π+ through FD, T1 is turned off at ωt= π+.

• The load terminals are short circuited through FD, therefore load, or output, voltage vo is

zero during π < ωt < (π+α).

• After ωt= π, during the negative half cycle, T2 will be forward biased only when source

voltage is more than E.

• At ωt= π+α, source voltage exceeds E, T2 is therefore triggered.

• Soon after (π+α), FD is reverse biased and is therefore turned off.

• Load current now shifts from FD to T2, D2.

• At ωt= 2π, FD is again forward biased & output current io is transferred from T2,D2 to FD as

explained before.

• The source current is is positive from α to π when T1,D1 conduct and is negative from (π+α)

to 2π when T2, D2 conduct, see Fig.6.11(b).

• During the interval α to π , T1 and D1 conduct & ac source delivers energy to the load circuit.

• This energy is partially stored in inductance L, partially stored as electric energy in load-

circuit emf E & partially dissipated as heat in R.

• During the freewheeling period π to (π+α), energy stored in inductance is recovered.

• This energy is partially dissipated in R & partially added to the energy stored in load emf E.

• No energy is fed back to the source during freewheeling period.

• For semiconverter, the average output voltage Vo, from Fig.6.11(b), is given by

Vo=

• The variation of voltage across T1 & T2 is also depicted in Fig.6.11(b).

• It is seen from these waveforms that circuit-turn off time for the semiconverter is

tc=[(π-α)/ω] sec.

• The variation of average value of converter output voltage as a function of firing

angle α is shown in Fig.6.11(c) for semiconverter and full converter.

Q7a)

• A converter with an RL load is shown in Figure 5.4.

• The operation of the converter can be divided into 2 modes.

• During mode 1, the converter is switched on.

• The current flows from the supply to the load.

• During mode 2, the converter is switched off.

• The load current continues to flow through freewheeling diode Dm.

• The equivalent circuits for these modes are shown in Figure 5.5a.

• The load current & output voltage waveforms are shown in Figure 5.5b with the

assumption that the load current rises linearly.

• However, the current flowing through an RL load rises or falls exponentially with a

time constant.

• The load time constant (τ=L/R) is generally much higher than the switching period T.

• Thus, the linear approximation is valid for many circuit conditions.

• Simplified expressions can be derived within reasonable accuracies.

Q8a)

• Both the input & output voltages of a dc-dc converter are dc.

• This type of converter can produce a fixed or variable dc output voltage from a fixed

or variable dc voltage as shown in Figure 5.1a.

• The output voltage & the input current should ideally be a pure dc.

• But the output voltage & the input current of a practical dc-dc converter contain

harmonics or ripples as shown in Figures 5.1b and c.

• The converter draws current from the dc source only when the converter connects

the load to the supply source & the input current is discontinuous.

Q8b)

Third and fourth quadrant converter :

➢ The circuit is shown in Figure 5.14.

➢ The load voltage is always negative.

➢ The load current is either positive or negative, as shown in Figure 5.11d.

➢ S3 & D2 operate to yield both a negative voltage & a load current.

➢ When S3 is closed, a negative current flows through the load.

➢ When S3 is opened, the load current freewheels through diode D2.

➢ S2 & D3 operate to yield a negative voltage & a positive load current.

➢ When S2 is closed, a positive load current flows.

➢ When S2 is opened, the load current freewheels through diode D3.

➢ It is important to note that the polarity of E must be reversed for this circuit to yield

a negative voltage & a positive current.

➢ This is a negative two-quadrant converter.

➢ This converter can also operate as a rectifier or as an inverter.

Q8c)

Q9a)

• A single-phase bridge voltage-source inverter (VSI) is shown in Figure 6.3a.

• It consists of 4 choppers.

• When transistors Q1 & Q2 are turned on simultaneously, the input voltage Vs appears

across the load.

• If transistors Q3 & Q4 are turned on at the same time, the voltage across the load is

reversed & is –Vs.

• The waveform for the output voltage is shown in Figure 6.3b.

• Table 6.1 shows the five switch states.

• Transistors Q1, Q4 in Figure 6.3a act as the switching devices S1 & S4, respectively.

• If 2 switches : one upper & one lower conduct at the same time such that the output

voltage is ±Vs, the switch state is 1.

• If these switches are off at the same time, the switch state is 0.

Q10a)

• The input voltage to an inverter is dc & the output voltage (or current) is ac as shown

in Figure 6.1a.

• The output should ideally be an ac of pure sine wave.

• But the output voltage of a practical inverter contains harmonics or ripples as shown

in Figure 6.1b.

• The inverter draws current from the dc input source only when the inverter connects

the load to the supply source.

• The input current is not pure dc, but it contains harmonics as shown in Figure 6.1c.

• The quality of an inverter is normally evaluated in terms of the following

performance parameters.

Current Source Inverter (CSI)

• In a current-source inverter (CSI), the input behaves as a current source.

• The output current is maintained constant irrespective of load on the inverter & the

output voltage is forced to change.

• The circuit diagram of a single-phase transistorized inverter is shown in Figure 6.36a.

• As there must be a continuous current flow from the source, 2 switches must always

conduct.

• One switch is from the upper & one from the lower switches.

• The conduction sequence is 12, 23, 34, and 41 as shown in Figure 6.36b.

• The switch states are shown in Table 6.6.

• Transistors Q1, Q4 in Figure 6.36a act as the switching devices S1, S4 respectively.

• If 2 switches, one upper & one lower, conduct at the same time such that the output

current is ± IL , the switch state is 1.

• If these switches are off at the same time, the switch state is 0.

• The output current waveform is shown in Figure 6.36c.

• The diodes in series with the transistors are required to block the reverse voltages

on the transistors.

• When 2 devices in different arms conduct, the source current IL flows through the

load.

• When 2 devices in the same arm conduct, the source current is bypassed from the

load.

• The Fourier series of the load current can be expressed as :

Variable DC Link Inverter :

• The output voltage of an inverter can be controlled by varying the modulation index

(or pulse widths).

• Also, we need to maintain the dc input voltage constant.

• However, in this type of voltage control, a range of harmonics would be present on

the output voltage.

• The pulse widths can be maintained fixed to eliminate or reduce certain harmonics.

• The output voltage can be controlled by varying the level of dc input voltage.

• Such an arrangement as shown in Figure 6.38 is known as a variable dc-link inverter.

• This arrangement requires an additional converter stage.

• If it is a converter, the power cannot be fed back to the dc source.

• To obtain the desired quality & harmonics of the output voltage, the shape of the

output voltage can be predetermined.

• This is shown in Figure 6-1b or Figure 6.36.

• The dc supply is varied to give variable ac output.

Q10b)

• Static switches are of 2 types :

1) AC switches

2) DC switches

• If the input is ac, ac SSs are used & for dc input, dc SSs are used.

• Switching speed for ac switches is governed by the supply frequency & turn-off time

of thyristors.

• For dc static switches, the switching speed depends on the commutation circuitry &

turn-off time of fast thyristors.

• AC switches may be single-phase or three-phase.

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