Published by QM/JY 0966 BU TV Consumer Care Printed in the Netherlands Subject to modification EN 3122 785 18400

2009-Jun-26

©Copyright 2009 Koninklijke Philips Electronics N.V.All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Colour Television Chassis

TPM3.1ELA

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Contents Page Contents Page1. Revision List 22. Technical Specifications, Connections, and Chassis

Overview 23. Precautions, Notes, and Abbreviation List 54. Mechanical Instructions 95. Service Modes, Error Codes, and Fault Finding 136. Alignments 167. Circuit Descriptions 188. IC Data Sheets 229. Block Diagrams

Wiring diagram 32PFL54xx AUO Panel 31Wiring diagram 32PFL54xx LGD Panel 32Wiring diagram x2PFL56xx 33Block diagram Video 34Block diagram Audio 35Block diagram Functional diagram 36Block Diagram Power diagram 37

10. Circuit Diagrams and PWB Layouts Drawing PWBPower Board Inverter, 32PFL54xx AUO panel(A01)38 40-41Power Board Adapter, 32PFL54xx LGD panel(A02)39 40-41Power Board Inverter, 32PFL54xx LGD panel(A01)42 43-44Power Board Adapter, 32PFL56xx (A01) 45 47-48Power Board Inverter, 32PFL56xx (A02) 46 47-48Power Board Adapter, 42PFL56xx (A01) 49 51-52Power Board Inverter, 42PFL56xx (A02) 50 51-52SSB: VGA input 32PFL54xx (B01) 53 71-80SSB: Rear I/O (B02) 54 71-80SSB: SCART (B03) 55 71-80SSB: Side I/O (B04) 56 71-80SSB: CVBS, Audio out (B05) 57 71-80SSB: Tuner (B06) 58 71-80SSB: HDMI Input (B07) 59 71-80SSB: HDMI ESD protection (B08) 60 71-80SSB: Stand-by MCU (B09) 61 71-80

SSB: Scaler (B10) 62 71-80SSB: DDR1 Memory (B11) 63 71-80SSB: Panel Interface (B12) 64 71-80SSB: iTV Interface and AOC Hotel (B13) 65 71-80SSB: Keyboard, IR & ComPair interface (B14) 66 71-80SSB: Audio Switch (B15) 67 71-80SSB: Audio Preamplifier (B16 68 71-80SSB: Audio Amplifier (B17) 69 71-80SSB: DC-DC Power (B18) 70 71-80IR Board (J) 81 82Keyboard control panel (E) 83 84

Revision ListEN 2 TPM3.1E LA1.

2009-Jun-26

1. Revision List

Manual xxxx xxx xxxx.0• First release.

2. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:2.1 Technical Specifications2.2 Directions for Use2.3 Connections2.4 Chassis Overview

Notes:• Figures can deviate due to the different set executions.• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the links in Table 2-1. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.

Table 2-1 Described Model Numbers:

Note: The given Model Numbers are subject to change.

2.2 Directions for Use

Directions for use can be downloaded from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com

Model Number Styling Published in

32PFL5404/12

P&S 3122 785 1840032PFL5404/60

42PFL5604/60

http://www.p4c.philips.com/cgi-bin/dcbint/cpindex.pl?ctn=32PFL5404/12&dct=PSShttp://www.p4c.philips.com/cgi-bin/dcbint/cpindex.pl?ctn=32PFL5404/60&dct=PSShttp://www.p4c.philips.com/cgi-bin/dcbint/cpindex.pl?ctn=42PFL5604/60=&dct=PSShttp://www.philips.com/supporthttp://www.philips.com/supporthttp://www.philips.com/supporthttp://www.philips.com/support

Technical Specifications, Connections, and Chassis Overview EN 3TPM3.1E LA 2.

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2.3 Connections

Figure 2-1 Connection overview

Note: The following connector colour abbreviations are used: Bk = Black, Bu = Blue, Gn = Green, Gy = Grey, Rd = Red, Wh = White, Ye = Yellow.

2.3.1 Side Connections

1 - USB2.0

Figure 2-2 USB (type A)

1 - +5V �2 - Data (-) ��3 - Data (+) ��4 - Ground Gnd �

2 - Head phone (Output)Bk - Head phone 32 - 600 ٠/ 10 mW ��

3 - Cinch: Audio - InRd - Audio R 0.5 VRMS / 10 k٠��Wh - Audio L 0.5 VRMS / 10 k٠��

4 - Cinch: Video CVBS - In, Audio - InYe - Video CVBS 1 VPP / 75 ٠��

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HDMI 2/ DVIVGA

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5 - S-Video (Hosiden): Video Y/C - In1 - Ground Y Gnd �2 - Ground C Gnd �3 - Video Y 1 VPP / 75 Ω �4 - Video C 0.3 VPP / 75 Ω �

6 - HDMI: Digital Video, Digital Audio - In

Figure 2-3 HDMI (type A) connector

1 - D2+ Data channel �2 - Shield Gnd �3 - D2- Data channel �4 - D1+ Data channel �5 - Shield Gnd �6 - D1- Data channel �7 - D0+ Data channel �8 - Shield Gnd �9 - D0- Data channel �10 - CLK+ Data channel �11 - Shield Gnd �12 - CLK- Data channel �13 - Easylink Control channel ��14 - n.c. 15 - DDC_SCL DDC clock �16 - DDC_SDA DDC data ��17 - Ground Gnd �18 - +5V �19 - HPD Hot Plug Detect �20 - Ground Gnd �

2.3.2 Rear Connections

7 - VGA: Video RGB - In

Figure 2-4 VGA Connector

1 - Video Red 0.7 VPP / 75 Ω �2 - Video Green 0.7 VPP / 75 Ω �3 - Video Blue 0.7 VPP / 75 Ω �4 - n.c. 5 - Ground Gnd �6 - Ground Red Gnd �7 - Ground Green Gnd �8 - Ground Blue Gnd �9 - +5VDC +5 V �10 - Ground Sync Gnd �11 - n.c. 12 - DDC_SDA DDC data �13 - H-sync 0 - 5 V �14 - V-sync 0 - 5 V �15 - DDC_SCL DDC clock �

- VGA Audio - InBk - VGA Audio 32 - 600 Ω / 10 mW �

8 - HDMI 1/2: Digital Video, Digital Audio - InSee 6 - HDMI: Digital Video, Digital Audio - In.

9 - Aerial - In- - IEC-type (EU) Coax, 75 Ω �

10 - Cinch: S/PDIF - OutBk - Coaxial 0.4 - 0.6VPP / 75 ٠��

11 - EXT1 - 2: Video RGB/YC - In, CVBS - In/Out, Audio -In/Out

Figure 2-5 SCART connector

1 - n.c. 2 - Audio R 0.5 VRMS / 10 kΩ �3 - n.c. 4 - Ground Audio Gnd �5 - Ground Blue Gnd �6 - Audio L 0.5 VRMS / 10 kΩ �7 - Video Blue 0.7 VPP / 75 Ω �8 - Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:99.5 - 12 V: EXT 4:3 �

9 - Ground Green Gnd �10 - n.c. 11 - Video Green 0.7 VPP / 75 Ω �12 - n.c. 13 - Ground Red Gnd �14 - Ground Data Gnd �15 - Video Red 0.7 VPP / 75 Ω �16 - Status/FBL 0 - 0.4 V: INT

1 - 3 V: EXT / 75 Ω �17 - Ground Video Gnd �18 - Ground FBL Gnd �19 - n.c. 20 - Video CVBS 1 VPP / 75 Ω �21 - Shield Gnd �

12 - EXT3: Cinch: Video YPbPr - InGn - Video Y 1 VPP / 75 ٠��Bu - Video Pb 0.7 VPP / 75 ٠��Rd - Video Pr 0.7 VPP / 75 ٠��

EXT3: Cinch: Audio - OutRd - Audio - R 0.5 VRMS / 10 k٠��Wh - Audio - L 0.5 VRMS / 10 k٠��

13 - Service Connector (UART)1 - UART_TX Transmit �2 - Ground Gnd �3 - UART_RX Receive �

2.4 Chassis Overview

Refer to chapter 9. Block Diagrams for PWB/CBA locations.

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Precautions, Notes, and Abbreviation List EN 5TPM3.1E LA 3.

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3. Precautions, Notes, and Abbreviation List

Index of this chapter:3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:• Connect the set to the Mains/AC Power via an isolation

transformer (> 800 VA).• Replace safety components, indicated by the symbol ,

only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard. Of de set ontploft!

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the

mounted cable clamps.• Check the insulation of the Mains/AC Power lead for

external damage. • Check the strain relief of the Mains/AC Power cord for

proper function.• Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 MΩ and 12 MΩ.

4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD ). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (�), or hot ground (�), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and

picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with (�) and without (�) aerial signal. Measure the voltages in the power supply section both in normal operation () and in stand-by (�). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kΩ).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 Ω).

• All capacitor values are given in micro-farads (μ = × 10-6), nano-farads (n = × 10-9), or pico-farads (p = × 10-12).

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

IntroductionFor more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature ProfilesFor BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:• Use only lead-free soldering tin. If lead-free solder paste is

required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:– To reach a solder-tip temperature of at least 400°C.– To stabilize the adjusted temperature at the solder-tip.– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

www.atyourservice-magazine.com

Precautions, Notes, and Abbreviation ListEN 6 TPM3.1E LA3.

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3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number.By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V board. 0 = loop through (AUX to TV), 6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page

ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control

signal used to tune to the correct frequency

AGC Automatic Gain Control: algorithm that controls the video input of the feature box

AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black bars without discarding video information

ATSC Advanced Television Systems Committee, the digital TV standard in the USA

ATV See Auto TVAuto TV A hardware and software control

system that measures picture content, and adapts image parameters in a dynamic way

AV External Audio VideoAVC Audio Video ControllerAVIP Audio Video Input ProcessorB/G Monochrome TV system. Sound

carrier distance is 5.5 MHzBLR Board-Level RepairBTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries

B-TXT Blue TeleteXTC Centre channel (audio)CEC Consumer Electronics Control bus:

remote control bus on HDMI connections

CL Constant Level: audio output to connect with an external amplifier

CLR Component Level RepairComPair Computer aided rePairCP Connected Planet / Copy ProtectionCSM Customer Service ModeCTI Color Transient Improvement:

manipulates steepness of chroma transients

CVBS Composite Video Blanking and Synchronization

DAC Digital to Analogue ConverterDBE Dynamic Bass Enhancement: extra

low frequency amplificationDDC See “E-DDC”D/K Monochrome TV system. Sound

carrier distance is 6.5 MHzDFI Dynamic Frame InsertionDFU Directions For Use: owner's manualDMR Digital Media Reader: card readerDMSD Digital Multi Standard DecodingDNM Digital Natural Motion

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32PF9968/10 MADE IN BELGIUM220-240V 50/60Hz

128WAG 1A0617 000001 VHF+S+H+UHF

BJ3.0E LA

Precautions, Notes, and Abbreviation List EN 7TPM3.1E LA 3.

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DNR Digital Noise Reduction: noise reduction feature of the set

DRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote

control designed for service technicians

DTCP Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394

DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel

(VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display.

EDID Extended Display Identification Data (VESA standard)

EEPROM Electrically Erasable and Programmable Read Only Memory

EMI Electro Magnetic InterferenceEPLD Erasable Programmable Logic DeviceEU EuropeEXT EXTernal (source), entering the set by

SCART or by cinches (jacks)FDS Full Dual Screen (same as FDW)FDW Full Dual Window (same as FDS)FLASH FLASH memoryFM Field Memory or Frequency

ModulationFPGA Field-Programmable Gate ArrayFTV Flat TeleVisionGb/s Giga bits per secondG-TXT Green TeleteXTH H_sync to the module HD High DefinitionHDD Hard Disk DriveHDCP High-bandwidth Digital Content

Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding.

HDMI High Definition Multimedia InterfaceHP HeadPhoneI Monochrome TV system. Sound

carrier distance is 6.0 MHzI2C Inter IC busI2D Inter IC Data busI2S Inter IC Sound busIF Intermediate FrequencyIR Infra RedIRQ Interrupt RequestITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used. The SDI signal is self-synchronizing,

uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

ITV Institutional TeleVision; TV sets for hotels, hospitals etc.

LS Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences

LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I

LPL LG.Philips LCD (supplier)LS LoudspeakerLVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound

carrier distance is 4.5 MHzMIPS Microprocessor without Interlocked

Pipeline-Stages; A RISC-based microprocessor

MOP Matrix Output ProcessorMOSFET Metal Oxide Silicon Field Effect

Transistor, switching deviceMPEG Motion Pictures Experts GroupMPIF Multi Platform InterFaceMUTE MUTE LineNC Not ConnectedNICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital sound system, mainly used in Europe.

NTC Negative Temperature Coefficient, non-linear resistor

NTSC National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)

NVM Non-Volatile Memory: IC containing TV related data such as alignments

O/C Open CircuitOSD On Screen DisplayOTC On screen display Teletext and

Control; also called Artistic (SAA5800)P50 Project 50: communication protocol

between TV and peripheralsPAL Phase Alternating Line. Color system

mainly used in West Europe (color carrier= 4.433619 MHz) and South America (color carrier PAL M= 3.575612 MHz and PAL N= 3.582056 MHz)

PCB Printed Circuit Board (same as “PWB”)PCM Pulse Code ModulationPDP Plasma Display PanelPFC Power Factor Corrector (or Pre-

conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.

FST tuning systems. The customer can give directly the desired frequency

POD Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set)

POR Power On Reset, signal to reset the uPPTC Positive Temperature Coefficient,

non-linear resistorPWB Printed Wiring Board (same as “PCB”)

Precautions, Notes, and Abbreviation ListEN 8 TPM3.1E LA3.

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PWM Pulse Width ModulationQRC Quasi Resonant ConverterQTNR Quality Temporal Noise ReductionQVCP Quality Video Composition ProcessorRAM Random Access MemoryRGB Red, Green, and Blue. The primary

color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced.

RC Remote ControlRC5 / RC6 Signal protocol from the remote

control receiver RESET RESET signalROM Read Only MemoryRSDS Reduced Swing Differential Signalling

data interfaceR-TXT Red TeleteXTSAM Service Alignment ModeS/C Short CircuitSCART Syndicat des Constructeurs

d'Appareils Radiorécepteurs et Téléviseurs

SCL Serial Clock I2CSCL-F CLock Signal on Fast I2C busSD Standard DefinitionSDA Serial Data I2CSDA-F DAta Signal on Fast I2C busSDI Serial Digital Interface, see “ITU-656”SDRAM Synchronous DRAMSECAM SEequence Couleur Avec Mémoire.

Color system mainly used in France and East Europe. Color carriers= 4.406250 MHz and 4.250000 MHz

SIF Sound Intermediate FrequencySMPS Switched Mode Power SupplySoC System on ChipSOG Sync On GreenSOPS Self Oscillating Power SupplySPI Serial Peripheral Interface bus; a 4-

wire synchronous serial data link standard

S/PDIF Sony Philips Digital InterFaceSRAM Static RAMSRP Service Reference ProtocolSSB Small Signal BoardSTBY STand-BYSVGA 800 × 600 (4:3)SVHS Super Video Home SystemSW SoftwareSWAN Spatial temporal Weighted Averaging

Noise reductionSXGA 1280 × 1024TFT Thin Film TransistorTHD Total Harmonic DistortionTMDS Transmission Minimized Differential

SignallingTXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP MicroprocessorUXGA 1600 × 1200 (4:3)V V-sync to the module VESA Video Electronics Standards

AssociationVGA 640 × 480 (4:3)VL Variable Level out: processed audio

output toward external amplifierVSB Vestigial Side Band; modulation

methodWYSIWYR What You See Is What You Record:

record selection that follows main picture and sound

WXGA 1280 × 768 (15:9)XTAL Quartz crystalXGA 1024 × 768 (4:3)

Y Luminance signalY/C Luminance (Y) and Chrominance (C)

signalYPbPr Component video. Luminance and

scaled color difference signals (B-Y and R-Y)

YUV Component video

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4. Mechanical Instructions

Index of this chapter:4.1 Cable Dressing4.2 Service Positions4.3 Assy/Panel Removal TPM3.1E LA Styling4.4 Set Re-assembly.

Notes:• Figures below can deviate slightly from the actual situation,

due to the different set executions.

4.1 Cable Dressing

Figure 4-1 Cable dressing 32" set with AUO panel

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Figure 4-2 Cable dressing 32" set with LGD panel

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Figure 4-3 Cable dressing 42" set

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4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:• The buffers from the packaging.• Foam bars (created for Service).

4.2.1 Foam Bars

Figure 4-4 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See Figure 4-4 for details. Sets with a display of 42" and larger, require four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display.Caution: Failure to follow these guidelines can seriously damage the display!By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, the screen can be monitored.

4.3 Assy/Panel Removal TPM3.1E LA Styling

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before removing the rear cover.1. Remove the fixation screws that secure the rear cover.2. Lift the rear cover from the TV. Make sure that wires and

flat foils are not damaged while lifting the rear cover from the set.

4.3.2 Small Signal Board (SSB)

Caution: it is mandatory to remount all different screws at their original position during re-assembly. Failure to do so may result in damaging the SSB.

1. Unplug LVDS connector.Caution: be careful, as these are very fragile connectors!

2. Unplug all other connectors.3. Remove all fixation the screws.4. The SSB can now be taken out of the set.

4.3.3 Power Board

1. Unplug the power board connectors.2. Remove the screws.3. Lift the unit and take it out of the set.When defective, replace the whole unit.

4.3.4 Speakers

1. Unplug the speaker cable connector from the SSB.2. Take the speakers out together with their casing. When defective, replace the whole unit.

4.3.5 Key Board

1. Release the clip at the top and take whole the unit out.2. Unplug the connector.3. Remove the fixation screws and take the panel from the

unit.When defective, replace the whole unit.

4.3.6 IR Board

1. Remove the speaker that covers the IR board.2. Unplug the IR board connector.3. Remove the screw closest to the connector.4. Lift the IR board and take it out of the set.When defective, replace the whole board.

4.3.7 Display Panel

1. Unplug the backlight and LVDS connectors.2. Take the speakers out of their fixation position.3. Release the key board unit from the bezel.4. Release the IR board connector.5. Remove the four fixation screws that fix the subframe to the

front bezel.6. Lift the complete subframe with boards and speakers from

the front bezel.7. Remove the four fixation screws from the side of the

subframe that fix the LCD panel to the subframe.8. Lift the complete subframe from the LCD panel.When defective, replace the whole unit.

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:• While re-assembling, make sure that all cables are placed

and connected in their original position. See Figure 4-1.• Pay special attention not to damage the EMC foams on the

SSB shields. Ensure that EMC foams are mounted correctly.

10000_018_090121.eps090121

1

Required for sets42"

1

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2009-Jun-26

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:5.1 Service Modes5.2 Software Upgrading5.3 Error Codes5.4 Fault Finding and Repair Tips

5.1 Service Modes

The Customer Service Mode (CSM) is used for communication between the call centre and the customer, while the Factory Mode offers several features for the service technician.

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis.

5.1.1 Customer Service Mode (CSM)

Purpose The Customer Service Mode shows error codes and information on the TV’s operation settings.The call centre can instruct the customer (by telephone) to enter CSM in order to identify the status of the set.This helps the call centre to diagnose problems and failures in the TV set before making a service call.The CSM is a read-only mode; therefore, modifications are not possible in this mode.

How to Activate CSMKey in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

Figure 5-1 CSM Menu

How to NavigateBy means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus.

Contents of CSM

General• Model. Philips model type• Production serial number

Philips serial number• Software version

Format:TPAA.AA V2.XX Y ZTPAA.AA is the chassis nameV2.XX is the revisionY is the display code (1 digit).Z is the panel revision code (1 digit).

• CodesShow the latest 5 error codes (layer 2)status:000 = No problem, 011 = I2C bus error, 012 = tuner error

• SSBPhilips 12NC of SSB (small signal board)

• DisplayPhilips 12NC of display (LCD panel)

• PSUPhilips 12NC of PSU (Power Supply Unit)

• NVM versionRevision (4 letters)

• PQ VersionRevision (4 letter)

• HDCP keyHDCP status (Valid, Invalid)

• Signal quality/presentDTV shows (Digital percentage)ATV shows (analog Yes/No)

• Audio systemMono, Stereo, Dual

• Video formatPAL, SECAM, NTSC

• Standby μP SW versionRevision (4 letters)

How to Exit CSMPress “INFO” on the RC-transmitter.

5.1.2 Factory mode

How to enterTo enter the factory mode, use the following method:• Press the following key sequence on the remote control

transmitter: “062596”directly followed by the “INFO” button.After entering the factory mode, the following screen is visible on the top and right of the panel.

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Service Modes, Error Codes, and Fault FindingEN 14 TPM3.1E LA5.

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Figure 5-2 Factory Mode Menu

How to NavigateWith the up/dowm cursor keys can be navigated arround the items, with the Left/Right cursor the values can be changed.

How to EXITChoose "EXIT", then press"OK"button.

5.2 Software Upgrading

5.2.1 ComPair

IntroductionComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:1. ComPair helps to quickly get an understanding on how to

repair the chassis in a short and effective way.2. ComPair allows very detailed diagnostics and is therefore

capable of accurately indicating problem areas. No knowledge on I2C or UART commands is necessary, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

4. ComPair features TV software up possibilities.

SpecificationsComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).The ComPair fault finding program is able to determine the problem of the defective television, by a combination of

automatic diagnostics and an interactive question/answer procedure.

How to ConnectThis is described in the chassis fault finding database in ComPair.

Figure 5-3 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to OrderComPair II order codes:• ComPair II interface: 3122 785 91020.• Programming software can be downloaded from the Philips

Service portal. • ComPair UART interface cable for TPS2.2x xx.

(using JST PHR-3, 2 mm pitch connector): 3122 785 90630.

Note: While having problems, contact the local support desk.

5.3 Error Codes

The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right.

5.4 Fault Finding and Repair Tips

5.4.1 Exit “SAM”

Choose "EXIT",then press"OK"button. Turn off the TV and then turn on the TV.

18400_201_090301.eps090616

10000_036_090121.eps090121

TOUART SERVICECONNECTOR

TOUART SERVICECONNECTOR

TOI2C SERVICECONNECTOR

TO TV

PC

HDMII2C only

Optional power5V DC

ComPair II Developed by Philips Brugge

RC outRC in

OptionalSwitch

Power ModeLink/Activity I2C

ComPair IIMulti

function

RS232 /UART

Service Modes, Error Codes, and Fault Finding EN 15TPM3.1E LA 5.

2009-Jun-26

5.4.2 Speakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.4.3 Tuner

Attention: In case the tuner is replaced, always check the tuner options.

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2009-Jun-26

6. Alignments

Index of this chapter:6.1 General Alignment Conditions6.2 TV Mode display adjust6.3 PC mode Display Adjustment6.4 Serial Number Definition

Note: The Service Mode are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or RIGHT keys of the remote control transmitter.

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:• Power supply voltage (depends on region):

– 195 V to 264 VAC, 50/60 ±3 Hz.• Connect the set to the mains via an isolation transformer

with low internal resistance.• Allow the set to warm up for approximately 15 minutes.• Measure voltages and waveforms in relation to correct

ground (e.g. measure audio signals in relation to AUDIO_GND).Caution: It is not allowed to use heatsinks as ground.

• Test probe: Ri > 10 MΩ, Ci < 20 pF.• Use an isolated trimmer/screwdriver to perform

alignments.

6.2 TV Mode display adjust

6.2.1 White balance adjustment

General set-up:• Equipment Requirements: Colour analyser.• Input requirements:

Input Signal Type:– RF signal– Set to PAL B/G system, frequency is decided in factory– Pattern is white of 100%

• Input Signal Strength: 10 mV (80 dBμV) terminal voltage.• Input Injection Point: TV Tuner input

Colour Temp Alignment Apply full white pattern, and smart picture setting to be standard (Brightness 50, Contrast 50, and Colour 50). Adjusting SCALER GAIN R G B to reach W/D and luminance in factory mode as below.Adjust the colour temperature in the factory mode OSD by adjusting RGB Gain from 127. The CIE1931 chromaticity (X, Y) co-ordinates shall be:

Table 6-1 Reading with Minolta CA-210

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics).• Select a COLOUR TEMPERATURE (e.g. COOL,

NORMAL, or WARM).• Set the RED, GREEN and BLUE default values according

to the values in Table 6-2.• When finished return to the SAM root menu and press

STANDBY on the RC to store the aligned values to the NVM.

Table 6-2 Tint settings

Luminance: – >360 cd/m2 for AUO T315XW02– >400 cd/m2 for LGD LC320WXEIn the centre of the screen when Smart mode at “Vivid” or set brightness to 100.

Note: These group settings about colour temp are also applied automatically into HDMI1/HDMI2/Side HDMI/CVI1/CVI2/SIDE AV/VGA. That means TV/HDMI/CVI/PC are used the same setting.

6.3 PC mode Display Adjustment

Auto colour adjustment Set Brightness 100 and Contrast 50 and apply 1024 × 768 at 60 Hz mode with 50 Black and 50 White pattern at the factory mode.Activate AUTO-COLOR function for auto ADC offset and gain setup.

Figure 6-1 50-Black 50-White

Colour temperature alignment is automatically set during TV alignment.Apply full white pattern, check picture must satisfy following table.

Table 6-3 Reading with Minolta CA-210

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics).• Select NORMAL COLOUR TEMPERATURE.• Set the RED, GREEN and BLUE default values according

to the values in the “Tint settings” table.• When finished return to the SAM root menu and press

STANDBY on the RC to store the aligned values to the NVM.

Table 6-4 Tint settings

Colour Temp x y

Normal 0.289 ± 0.004 0.291 ± 0.004Warm 0.314 ± 0.004 0.319 ± 0.004Cool 0.278 ± 0.004 0.278 ± 0.004

Colour Temp R G B

Normal 85 74 85

Warm 84 63 49

Cool 75 63 85

Colour Temp x y

Normal 0.289 ± 0.015 0.291 ± 0.015

Colour Temp R G B

Normal 85 74 85

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Alignments EN 17TPM3.1E LA 6.

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6.3.1 Comp video Mode display adjust

Auto Colour Adjustment General set-up:Equipment: Quantum Data Pattern Generator 802G or 802R or 882.Apply 720p/50 Hz, and the pattern TVBAR100 as shown in Figure 6-2.

Figure 6-2 TVBAR100 pattern

Initial Set-up: Set Smart picture as “Personal” (Brightness to 50, Contrast to 50 and Colour to 50). Access to factory OSD first, then to enable AUTO-COLOR to get HD ADC OFFSET and HD ADC GAIN. Check if 32 gray scales can be distinguished.

Colour temperature alignment is automatically done during TV alignment.

6.4 Serial Number Definition

BOM Code:

Table 6-5 BOM Code

Panel Supplier Code

AU 1

CPT 2

LPL(LG) 3

QDI 4

CMO 5

HSD 6

SVA 7

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Circuit DescriptionsEN 18 TPM3.1E LA7.

2009-Jun-26

7. Circuit Descriptions

Index of this chapter:7.1 Introduction7.2 Block Diagram7.3 MT8222TMMU

Notes: • Only new circuits (circuits that are not published recently)

are described. • Figures can deviate slightly from the actual situation, due

to different set executions.• For a good understanding of the following circuit

descriptions, please use the wiring, block (chapter 9) and circuit diagrams (chapter 10). Where necessary, you will find a separate drawing for clarification.

7.1 Introduction

This platform LCD-TV uses two main ICs: MT8222TMMU (One Chip LCD-TV Controller) and WT6703F (Stand-by MCU). The MediaTek MT8222TMMU is an ultra highly integrated single chip for flat panel TV supporting multimedia video/audio input and output format up to full HDTV. It includes advanced 3D comb filter TV decoder to retrieve the best image from popular composite signals and embedded HDTV/VGA decoders for the high bandwidth input signals perfectly reproducing.The new 4th generation advanced motion adaptive and motion estimation de-interlace converts accordingly the interlace video into progressive one with overlay of a 2D graphic processor. Independent two flexible scalars provide wide adoption to various LCD panels for two of different video sources at the same time. On-chip audio processor decodes analog signals from tuner with lip sync control, delivering high quality post-processed sound effect to customers. The WT6703F is mainly for TV stand-by remaining function during off/stand-by mode. When TV set enters to off/stand-by mode, MT8222 CLD will be totally shutdown and remain only WT6703F to meet the lowest power consumption.The WT6703F is a micro controller for system power manager with Turbo 8051 compatible (3T) CPU, flash memory, SRDAM, two pulse width modulators, DPMS detector, double timers and UART, three slave I2C interface, a 4 channel 8-bit A/D converter, real time clock, watch-dog timer, embedded ISP, power down mode and embedded ICE mode.

7.2 Block Diagram

7.2.1 Features

See Block diagram Functional diagram for details.The tuner supports NTSC\PAL\SECAM RF signals. For TV signal, MT8222TMMU with single high-quality 4th generation TV decoder Automatic TV standard detection supporting NTSC, NTSC-4.43, PAL (B, G, D, H, M, N, I, Nc), PAL (Nc), PAL, SECAM New 4th generation NTSC/PAL/PAL-M/PAL-N Motion Adaptive 3D comb filter Embedded VBI decoder for Closed-Caption/XDS/ Teletext/ WSS/VPS Supporting macrovision detection.The platform supports different I/O sources: • CVI supports YPbPr component input, it can support SD/

HD format • SIDE-AV supports CVBS, S-Video signal shares with same

audio.• HDMI supports up to HDMI 1.3a with CEC & HDCP

function, audio included and also supports PC DVI signal with HDCP function, the audio shares with PC audio connector via PC mini-jack

• PC supports analog PC input via 15 pin D-sub input• Analog audio out supports via RCA jack Each video/audio signal of all sources will directly deliver to MT8222TMMU for video/audio further digital processing.

Pre-Audio out signal is sent through the DAC out and is amplified to main speaker by audio amplifier MAX9728AETC + TPA3123D2 and is simultaneously amplified to head phone by audio amplifier MAX9728AETC.

Circuit Descriptions EN 19TPM3.1E LA 7.

2009-Jun-26

7.2.2 32" & 42" SSB Cell Layout

Figure 7-1 32" & 42" SSB layout

7.3 MT8222TMMU

7.3.1 Function Description

Analog front end• set of high resolution ADC with corresponding PGAs

adopting to 0.5 V to 2 V input dedicated for TV/AV/SV input signals.

• 3 high speed ADCs dedicated for VGA/HDTV input signals up to 160 MHz.

• All 8-bit programmable gain pre-amplifiers.• Embedded Schmitt trigger and de-glitch circuits on Hsync/

Vsync/SOG/SOY inputs.

Video InputEmbedded input multiplexers without external switch including.

• 8 for TV/AV/S-video input pins available for any possible combination.

• 3 sets for VGA/Component/Scart/D-connector with differential input pairs.

• 3 sets of HDMI/DVI input port with internal multiplexers.• Input sources can be flexibly routed to Main/PIP internally.

Sync Processor• Two enhance sync processors for all timing detection

supporting Macrovision detection.• Enhanced measuring mechanism for VGA auto

adjustment.

DecoderTVD• Single high-quality 4th generation TV decoder.

18400_206_090301.eps090617

TUNER

DDR

CLASS D

FFC

Scaler

VGA

HDMI

HDMI

USB

Scart

Component

AV Input

Circuit DescriptionsEN 20 TPM3.1E LA7.

2009-Jun-26

• Automatic TV standard detection supporting NTSC, NTSC-4.43, PAL (B, G, D, H, M, N, I, Nc), PAL (Nc), PAL, SECAM.

• New 4th generation NTSC/PAL/PAL-M/PAL-N Motion Adaptive 3D comb filter.

• Embedded VBI decoder for Closed-Caption/XDS/Teletext/ WSS/VPS.

• Supporting Macrovision detection.

YPbPr/Scart/D-connector• Supporting HDTV 480i/480p/576i/576p/720p/1080i/1080p

input.• Smart detection on Scart function for European region.• Smart detection on D-connector for Japan region.• Supporting SCART RGB inputs mixed with composite

signal by adjustable horizontal delay.

VGA• Supporting various VGA input timings up to UXGA

(1600 × 1200 @ 60 Hz).• Supporting Separate/Composite/SOG sync types.

HDMI• Supports DTV (480i/576i/480p/576p/720p/1080i/1080p)

and PC (VGA/XGA/SXGA/UXGA) resolution up to 165 MHz (using dual edge to transmit video data for pixel clock over 112 MHz).

• HDMI 1.3/DVI 1.0/EIA/CEA-861B/HDCP 1.1 supported.• Three HDMI input ports with internal high speed

multiplexers realize flexible design.

VBI• Dual VBI decoders for the application of V-Chip/Closed-

Caption/XDS/ Teletext/WSS/VPS• Supporting external VBI decoder by YPrPb input• VBI decoder up to 4000 pages Teletext (L1.5).

MJC/ME/MC• Support 120 Hz motion judder compensation for horizontal

motion. (option)• Support 60 Hz to 120 Hz, 50 Hz to 100 Hz in 100/120 Hz

panel• Support 24 Hz to 60 Hz, 25 Hz to 50 Hz in 50/60 Hz panel

Video ProcessorNoise Reduction• All input sources with 2D/3D adaptive noise reduction to

realize pure clean picture

Colour Management• Advanced flesh tone and multiple-colour enhancement.

(For skin, sky, grass and white level) to get purely natural picture quality.

• Advanced Colour Transient Improvement (CTI).• Saturation/hue adjustment for flexible design.

Contrast/Brightness/Sharpness Management• Sharpness and DLTI/DCTI• Brightness and contrast adjustment• Black level extender to get more detail at dark scene• White peak level limiter• Adaptive Luma/Chroma management.

De-interlacing• 4th generation advanced Motion adaptive de-interlacing

with motion estimation & motion compensation de-interlacing.

• Automatic detect film or video source.• 3 : 2/2 : 2 pull down source detection.

Scaling• 4th generation high resolution arbitrary ratio vertical/

horizontal scaling of video, from 1/32× to 32×.

• Advanced linear and non-linear Panorama scaling.• Programmable Zoom viewer.• Picture-in-Picture (PIP).• Picture-Out-Picture (POP).

Display• Advanced dithering processing for LCD display with 8/10

bit output.• Gamma correction• Supporting alpha blending for Video and OSD planes.• Frame rate conversion• Gamma/anti-Gamma correction to optimise the display

device performance

Seamless performance comparing demonstration function• Support Left/Right video processing comparing function

without additional resources (DRAM) for customers demonstration

• All the video functions (De-interlace/3D comb/NR/Flesh tone/CTI) can be included

Video Output• Programmable output timing up to 1920 × 1080 @ 60 Hz

panel support.• Dual-channel 8/10-bit LVDS, single channel 8/10-bit LVDS• One CVBS output with CVBS / S-video mixed input• Spread spectrum function to eliminate display clock EMI

issue on board

Audio Features• Supporting BTSC/EIAJ/A2/NICAM decode• Stereo demodulation, SAP demodulation• Mode selection (Main/SAP/Stereo)• Equalizer• Sub-woofer/Bass enhancement• MTK proprietary 3D surround processing (Virtual surround)• Audio and video lip synchronization• Supporting Reverberation

Audio Input/Output• Decode audio AF from Tuner• 2 channels audio L/R digital line in.• Supports 1-channel (1 R/L pairs) analog audio input.• Embedded internal 3-ch (L/R) audio DAC & could bundle

with 8292 (MTK audio OP & MUX).• Supporting 1 tuner audio decoder and 1 digital input and

both output for SCART1/2 output application• Support SPDIF in/output

2D-Graphic/OSD processor• Embedded one bitmap OSD plane to support 4-/8-bpp

index colour mode, and 16-/32-bpp direct colour mode with horizontal/vertical scaling function

• Another character based OSD plane to support 1-/2-/4-/8-bpp index colour mode for low DRAM usage setup menu and Teletext / Close-caption display

• Supporting alpha blending among these two planes and video

• Supporting Text/Bitmap decoder• Supporting line/rectangle/gradient fill• Supporting bitblt• Supporting Colour Key function• Supporting Clip Mask

Host Micro controller• RISC microprocessor & 8032 dual core CPU inside.• Supporting serial type flash interface• Supporting 5/3.3-Volt. FLASH interface• IR control serial input

Circuit Descriptions EN 21TPM3.1E LA 7.

2009-Jun-26

• Supporting two RS232 interfaces for external source communication (Including one RS232 port speeding up to 3 Mbps)

• Supporting up to 4 PWM outputs• Programmable GPIO setting for complex external device

control

Multi-Media Engine• Supports HD JPEG decode• Supports SD MPEG-1/2/4 decode• Support RM decode (option)

DRAM Controller• Supporting up to 32M-bytes DDRI/SDR DRAM• Supporting 16 bits DDRI/SDR bus interfaces• Build in a DRAM interface programmable clock to optimise

the DRAM performance• Programmable DRAM access cycle and refresh cycle

timings• Supporting 2.5/3.3 Volt DDRI/SDR Interface

Flash Usage• Flash is used to store FW code, fonts, bitmaps, big tables

for VGA, Video, Gamma.• For single country, we need around 20KB to store font

data.• For more bitmaps, we need more flash space to store

them.

USB Host• Embedded host controller• Compliant with USB specification Rev. 2.0 at high-speed

and full-speed data transfer rate• Complies with USB Storage Class specification Rev. 1.0• Support independent USB 2 channel & copy function

FCI• Supports SD/MMC/MS/MS-Pro type flash card.

Outline• 256-pin LQFP package• 3.3/2.5/1.0-Volt. operating voltages• Advanced 90um process.

IC Data SheetsEN 22 TPM3.1E LA8.

2009-Jun-26

8. IC Data Sheets

This section shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs).

8.1 MT8222TMMU/B (IC U4201)

Figure 8-1 Internal block diagram and pin configuration

18400_300_090301.eps090619

Block Diagram

Pin Configuration

IC Data Sheets EN 23TPM3.1E LA 8.

2009-Jun-26

8.2 WT6703F (IC U4101)

Figure 8-2 Internal block diagram and pin configuration

18400_301_090301.eps090619

Block Diagram

Pin Configuration

IC Data SheetsEN 24 TPM3.1E LA8.

2009-Jun-26

8.3 MX25L6405DMI (IC U4105)

Figure 8-3 Pin configuration

18400_302_090301.eps090619

Block Diagram

Pin Configuration

IC Data Sheets EN 25TPM3.1E LA 8.

2009-Jun-26

8.4 EM6AA160TS (IC U5101)

Figure 8-4 Internal block diagram

CK

CKE

CSRASCASWE

DLLCLOCKBUFFER

COMMANDDECODER

COLUMNCOUNTER

CONTROLSIGNAL

GENERATOR

ADDRESSBUFFER

REFRESHCOUNTER

4M x 16CELL ARRAY

(BANK #0)Row

Dec

oder

4M x 16CELL ARRAY

(BANK #1)Row

Dec

oder

4M x 16CELL ARRAY

(BANK #2)Row

Dec

oder

4M x 16CELL ARRAY

(BANK #3)Row

D

ecod

er

Column Decoder

Column Decoder

Column Decoder

Column Decoder

MODEREGISTER

A10/AP

A9A11A12BA0BA1

~

A0

CK

DATASTROBEBUFFER

LDQSUDQS DQ

Buffer

LDMUDM

DQ15

DQ0~

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Block Diagram

IC Data SheetsEN 26 TPM3.1E LA8.

2009-Jun-26

8.5 EM6AA160TS (IC U5101)

Figure 8-5 Pin configuration

VSSQ

1 66 SSVDDV

2 65 51QD0QD

3 64 QSSVQDDV

4 63 41QD1QD

5 62 31QD2QD

6 61VSSQ VDDQ

7 60 21QD3QD

8 59 11QD4QD

9 58 QSSVQDDV

10 57 01QD5QD

11 56 9QD6QD

12 55 QDDVQSSV

13 54 8QD7QD

14 53 CNCN

15 52VDDQ

16 51 SQDUSQDL

18 49 FERVDDV

19 48 SSVCN

20 47 MDUMDL

22 45 KCSAC

23 44 EKCSAR

24 43 CNSC

25 42 21ACN

26 41 11A0AB

27 40 9A1AB

28 39 8APA/01A

29 38A0 A7

17 50 CNCN

21 46 KCEW

31 36 5A2A

32 35 4A3A

33 34 SSVDDV

30 37 6A1A

Pin Configuration

18400_304_090301.eps090619

IC Data Sheets EN 27TPM3.1E LA 8.

2009-Jun-26

8.6 MAX9728AETC (IC U1501, U1502, U6202)

Figure 8-6 Internal block diagram and pin configuration

CHARGEPUMP

UVLO/SHUTDOWNCONTROL

CLICK-AND-POPSUPPRESSION

C1N

C1P

PVSS SVSS PGND SGND INR

VDD SHDN

ONOFF

SVSS

VDD

SGND

INL

RF*30k?

RIN*20k?

RIN*20k?

OUTR

LEFTAUDIOINPUT

RIGHTAUDIOINPUT

HEADPHONEJACK

5(8)

12(2)

1(3)

2(4)

3(5)

4(7)

9(12)

11(1)

6(9)

10(14)

7(10)

C11µF

C21µF

4.5V TO 5.5V

C31µF

CIN0.47µF

SVSS

VDD

OUTL

CIN0.47µF

8(11)

RF*30k?

MAX9728A

Block Diagram

Pin Configuration

18400_305_090301.eps090619

TOP VIEW

12

11

10

4

5

6

1 2 3

9 8 7

MAX9728AMAX9728B

TQFN

C1P

PG

ND

C1N

PVSS

SHDN

INL

SG

ND

INR

SV S

S

OUTR

OUTL

+VDD

IC Data SheetsEN 28 TPM3.1E LA8.

2009-Jun-26

8.7 TPA3123D2PWPR (IC U6301)

Figure 8-7 Internal block diagram and pin configuration

LS

HS

LS

HS

OSC/RAMP

MUTECONTROL

BYPASS

AVCONTROL

CONTROL

BIAS

THERMAL

SCDETECT

SCDETECT

AVDDAVCC

LIN

RIN

MUTE

BYPASS

GAIN1

GAIN0

SD

BSL

PVCCL

LOUT

PGNDL

VCLAMP

BSR

PVCCR

ROUT

PGNDR

VCLAMP

VCLAMP

AVDDAVDD

AVDD/2

AVDDAVDD

AVDD/2

REGULATOR

AGND

+

-

+-

123

456789

101112

242322

212019181716

151413

PVCCLSD

PVCCLMUTE

LINRIN

BYPASSAGNDAGND

PVCCRVCLAMP

PVCCR

PGNDLPGNDLLOUTBSLAVCCAVCCGAIN0GAIN1BSRROUTPGNDRPGNDR

Block Diagram

Pin Configuration

18400_307_090301.eps090619

IC Data Sheets EN 29TPM3.1E LA 8.

2009-Jun-26

8.8 CS4344 (IC U4203)

Figure 8-8 Pin configuration

Block Diagram

Pin Configuration

18400_308_090301.eps090619

IC Data SheetsEN 30 TPM3.1E LA8.

2009-Jun-26

Personal Notes:

10000_012_090121.eps090121

Block Diagrams EN 31TPM3.1E LA 9.

2009-Jun-26

9. Block Diagrams

Wiring diagram 32PFL54xx AUO Panel

PANEL (1053)

MAIN POWER SUPPLY(1054)

CN903

+5VSB11

S/B10

+5VSB13

12

24V9

24V8

GND7

GND6

GND5

12V4

12V3

DIM2

EN1

CN902

AC socket

CN901

CN7101

BRI_PWM11

+12V10

INV_ON/OFF12

+12V9

GND8

GND7

GND6

+24V5

+24V4

STBY3

+5V_STBY2

+5V_STBY1

CN5205CN5401

GND4

KEY23

KEY12

PWE-ON_OFF1

KE

YB

OA

RD

(105

7)

DC_ON_OFF4

KEY13

KEY22

GND1

CN5404

+5V STBY3

LED1-ON2

PWR_ON_OFF1

LGIHT SENSOR7

GND6

RC_IR_3V35

LED 2 STBY4

IR OUT5

GND6

LED2_STBY4

LIG_SENOR7

VCC_STBY3

LED_ON2

1

CN0201

LOUT+4

GND3

ROUT+2

GND1

CN6301

SPEAKER R(1185)

SPEAKER L(1185)

NC11

GND10

DIM13

EN12

GND9

GND8

GND7

GND6

24V5

24V4

24V3

24V2

24V1

GND30

GND31

GND32

RXO2+19

RXO2-18

GND17

RXO1+16

RXO1-15

GND14

GND11

10

9

GND8

GND21

GND20

RXO0+13

RXO0-12

RXO3+25

RXO3-24

RXOC+23

RXOC-22

GND29

28

27

GND26

GND7

GND6

GND5

PANEL_VCC4

PANEL_VCC3

PANEL_VCC2

PANEL_VCC1

18400_404_090301.eps090622

8806

8803

8807

SSB(1053)B

IR L

ED

PA

NE

L(1

056)

EJ

A

EN 32TPM3.1E LA 9.Block Diagrams

2009-Jun-26

Wiring diagram 32PFL54xx LGD Panel

PANEL (1050)

MAIN POWER SUPPLYIPB (1054)

CN803

+5VSB11

S/B10

+5VSB13

12

24V9

24V8

GND7

GND6

GND5

12V4

12V3

DIM2

ENA1

CN902

AC socket

CN901

CN7101

BRI_PWM11

+12V10

INV_ON/OFF12

+12V9

GND8

GND7

GND6

+24V5

+24V4

STBY3

+5V_STBY2

+5V_STBY1

CN5205

GND31

GND30

GND32

RXO2+19

RXO2-18

GND17

RXO1+16

RXO1-15

GND14

GND11

10

9

GND8

GND21

GND20

RXO0+13

RXO0-12

RXO3+25

RXO3-24

RXOC+23

RXOC-22

GND29

28

27

GND26

GND7

GND6

GND5

PANEL_VCC4

PANEL_VCC3

PANEL_VCC2

PANEL_VCC1CN5401

GND4

KEY23

KEY12

PWE-ON_OFF1

KE

YB

OA

RD

(105

7)

DC_ON_OFF4

KEY13

KEY22

GND1

CN5404

IR L

ED

BO

AR

D(1

056)

+5V STBY3

LED1-ON2

PWR_ON_OFF1

LGIHT SENSOR7

GND6

RC_IR_3V35

LED 2 STBY4

IR OUT5

GND6

LED2_STBY4

LIG_SENOR7

VCC_STBY3

LED_ON2

1

CN0201

LOUT+4

GND3

ROUT+2

GND1

CN6301

SPEAKER R(1185)

SPEAKER L(1185)

CN802

18400_405_090301.eps090622

8807

8805

8804

SSB(1053)B

8806E

J

A

Block Diagrams EN 33TPM3.1E LA 9.

2009-Jun-26

Wiring diagram 42PFL56xx

CN803

+5V11

S/B10

+5V13

12

24V9

24V8

GND7

GND6

GND5

12V4

12V3

DIM2

ENA1

CN903

AC socket

CN901

CN7101

BRI_PWM11

+12V10

INV_ON/OFF12

+12V9

GND8

GND7

GND6

+24V5

+24V4

STBY3

+5V_STBY2

+5V_STBY1

CN5201CN5401

GND4

KEY23

KEY12

PWE-ON_OFF1

DC_ON_OFF4

KEY13

KEY22

GND1

CN5404

+5V STBY3

LED1-ON2

PWR_ON_OFF1

LGIHT SENSOR7

GND6

RC_IR_3V35

LED 2 STBY4

IR OUT5

GND6

LED2_STBY4

LIG_SENOR7

VCC_STBY3

LED_ON2

1

CN0201

LOUT+4

GND3

ROUT+2

GND1

CN6301

GND3

AUD_ROUT2

AUD_LOUT1

CN6302

CN802

GND31

PANEL_VCC30

GND32

GND19

GND18

RXE1+17

RXE1-16

RXE0+15

RXE0-14

RXOC+11

RXOC-10

GND9

GND8

RXE2+21

RXE2-20

RXO3+13

RXO3-12

RXE3+25

RXE3-24

RXEC+23

RXEC-22

PANEL_VCC29

PANEL_VCC28

PANEL HIGH27

PANEL HIGH26

RXO2+7

RXO2-6

RXO1+5

RXO1-4

RXO0+3

RXO0-2

GND1

18400_407_090301.eps090625

PANEL (1050)

MAIN POWER SUPPLYIPB (1054)

KE

YB

OA

RD

(105

7)

IR L

ED

PA

NE

L(1

056)

SPEAKER R(1186)

SPEAKER L(1186)

SUB WOOFER(1185)

8807

8805

8804

SSB(1053)B

8806

8804

EJ

A

EN 34TPM3.1E LA 9.Block Diagrams

2009-Jun-26

Block diagram Video

TUNER

YPbPr 1

SCART 1

MT8222

Scaler/ADCVideo

processing

MCUWT6703F

Key pad

Flash memory

DDR memory

Power supply(regulator/Switch)

Manage unitto each block

Panel interface1920 × 1080(1366 × 768)

Control interface

PC_ D-sub

HDMI_1

Side CVBS/S-video

EEPROMEDID/RS232

EDID

Audio DAC/SPDIF

HDMI_2

RS232 service & ComPair port

iTVCVBS

Sync slicer

CVBS & H/V sync

SCART 2

HDMI_SIDE

USB

IR / Power switch

18400_400_090301.eps090618

Block Diagrams EN 35TPM3.1E LA 9.

2009-Jun-26

Block diagram Audio

TUNER

YPbPr

S/PDIF Output

MT8222Audio

decoderprocessing

PC_ D-sub

HDMI*3

Side CVBS/S-video

AudioSwitch

SSIF

Head phoneAMP

Head phone

SCART 1

Post AMP

SCART 2

18400_401_090301.eps090618

EN 36TPM3.1E LA 9.Block Diagrams

2009-Jun-26

Block diagram Functional diagram

M24C02

WT6703FM24C02

M24C02

Tuner

MT8222 HY5DU561622FTP-4DDR5V

_SC

L

5V_S

DA

SIF

_OU

T

TV_CVBS

ISP1_SCL

ISP1_SDA

PC_HSYNC

PC_VSYNC

DDCSCL

DDCSDA

RDQS0

RDQ[15..0]

RA[12..0]

RDQM0

RWE#

RCAS#

RRAS#

RCS#

PC_R/G/B IN

YPbPr1_Y/Pb/Pr

SCART 1_MP

SCART 2_MP

Side AV –S_MP

PC

_VS

YN

C

PC

_HS

YN

C

74HC4052D

TPA3123D

MAX9728AETC

PC_AU R/L

SCT2_AU_ R/L

COMP2 R/L

AUD_MUX_R

AUD_MUX_L AUD_ROUT

AUD_LOUT

ROUT

LOUT

MAIN_AOL

MAIN_AOR

AUD_ROUT

AUD_LOUT

MT

_IN

T

5V PWR SWSTANDBY

DC_ON_OFF

KEY1

3V_S

CL

3V_S

DA

RBA0

RBA1

+5V

3.3V_SB

DDC_5V

HDMI3_5V

+5V

+24V

+5V

DDC_WP

RC I/R_3V3R

ST

_MT

8222

MT_SCL

MT_SDA

HDMI1_5V

HDMIConnector

HDMI1_DDC_SDA

HDMI1_DDC_SCL

HDMI1_RX0/1/2/3/C+-

DSUBConnector

PC_R/G/BIN

SEL2

SEL1

HDMI 1,2,side _RX0/1/2/3/C+-

HDMIConnector

HDMI2_DDC_SDA

HDMI2_DDC_SCL

HDMI2_RX0/1/2/3/C+-

M24C02HDMI2_5V

USB

KE

Y1

ST

AN

DB

Y

5V_P

WR

_SW

RC

_IR

3V

3

LED

2ST

BY

RDQS1

RDQM1

RCLK0#

RCLKEN

RCLK0

HDMI-SIDE_DDC_SDA

HDMI-SIDE_DDC_SCL

HDMIConnector

HDMI-SIDE_RX0/1/2/3/C+-

SIDE_CVBS_AU_R/L

HP_LOUT

HP_ROUT

18400_402_090301.eps090618

Block Diagrams EN 37TPM3.1E LA 9.

2009-Jun-26

Block Diagram Power diagram

18400_403_090301.eps090618

EN 38TPM3.1E LA 10.Circuit Diagrams and PWB Layouts

2009-Jun-26

10. Circuit Diagrams and PWB Layouts

Power Board Inverter, 32PFL54xx AUO panel1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

01

01

11

11

A A

B B

C C

D D

E E

F F

G G

H H

1

2

3

!

!

!

!

!

!

!

!

!

!

!

!

!

!!

To s

cale

r

To p

anel

USP "23 / "62 2-1923G517

!

!

!

1E 109NC 1A 109DB9F 309NC 7F 209NC

1B 209C 2D 109C2C 409C 2B 309C8D 609C 2A 509C3B 119C 5A 709C3C 419C 3C 319C6F 719C 3C 519C6D 139C 6E 819C3E 339C 2E 239C4F 539C 3F 439C6H 739C 4E 639C5E 939C 8D 839C6E 149C 4F 049C7E 349C 3F 249C8F 749C 7E 649C8E 059C 3G 849C6B 089C 5B 069C6C 389C 7C 189C8B 589C 8B 489C8C 989C 9B 689C5F 109D 5A 099C4B 309D 5A 209D6G 509D 5F 409D8B 539D 7C 609D5E 259D 5D 159D7E 659D 7E 559D7B 189D 6B 089D8E 489D 8E 389D

8B 089BF 5A 409BF5A 289BF 2B 189BF1B 489BF 3B 389BF

1E 109F 5B 589BF8A 539DH 1A 109DBH5B 109QH 7D 559DH

6C 139CI 3B 109CI4E 159CI 8C 239CI2G 359CI 2G 259CI5G 199CI 8C 289CI

2B 209L 1C 109L8G 239L 8F 139L9B 089L 8D 179L

1D 109RN 2A 189L6C 139Q 4B 109Q6D 159Q 5G 549Q6H 889Q 6E 259Q1F 499Q 8D 399Q4C 699Q 2F 599Q1E 109VR 4C 799Q

3B 509R 1C 109R3C 709R 5G 609R4C 909R 3C 809R4C 119R 5C 019R4C 319R 4C 219R4C 519R 2F 419R3C 719R 4B 619R4B 919R 4B 819R6E 129R 6C 029R5C 039R 5F 229R5C 339R 5C 139R5C 539R 5C 439R5G 649R 5G 549R8G 849R 2F 749R3E 759R 3F 659R2E 959R 3E 859R5E 169R 5E 069R5E 369R 5E 269R3E 569R 4E 469R2G 869R 2G 769R3G 079R 3G 969R3G 279R 4G 179R3G 479R 3H 379R

8F 679R 2F 579R5G 089R 3G 879R7C 289R 4G 189R6C 489R 8B 389R6G 689R 8C 589R1G 989R 6D 889R8C 299R 8C 199R6H 499R 8D 399R9D 699R 8C 599R

2C 209GS 1C 109GS2B 409GS 1B 309GS

6D 209T 8B 109T5C 139DZ 5C 039DZ6G 569DZ 3G 239DZ6C 189DZ 7B 089DZ

YBTS

YBTSnimFR

NI_YBDNATS

IP_CCV

IP_CCV

NI_YBDNATS

V5+

JDA-THGIRBFFO-NO-RETREVNI

JDA-THGIRBNI_YBDNATSYBDNATSFFO-NO-RETREVNI

nimFR

F_V42+

F_V42+

V42+

V004+

CFP_CCV

V5+

BSV5+

A_V42+

V004+

CFP_CCV

CFP_CCV

F_V21+

V004+

A_V42+

BSV5+

V42+

ni_caV

ni_caV

V21

A_V42+

V004+

F_V21+

089RK7.2

079R

K74

419CF2u2

139DZ

1V5C-97XZB

12

159CI

D9956L

12345678 9

01112131415161ssC

YALEDFC

nimFRYBTS

NESIENIL

POTS_CFPSIDDNGGVLccV.C.N

TUOGVHTOOBV

179R%1_ K7.2

179L

Hu5.3

109D

12VAB

339R7M4

599Q

C758CB

609D301VAB

539DHknistaeH

1 489C

V001/Fn01

1 2

469R

K001

+

649CV52 Fu074

+ 709CV054 Fu001

399R%1_K72

C98

01.

5nF

/500

V

069CVK1/Fp022

139LHu5.3

319R%1_2K8

719R

R033

389D012RS

089D

6001GU

109CI

1696GS

1 2 3 45678

INV

CO

MP

MO

TC

SZ

CD

GN

DO

UT

VC

C

709RK42

389CFu1.0

109QHknistaeH

21

199CIG3011TECT

12

43

909R%1_R026

189R%1_K21

12

089BF

daeB

1 2

109GS-14SG AM102

199R%1_K21

609RMHO 22

099CVK1 FP0051

559D00102PS

1

2

3

209GS-14SG AM102

959RK022

479RK2.1

599RK3.3

889R

K033

IRP

209T7953-RE

6

7

3

4

2

9

115

31239CFu1.0

039DZ

1V9C-97XZB

12

409D301VAB

409GS-14SG AM102

639C

Fn033

209NC

123456789

01112131

12345678901112131

109FV052/HA4T

13

24

+439C

V05 Fu7.4

489BFDAEB

12

109T

02-FE

3

2

1

4

5

8

01

7

9

309GS-14SG AM102

209DPF60L5HTTS

769RK8.1

109NCTEKCOS

1 2

649RK51

919R

R86

109R

%5 W2/1 7M2

309NC

12345678901112131

12345678901112131

889QC748CB

039RM2.2

819RW8/1 MHO M01

699RK01 ?

1 2

819CVK1 FP001

299R

%1_K81

869R6K5

809R

K33

849C

V05 N33

+ 349CV53 Fu0001

589R

K01

739CFu10.0

189LHu034

26

810 94

859R

%1_K42

379R%1_ K2.2

359CI134LT

089L

Hu5.3

129RMHO 001

279R%1_K74

12

509RK74

139QC758CB

1

23

559DHknistaeH

21

139RK001

339CFp072

119CFn033

239LHu5.3

+749CV52 Fu74

399QC748CB

089DZ

A061EK6P

719CVK1 FP001

549Q04-823CB

539CFu10.0

969RK1

409BF

R06

1 2

539D

TC0401FBS

1

2

3

689RR033

+

C98

647

uF 2

5V

149CV036 %5 Fu330.0

679RW4/1 K2.1

749RR022

069RR033

609CV052/Fp0001

309CFp074

+059C

V53/FU022

-+

109DB

G806JBK

21

34

049CV05 N33

189D

D01PGR

159D

12VAB

589BF867-W03052L-FB

12

019R

%1_K074

+ 189C

V05 Fu33

579R

7K4

259Q SL7904KS2

389BF867-W03052L-FB

1 2

119R

%1_K074

659DTC0401FBS

1

2

3

519CFn1

269RR033

659RK33

229R%5 W8/1 R072

159QV005/A5.9 SL7904KS2

259D

12VAB

t109RN

YSL55R101KCS

12

989R

8K1

219R

%1_K074

239CIG3011TECT

12

43

839CFu10.0

309D

12VAB

169RK001

109DBHknistaeH

21

289R

R74

249CFn3.3

759R3K3

259CIG3011TECT

12

43

619R

K74

569DZ

V42C-97XZB

1 2

489RK21

189BFDAEB

12

139CFn033

439R7M4

239DZ

1V5C-97XZB

12

389RR074

499R

K01 ?

1 2

369RK001

209LHm31

1

2

4

3

879R

R086

+939C

V05 Fu01

209CFp074

489D012RS

499QC748CB

419RK8.6

569RR033

409CFn022

289CI134LT

989CFu1.0

189DZ51C-97XZB

12

+

C98

522

00uF

10V

539R7M4

289BF867-W03052L-FB

12

799Q44ATBMP

109QN06MN12FTS

2

1

3

849RK51

319CFn033

549RK74

Fn022109C

699Q44ATBMP

109L

Hm31

1

2

4

3

109VR16541RVT

509C

V054/Fu1

509D301VAB

772YNT

139CI

1

6

27

4

8

5

VU/NE

S

M/PBS

D

S

S

519RW1_R21.0

029RMHO 01

A01 A01

18400_500_090301.eps090619

Power Board Inverter

Circuit Diagrams and PWB Layouts EN 39TPM3.1E LA 10.

2009-Jun-26

Power Board Adapter, 32PFL54xx LGD panel1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

01

01

11

11

A A

B B

C C

D D

E E

F F

G G

H H

!

1-8033G517 "23/"62LIPS without PFC

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

!

TOH

DLOCTOH

DLOC

DLOCTOH

DLOCTOH

DLOCTOH

TOHDLOC

1D 109C 1F 409NC 8G 209NC 1F 109NC 1B 109DB1E 609C 8B 509C 8B 409C 1D 309C 1D 209C6E 219C 6E 119C 2A 909C 1D 809C 2B 709C5B 719C 5D 619C 3G 519C 5F 419C 5F 319C4B 229C 4B 129C 6B 029C 5C 919C 7C 819C9B 729C 8B 629C 8A 529C 7A 429C 5G 329C8E 239C 8C 139C 9B 039C 8B 929C 9B 829C4G 739C 9E 639C 8F 539C 8E 439C 8E 339C2C 109D 9G 149C 9G 049C 9G 939C 7B 839C6D 609D 6E 509D 6E 409D 2C 309D 5G 209D8B 119D 8B 019D 7B 909D 7B 809D 6B 709D

1F 109F 1E 309BF 7E 209BF 1A 109BF 7E 219D5B 209CI 5F 109CI 7B 109QH 8B 119DH 1A 109BDH

7F 709CI 7F 609CI 8D 509CI 8D 409CI 8C 309CI9B 309L 1C 209L 1E 109L 3A 509J 1B 109J

5D 309Q 6G 209Q 7B 109Q 8E 509L 9B 409L1F 109VR 6G 819Q 8F 809Q 9E 709Q 6B 409Q

4G 309R 1D 109R 1C 509VR 2A 309VR 2B 209VR6G 019R 2B 709R 2B 609R 2B 509R 2A 409R6E 519R 5E 419R 5F 319R 6G 219R 6G 119R6B 129R 5B 029R 5G 919R 6F 819R 6F 719R7C 829R 7B 729R 7B 629R 6B 529R 7B 429R8A 539R 5D 239R 5D 139R 4C 039R 7C 929R8C 049R 9B 939R 8B 839R 8B 739R 9A 639R8C 549R 9D 449R 9C 349R 9C 249R 8C 149R

7F 059R 7F 949R 9E 849R 9E 749R 9E 649R9F 559R 8E 459R 8F 359R 8F 259R 7F 159R

1C 309GS 2E 209GS 1E 109GS 8F 769R 8F 659R5E 109DZ 7E 209T 8A 109T 1F 109HT 1C 409GS

9B 609DZ 6B 509DZ 6E 409DZ 6F 309DZ 5G 209DZ7A 119DZ 6F 019DZ 5D 909DZ 7F 809DZ 8C 709DZ

BSV5+

659R%1 K22

419RK21

3

209TLA9107HPP

2

1

4

5

7

8

01

9

W2/1 %5-+ MHOM3109R

209CI

1721PCN

1

2

3

4 5

6

7

8PIKS

BF

SC

VRDDNG

CCV

CN

VH

109NC

TEKCOS

1 2

549RMHO 001

839RMHO 001

209NCMM5.2 P31 34846

12345678901112131

029RK01

R90

4N

C

12

019RCN_W2 MHO K51

419CFu1.0

159RMHO 0

-+

109DB

G806JBK

2

1

3

4

139CV52/Fu220.0

049CFu1.0

+ 219CV05/Fu22

ZD

908

RLZ

5.6B

12

429CV005/FP0022

429RK1

309LHu8.0

409CV052/FP0022

R90

6N

C

12

719CV05 N01

459RR 0

519C

VK1 FP0051

709DZB31ZLR

12

119D00101PS

12

3

509D7001FU

Q90

2B

C85

7C

119CV005/FP0022

319RCN_2M2

769R%5 W8/1 K033

109GSAM102-14SG

409QC758CB

819CV05 N1

309QKA7092TBMM

1

23

209GSAM102-14SG

129RK22

149RW8/1 MHO K1

509CREPMUJ

0601PS219D

1

32

809D

301VAB

R90

7N

C

12

939CFu1.0

409LHu8.0

R91

547

R

+339C

V01 Fu0022

019DD03PGE

619CFu10.0

629RR01

109T

82-RE REWOP

1

6

2

3

5

9

1121

78

01

209VRCN

609CIG3011TECT

12

43

109BFDAEB

12

909D7001FU

ZD

905

RLZ

18B

12

949RMHO 001

029CFu1.0

809Q2007KR

ZD

901

BZ

X79

-C9V

1_N

C1

2

239RW8/1 K01

209CFP074

309VRCN

ZD

910

BZ

X79

-C9V

1

12

309BFDAEB

12

359R%1 K81

319CFp001

509LHu8.0

309CIG3011TECT

12

43

309DCN_7004N1

529RW8/1 %5-+ MHO 001

939R R74109J

CN

+

C90

9N

C

219RCN_W4/1 MHO K1

+ 629CV53 Fu0001

ZD

909

RLZ

20B

12

t

109HT510YGM65R231KCS

12

349RW8/1 K01

509CIG3011TECT

12

43

819QCN_44ATZP

709CIP/TA-A134AIK

919RK034

109CFP074

209BF

1 2

719RR0

119DH

1

849RK1

509Jeriw pmuJ

829CVK1 FP072

609DERIW PMUJ

709D

8414LL

539RMHO 001

309CrepmuJ

049RW8/1 MHO K7.4

C92

21u

F/2

5V

729RK22

609CV572/Fu22.0

739CCN_V05 N22

749RK033

+

039CV61 Fu022

309DZB51ZLR

12

409CIP/TA-A134AIK

309RW4/1 %5-+ MHOK01

809CV572/Fu22.0

409NC)CN(NNOC

12

259R%1 W8/1 K11

529CVK1 FP072

+ 929CV61 Fu0022

109QH

1

109VRYF4CFK16541RVT

239CV005/F0022

039RR7.4

639RMHO 001

739RMHO 001

109F

V052 A5 ESUF

34

12

819RK093

C91

910

0pF

139RK22

409DZA081EK6P

12

109CI

LT-NP472YNT

12

45678 VU/NE

M/PB

DSSSS

639CFu10.0

839CV001 FP022

709Q2007KR

ZD

902

BZ

X79

-C9V

1

12

+ 729CV53 Fu022

109QPFZ08KN8PTS

+

439CV01 Fu074

329CV05 N033

409DD01PGR

539CFu1.0

309GSAM102-14SG

509VR

209LA0.2 Hm6

1

4

2

3 929RW1 %5 86R0

+ 129CV05/Fu22

119RW8/1 %5-+ MHO 0

449RK16.2

109LA0.2 Hm41

1

4

2

3

119DZA002EK6P

12

409GSAM102-14SG

609DZA31EK6P

12

559RK1

109BDH

1

2

829RK1

149CFu1.0

+

C90

712

0uF

/450

V

249RK5.1

649RW8/1 MHO K2.2

059RK3.3

109DCN_7004N1

R90

5N

C

12

209D12VAB

S-ddV

+B

V42

V21

B/S

BSV5+

V21

B/SV42

ANEMID

B/S

A02 A02

18400_501_090301.eps090619

EN 40TPM3.1E LA 10.Circuit Diagrams and PWB Layouts

2009-Jun-26

Layout Power Board, 32PFL54xx AUO Panel Top SideBD901 C4 C901 D4 C902 E3 C903 E2 C904 E3 C905 C4 C906 B4 C907 D1 C917 B2 C918 C2 C934 C2 C939 C1 C941 C2 C943 A2 C946 A3 C947 A4 C950 A3 C960 D3 C980 B3 C981 B4 C984 A4 C985 A4 C986 A4 C990 D2 CN901 E4 CN902 A4 CN903 A1 D901 C1 D902 D2 D903 C2 D935 A4 D951 C2 D952 C1 D955 A2 D956 A3 D980 B3 D981 B4 D983 A2 D984 A3 F901 D4 FB904 D2 FB980 A4 FB981 D4 FB982 D3 FB983 C2 FB984 D4 FB985 D3 HBD901 C4 HD935 A3 HD955 A2 HQ901 D2 IC931 C4 IC932 B4 IC952 B1 IC953 B1 IC982 B4

IC991 B3 J941 C2 J942 C2 J943 C3 J944 B3 J945 C3 J946 C4 J947 D3 J951 B1 J952 B1 J953 C1 J954 C1 J955 C2 J961 D2 J981 A3 J982 A4 J983 A4 J985 A2 J986 A3 J987 A2 L901 D3 L902 E2 L931 A3 L932 A3 L971 A2 L980 A4 L981 C3 NR901 D4 Q901 D2 Q945 B3 Q951 C2 Q952 C1 R901 E3 R905 C3 R906 C4 R915 C2 R917 C3 R920 C4 R921 B2 R945 B3 R964 D1 R965 C2 R983 A4 RV901 D4 SG901 D4 SG902 D3 SG903 E3 SG904 E2 T901 B4 T902 B2 ZD930 C4 ZD931 C4 ZD932 B1 ZD965 B3 ZD980 B3 ZD981 B4

18400_503_090301.eps090619

Circuit Diagrams and PWB Layouts EN 41TPM3.1E LA 10.

2009-Jun-26

Layout Power Board, 32PFL54xx AUO Panel Bottom Side

C911 C3 C913 C3 C914 C3 C915 C3 C931 C4 C932 C2 C933 C2 C935 D1 C936 C1 C937 A4 C938 A4 C940 D1 C942 C2 C948 B1 C983 C4 C989 B4 D904 B2 D905 B3 D906 B4 IC901 C3 IC951 C1 Q931 C4 Q988 A4 Q993 B4 Q994 C2 Q995 D2 Q996 C3 Q997 C3 R907 C3 R908 C3 R909 C3 R910 C3 R911 C3 R912 C3 R913 C3 R914 D2 R916 D2 R918 C3 R919 C2 R922 B1 R930 C4 R931 C4

R933 C4 R934 D4 R935 D4 R946 B3 R947 D2 R948 A3 R956 D1 R957 C2 R958 C2 R959 C1 R960 C2 R961 C2 R962 C1 R963 C1 R967 C1 R968 B1 R969 B1 R970 B1 R971 B1 R972 B1 R973 B1 R974 A1 R975 C2 R976 A3 R978 B1 R980 A3 R981 B1 R982 B4 R984 B4 R985 B4 R986 B3 R988 C4 R989 C1 R991 B4 R992 B4 R993 B4 R994 A4 R995 B4 R996 A4

18400_504_090301.eps090619

EN 42TPM3.1E LA 10.Circuit Diagrams and PWB Layouts

2009-Jun-26

Power Board Inverter, 32PFL54xx LGD panel1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

0 1

0 1

1 1

1 1

A A

B B

C C

D D

E E

F F

G G

H H

D L O C

InverterD L O C T O H

!

!

!

!

!

!

D L O C T O H

T O H

8 A 3 0 8 N C 8 D 2 0 8 N C 5 C 2 0 8 C 4 B 1 0 8 C 5 C 4 0 8 C 4 B 3 0 8 C 7 B 6 0 8 C 8 B 5 0 8 C 7 D 8 0 8 C 7 B 7 0 8 C 8 D 0 1 8 C 7 D 9 0 8 C 2 B 2 1 8 C 2 B 1 1 8 C 2 C 4 1 8 C 2 B 3 1 8 C 2 C 6 1 8 C 2 C 5 1 8 C 6 E 1 2 8 C 4 D 9 1 8 C 2 C 3 2 8 C 5 E 2 2 8 C 9 D 5 2 8 C 5 F 4 2 8 C 8 B 7 2 8 C 8 B 6 2 8 C 8 B 1 0 8 D 7 D 8 2 8 C 9 D 3 0 8 D 8 D 2 0 8 D 3 B 1 0 8 C I 4 A 1 0 8 B F 5 D 4 0 8 C I 5 D 3 0 8 C I 5 F 6 0 8 C I 5 E 5 0 8 C I 5 B 2 0 8 Q 5 B 1 0 8 Q 5 E 7 0 8 Q 5 C 6 0 8 Q 5 B 1 0 8 R 5 F 8 0 8 Q 5 C 4 0 8 R 5 C 2 0 8 R 4 D 7 0 8 R 2 C 6 0 8 R 4 D 9 0 8 R 5 D 8 0 8 R 5 D 1 1 8 R 2 C 0 1 8 R 5 D 3 1 8 R 5 D 2 1 8 R 4 F 5 1 8 R 5 E 4 1 8 R 5 F 7 1 8 R 4 F 6 1 8 R 6 F 9 1 8 R 6 F 8 1 8 R 9 D 1 2 8 R 6 E 0 2 8 R 6 C 3 2 8 R 7 C 2 2 8 R 6 C 5 2 8 R 4 E 4 2 8 R 4 D 7 2 8 R 6 E 6 2 8 R 6 B 3 0 8 T 7 C 1 0 8 T

6 E 2 0 8 D Z 5 D 1 0 8 D Z

t r o h s V

B F I

d d V

F N

2 2 8 C V 0 5 N 0 0 1

6 0 8 C

V 0 5 2 N 1

3 0 8 C V 0 5 4 F U 1

3 0 8 N C N N O C

1 2

7 2 8 R M H O 0

9 1 8 R W 4 / 1 % 5 - + M H O K 0 9 3

8 0 8 Q 1 3 4 L T

2 0 8 R 7 R 4

5 1 8 C V 0 5 P 7 4

8 2 8 C V 0 5 P 0 2 2

8 0 8 C V 0 5 2 N 1

3 0 8 D 9 9 V A B

3

1

2

0 2 8 R % 1 W 8 / 1 K 0 9 3 1 2 8 C

V 0 5 N 0 0 1

4 1 8 R % 1 W 8 / 1 7 K 2

6 1 8 R K 7 4

9 1 8 C V 0 5 N 0 1

1 0 8 Q P F Z 0 5 K N 4 1 P T S

2

1

3

2 2 8 R % 1 W 8 / 1 K 0 1

2 0 8 C V 0 5 4 F N 0 7 4

9 0 8 C V K 6 / F p 5 1

6 0 8 C I 3 0 1 1 T E C T

1 2

4 3

6 0 8 Q G L C 8 4 8 C B

2 1 8 R % 5 W 6 / 1 R 0 7 4

8 0 8 R K 8 6

1 1 8 C V 0 5 N 5 1

3 2 8 C P 0 7 4

0 1 8 C V 0 5 P 0 7 4

1 0 8 C V 0 5 N 0 0 1

7 1 8 R % 1 W 8 / 1 7 K 2

2 0 8 Q P F Z 0 5 K N 4 1 P T S

2

1

3

5 2 8 R R 3 3

4 0 8 C V 5 2 2 U 2

5 0 8 C V 0 5 P 0 7 4

1 0 8 T

8 . 9 U U - F R T

1 4

2 3

7 0 8 Q 4 0 9 3 S B M P

1

3 2

4 0 8 C I 3 0 1 1 T E C T

1 2

4 3

3 1 8 R % 5 W 6 / 1 R 0 7 4

3 1 8 C 7 N 2

4 2 8 R % 5 W 6 / 1 K 0 1

2 0 8 D Z B 6 . 3 Z L R

1 2

1 2 8 R K 8 6

7 0 8 R % 1 W 8 / 1 K 0 0 1

3 2 8 R R 7 2

5 1 8 R % 1 W 8 / 1 7 K 2

5 0 8 C I 3 0 1 1 T E C T

1 2

4 3

7 2 8 C V 0 5 7 N 4

1 0 8 D 9 9 V A B

3

1 2

8 1 8 R % 1 W 8 / 1 4 K 5 1

6 2 8 R W 8 / 1 % 5 - + K 0 1

9 0 8 R W 8 / 1 % 5 - + M H O K 9 3

1 0 8 C I

1 7 0 2 A B U

1

2

3

4

5

6

7

8

9

2 1 3 1

4 1

5 1

6 1

7 1

9 1

0 2

8 1

0 1

1 1

1 2

2 2

4 2

3 2

B F I

B F I C

B F V

B F V C

P W S C

T C

F C

F E R I

M W P C

d M W P T L U A F , N

a M W P

N E

D D V

D N G P

C N

C N

L G

D N G S

M M O C

C N

H S

H G

S F

1 0 8 B F

Jum

p w

ire

4 1 8 C V 0 5 N 0 5 1

3 0 8 T 8 2 U U - F R T

6

5

7 4

1

8 3

2

7 0 8 C V K 6 / F p 5 1

4 0 8 R % 1 W 8 / 1 R 0 7 4

4 2 8 C V 5 2 F U 1

2 1 8 C V 0 5 N 0 5 1

1 1 8 R K 0 0 1

1 0 8 R 7 R 4

3 0 8 C I 3 0 1 1 T E C T

1 2

4 3

5 2 8 C 7 N 2

6 1 8 C V 0 5 P 8 6

1 0 8 D Z B 3 1 Z L R

1 2

6 2 8 C V 0 5 P 0 2 2

2 0 8 D 9 9 V A B

3

1 2

0 1 8 R

M H O 0

2 0 8 N C N N O C

1 2

K 3 3 6 0 8 R

V 2 1

V 2 1

A N E

M I D

S - d d V

+ B

A01 A01

18400_502_090301.eps090619

Circuit Diagrams and PWB Layouts EN 43TPM3.1E LA 10.

2009-Jun-26

Layout Power Board, 32PFL54xx LGD Panel Top Side

BD901 E2 C802 B2 C803 B3 C807 A1 C809 A1 C901 E3 C902 E3 C903 E3 C904 D3 C905 D4 C906 D4 C907 D1 C908 E3 C909 D1 C911 C3 C912 D3 C915 D3 C921 C2 C924 B3 C925 C4 C926 C4 C927 B4 C928 B4 C929 B4 C930 B4 C932 C4 C933 C4 C934 C4 CN802 B1 CN803 A1 CN901 E4 CN902 B4 CN904 D4 D901 D2 D902 D3 D903 D2 D904 D3 D905 C3 D906 C2 D909 B3 D910 C4 D911 B4 D912 C4 F901 D4 FB801 B2 FB901 E2 FB902 C4 FB903 D4 HBD901 E2 HD911 B4 HQ901 C3 IC803 A4 IC804 B3 IC805 A4

IC806 A4 IC901 C3 IC903 B3 IC904 B4 IC905 C4 IC906 C4 IC907 C4 J901 D2 J902 A3 J905 D1 J906 B4 J907 D3 J908 A3 J909 B4 J910 C4 J911 D4 J912 A3 J913 B3 J914 B3 J915 C4