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Published by SAR/SC 1363 Quality Printed in the Netherlands Subject to modification EN 3122 785 194202013-Mar-15
2013 © TP Vision Netherlands B.V.All rights reserved. Specifications are subject to change without notice. Trademarks are theproperty of Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjustearlier supplies accordingly.PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Philips Electronics N.V.
Colour Television Chassis
VES2.2ELA
Contents Page1. Revision List 22. Technical Specs, Diversity, and Connections 23. Precautions, Notes, and Abbreviation List 54. Mechanical Instructions 95. Service Modes, Error Codes, and Fault Finding 126. Alignments 157. Circuit Descriptions 168. IC Data Sheets 199. Block Diagrams
Wiring diagram 3000 series 32" 21Block diagram 3000 series 22
10. Circuit Diagrams and PWB Layouts Drawing PWBA 17ips19-5 26" to 40" LED Slim Integrated Power Supply 23 25-26B 17mb95s-2 SSB 27 36-37J 17LD141-2 IR/LED 38
11. Styling Sheets3000 series 32" 39
Revision ListEN 2 VES.2.2E LA1.
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1. Revision ListManual xxxx xxx xxxx.0• First release.
2. Technical Specs, Diversity, and Connections
Index of this chapter:2.1 Technical Specifications2.2 Directions for Use2.3 Connections2.4 Chassis Overview
Notes:• Figures can deviate due to the different set executions.• Specifications are indicative (subject to change).
2.1 Technical SpecificationsFor on-line product support please use the links in. Here is product information available, as well as getting started, user manuals, frequently asked questions and software & drivers.
Table 2-1 Described Model Numbers:
Note: The given Model Numbers are subject to change.
2.2 Directions for UseDirections for use can be downloaded from the following websites:http://www.philips.com/supporthttp://www.p4c.philips.com
Model Number Styling Published in
32PFL3008H/12 3000 3122 785 19420
32PFL3008K/12 3000 3122 785 19420
32PFL3008T/12 3000 3122 785 19420
32PFL3018H/12 3000 3122 785 19420
32PFL3018K/12 3000 3122 785 19420
32PFL3018T/12 3000 3122 785 19420
32PFL3028H/12 3000 3122 785 19420
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2.3 Connections
Figure 2-1 Connection overview (Thriller styling)
Note: The following connector colour abbreviations are used (acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.
2.3.1 Side Connections
1 - Common Interface68p- See figure 10-2-3 ��
2 - USB2.0
Figure 2-2 USB (type A)
1 - +5V �2 - Data (-) ��
3 - Data (+) ��
4 - Ground Gnd �
3 - Cinch: Video CVBS - In, Audio - InYe - Video CVBS 1 VPP / 75 ��
Rd - Audio R 0.5 VRMS / 10 k ��Wh - Audio L 0.5 VRMS / 10 k ��
4 - Head phone (Output)Bk - Head phone 80 - 600 / 10 mW ��
5 - EXT2: Video YPbPr - In, Audio - InGn - Video - Y 1 VPP / 75 W ��
Bu - Video - Pb 0.7 VPP / 75 W ��Rd - Video - Pr 0.7 VPP / 75 W ��
Wh - Audio - L 0.5 VRMS / 10 k ��Rd - Audio - R 0.5 VRMS / 10 k ��
2.3.2 Rear Connections
6 - TV ANTENNA - InSignal input from an antenna, cable or satellite.
7 - HDMI 2: Digital Video, Digital Audio - In
Figure 2-3 HDMI (type A) connector
1 - D2+ Data channel �
2 - Shield Gnd �
3 - D2- Data channel �4 - D1+ Data channel �
5 - Shield Gnd �
6 - D1- Data channel �7 - D0+ Data channel �
8 - Shield Gnd �
9 - D0- Data channel �10 - CLK+ Data channel �
11 - Shield Gnd �
12 - CLK- Data channel �13 - Easylink/CEC Control channel ��
14 - n.c. 15 - DDC_SCL DDC clock �16 - DDC_SDA DDC data ��
17 - Ground Gnd �
18 - +5V �19 - HPD Hot Plug Detect �
1
MODE o
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20 - Ground Gnd �
8 - HDMI 1: Digital Video, Digital Audio - In
Figure 2-4 HDMI (type A) connector
1 - D2+ Data channel �
2 - Shield Gnd �3 - D2- Data channel �
4 - D1+ Data channel �
5 - Shield Gnd �6 - D1- Data channel �
7 - D0+ Data channel �
8 - Shield Gnd �9 - D0- Data channel �
10 - CLK+ Data channel �
11 - Shield Gnd �12 - CLK- Data channel �
13 - Easylink/CEC Control channel ��
14 - ARC Audio Return Channel �15 - DDC_SCL DDC clock �
16 - DDC_SDA DDC data ��
17 - Ground Gnd �18 - +5V �
19 - HPD Hot Plug Detect �
20 - Ground Gnd �
9 - PC IN:VGA
Figure 2-5 VGA connector
1 - Video Red 0.7 VPP / 75 W �
2 - Video Green 0.7 VPP / 75 W �3 - Video Blue 0.7 VPP / 75 W �
4 - n.c. 5 - Ground Gnd �6 - Ground Red Gnd �
7 - Ground Green Gnd �
8 - Ground Blue Gnd �
9 - +5VDC +5 V �
10 - Ground Sync Gnd �11 - Ground Red Gnd �
12 - DDC_SDA DDC data �
13 - H-sync 0 - 5 V �14 - V-sync 0 - 5 V �
15 - DDC_SCL DDC clock �
10 - Cinch: S/PDIF - OutBk - Coaxial 0.4 - 0.6VPP / 75 ohm ��
11 - EXT1: Video RGB/YC - In, CVBS - In/Out, Audio - In/Out
Figure 2-6 SCART connector
1 - Audio R 0.5 VRMS / 1 k �2 - Audio R 0.5 VRMS / 10 k �
3 - Audio L 0.5 VRMS / 1 k �
4 - Ground Audio Gnd �5 - Ground Blue Gnd �
6 - Audio L 0.5 VRMS / 10 k �
7 - Video Blue/C-out 0.7 VPP / 75 ��8 - Function Select 0 - 2 V: INT
4.5 - 7 V: EXT 16:99.5 - 12 V: EXT 4:3 �
9 - Ground Green Gnd �
10 - n.c. 11 - Video Green 0.7 VPP / 75 �12 - n.c. 13 - Ground Red Gnd �
14 - Ground P50 Gnd �15 - Video Red/C 0.7 VPP / 75 �
16 - Status/FBL 0 - 0.4 V: INT1 - 3 V: EXT / 75 �
17 - Ground Video Gnd �
18 - Ground FBL Gnd �
19 - Video CVBS 1 VPP / 75 �20 - Video CVBS/Y 1 VPP / 75 �
21 - Shield Gnd �
2.4 Chassis OverviewRefer to 9. Block Diagrams for PWB/CBA locations.
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3. Precautions, Notes, and Abbreviation ListIndex of this chapter:3.1 Safety Instructions3.2 Warnings3.3 Notes3.4 Abbreviation List
3.1 Safety InstructionsSafety regulations require the following during a repair:• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).• Replace safety components, indicated by the symbol �,
only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.
Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points: • Route the wire trees correctly and fix them with the
mounted cable clamps.• Check the insulation of the Mains/AC Power lead for
external damage. • Check the strain relief of the Mains/AC Power cord for
proper function.• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply): 1. Unplug the Mains/AC Power cord and connect a wire
between the two pins of the Mains/AC Power plug. 2. Set the Mains/AC Power switch to the “on” position
(keep the Mains/AC Power cord unplugged!). 3. Measure the resistance value between the pins of the
Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M.
4. Switch “off” the set, and remove the wire between the two pins of the Mains/AC Power plug.
• Check the cabinet for defects, to prevent touching of any inner parts by the customer.
3.2 Warnings• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD ). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.
• Be careful during measurements in the high voltage section.
• Never replace modules or other components while the unit is switched “on”.
• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.
3.3 Notes
3.3.1 General
• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (�), or hot ground (), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).
• Where necessary, measure the waveforms and voltages with (�) and without (�) aerial signal. Measure the voltages in the power supply section both in normal operation ( ) and in stand-by (�). These values are indicated by means of the appropriate symbols.
3.3.2 Schematic Notes
• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k).
• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).
• All capacitor values are given in micro-farads ( 10-6), nano-farads (n 10-9), or pico-farads (p 10-12).
• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).
• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.
• The correct component values are listed on the Philips Spare Parts Web Portal.
3.3.3 Spare Parts
For the latest spare part overview, consult your Philips Spare Part web portal.
3.3.4 BGA (Ball Grid Array) ICs
IntroductionFor more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com. Select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.
BGA Temperature ProfilesFor BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.
3.3.5 Lead-free Soldering
Due to lead-free technology some rules have to be respected by the workshop during a repair:• Use only lead-free soldering tin. If lead-free solder paste is
required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.
• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:– To reach a solder-tip temperature of at least 400°C.– To stabilize the adjusted temperature at the solder-tip.– To exchange solder-tips for different applications.
• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.
• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.
3.3.6 Alternative BOM identification
It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.
The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then
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result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number.By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.
Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2010 week 10 / 2010 week 17). The 6 last digits contain the serial number.
Figure 3-1 Serial number (example)
3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)
If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!
3.3.8 Practical Service Precautions
• It makes sense to avoid exposure to electrical shock. While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.
• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.
3.4 Abbreviation List0/6/12 SCART switch control signal on A/V
board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3 format
AARA Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio
ACI Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page
ADC Analogue to Digital ConverterAFC Automatic Frequency Control: control
signal used to tune to the correct frequency
AGC Automatic Gain Control: algorithm that controls the video input of the feature box
AM Amplitude ModulationAP Asia PacificAR Aspect Ratio: 4 by 3 or 16 by 9ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black bars without discarding video information
ATSC Advanced Television Systems Committee, the digital TV standard in the USA
ATV See Auto TVAuto TV A hardware and software control
system that measures picture content, and adapts image parameters in a dynamic way
AV External Audio VideoAVC Audio Video ControllerAVIP Audio Video Input ProcessorB/G Monochrome TV system. Sound
carrier distance is 5.5 MHzBDS Business Display Solutions (iTV)BLR Board-Level RepairBTSC Broadcast Television Standard
Committee. Multiplex FM stereo sound system, originating from the USA and used e.g. in LATAM and AP-NTSC countries
B-TXT Blue TeleteXTC Centre channel (audio)CEC Consumer Electronics Control bus:
remote control bus on HDMI connections
CL Constant Level: audio output to connect with an external amplifier
CLR Component Level RepairComPair Computer aided rePairCP Connected Planet / Copy ProtectionCSM Customer Service ModeCTI Color Transient Improvement:
manipulates steepness of chroma transients
CVBS Composite Video Blanking and Synchronization
DAC Digital to Analogue ConverterDBE Dynamic Bass Enhancement: extra
low frequency amplificationDCM Data Communication Module. Also
referred to as System Card or Smartcard (for iTV).
DDC See “E-DDC”D/K Monochrome TV system. Sound
carrier distance is 6.5 MHzDFI Dynamic Frame InsertionDFU Directions For Use: owner's manualDMR Digital Media Reader: card readerDMSD Digital Multi Standard DecodingDNM Digital Natural Motion
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DNR Digital Noise Reduction: noise reduction feature of the set
DRAM Dynamic RAMDRM Digital Rights ManagementDSP Digital Signal ProcessingDST Dealer Service Tool: special remote
control designed for service technicians
DTCP Digital Transmission Content Protection; A protocol for protecting digital audio/video content that is traversing a high speed serial bus, such as IEEE-1394
DVB-C Digital Video Broadcast - CableDVB-T Digital Video Broadcast - TerrestrialDVD Digital Versatile DiscDVI(-d) Digital Visual Interface (d= digital only)E-DDC Enhanced Display Data Channel
(VESA standard for communication channel and display). Using E-DDC, the video source can read the EDID information form the display.
EDID Extended Display Identification Data (VESA standard)
EEPROM Electrically Erasable and Programmable Read Only Memory
EMI Electro Magnetic InterferenceEPG Electronic Program GuideEPLD Erasable Programmable Logic DeviceEU EuropeEXT EXTernal (source), entering the set by
SCART or by cinches (jacks)FDS Full Dual Screen (same as FDW)FDW Full Dual Window (same as FDS)FLASH FLASH memoryFM Field Memory or Frequency
ModulationFPGA Field-Programmable Gate ArrayFTV Flat TeleVisionGb/s Giga bits per secondG-TXT Green TeleteXTH H_sync to the module HD High DefinitionHDD Hard Disk DriveHDCP High-bandwidth Digital Content
Protection: A “key” encoded into the HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a “snow vision” mode or changed to a low resolution. For normal content distribution the source and the display device must be enabled for HDCP “software key” decoding.
HDMI High Definition Multimedia InterfaceHP HeadPhoneI Monochrome TV system. Sound
carrier distance is 6.0 MHzI2C Inter IC busI2D Inter IC Data busI2S Inter IC Sound busIF Intermediate FrequencyIR Infra RedIRQ Interrupt RequestITU-656 The ITU Radio communication Sector
(ITU-R) is a standards body subcommittee of the International Telecommunication Union relating to radio communication. ITU-656 (a.k.a. SDI), is a digitized video format used for broadcast grade video. Uncompressed digital component or digital composite signals can be used.
The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.
iTV Institutional TeleVision; TV sets for hotels, hospitals etc.
LS Last Status; The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's preferences
LATAM Latin AmericaLCD Liquid Crystal DisplayLED Light Emitting DiodeL/L' Monochrome TV system. Sound
carrier distance is 6.5 MHz. L' is Band I, L is all bands except for Band I
LPL LG.Philips LCD (supplier)LS LoudspeakerLVDS Low Voltage Differential SignallingMbps Mega bits per secondM/N Monochrome TV system. Sound
carrier distance is 4.5 MHzMHEG Part of a set of international standards
related to the presentation of multimedia information, standardised by the Multimedia and Hypermedia Experts Group. It is commonly used as a language to describe interactive television services
MIPS Microprocessor without Interlocked Pipeline-Stages; A RISC-based microprocessor
MOP Matrix Output ProcessorMOSFET Metal Oxide Silicon Field Effect
Transistor, switching deviceMPEG Motion Pictures Experts GroupMPIF Multi Platform InterFaceMUTE MUTE LineMTV Mainstream TV: TV-mode with
Consumer TV features enabled (iTV)NC Not ConnectedNICAM Near Instantaneous Compounded
Audio Multiplexing. This is a digital sound system, mainly used in Europe.
NTC Negative Temperature Coefficient, non-linear resistor
NTSC National Television Standard Committee. Color system mainly used in North America and Japan. Color carrier NTSC M/N= 3.579545 MHz, NTSC 4.43= 4.433619 MHz (this is a VCR norm, it is not transmitted off-air)
NVM Non-Volatile Memory: IC containing TV related data such as alignments
O/C Open CircuitOSD On Screen DisplayOAD Over the Air Download. Method of
software upgrade via RF transmission. Upgrade software is broadcasted in TS with TV channels.
OTC On screen display Teletext and Control; also called Artistic (SAA5800)
P50 Project 50: communication protocol between TV and peripherals
PAL Phase Alternating Line. Color system mainly used in West Europe (colour carrier = 4.433619 MHz) and South America (colour carrier PAL M = 3.575612 MHz and PAL N = 3.582056 MHz)
PCB Printed Circuit Board (same as “PWB”)PCM Pulse Code Modulation
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PDP Plasma Display PanelPFC Power Factor Corrector (or
Pre-conditioner)PIP Picture In PicturePLL Phase Locked Loop. Used for e.g.
FST tuning systems. The customer can give directly the desired frequency
POD Point Of Deployment: a removable CAM module, implementing the CA system for a host (e.g. a TV-set)
POR Power On Reset, signal to reset the uPPSDL Power Supply for Direct view LED
backlight with 2D-dimmingPSL Power Supply with integrated LED
driversPSLS Power Supply with integrated LED
drivers with added Scanning functionality
PTC Positive Temperature Coefficient, non-linear resistor
PWB Printed Wiring Board (same as “PCB”)PWM Pulse Width ModulationQRC Quasi Resonant ConverterQTNR Quality Temporal Noise ReductionQVCP Quality Video Composition ProcessorRAM Random Access MemoryRGB Red, Green, and Blue. The primary
color signals for TV. By mixing levels of R, G, and B, all colors (Y/C) are reproduced.
RC Remote ControlRC5 / RC6 Signal protocol from the remote
control receiver RESET RESET signalROM Read Only MemoryRSDS Reduced Swing Differential Signalling
data interfaceR-TXT Red TeleteXTSAM Service Alignment ModeS/C Short CircuitSCART Syndicat des Constructeurs
d'Appareils Radiorécepteurs et Téléviseurs
SCL Serial Clock I2CSCL-F CLock Signal on Fast I2C busSD Standard DefinitionSDA Serial Data I2CSDA-F DAta Signal on Fast I2C busSDI Serial Digital Interface, see “ITU-656”SDRAM Synchronous DRAMSECAM SEequence Couleur Avec Mémoire.
Colour system mainly used in France and East Europe. Colour carriers = 4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate FrequencySMPS Switched Mode Power SupplySoC System on ChipSOG Sync On GreenSOPS Self Oscillating Power SupplySPI Serial Peripheral Interface bus; a
4-wire synchronous serial data link standard
S/PDIF Sony Philips Digital InterFaceSRAM Static RAMSRP Service Reference ProtocolSSB Small Signal BoardSSC Spread Spectrum Clocking, used to
reduce the effects of EMISTB Set Top BoxSTBY STand-BYSVGA 800 × 600 (4:3)SVHS Super Video Home SystemSW Software
SWAN Spatial temporal Weighted Averaging Noise reduction
SXGA 1280 × 1024TFT Thin Film TransistorTHD Total Harmonic DistortionTMDS Transmission Minimized Differential
SignallingTS Transport StreamTXT TeleteXTTXT-DW Dual Window with TeleteXTUI User InterfaceuP MicroprocessorUXGA 1600 × 1200 (4:3)V V-sync to the module VESA Video Electronics Standards
AssociationVGA 640 × 480 (4:3)VL Variable Level out: processed audio
output toward external amplifierVSB Vestigial Side Band; modulation
methodWYSIWYR What You See Is What You Record:
record selection that follows main picture and sound
WXGA 1280 × 768 (15:9)XTAL Quartz crystalXGA 1024 × 768 (4:3)Y Luminance signalY/C Luminance (Y) and Chrominance (C)
signalYPbPr Component video. Luminance and
scaled color difference signals (B-Y and R-Y)
YUV Component video
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4. Mechanical InstructionsIndex of this chapter:4.1 Cable Dressing4.2 Service Positions4.3 Assembly/Panel Removal4.4 Set Re-assembly
Notes:• Figures below can deviate slightly from the actual situation,
due to the different set executions.
4.1 Cable Dressing
Figure 4-1 Cable dressing (32" 3000 series)
4.2 Service PositionsFor easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.
4.3 Assembly/Panel Removal Instructions below apply to the 32PFL3606H/12, but will be similar for other models.
4.3.1 Rear Cover
Refer to Figure 4-2 for details.Warning: Disconnect the mains power cord before removing the rear cover.1. Remove the screw [1] that secures the power cable. 2. Remove the screws [2] that fixate the stand and remove
the stand.3. Unscrew all the remaining screws [3] and [4]. 4. At the indicated areas [5] the cover is secured by clips. Be
careful with releasing those.5. Lift the rear cover from the TV. Make sure that wires are not
damaged while lifting the rear cover from the set. Be very careful while lifting the cover as there are cables connected
to the SSB and PSU boards. Those need to be released before taking the cover off completely.
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Figure 4-2 Rear cover removal
4.3.2 Speakers
1. Release the tapes which fixate the cabling.2. Remove the screws of the speakers.3. Take the speakers out.When defective, replace the both units.
4.3.3 Power Supply Unit (PSU)
Caution: it is mandatory to remount all different screws at their original position during re-assembly. Failure to do so may result in damaging the PSU.1. Release the Power board cables from their clamps.2. Unplug power connectors from the SSB, as it is not
unplug-able at the PSU itself (soldered connector).3. Unplug all other connectors from the PSU.4. Remove all fixation screws from the PSU.5. The PSU can be taken out of the set now.
4.3.4 Small Signal Board (SSB)
Caution: it is mandatory to remount all different screws at their original position during re-assembly. Failure to do so may result in damaging the SSB.1. Release the clips from both the LVDS Flat Foil connectors
that connect with the SSB.Caution: be careful, as these are very fragile connectors! Take the flat foils out of their connectors.
2. Release the clamps and unplug all other connectors.3. Remove the fixation screw from the clamp near the bottom
of the SSB, and take the clamp out.4. Release the tape near the bottom side of the set from the
LCD panel.5. Remove all other fixation screws from the SSB.
6. Take out the SSB together with its shielding.7. Remove the screw near the L/R audio connectors.8. The SSB can now be shifted from the side connector cover,
then lifted and taken out of the shielding.
4.3.5 IR/LED Board
1. Remove the speakers as described earlier.2. Remove the stand as described earlier.3. Release the clamps that hold the boards cable.4. Remove the fixation screws that secure the LCD panel with
the bezel. 5. Lift the LCD Panel from the bezel.6. Gently release the clips that hold the board and take it out
from the bezel.7. Unplug both the connectors from the IR/LED board.When defective, replace the whole unit.
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4.3.6 LCD Panel
1. Remove the SSB as described earlier.2. Remove the PSU as described earlier.3. Remove the stand as described earlier.4. Release the IR/LED board cable from its clamps and
unplug the IR/LED board cable.5. Remove the fixation screws, that secure the LCD panel
with the bezel. 6. Lift the LCD Panel from the bezel.7. Remove the fixation screws that secure the panel with the
metal subframe.8. Release the clips from both the LVDS Flat Foil connectors
that connect with the LCD panel.Caution: be careful, as these are very fragile connectors! Take the flat foils out of their connectors.
When defective, replace the whole unit.
4.4 Set Re-assemblyTo re-assemble the whole set, execute all processes in reverse order.
Notes:• While re-assembling, make sure that all cables are placed
and connected in their original position. See Figure 4-1.• Pay special attention not to damage the EMC foams on the
SSB shields. Ensure that EMC foams are mounted correctly.
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5. Service Modes, Error Codes, and Fault FindingIndex of this chapter:5.1 Test Points5.2 Service Modes5.3 Software Upgrading5.4 Error Codes5.5 Fault Finding and Repair Tips
5.1 Test PointsAs most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns. In this way it is possible to determine which part is defective. Perform measurements under the following conditions:• Service Default Mode.• Video: Colour bar signal.• Audio: 3 kHz left, 1 kHz right.
5.2 Service ModesThe Service Mode feature is split into two parts:• Service Alignment Mode (SAM).• Customer Service Mode (CSM).
SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are:• Display information (“Service Menu” (SAM) indication in
upper right corner of screen, error buffer, software version, operating hours, options and option codes, sub menus).
The CSM is a Service Mode that can be enabled by the consumer. The CSM displays diagnosis information, which the customer can forward to the dealer or call centre. In CSM mode, “CSM”, is displayed in the top right corner of the screen. The information provided in CSM and the purpose of CSM is to:• Increase the home repair hit rate.• Decrease the number of nuisance calls.• Solved customers’ problem without home visit.
Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).
5.2.1 General
Next items are applicable to all Service Modes or are general.
Life TimerDuring the life time cycle of the TV set, a timer is kept (called “TV Life Time”). It counts the normal operation hours (not the Stand-by hours). The actual value of the timer is displayed in SDM and SAM in a decimal value. Every two soft-resets increase the hour by + 1. Stand-by hours are not counted.
Software Identification, Version, and ClusterThe software ID, version, and cluster will be shown in the main menu display of SAM, and CSM. The screen will show: “AAAAAB-XX.YY”, where:• AAAAA is the chassis name: VES11E_2.1.4n.• B is the region indication: E = Europe, A = AP/China, U =
NAFTA, L = LATAM.• XX is the main version number: this is updated with a major
change of specification (incompatible with the previous software version). Numbering will go from 01 - 99 and AA - ZZ.- If the main version number changes, the new version number is written in the NVM.- If the main version number changes, the default settings are loaded.
• YY is the sub version number: this is updated with a minor change (backwards compatible with the previous
versions). Numbering will go from 00 - 99.- If the sub version number changes, the new version number is written in the NVM.- If the NVM is fresh, the software identification, version, and cluster will be written to NVM.
5.2.2 Service Alignment Mode (SAM)
Purpose• To modify the NVM.• Change and test video settings.• View options.• TV life time• SW number• Factory reset• Diagnose features
Specifications• Operation hours counter (maximum five digits displayed).• Software version, error codes, and option settings display.• Option settings.• Software alignments (White Tone).• NVM Editor.
How to Activate SAMTo activate SAM, use one of the following methods:• Press menu button firstly. While main menu is on screen
press 4725 consecutively. Do not allow the display to time out between entries while keying the sequence.
After entering SAM, the following items are displayed, with “SAM” in the upper right corner of the screen to indicate that the television is in Service Alignment Mode.
Figure 5-1 Example of SAM
How to Navigate• In the SAM menu, select menu items with the UP/DOWN
keys on the remote control transmitter. The selected item will be indicated. When not all menu items fit on the screen, use the UP/DOWN keys to display the next/previous menu items.
• With the “LEFT/RIGHT” keys, it is possible to:– Test certain values and turn them off.– Change the value of the selected menu item.
How to Store SAM SettingsAll the changes which have been made are stored automatically. It is suffice to enter the new value and just exit.
How to Exit SAMUse one the following method:• Switch the set to STANDBY by pressing the mains button
on the remote control transmitter or the television set.Note: When the TV is switched “off” by a power interrupt while in SAM, the TV will show up in “normal operation mode” as
19420_202_130313.eps130313
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soon as the power is supplied again. The error buffer will not be cleared.
5.2.3 Customer Service Mode (CSM)
PurposeThe Customer Service Mode shows error codes and information on the TVs operation settings.The call centre can instruct the customer (by telephone) to enter CSM in order to identify the status of the set.This helps the call centre to diagnose problems and failures in the TV set before making a service call.The CSM is a read-only mode; therefore, modifications are not possible in this mode.
Specifications• Ignore “Service unfriendly modes”.• Line number for every
line (to make CSM language independent).• Set the screen mode to full
screen (all contents on screen is visible).• After leaving the Customer Service Mode, the original
settings are restored.• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.
Figure 5-2 CSM Menu
How to Activate CSMPress the Menu button followed by “123654” buttons consecutively. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!
Contents of CSM
• USB Logging• Video Settings• Audio Settings• Options 1• Options 2• Options 3• Tuning Settings• Source Settings• Diagnostic• USB Operations
How to NavigateBy means of the “CURSOR-DOWN/UP” knob (or the scroll wheel) on the RC-transmitter, can be navigated through the menus.
5.3 Software Upgrading
5.3.1 Description
It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set. A description on how to upgrade the main software can be found in the DFU or on the Philips website.
5.3.2 Introduction
Philips continuously tries to improve its products, and it’s recommend that the TV software is updated when updates are available. Software update files can be obtained from the dealer or can be downloaded from the following websites:http://www.philips.com/support
Preparing a portable memory for software upgradeThe following requirements have to be met:1. A personal computer connected to the Internet.2. An archive utility that supports the ZIP-format (e.g. Win Zip
for Windows or Stufflt for Mac OS).3. A USB flash drive (preferably empty).
Note:1. Only FAT/DOS-formatted flash drives are supported.2. Only use software update files that can be found on the
http://www.philips.com/support web site.
5.3.3 Check the current TV software version
Before starting the software upgrade procedure, it is advised to check that what the current TV software:1. Press the Menu button followed by “1 2 3 6 5 4” buttons
consecutively on the remote control.2. Use the up/down cursor keys to find the software version.If the current software version of the TV is the same as the latest update file found on http://www.philips.com/support, it is not necessary to update the TV software.
5.3.4 Download the latest software
1. Point the web browser to http://www.philips.com/support.2. Find information and software related to the TV.3. Select the latest software update file and download it to the
PC.4. Insert a USB flash drive into one of the USB ports of the
PC.5. Decompress the downloaded ZIP file and copy the
“autorun.upg” to the root directory of the USB flash drive.
5.3.5 Update the TV software
1. Unplug the mains power cord from your TV.2. Insert the USB flash drive that contains the software
update files.3. Press and hold the OK button.
Note: If the USB flash drive is not detected after power up, disconnect it and re-insert it.
4. Plug the mains power cord back in while holding the OK button.
5. The led light will start to flash and blink.6. The first time installation menu will appear.7. Restart your TV. Your TV has now been updated.
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Note:• Do not remove the USB flash drive during the software
update.• If a power failure occurs during the update, do not remove
the USB flash drive from the TV. The TV will continue the software update as soon as the power comes up again.
• If an error occurs during the update retry the procedure or contact the dealer.
• We do not recommend downgrading to an older version.• Once the upgrade is finished, use the PC to remove the TV
software from the USB portable memory.
5.3.6 How to Copy NVM Data to/from USB
Copy to USBThere are two steps and both are independent of each other. Copy the updated welcome image to USB as “hotel_wel.png”
Copy from USBThere are two steps and both are independent of each other. If there is file named “hotel_wel.png” in directory “welcome_image”. It is copied to TV to use as welcome image. Copy from USB device data to NVRAM. Just the reverse operation done by copy to USB call. Previously copied NVRAM files (Flashx.bin) are copied into TV. If there is no flash file or some of them are available on USB, the available ones are copied. If no USB is connected, nothing happens.Note: For Clone function USB stick (Copy to USB - Copy from USB) must be formatted to FAT32. If USB is not formatted to FAT32 the other TVs will not accept cloned data and performance issues will result
5.4 Error CodesThis chassis does not contain error codes.
5.5 Fault Finding and Repair TipsNote:• It is assumed that the components are mounted correctly
with correct values and no bad solder joints.• Before any fault finding actions, check if the correct options
are set.
5.5.1 NVM Editor
In some cases, it can be convenient if one directly can change the NVM contents. This can be done with the “NVM Editor” in SAM mode. With this option, single bytes can be changed.
Caution:• Do not change these, without understanding the function of
each setting, because incorrect NVM settings may seriously hamper the correct functioning of the TV set!
• Always write down the existing NVM settings, before changing the settings. This will enable you to return to the original settings, if the new settings turn out to be incorrect.
5.5.2 Load Default NVM Values
It is possible to upload the default values to the NVM with ComPair in case the SW is changed, the NVM is replaced with a new (empty) one, or when the NVM content is corrupted. After replacing an EEPROM (or with a defective/no EEPROM), default settings should be used to enable the set to start-up and allow the Service Default Mode and Service Alignment Mode to be accessed.
5.5.3 No Backlight Problem.
Backlight pin, dimming pin, backlight supply, stby on/off pin BACKLIGHT_ON/OFF pin should be high when the backlight is ON. R119 must be low when the backlight is OFF. If it is a problem, please check Q10 and the panel cables. Also it can
be tested in TP50 in main board. See figure 10-2-1 B01, HDMI/GPIO protection.
5.5.4 No Picture via HDMI input
Check if HDCP key is valid. This can be done in CSM.
5.5.5 TV Will Not Start-up from Stand-by
Possible Stand-by Controller failure. Re flash the SW.
5.5.6 CI Module Problem
Supply, supply control pin, detect pins, mechanical positions of pins.CI supply should be 5V when CI module inserted. If it is not 5V please check CI_PWR_CTRL, this pin should be low. See figure 10-2-7 B07, Audio, Headphone.
5.5.7 CSM
When CSM is activated and there is a USB memory stick connected to the TV, the software will dump the complete CSM content to the USB memory stick. The file (Csm.txt) will be saved in the root of the USB memory stick.
5.5.8 Loudspeakers
Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!
5.5.9 Display Option Code
Attention: In case the SSB is replaced, always check the Panel Code in CSM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.
5.5.10 Staying in Stand-by Mode
This problem indicates a short on VCC voltages. Protect pin should be logic high while normal operation. When there is a short circuit protect pin will be logic low. If you detect logic low on protect pin, unplug the TV set and control voltage points with a multi-meter to find the shorted voltage to ground.
5.5.11 IR Problem
Check LED card supply on MB95 chassis.
5.5.12 No Signal Problem
Check tuner supply voltage; 5V_VCC, 3V3_TUNER and 1V8_TUNER. Check tuner options are correctly set in Service menu. Check AGC voltage at IF_AGC pin of tuner.
Alignments EN 15VES.2.2E LA 6.
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6. AlignmentsIndex of this chapter:6.1 General Alignment Conditions6.2 Hardware Alignments6.3 Software Alignments6.4 Reset of Repaired SSB
6.1 General Alignment ConditionsPerform all electrical adjustments under the following conditions:• Power supply voltage: 90 - 264 VAC, 50/ 60 3 Hz.• Connect the set to the mains via an isolation transformer
with low internal resistance.• Allow the set to warm up for approximately 15 minutes.• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.
• Test probe: Ri > 10 M, Ci < 20 pF.
6.2 Hardware AlignmentsNot applicable.
6.3 Software AlignmentsPut the set in SAM mode (see Chapter 5. Service Modes, Error Codes, and Fault Finding). The SAM menu will now appear on the screen. Select RGB Align and go to one of the sub menus. The alignments are explained below.The following items can be aligned:• White point To store the data:• Press OK on the RC before the cursor is moved to the
left.• Select “Store” and press OK on the RC.• Switch the set to stand-by mode. For the next alignments, supply the following test signals via a video generator to the RF input:• EU/AP-PAL models: a PAL B/G TV-signal with a signal
strength of at least 1 mV and a frequency of 475.25 MHz• US/AP-NTSC models: an NTSC M/N TV-signal with a
signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).
6.4 Reset of Repaired SSBA very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB.A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”.Also the virgin bit is to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Dealer options” items in SAM (do not forget to “store”).
After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code of the TV has to be set according to the type plate of the set. For this, you can use the NVM editor in SAM. The loading of the CTN and production code can also be done via ComPair (Model number programming).
In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.
Circuit DescriptionsEN 16 VES.2.2E LA7.
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7. Circuit DescriptionsIndex of this chapter:7.1 Introduction7.2 Power Supply7.3 Power Management7.4 Circuit Description
Notes: • Only new circuits (circuits that are not published recently)
are described. • Figures can deviate slightly from the actual situation, due
to different set executions.• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter 9. Block Diagrams) and circuit diagrams (see chapter 10. Circuit Diagrams and PWB Layouts).Where necessary, you will find a separate drawing for clarification.
7.1 IntroductionVES2.2E LA main board is driven by MStar SOC. This IC is a single chip IDTV solution that supports channel decoding, MPEG decoding, and media-centre functionality enabled by a high performance AV CODEC and CPU.• Combo Front-End Demodulator• A multi-standard A/V format decoder• The MACEpro video processor• Home theatre sound processor• Internet and Variety of Connectivity Support• Dual-stream decoder for 3D contents• Multi-purpose CPU for OS and multimedia• Peripheral and power management
7.1.1 VES2.2E LA Architecture Overview
For details about the chassis block diagrams refer to chapter 9. Block Diagrams.
Circuit Descriptions EN 17VES.2.2E LA 7.
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7.1.2 SSB Cell Layout
Figure 7-1 SSB layout cells (top view)
19420_204_130315.eps130315
Tuner
HDMI
DDR
Main IC
NAND Flash
CI Socket
LVDS Sockets
DC-DC
Serial Flash
USB
Tuner Supplies
VGA Supplies
Audio Amp
Side Sockets
Circuit DescriptionsEN 18 VES.2.2E LA7.
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7.2 Power Supply
7.2.1 Power Supply Unit
Before checking other parts first check whether fuse on the PSU is not broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market.Consult the Philips Service web portal for the order codes of the boards.
The output voltages to the chassis are:• +5V / +3V3 / 12 V- STANDBY• +5 V / +12V (on-mode)• +24V for audio circuit, (on-mode)
7.2.2 USB Interface
The SOC has two input port for USB, therefore air mouse, internal wi-fi interface and USB2 are combined with HUB. This property is optional. If air mouse and wi-fi interfaces are not aligned, two USB are connected directly to main IC.
7.3 Power ManagementThe on-board DC/DC converters receive the following voltages from the PSU (depending on set execution):• +3.3 VSB, for standby mode. • +5 VSB, for standby mode. • +12 VSB, for standby mode. • +3.3 V, for on mode. • +5 V, for on mode. • +24 V, for on mode, audio power.
7.4 Circuit Description
7.4.1 System power
The main board power is received at connector CN2 from power board, to receive the power and signals from the PSU. See Figure 7-2 for the correct pining.
Figure 7-2 Connector CN2 overview
7.4.2 System power
The main board power is received at connector CN2 from power board, to receive the power and signals from the PSU. See Figure 7-2 for the correct pining.
Figure 7-3 USB Interface
19420_205_130315.eps130315
CN2
12
34
56
78
910
1112
1314
1516
1718
1920
24V_VCC_AU
DIMMING
BACKLIGHT_ON/OFF
5V_STBY
3V3_STBY
5V_VCC5V_VCC
12V_STBY
12V_STBY12V_STBY
3V3_VCC3V3_VCC
power_pin3
power_pin1
power cable
19420_206_130315.eps130315
IC Data Sheets EN 19VES.2.2E LA 8.
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8. IC Data SheetsThis chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the
electrical diagrams (with the exception of “memory” and “logic” ICs).
8.1 Diagram 10-2-4 B04, Tuner, USB, WiFi, Si2156 (U18)
Figure 8-1 Internal block diagram and pin configuration
19420_300_130314.eps130314
Block diagram
Pinning information
GND_PAD
17
27
28
29
30
1819
31
32
20
RF_IN
XOUT
VDD_L
RF_S
HLD
RF_S
HLD
RF_IP
VDD_
H
XTAL
_I
16
15
21222324
BCLK
RSTB
6 7 85
DLIF_P
DLIF_N
ALIF_P
VDD_
H
13
14
12
11
9
10
1 2 3 4
25
26
GND
SDA
GND
VDD_
D
SCL
VDD_
S
VDD_IO
ALIF
_AGC
ADDR
DLIF
_AGC
ALIF_N
VDD_H
GPIO1
INTB/GPIO2
XTAL
_O
GND
GND
GND
DSP
FILTER
ATVDEMOD
IADC
QADC
0 / 90 LOW-IF
FREQSYNTH
RFAGC
LDO
IFAGC
OUTP
UTIN
TERF
ACE
XOSC
XTAL_I
PGA
PGA
CONT
ROL
INTE
RFAC
E
XTAL_O
XOUT
BCLK
AGCSi2156
RF_IN
RF_IPANTENNA
INPUT
Balun
DTV DEMOD
AVSoC
GPIO
RSTB
ADDR
SCLSDA
INTB
DLIFDSP
FILTER ATV DEMOD
AGC
ALIF
3.3 V1.8 V
IC Data SheetsEN 20 VES.2.2E LA8.
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8.2 Diagram 10-2-7 B07, Audio, Headphone, TAS5719 (IC U35)
Figure 8-2 Internal block diagram and pin configuration
19420_301_130315.eps130315
Block diagram
Pinning information
CPNCPP
PLL_FLTPVR_ANA
HPVDDAVSS
PLL_FLTM
HPR_IN
HPVSS
HPL_OUTHPL_IN
RESET
HPR_OUT
STEST
ND
PGI
D_R
V
SE
R_C
SO
OS
SV
D
DVDD
KLC
ML
ES_
A
KLC
SNI
DS
KLC
RL
DD
VA
AD
SL
CS
DVSSGND
VREG
BA_
DN
GP
A_TU
O
C_TS
BC_T
UO
GVDD_OUTHP_SD
RM
WP_
PH
BA_
DD
VP
D_TU
O
BST_D
AGND
LM
WP_
PH
A_TS
B
DC_
DN
GP
PVDD_CD
B_TU
OB_T
SB
SSTIMER
PHP Package
TAS5717(TAS5719)
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
25
26
27
28
29
30
31
32
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
SDIN
MCLKSCLK
LRCLK
SerialAudioPort
ProtectionLogic
Control
(DAP)
SDA
SCL
4Order
th
NoiseShaper
andPWM
SRC
Autodetect
SerialControl
MicrocontrollerBasedSystemControl
OUT_A
OUT_B
2 HBFET Out
OUT_C
OUT_D
2 HBFET Out
HPL_IN HPL_OUT
HPR_IN HPR_OUT
Block Diagrams EN 21VES2.2E LA 9.
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9. Block Diagrams
9.1 Wiring diagram 3000 series 32"
10000_000_A3_very_first page_120130.eps120130
Board Level Repair
Component Level RepairOnly for authorized workshops
MAIN POWER SUPPLY(M3)A
IR/LED BOARD(M6)J
CN27
CVBSR/L Audio
USB
CI
5P
2P2P
PL500PL100
L N
2P 2P
20P 20P
to p
anel
PL200
CN15
PL1
SCART(RGB/CVBS)
VGA
SPDF OUT
TV ANTENNA
RIGHT SPEAKER LEFT SPEAKER
SSB(M2)B
M7
EN 22VES2.2E LA 9.Block Diagrams
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9.2 Block diagram 3000 series
19420_401_130314.eps130314
MSD8WB9BX
RAM INTERFACE
LVD
S IN
TER
FAC
ENANDFLASH
CIINTERFACE
ANALOG AUDIO/VIDEOINTERFACE
25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
GPIO ETHERNET SPIFLASHUSB Host Interface
XIN/XOUT
HW ResetBlock
HD
MI I
NTE
RFA
CE
SI2156Silicon Tuner
DIG
ITAL
IF_T
/C
TS0Input
I2C_TUNERAGC_MAIN
PC
M_A
DD
RES
S
NAND Flash(128Mx8bit / 256Mx8bit) PC
M/N
AN
D_D
ATA
NAN
D_C
ON
TRO
L
HD
MI 1
HD
MI 2
HDMI2_5V
HDMI1_5VTMDS_1
I2C_1
TMDS_2I2C_2
LINEOUT
GP
IO
GPI
O
RESET CIRCUIT 3V3_STBY
TPS2553USB Power
Supply Switch
5V_VCC
AZ099-4SESD
Protection
USB1
ARC
TS1I/O
VGA
RG
B/H
S/V
S
CV
BS_I
N .
SAV
/VG
A/Y
PbPr
Aud
io_I
n
SC
RG
B/F
BS
C C
VBS
_IN
SC A
UD
IO_I
NSC1
CV
BS_O
UT
VIDEOAMP.
SCART
HPOUT
HP
_L/R
HP_DETECT
SC_P
in8
TAS5719Audio Amp (6W) &
2Vrms Amp
SC AUDIO_OUT
I2S
AUD
_OU
T
24V_VCC
SPDIFI/O
SPD
IF O
UT
IRIN IR_IN
DDR3 RAM(64Mx16bit or 128Mx16bit)(1600 MT/s)
Panel VccSW
12V_VCC
Dimming Circuitry
DISPLAY 2D
DimmingBACKLIGHT_DIMMING
I2CI2C
Front-End
MST_TS
0
CI_TS
0
I/O_TS1
CI_
TS1
RESET_TUN
HP_DETECTSHORT CCT
PROTECTION PROTECT PROTECT
24V_VCC
KEYBOARD
I2SI/O
SC
_L/R
_OU
T
Dimming Main
SC_Pin8
DVD_SENSEPolarizer (Passive) Glass
12V_VCC3V3_VCC_TUNER
5V_VCC3V3_VCC
1V8_VCC_TUNER
3V3_VCC
XTAL (24 Mhz)
XTAL (24 Mhz)
SPI (16Mbit)
2x6W
3V3_STBY
LED
5V_STBY
LVDS(SINGLE & DUAL)
1V5_VCC
3V3_
VCC
_TU
NER
1V8_
VCC
_TU
NER
POWER
3V3_STBY
3V3_VCC2V5_VCC1V5_VCC1V2_VCC
MB95S Block Diagram
AP2111H5V_STBY 3V3_STBY
TPS6251
1V2_VCC
1V5_VCC
3V3_VCC
12V_VCC
APL59103V3_VCC 2V5_VCC
TPS542812V_STBY 5V_STBY
FDC642P12V_STBY 12V_VCC
FDC642P5V_STBY 5V_VCC
LM11173V3_VCC 1V8_VCC_TUNER
LM11175V_VCC 3V3_VCC_TUNER
POWER BLOCK
Circuit Diagrams and PWB Layouts EN 23VES2.2E LA 10.
2013-Mar-15 back to div. table
10. Circuit Diagrams and PWB Layouts10.1 A 17ips19-5 26" to 40" LED Slim Integrated Power Supply10-1-1 A01
19420_500_130311.eps 130311
26" to 40" Slim Integrated Power Supply A01 A01
2011-05-023
2722 171 903226" to 40" Slim Integrated Power Supply
EN 24VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-1-2 A02
19420_501_130311.eps130311
26" to 40" Slim Integrated Power SupplyA02 A02
2012-08-065
17IPS19-526" to 40" Slim Integrated
Power Supply
Circuit Diagrams and PWB Layouts EN 25VES2.2E LA 10.
2013-Mar-15 back to div. table
10-1-3 Layout top
19420_502_130311.eps130311
2012-08-06 5
17ips19-5PSU Layout Top
EN 26VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-1-4 Layout bottom
19420_503_130311.eps130311
2012-08-06 5
17ips19-5PSU Layout Bottom
Circuit Diagrams and PWB Layouts EN 27VES2.2E LA 10.
2013-Mar-15 back to div. table
10.2 B 17mb95s-2 SSB10-2-1 B01, HDMI/GPIO protection
19420_504_130312.eps130312
HDMI/GPIO protectionB01 B01
2012-12-172
17mb95sHDMI/GPIO protection
330kR5
3V3_STBY
4k7
R13
12
3V3_STBY
100RR114
MSD8WB9BXU4
AE
25A
E1
U23
T25
T24
T23
A25 A1
J6H6H5G5
F6N23P23N25N24
N6L6D3K4M6M7M4J4L5K6M5K5
W21T22
AB22U22
AA18
B3A3C3
F4A9F7A8B8D6D7E4D4
B7D5E2B6F5E3C7 GPIO36
GPIO37GPIO38GPIO39GPIO40GPIO41GPIO42
GPIO43/UART2_TXGPIO44/UART2_RXGPIO45GPIO46GPIO47/UART4_TXGPIO48/UART4_RXGPIO49GPIO51GPIO52
GPIO58GPIO61GPIO62
GPIO131GPIO132GPIO133GPIO134GPIO135
GPIO6GPIO7/PM_UART1_TX
GPIO8GPIO12/CSZ1
GPIO10GPIO11/PM_UART1_RX
GPIO13GPIO14GPIO15GPIO16GPIO17GPIO18
PWM0PWM1PWM2PWM3
PWM_PM
SAR0SAR1SAR2SAR3N
C_0
NC
_1N
C_2
NC
_3N
C_4
NC
_5N
C_6
NC
_7
9
47k
R14
12
STBY_ON/OFF_NOT
1k2
R8
U4MSD8WB9BX
D1
D2
AD
12A
C13
B5
B4
C5
C4
C6
A6
T6
R5T4R6F2F3H2H3G2G1G3F1
AD4W6V6R2R3U2U3T2T1T3R1
T5U6U5J2J3L2L3K2K1K3J1
N4AD1V4V5M2M3P2P3N2N1N3M1 RXA0N
RXA0PRXA1NRXA1PRXA2NRXA2PRXACKNRXACKPDDCDA_CKDDCDA_DAHOTPLUGAARC0
RXB0NRXB0PRXB1NRXB1PRXB2NRXB2PRXBCKNRXBCKPDDCDB_CKDDCDB_DAHOTPLUGB
RXC0NRXC0PRXC1NRXC1PRXC2NRXC2P
RXCCKNRXCCKP
DDCDC_CKDDCDC_DAHOTPLUGC
RXD0NRXD0PRXD1NRXD1PRXD2NRXD2P
RXDCKNRXDCKP
DDCDD_CKDDCDD_DAHOTPLUGD
CECRN
RP
GP
IO56
/LE
D[1
]T
PG
PIO
55/L
ED
[0]
TN
DP
_P1
DM
_P1
DP
_P0
DM
_P0
3
BC848BQ2
1
2
3
HDMI1_RX0N
CN4
123456789
10111213141516171819
2021
4k7R11
1 2
HDMI0_RX0PHDMI0_RX1NHDMI0_RX1PHDMI0_RX2NHDMI0_RX2PHDMI0_CLKN
HDMI0_RX0N
HDMI0_CLKP
HDMI0_ARC
6V31u
C14HDMI0_ARC
4k7
R14
41
23V
3_S
TB
Y3V
3_V
CC
R14
34k
71
2
4k7
R14
21
2
R9710R1
47k
R19
12
47k
R30
12
R22
47k
12
47k
R31
12
10RR98
12
R9910R1 2
CN6
123456789
10111213141516171819
2021
CEC
10RR100
1
10RR106
1 2
R11210R1
R12410R2
10RR141
1 2
HDMI1_CLKP
HDMI1_CLKN
HDMI1_RX0P
HDMI1_RX0N
HDMI1_RX1P
HDMI1_RX1N
HDMI1_RX2P
HDMI1_RX2N
10RR158
1 2
R16010R1 2
10RR166
1 2 HDMI2_HPDIN
HDMI0_SCLHDMI0_SDA
CEC
HDMI1_SCLHDMI1_SDA
HDMI1_5VHDMI1_HPDIN10R
R511 2
R5210R1 2
10RR53
1 2
10RR54
1 2
R5510R2
R5610R1
10RR57
1 2
10RR58
1
CECR5910R1 2
10RR60
12
47k
R23
12
47k
R24
12
10RR61
1
10RR62
12
R25
47k
12
10RR63
12
R6410R1 2
10RR65
12
R6610R1 2
R6710R1
2
R6810R 1
2
R6910R1 2
R7010R1 2
R7110R1 2
R7210R1 2 HDMI0_HPDIN
HDMI0_5V
HDMI0_RX2P
HDMI0_CLKP
HDMI0_CLKN
HDMI0_RX0N
HDMI0_RX0PHDMI0_RX1N
HDMI0_RX1PHDMI0_RX2N
HDMI0_SCLHDMI0_SDA
HDMI0_HPDIN
HDMI0_5V
R821k1 2
R831k1 2
1k2
R10
HDMI1_RX0PHDMI1_RX1NHDMI1_RX1PHDMI1_RX2NHDMI1_RX2PHDMI1_CLKNHDMI1_CLKP
HDMI1_SCLHDMI1_SDA
R841k1 2Q5
BC848B1
2
3
HDMI1_HPDIN R851k1 2
HD
MI1
_5V
R86100R
HDMI2_5V
HDMI2_SDA
CEC
HDMI2_SCL
HDMI2_RX2N
HDMI2_RX2P
ETH_TXN
ETH_TXP
ETH_RXPETH_RXN
HDMI2_RX1N
HDMI2_RX1P
HDMI2_RX0N
HDMI2_RX0P
HDMI2_CLKN
HDMI2_CLKP
R32
47k
12
CN5
123456789
10111213141516171819
2021
US
B2_
DN
US
B2_
DP
US
B1_
DP
US
B1_
DN
HD
MI2
_5V
Q4BC848B
1
2
3
HDMI2_HPDINR391k 12
1k2
R33
R401k 12
3V3_VCC
R11
65k
1
5k1
R12
2
ETH_GRN
ETH_YEL
R12
55k
1
5k1
R13
0
3V3_
ST
BY
LED2
100RR261
LED1
AMP_MUTE
HP_MUTEHP_DETECT
BACKLIGHT_DIM
PANEL_VCC_ON/OFF
R14
04k
71
23V
3_V
CC
1V8_VCC_TUNER
R61
433
k
R66318k
R66218k
33k
R61
3
BC848BQ36
DVD_WAKEUP
HDMI0_5V
PWM1
3V3_
ST
BY
D19
C5V
6
4k7
R26
0
12
3V3_
VC
C
HDMI2_RX0PHDMI2_RX1NHDMI2_RX1PHDMI2_RX2NHDMI2_RX2PHDMI2_CLKN
HDMI2_RX0N
HDMI2_CLKPHDMI2_SCL
HDMI2_SDA
PWM0
3V3_
ST
BY
R12
94k
71
2R
128
4k7
12
3V3_
ST
BY
10k
R18
31
2
BC848BQ7
3V3_VCC
TOUCHPAD_SCL
TOUCHPAD_SDA
R342100R
3V3_STBY4k7R127
1 2
R1264k71 2
PC_DET
PWM_OUT_LED3
R12
34k
71
23V
3_S
TB
Y
SC_PIN8
BA
CK
LIG
HT
_ON
/OF
F
S27
3V3_VCC
R12
14k
71
2
4k7R120
12
4k7R119
BC848BQ10
3D_ENABLE
3V3_
VC
C
USB_ENABLE2USB_ENABLE1
TUNER_RST
EXT_RESET
PCM_CD1
CI_PWR_CTRL
FLASH_WP
HDMI1_5V
SPI_CS
R11
14k
71
2
4k7
R11
01
23V
3_S
TB
Y
PANEL_VCC
PROTECT
3V3_
ST
BY
4k7
R10
91
2
KEYBOARD
R10
810
k
5V_VCC
12V_VCC
R258220R
C562100n16V
C6261u16V
U28MAX809LTR
3
2 1GNDRST
VCC
4k7
R12
12
DVD_IR_ON/OFF
DVD_SENSE
R7152k7
R6971k
R10715k
33R
R73
8R
737
33R
US
B_O
CD
2
US
B_O
CD
1
4k7
R4
12
R3
4k7
12
AUX_RESET
AUX_RESET
5V_VCC
BA
W56
D26
10kR195
1 2
10kR194
1 2
TP
7 PR
OT
EC
T
C52100n
10V1
2
R19210k 12
R61133k 12
3V3_STBY
10kR191
1 2
R19010k1 2
R18
910
k1
2
BA
W56
D24
R18810k1 2
24V_VCC_AU
Q8BC848B
R18610k1 2
R18510k1 2
R343100R
12V_VCC
10kR712
1 2
Q35BC858B
3V3_VCC_TUNER
HDMI2_5VR16818k
R21
433
k
HD
MI1
HD
MI2
NC
HD
MI3
GPIO
HDMI / USB
1V2 - 1V25 -1V5 - 2V5 - 3V3 FROM ICs POWER GOOD PINS
SHORT CCT PROTECTION
EN 28VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-2-2 B02, MStar, DDR3
19420_505_130312.eps130312
MStar, DDR3B02 B02
2012-12-172
17mb95sMStar, DDR3
U4MSD8WB9BX
J20J21K25K24G23G25F25E20F20F24G20D20L20H24A24B25B24
K21H21L21H20K20H22L22G21
K23M23H23M24J23L24J24L23
D23E21F23C25C24D21D24D22E23F21E24G22F22D25B23
A18B18C18B19A17C17B16F11E13B15F13E14A21E15C12B12A12
C20D16A20E16C21F16B20G16
D15A22F14B22F15B21G15D17
B13E11A15C13C16D12B14D11A14E12C15F12B11C14A11 A_DDR3_A0
A_DDR3_A1A_DDR3_A2A_DDR3_A3A_DDR3_A4A_DDR3_A5A_DDR3_A6A_DDR3_A7A_DDR3_A8A_DDR3_A9A_DDR3_A10A_DDR3_A11A_DDR3_A12A_DDR3_A13A_DDR3_A14
A_DDR3_DQL0A_DDR3_DQL1A_DDR3_DQL2A_DDR3_DQL3A_DDR3_DQL4A_DDR3_DQL5A_DDR3_DQL6A_DDR3_DQL7
A_DDR3_DQU0A_DDR3_DQU1A_DDR3_DQU2A_DDR3_DQU3A_DDR3_DQU4A_DDR3_DQU5A_DDR3_DQU6A_DDR3_DQU7
A_DDR3_CASZA_DDR3_RASZA_DDR3_WEZA_DDR3_DMLA_DDR3_DMUA_DDR3_ODTA_DDR3_BA0A_DDR3_BA1A_DDR3_BA2A_DDR3_RESETA_DDR3_CKEA_DDR3_MCLKA_DDR3_MCLKZA_DDR3_DQSLA_DDR3_DQSLBA_DDR3_DQSUA_DDR3_DQSUB
B_DDR3_A0B_DDR3_A1B_DDR3_A2B_DDR3_A3B_DDR3_A4B_DDR3_A5B_DDR3_A6B_DDR3_A7B_DDR3_A8B_DDR3_A9
B_DDR3_A10B_DDR3_A11B_DDR3_A12B_DDR3_A13B_DDR3_A14
B_DDR3_DQL0B_DDR3_DQL1B_DDR3_DQL2B_DDR3_DQL3B_DDR3_DQL4B_DDR3_DQL5B_DDR3_DQL6B_DDR3_DQL7
B_DDR3_DQU0B_DDR3_DQU1B_DDR3_DQU2B_DDR3_DQU3B_DDR3_DQU4B_DDR3_DQU5B_DDR3_DQU6B_DDR3_DQU7
B_DDR3_CASZB_DDR3_RASZ
B_DDR3_WEZB_DDR3_DMLB_DDR3_DMUB_DDR3_ODTB_DDR3_BA0B_DDR3_BA1B_DDR3_BA2
B_DDR3_RESETB_DDR3_CKE
B_DDR3_MCLKB_DDR3_MCLKZ
B_DDR3_DQSLB_DDR3_DQSLB
B_DDR3_DQSUB_DDR3_DQSUB
1
DDR0_VREFDQ
DDR0_DMUDDR0_DML
DDR0_DQSUBDDR0_DQSU
DDR0_DQSLBDDR0_DQSL
DDR0_DQL0DDR0_DQL1DDR0_DQL2DDR0_DQL3DDR0_DQL4DDR0_DQL5
DDR0_RESETB
DDR0_WEBDDR0_CASBDDR0_RASB
DDR0_CKE
DD
R0_
CK
DD
R0_
CK
B
DDR0_BA2DDR0_BA1
DDR0_A12
DDR0_A10DDR0_A11
DDR0_A09DDR0_A08
DDR0_A06DDR0_A05DDR0_A04DDR0_A03DDR0_A02
DDR0_A00DDR0_A01
DDR0_A07
DDR0_A13
DDR0_BA0
DDR0_DQL6DDR0_DQL7
DDR0_DQU0DDR0_DQU1DDR0_DQU2DDR0_DQU3DDR0_DQU4DDR0_DQU5DDR0_DQU6DDR0_DQU7
1V5_DDR0
DDR0_VREFCA
DDR1_VREFDQ
1V5_VCC 1V5_VCC
1kR408
R40
91k
R4101k
DDR0_ODT
R32
156
R
50V
1nC32
2
240RR418
U7H5TQ2G63BFR-PB
A9
B3
E1
G8
J2 J8 M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
K1
D3E7
C7B7
G3F3
A3B8A2A7C2C8C3D7
H7G2H8H3F8F2F7E3
M8H1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
L8T2
L3K3J3
L2
K9
K7J7
M3N8M2
J9T7L9M7L1J1
T3N7R7L7R3T8R2R8P2P8N2P3P7N3 A0
A1A2A3A4A5A6A7A8A9A10/APA11A12/BCA13
NC1NC2NC3NC4NC5NC6
BA0BA1BA2
CK_0CK_1
CKE
CS
RASCASWE
RESETZQ
VD
DQ
_9V
DD
Q_8
VD
DQ
_7V
DD
Q_6
VD
DQ
_5V
DD
Q_4
VD
DQ
_3V
DD
Q_2
VD
DQ
_1
VD
D_9
VD
D_8
VD
D_7
VD
D_6
VD
D_5
VD
D_4
VD
D_3
VD
D_2
VD
D_1
VREF_DQVREF_CA
DQL0DQL1DQL2DQL3DQL4DQL5DQL6DQL7
DQU0DQU1DQU2DQU3DQU4DQU5DQU6DQU7
DQSL_0DQSL_1
DQSU_1DQSU_0
DMLDMU
ODT
VS
SQ
_9V
SS
Q_8
VS
SQ
_7V
SS
Q_6
VS
SQ
_5V
SS
Q_4
VS
SQ
_3V
SS
Q_2
VS
SQ
_1
VS
S_1
2V
SS
_11
VS
S_1
0V
SS
_9V
SS
_8V
SS
_7V
SS
_6V
SS
_5V
SS
_4V
SS
_3V
SS
_2V
SS
_1
DDR0_A00DDR0_A01DDR0_A02DDR0_A03DDR0_A04DDR0_A05DDR0_A06DDR0_A07DDR0_A08DDR0_A09DDR0_A10DDR0_A11DDR0_A12
DDR0_A13
DDR0_DQL0DDR0_DQL1DDR0_DQL2DDR0_DQL3DDR0_DQL4DDR0_DQL5DDR0_DQL6DDR0_DQL7
DDR0_DQU0DDR0_DQU1DDR0_DQU2DDR0_DQU3DDR0_DQU4DDR0_DQU5DDR0_DQU6DDR0_DQU7
DDR0_CASBDDR0_RASB
DDR0_WEBDDR0_DMLDDR0_DMUDDR0_ODTDDR0_BA0DDR0_BA1DDR0_BA2
DDR0_RESETBDDR0_CKE
DDR0_CKDDR0_CKB
DDR0_DQSLDDR0_DQSLB
DDR0_DQSUDDR0_DQSUB
1V5_VCC60R
F12
R32
256
R16
V10
n
C34
2
C24
6
100n 16
V
R41
11k 50
V1nC32
316
V10
0n
C24
7
DDR1_VREFCADDR1_VREFDQ
C21310u10V
C248100n
16V 16V100nC249 C250
100n16V
DDR1_DMUDDR1_DML
DDR1_DQSUBDDR1_DQSU
DDR1_DQSLBDDR1_DQSL
DDR1_DQL0DDR1_DQL1DDR1_DQL2DDR1_DQL3DDR1_DQL4DDR1_DQL5
DDR1_RESETB
DDR1_WEBDDR1_CASBDDR1_RASB
DDR1_BA2DDR1_BA1
DDR1_A12
DDR1_A10DDR1_A11
DDR1_A09DDR1_A08
DDR1_A06DDR1_A05DDR1_A04DDR1_A03DDR1_A02
DDR1_A00DDR1_A01
DDR1_A07
DDR1_A13
DDR1_BA0
DDR1_DQL6DDR1_DQL7
DDR1_DQU0DDR1_DQU1DDR1_DQU2DDR1_DQU3DDR1_DQU4DDR1_DQU5DDR1_DQU6DDR1_DQU7
1V5_DDR1
16V100nC251
R421240R
U8H5TQ2G63BFR-PB
A9
B3
E1
G8
J2 J8 M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
K1
D3E7
C7B7
G3F3
A3B8A2A7C2C8C3D7
H7G2H8H3F8F2F7E3
M8H1
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
L8T2
L3K3J3
L2
K9
K7J7
M3N8M2
J9T7L9M7L1J1
T3N7R7L7R3T8R2R8P2P8N2P3P7N3 A0
A1A2A3A4A5A6A7A8A9A10/APA11A12/BCA13
NC1NC2NC3NC4NC5NC6
BA0BA1BA2
CK_0CK_1
CKE
CS
RASCASWE
RESETZQ
VD
DQ
_9V
DD
Q_8
VD
DQ
_7V
DD
Q_6
VD
DQ
_5V
DD
Q_4
VD
DQ
_3V
DD
Q_2
VD
DQ
_1
VD
D_9
VD
D_8
VD
D_7
VD
D_6
VD
D_5
VD
D_4
VD
D_3
VD
D_2
VD
D_1
VREF_DQVREF_CA
DQL0DQL1DQL2DQL3DQL4DQL5DQL6DQL7
DQU0DQU1DQU2DQU3DQU4DQU5DQU6DQU7
DQSL_0DQSL_1
DQSU_1DQSU_0
DMLDMU
ODT
VS
SQ
_9V
SS
Q_8
VS
SQ
_7V
SS
Q_6
VS
SQ
_5V
SS
Q_4
VS
SQ
_3V
SS
Q_2
VS
SQ
_1
VS
S_1
2V
SS
_11
VS
S_1
0V
SS
_9V
SS
_8V
SS
_7V
SS
_6V
SS
_5V
SS
_4V
SS
_3V
SS
_2V
SS
_1
DDR1_ODT
DDR1_CKE
DD
R1_
CK
DD
R1_
CK
BR
323
56R
C34
3
10n
16V
R32
456
R
C252100n
16V 16V100nC253 C254
100n16V 16V
100nC255 C256
100n16V
16V100nC257 C258
100n16V 16V
100nC259 C260
100n16V
DDR1_A00DDR1_A01DDR1_A02DDR1_A03
DDR1_A04DDR1_A05DDR1_A06DDR1_A07DDR1_A08
DDR1_A09DDR1_A10DDR1_A11DDR1_A12
DDR1_A13
DDR1_DQL0DDR1_DQL1DDR1_DQL2DDR1_DQL3
DDR1_DQU0
DDR1_DQL4DDR1_DQL5DDR1_DQL6DDR1_DQL7
DDR1_DQU1DDR1_DQU2DDR1_DQU3DDR1_DQU4DDR1_DQU5DDR1_DQU6DDR1_DQU7
DDR1_DQSUBDDR1_DQSUDDR1_DQSLBDDR1_DQSLDDR1_CKBDDR1_CKDDR1_CKEDDR1_RESETBDDR1_BA2DDR1_BA1DDR1_BA0DDR1_ODTDDR1_DMUDDR1_DMLDDR1_WEBDDR1_RASBDDR1_CASB
16V100nC261 C262
100n16V
DDR0_VREFCA
16V
100n
C26
3
C32
4
50V
1nR41
21k
1kR413
1V5_VCC
DDR1_VREFCA
16V100nC264 C265
100n16V 16V
100nC266
1V5_VCC
R4141k
1kR
415
C32
5
1n 50V
16V
100n
C26
7
DDR0_VREFDQ
16V100nC268
1V5_DDR0
10V10uC214
F13
60R C269100n
16V
1V5_VCC
16V100nC270 C271
100n16V
C272100n
16V100n
16V
C273 C274100n
16V100n
16V
C275 C276100n
16V100n
16V
C277
C278100n
16V100n
16V
C279
16V100nC280 C281
100n16V
C282
16V100n
C283100n
16V 16V100nC284 C285
100n16V 16V
100nC286 C287
100n16V
1V5_DDR1
PL1
PL2
PL3
PL4
GR
OU
ND
TE
RM
INA
LS
DDR3
Circuit Diagrams and PWB Layouts EN 29VES2.2E LA 10.
2013-Mar-15 back to div. table
10-2-3 B03, CI, Ethernet, Nand
19420_506_130312.eps130312
CI, Ethernet, NandB03 B03
2012-12-172
17mb95sCI, Ethernet, Nand
TS1_VLD
C4
22u6V3
CI_PWRR3204k7
TP209
S221
X10
24MHz
3142
2V5_VCCTP32
16V100nC20
TP1091
TP115
ETH_GRN
ETH_YEL
R134510R
R137510R
CN10
14
13
12
11
8
7
10
9
6
1
5
4
3
2 TD-
TCT
RD+
RD-
TD+
RCT
GR+
GR-
NC1
NC2
YL+
YL-
SHLD1
SHLD2
ETH_TXN
ETH_TXP
C21100n16V
R17
047
R
R16
947
R
ETH_RXN
ETH_RXP
16V
C22100n
R17
247
R
47R
R17
1
CN9
68676665646362616059585756555453525150494847464544434241403938373635
34333231302928272625242322212019181716151413121110987654321
33RR503
UART-RX-SC
R1504k7
UART-TX-SC
3V3_STBY3V3_STBY
R1514k7
4k7R152
TS1CLK TS1_CLKR50433R
U10MX25L512
1234 5
678VCC
HOLD#SCLK
SIGNDWP#SOCS#
U4MSD8WB9BX
U21Y18
AA20T21
AB19AD21AB18AC19AD20Y19
AE21AC20AB20AB17AD19AE20W22
AB16V21
AA22T20W19R20Y22
AA21
AD18AA19AE18AC18AE17AB21AD22V20
C1C2B1B2A2
P20Y21P22P21
AC21Y20W20R21 NF_ALE
NF_WPZNF_CEZNF_CLENF_REZNF_WEZNF_RBZNF_CEZ1
SPI_CKSPI_DISPI_DOTEST1SPI_CZ
PCM_D[0]/NF_AD[0]PCM_D[1]/NF_AD[1]PCM_D[2]/NF_AD[2]PCM_D[3]/NF_AD[3]PCM_D[4]/NF_AD[4]PCM_D[5]/NF_AD[5]PCM_D[6]/NF_AD[6]PCM_D[7]/NF_AD[7]
PCM_A[0]PCM_A[1]PCM_A[2]PCM_A[3]PCM_A[4]PCM_A[5]PCM_A[6]PCM_A[7]PCM_A[8]PCM_A[9]
PCM_A[10]PCM_A[11]PCM_A[12]PCM_A[13]PCM_A[14]
PCM_IRQA_NPCM_OE_N
PCM_IORD_NPCM_CE_NPCM_WE_NPCM_CD_N
PCM_RSTPCM_REG_N
PCM_IOWR_NPCM_WAIT_N
4
100n10V
C98
26
2524
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
U13
NAND128-A
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
NC1
NC2
NC3
NC4
NC5
NC6
RB
R
E
NC7
NC8
VDD1
VSS1
NC9
NC10
CL
AL
W
WP
NC11
NC12
NC13
NC14
NC15 NC16
NC17
NC18
NC19
I/O0
I/O1
I/O2
I/O3
NC20
NC21
NC22
VSS2
VDD2
NC23
NC24
NC25
I/O4
I/O5
I/O6
I/O7
NC26
NC27
NC28
NC29
R24
010
k
SPI_CLKSPI_DI
SPI_DO
3V3_
ST
BY
NAND_ALENAND_WPZNAND_CEZNAND_CLENAND_REZNAND_WEZNAND_RBZ
SPI_CLK
SPI_DI
SPI_DO
SPI_CS4k
7R
153
3V3_STBY3V3_STBY
FLASH_WPR50533R
NAND_REZ
3V3_STBY
33RR506
R50733R
R50833R
33RR509
3V3_NAND
NAND_CEZ
NAND_RBZ
3k9
R57
43V
3_N
AN
D
NAND_CLE
NAND_ALE
NAND_WEZ
NAND_WPZ
33RR577
1
2
3
4 5
6
7
8
R4
R1
R3
R2
R57833R
1
2
3
4 5
6
7
8
R4
R1
R3
R2
33RR579
1
2
3
4 5
6
7
8
R4
R1
R3
R2
R58033R
1
2
3
4 5
6
7
8
R4
R1
R3
R2
3V3_NAND3V3_VCC
C291100n
16V
C292
16V
100n
F51
60R
3V3_NAND
PCMNANDD0PCMNANDD1PCMNANDD2PCMNANDD3PCMNANDD4PCMNANDD5PCMNANDD6PCMNANDD7
PCMA0PCMA1PCMA2PCMA3PCMA4PCMA5PCMA6PCMA7PCMA8PCMA9PCMA10PCMA11PCMA12PCMA13PCMA14
PCMWAIT
PCMOEPCMIORDPCMCEPCMWEPCMCD2PCMRSTPCMREGPCMIOWR
PCMWAIT
PCMNANDD2
PCMNANDD1
PCMNANDD0
PCMA0
PCMRST
PCMA5
PCMA4
PCM_IOWRPCMNANDD6
PCMNANDD5
PCMNANDD4
PCMNANDD3
PCMA1
PCMA2
PCMA3
PCMREG
33RR581
1
2
3
4 5
6
7
8
R4
R1
R3
R2
R58233R
1
2
3
4 5
6
7
8
R4
R1
R3
R2
33RR583
1
2
3
4 5
6
7
8
R4
R1
R3
R2
R58433R
1
2
3
4 5
6
7
8
R4
R1
R3
R2
PCMNANDD7
PCMCE
PCMA10
PCMIORD
PCMA6
PCMA7
PCMIRQA
PCMA12
PCMWE
PCMA14
PCMA13
PCMA8
PCMA9
PCMIOWR
PCMA11
PCMOE
33RR510
PCM_CD2
PCM_NAND_D2
PCM_NAND_D1
PCM_NAND_D0
PCM_A0
PCM_NAND_D6
PCM_NAND_D5
PCM_NAND_D4
PCM_NAND_D3
PCM_A1
PCM_A2
PCM_A3
PCM_REG
PCM_IORD
PCM_A4
PCM_A5
PCM_RST
PCM_A6
PCM_A7
PCM_WAIT
PCM_A12
PCM_WE
PCM_A14
PCM_A13
PCM_A8
PCM_A9
PCM_IOWR
PCM_A11
PCM_OE
PCM_IORD
PCM_A10
PCM_CE
PCM_NAND_D7
PCMCD2
PCM_NAND_D0
PCM_NAND_D1
PCM_NAND_D2
PCM_NAND_D3
PCM_NAND_D4
PCM_NAND_D5
PCM_NAND_D6
PCM_NAND_D7
PCM_NAND_D3PCM_NAND_D4PCM_NAND_D5PCM_NAND_D6PCM_NAND_D7
PCM_NAND_D2PCM_NAND_D1PCM_NAND_D0PCM_A0PCM_A1PCM_A2PCM_A3PCM_A4PCM_A5PCM_A6PCM_A7PCM_A12
PCM_A10
PCM_A11PCM_A9PCM_A8PCM_A13PCM_A14
PCM_CE
PCM_OE
PCM_WE
PCMIRQA
R15
44k
7
CI_PWR
TP211
CI_PWR
TP
641
10V100nC99
1
2 C100100n10V
1
2
5V_VCC60R
F15
BS
H10
3Q
301
2 3
12V_VCC 47kR316
1 2
10V
100n
C10
1
12
R31747k1 2
BC847BQ31
1
2
3
CI_PWR_CTRL
10V10uC3
R24210k1 2
CI_PWRCI_PWR
TS1_VLDTS1_CLK
PCM_CD1
PCM_CD2
PCM_IRQA
PCM_IRQA
PCM_RST
4k7
R15
5
CI_PWR
PCM_WAIT
PCM_REG
TS0D0
TS1D5 TS1_D533R
R585
8
7
6
5 4
3
2
1
R4
R1
R3
R2
TS1D7
TS1D6
TS1_D7
TS1_D6
TS0D1TS0D2TS0D3TS0D4TS0D5TS0D6TS0D7
TS0CLKTS0VLD
TS0SYNC
TS1SYNCTS1VLDTS1CLK
TS1D7TS1D6TS1D5TS1D4TS1D3TS1D2TS1D1TS1D0
U4MSD8WB9BX
Y14Y15
AB15AA15AB14AA14AA13Y13
AA16AA17Y16
AD13AE15AC16AC17AD17AD16AC15AD15AE14AD14AC14
R25R24
P24R23R4P5
G4
AE2AE3
N5 RESET
XINXOUT
IRIN
DDCA_CK/UART0_RXDDCA_DA/UART0_TXUART3_RX/GPIO64UART3_TX/GPIO65
DDCR_CKDDCR_DA
TS1_D[0]TS1_D[1]TS1_D[2]TS1_D[3]TS1_D[4]TS1_D[5]TS1_D[6]TS1_D[7]
TS1_CLKTS1_VLD
TS1_SYNC
TS0_D[0]TS0_D[1]TS0_D[2]TS0_D[3]TS0_D[4]TS0_D[5]TS0_D[6]TS0_D[7]
TS0_CLKTS0_VLD
TS0_SYNC
8
TS0_SYNC
TS0_CLK
TS0VLD
TS0SYNC
TS0CLK
C44810p
50V
TS0_VLD
TS0_D0
33RR587
8
7
6
5 4
3
2
1
R4
R1
R3
R2
TS0D2
TS0D1
TS0D0
TS0_D1 TS1_D4
TS0_D2
TS1D3
TS1D4
TS1VLD
R58833R
8
7
6
5 4
3
2
1
R4
R1
R3
R2 TS1_D3
TS1_D2TS1D2
TS0D7 TS0_D7
TS0_D3TS0_D4TS0_D5TS0_D6
TS1_SYNC
33RR589
8
7
6
5 4
3
2
1
R4
R1
R3
R2
TS1D1
TS1D0
TS1SYNC
TS1_D1
TS1_D0
TS0D4
TS0D5
TS0D6
R59033R
8
7
6
5 4
3
2
1
R4
R1
R3
R2 TS0_D4
TS0_D6
TS0_D5
TS0_D3TS0D3
TS0_D7
TS1_SYNCTS1_D0TS1_D1TS1_D2TS1_D3
TS0_VLDTS0_SYNC
TS0_D0TS0_D1TS0_D2
TS1_D4TS1_D5TS1_D6TS1_D7
TS0_CLK50V
10pC378
R24
310
k10
kR
244
3V3_VCC
3V3_VCC
S65
R39
51M
33p
C39
0
50V
50V
C39
133
p
4k7
R15
61
2
R15
74k
71
2
3V3_VCC
SYS_SCLSYS_SDA
12p
C39
250V
RESET
C102100n10V
1
2
3V3_STBY
R24
510
k
22uC394
16V
R3311k
1N41
48
D3
10V
100n
C10
3 21
RESETR361100R 12
R362100R 12IR_IN
6V3
220u
C14
9
1N5819
D5
4k7R76
R1844k7
3V3_VCC
4k7R716
R7354k7
3V3_VCC
3V3_VCC
4k7R808
R58633R
50V
10p
C45
1
TP1101
TP116
TP
113
TP
114
TP117
C1271u
16V
60R
F52
75RR876
D36
C5V6
1 2
C21022u
6V3
TP210
R87775R
75RR878
R87975R
75RR880
R88175R
75RR882
R88375R
10V
10u
C11
97
MSTAR SPI FLASH
RESET
Place these capacitorsclose to transformer
nc
Place these resistors
CI/NAND
close to MSTAR
Eth
erne
t lin
es m
ust b
e 10
0ohm
diff
eren
tial p
airs
close to MSTAR
chassis ground.
transformer.any parts or traces under thedifferential pairs. Do not placeroute as matched lengthAlso keep traces short and
speed nets, except for the
Place these resistors
EN 30VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-2-4 B04, Tuner, USB, WiFi
19420_507_130312.eps130312
Tuner, USB, WiFiB04 B04
2012-12-172
17mb95sTuner, USB, WiFi
F50 330R1 250V
C1
12p
R308470R
33RR187
TUNER_SCL
R307100R
F164
60R1 2
S69
R31
282
0R
3V3_VCC_SI
R7979k1
R31010R1 2 USB1_DP
R31110R1 2
USB2_VCC330RF70
1 2
6V3
C44
9
10u
S751 2
47RR606
1 2
F6
60R1 2
C14310u10V
C11510u10V
60R
F51 2
TP
991
1n250V
C144
TP981
1n2C153
50V
330RF111 2
390nL1
10RR309
1 2
USB2_DPR7410R1 2
USB1_VCC
3V3_VCC
USB1_DN
USB2_DN
C11410u10V
USB1_VCCC1210u10V
50V
C1541n2
1n2C155
50V
C156
50V1n2
330R
F69
1 2
TP
971
TP961
CN18
1
2
3
4
CN17
1
2
3
4
1V8_VCC_SI
DIGITAL_IF_P
100n 10
V
C15
8
S98
S99
D_IF_AGC
100n
C15
9
10V
IF_AGC
5V_VCC
16V
22n
C16
2
S100
TP1011
TP1001
TP921
TP911
U22
TPS2553-14
5
6
3
2
1 IN
GND
EN
OUT
ILIM
FAULT
16V100n
C161
CN19
1
2
3
4
USB1_VCC
USB_ENABLE1
C1571n250V
C1634n750V
5V_VCC
100nC164
3V3_VCC_SI
1V8_VCC_TUNER60R
F651 2
100n16V
C165
560RR259
560RR193TPS2553-1
U2
4
5
6
3
2
1 IN
GND
EN
OUT
ILIM
FAULT
C160
100n
16V
R75560R
3V3_VCC_TUNER
60R
F681 2
USB2_VCCR73470R
USB_ENABLE2
5V_VCC
U1
AZ099-04S
1
2
34
5
6 IO4
VDD
IO3 IO2
GND
IO1
R267560R
S92
F67
180R
1 234
50V1nC326
S66
VGA_G
VGA_B
VGA_HSNCVGA_VSNC
VGA_R
VGA_G R51133R
47nC182 16V
C183R59368R
47n16VC184
R51233R
C185R59468R
68RR595
47n16VC186
C18716V47n
33RR513
SC_CVBS_IN
16V C18847n
R59668R
CVBS0_OUT
C189 16V47n
SC_FB
33RR514
SC_R 16VC19047n
68RR597
SC_G R59868R
C19133R
R515C192 16V
47n
R59968R
C193SC_B C194 16V
47n33R
R516SC_CVBS_IN
SC_R33R
R517C195
33RR518
33RR519
47nC196 16V
33RR520
47nC197
C19816V47n
C199 16V47n
R52133R
C200 16V47n
R60068R
68RR601
C20133R
R522C202 16V
47n
R60268R
C203 47n16VC204
R52333R
Y_IN
PR_IN
PB_IN
Y_IN
S67
C3271n
SAV_CVBS
75R
R55
61
2
R55
775
R1
2
75R
R55
81
2
1nC329
S68
R56
075
R1
2
DVD_CVBS
U4MSD8WB9BX
AE5AC6AD2AD3
AD5AC5
AD8AC8
AC7AD7
AD6AE6
AB4AA4
AB5W4W5Y4
Y5
AB8AA5AA6AB6Y6
AA7Y7
AA8
AC4AC3AA2Y2
AA3AA1AB3AB1AB2
AC2AC1V1V3V2W3W1W2Y3 RIN0M
RIN0PGIN0MGIN0PBIN0MBIN0PSOGIN0HSYNC0VSYNC0
RIN1MRIN1PGIN1MGIN1PBIN1MBIN1PSOGIN1HSYNC1VSYNC1
RIN2MRIN2PGIN2MGIN2PBIN2MBIN2PSOGIN2HSYNC2
VCOM
CVBS0CVBS1CVBS2CVBS3
CVBSOUT1CVBSOUT2
IPIM
VIFPVIFM
SIFPSIFM
IFAGCRFAGC
TGPIO0/GPIO73TGPIO1/GPIO74TGPIO2/GPIO75TGPIO3/GPIO76
5DIGITAL_IF_P
100n
C106
10V
10VC107
100n
S70
S71DIGITAL_IF_N
100RR364
IF_AGC
3V3_VCC
C11
0
10V
100n
1kR33360R
F86
IF_AGC
3V3_VCC
R16
14k
71
2
4k7
R16
21
2
TUNER_SCLTUNER_SDA
SH1
21
TP111 1
100R
R60
31
2
6V3
100u
C43
5
3V3_VCC 1V8_VCC_TUNER
LM1117U14
1
23
4
VOUT
IN OUT
ADJ
U18SI2156
1 2 3 4 5 6 7 8
9
10
11
12
13
14
15
16
24 23 22 21 20 19 18 17
32
31
30
29
28
27
26
25 GND1
GND2
GND3
GPIO
INTB
RSTB
GND4
VDD_IO
XT
AL_
O
XT
AL_
I
VD
D_H
1
VD
D_H
2
RF
_SH
LD
RF
_IN
RF
_IP
RF
_SH
LD1
XOUT
BCLK
VDD_L
DLIF_P
DLIF_N
ALIF_P
VDD_H
ALIF_N
DLI
F_A
GC
ALI
F_A
GC
AD
DR
GN
D
VD
D_D
SD
A
SC
L
VD
D_S
1V8_VCC_SI
3V3_VCC_SI
3V3_
VC
C_S
I
3V3_
VC
C_S
I
C11
2
50V
120p
C113
120p50V
L5
220n
220n
L6
L4
270n
50V47p
C566
RF
_IN
_N
C15100n16V
RF_IN_N
RF_IN_P
RF
_IN
_P
X1
27MHz
31 42
DIGITAL_IF_N
3V3_VCC_SI
S82
3V3_VCC_TUNER
10kR196
S83
S84
S87
C6
12p
1V8_
VC
C_S
I
TUNER_SDAC1012p
3V3_VCC_SI
JK11
68RR609
100RR407
12
TP112 1
100R
R60
41
2
D_IF_AGC
5V_VCC
C62
4
10u
10V
C44
010
0u 6V3
F165
60R1 2
TUNER_RST
S89
16V100nC29
ES
D0P
8RF
L
D8
4 3
21
LM1117U6
1
23
4
VOUT
IN OUT
ADJ
750R
OPTIONAL RESISTORS
OP
TIO
NA
L
NC
Close To Concept IC Close To SI2156
pin4
pin1pin32
USB & WIFI
nc
NC:1100000(R:1,W:0)
pin10pin19
TUNER
VIDEO
pin20
30067048
24 MHz CRYSTAL
pin14
Circuit Diagrams and PWB Layouts EN 31VES2.2E LA 10.
2013-Mar-15 back to div. table
10-2-5 B05, Power
19420_508_130312.eps130312
PowerB05 B05
2012-12-172
17mb95sPower
CN2
12
34
56
78
910
1112
1314
1516
1718
1920
24V_VCC_AU
DIMMING
BACKLIGHT_ON/OFF
5V_STBY
3V3_STBY
5V_VCC5V_VCC
TP
89
12V_STBY
12V_STBY12V_STBY
U9
TPS54528
5
6
7
8
4
3
2
1 EN
VFB
VREG5
VSS
VIN
VBST
SSW
GND
3V3_VCC3V3_VCC
3V3_VCC 3V3_VCC
12V_STBY 12V_STBY
S824V_VCC_AU
S25
12V_STBY
CN3
12
34
56
78
910
1112
1314
1516
1718
1920
S32STBY_ON/OFF_NOT
STBY_ON/OFF
5V_VCC 5V_VCC
3V3_STBY
5V_STBY
BACKLIGHT_ON/OFFS33
DIMMING
24V_VCC_AU
7A/32VDC
FS4
TP
33
TP34
TP35
2k2
R35
TP
36
12V_STBYFS1
7A/32VDC
22k
R36
1kR41
1 2
R4410k1 2
1k2
R34
Q27
FD
C64
2P13
4 5 6
2
22k
R37
TP
37
TP3812V_VCC
DIMMING
BACKLIGHT_ON/OFF
Q6
BC848B
JK2
5
4
3
2
1
Q19BC848B
TP
48
TP
50TP51
FD
C64
2PQ
28
134 5 6
2
R96120k
C2422u
6V3
R16
75k
64k
7R
335
12
R652220R
R28947k
6V3
22u
C25
R288100R
10kR45
12
U21LM1117
1
23
4
VOUT
IN OUT
ADJ
FD
C64
2PQ
43
1 3456
2
R29022k
60RF11 2
3V3_VCC
R82
118
k
TP105
TP106
6V322u
C1229
TP108
1V5_DDR0
VDDC
10kR884
12
6V3
22u
C12
28
Q46BC848B
BC848B
Q47
R13
910
k1
2
3V3_VCC
TPS_ENABLE
TPS_ENABLE
R16410k1 2
10kR163
12
R772k2
5V_STBYR2843k912V_STBY
10kR176
1 2 STBY_ON/OFF
R28210k1 2 STBY_ON/OFF_NOT
Q44
FD
C64
2P1 3
456
2
10V220nC5
7A/32VDC
FS2S10
S15
R4610k 12
12V_VCC
MOSFET_CONTROL
CN8
6
5
4
3
2
1
L3 10u
12V_INV
12V_INV
1V2_VCC
C5V
6
D20
16V10u
C1187
C304u710V
U19TPS65251
12345678910
11
12
13
14
15
16
17
18
19
20
30292827262524232221
40
39
38
37
36
35
34
33
32
31GND_1
VIN_0
VIN_1
VIN_2
GND_2
LX3_0
LX3_1
VIN3
BST3
EN3
RLI
M2
SS
2
CO
MP
2
FB
2
LOW
_P
GN
D_0
PG
OO
D
V7V
V3V
AG
ND
EN2
BST2
VIN2
LX2_1
LX2_0
LX1_1
LX1_0
VIN1
BST
EN1
RLI
M1
SS
1
CM
P1
FB
1
RO
SC
SY
NC
FB
3
CM
P3
SS
3
RLI
M3
120kR644C472
4n750V
R64
620
k
50V
4n7
C47
3F
B3
10u16V
C488
FB
1R
647
20k
C475
50V4n7
R394100k
4n7
C47
7
50V
60R
F531 2
12V_VCCC205
47n16V
16V 10u
C1189
4u7
L40
22u
6V3
C12
10
S85
R822560R
R25
510
k
C47
8
4n7
50V
FB1
C12
12
22u
6V3
6V3
22u
C12
11
47n
C206
16V
16V10u
C1188
12V
_VC
C
1V5_VCC
S86
FB2
50V
4n7
C47
9
R65
17k
5
R101560R
R25
610
k
FB
2
R645120k
4n750V
C480
C48
1
4n7
50V
R64
820
k
R25
710
k
FB3
C48
3
4n7
50V
TP90
F58
60R12
12V_VCC
16V10u
C1190
4u7
L38
F59
60R
12
60R
F6012
C119110u
16V16V10uC463
12V_VCCC207
16V47n
R65
839
0k
S21
6P
RO
TE
CT
FD
C64
2PQ
29
134 5 6
2
R21
533
k1
2
12V_STBY
F63
60R1 2
C15110u10V
3V3_VCC
5V_VCC
5V_VCCS6 12
U5
APL5910
1
2
3
4 5
6
7
8GND
FB
VOUT
NCVCNTL
VIN
EN
POK
10V
C152
100n
MOSFET_CONTROLSTBY_ON/OFF_NOT
STBY_ON/OFF
S90
S91
2V5_VCC
6V322uC133
12V_STBY12V_VCC
10kR48
12
VFB
10kR49
12
16V1uC128
50V
8n2
C12
9
12V_VCC
22uC130
16V
C55
16V100n22u
16V
C13112V_STBY
60R
F31 2
60R
F41 2
100n16V
C92
PROTECTS81
60R
F71 2
F10
60R1 2
C119100n10V
1
2
6V3
22u
C12
13
5V_STBY 3V3_STBY
TP72 1
C12
14
22u
6V3
F14
60R1 2
BC848BQ21
47RR173
1 2
C13
4
25V
220n
21 33
kR
216
12
FD
C64
2PQ
32
134 5 6
2
C137
6V3220u
TP
52
MOSFET_CONTROLR4710k 12
5V_VCC
1kR42
5V_STBY
BC848BQ22
R17447R1 2
25V
C13
5
220n
21 R21
733
k1
2
5V_VCC
5V_STBY
22kR38
4k7R15
50V22pC139VFB
C13222u
6V3
R19710k1 23V3_STBY STBY_ON/OFF
STBY_ON/OFF_NOTQ11BC848B
F62
60R1 2
10u
L39
R19810k1 2
S5
16V10uC460
C46110u16V
6V3
22u
C12
09
C1206
50V4n7
4n750V
C1207
C1208
50V4n7
power_pin3
power_pin3
power_pin1
power_pin1
power cable
BTB
nc
ADAPTER SOCKET
12V_STBY
INVERTER SOCKET!
!
W_ADAPTER
3004
9469
1.1
3k
3V3_STBY
LDO2
LDO1
2V5_VCC
DC/DC4
DC/DC2
DC/DC3
! VIN2
VOUT2
VIN3
VOUT3
VOUT1
VIN1
DC/DC1
R2
12V_VCC4A
SW1
NC
SW2
0R
30069495 AP2111 ???
TPS54528
R1
5V_VCC
EN 32VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-2-6 B06, LVDS
19420_509_130312.eps130312
LVDSB06 B06
2012-12-172
17mb95sLVDS
10k
R28
31
2
CN
12123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
3V3_VCC
TX_2_3_PTX_2_3_N
TX_2_CLK_PTX_2_CLK_N
TX_2_2_P
MSD8WB9BXU4
AD23AC22AC23AE23AD24AE24AC24AD25AB24AC25AB23AB25
AA24AA25Y24
AA23W24Y23W23W25V24V25U24V23LVB0P
LVB0NLVB1PLVB1NLVB2PLVB2N
LVBCKPLVBCKN
LVB3PLVB3NLVB4PLVB4N
LVA0PLVA0NLVA1PLVA1NLVA2PLVA2N
LVACKPLVACKN
LVA3PLVA3NLVA4PLVA4N
6
TX_2_4_P
TX_2_2_N
TX_2_1_PTX_2_1_N
TX_2_0_PTX_2_0_N
TX_1_4_PTX_1_4_N
TX_1_3_PTX_1_3_N
TX_1_CLK_PTX_1_CLK_N
TX_1_2_PTX_1_2_N
TX_1_1_PTX_1_1_N
TX_1_0_PTX_1_0_N
PANEL_VCCOP
_PIN
42
OP
_PIN
42
TX
_2_C
LK_P
TX
_2_C
LK_N
TX
_2_2
_PT
X_2
_2_N
TX
_2_1
_NT
X_2
_1_P
TX
_2_0
_PT
X_2
_0_N
TX
_1_4
_N
TX
_2_4
_NT
X_2
_4_P
TX
_2_3
_NT
X_2
_3_P
TX
_1_4
_P
TX
_1_0
_NT
X_1
_0_P
TX
_1_1
_NT
X_1
_1_P
TX
_1_2
_NT
X_1
_2_P
TX
_1_C
LK_N
TX
_1_C
LK_P
TX
_1_3
_N
OP
_PIN
6O
P_P
IN5
TX
_1_3
_P
OP
_PIN
45O
P_P
IN44
OP
_PIN
41O
P_P
IN40
OP
_PIN
43
CN
11123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051
OP
_PIN
10
OP
_PIN
43
OP
_PIN
11
PANEL_VCC
OP
_PIN
9O
P_P
IN8
OP
_PIN
7
OP
_PIN
27
TX
_1_3
_P
TX
_1_3
_N
TX
_1_C
LK_P
TX
_1_C
LK_N
TX
_1_2
_P
TX
_1_2
_N
TX
_1_1
_P
TX
_1_1
_N
TX
_1_0
_P
TX
_1_0
_N
TX
_2_3
_P
TX
_2_3
_N
TX_2_4_N
TX
_2_0
_N
CN
13 FF
C
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
TX
_2_0
_P
TX
_2_1
_P
TX
_2_1
_N
TX
_2_2
_N
TX
_2_2
_P
TX
_2_C
LK_N
PA
NE
L_V
CC
TX
_2_C
LK_P
OP
_PIN
9
S2171 2
S2181 2 S2191
2
S2201
2 TX_2_4_NTX_2_4_P
TX_1_4_NTX_1_4_P
PANEL_VCC OP_PIN43R21833kR5010k1 2
S35 123D_EN
OP_PIN42
10kR78
1 2
PANEL_VCCR21933k
S391 2MEGA_DCR_IN
OP_PIN9R22033kPANEL_VCC
10kR79
1 2
OP_PIN9
10kR80
1 2
PANEL_VCC 33kR221
OP_PIN8
33kR235
PANEL_VCCR8110k1 2
OP_PIN7
10kR87
1 2
PANEL_VCC
OP_PIN6
10kR88
1 2
PANEL_VCC 33kR236
S40 12
33kR238
3D_EN
R8910k1 2
PANEL_VCC OP_PIN5
OP_PIN27
33kR239
10kR90
1 2
PANEL_VCC
33kR241
OP_PIN10
S411 2 OP_PIN44
OP_PIN41
OP_PIN40
12V_VCC
S421 2
OP_PIN45
S531 2
DIMMING
S541 2
12V_VCC
S551 2
12V_VCC
R9110k1 2
BACKLIGHT_ON/OFF
MEGA_DCR_OUT
R9210k1 2
33kR246
OP_PIN11R24833kPANEL_VCC
PANEL_VCC
S56 12
OP
_PIN
5
OP
_PIN
9
OP
_PIN
10
OP
_PIN
8
OP
_PIN
27
PA
NE
L_V
CC
TX
_1_0
_N
TX
_1_0
_P
OP
_PIN
11
TX
_1_1
_N
OP
_PIN
7
TX
_1_1
_P
TX
_1_2
_N
TX
_1_2
_P
TX
_1_C
LK_N
TX
_1_C
LK_P
TX
_1_3
_N
TX
_1_3
_P
CN
14 FF
C
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
FF
C
CN
16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30P
AN
EL_
VC
C
OP
_PIN
6
1n50V
C141
S571 2
R9310k 12
PANEL_VCC_ON/OFF
10k
R94
12
16V
100nC96
PANEL_VCC
60R
F161 2
R17547R1 2
C13
6
25V
220n
21 33
kR
249
12
33k
R25
31
2
Q33
FD
C64
2P13
4 5 6
2
TP
531
60R
F291 2
R9510k 12
5V_VCC
12V_VCC
BC848BQ23
1
2
3
Q24BC848B
1
2
3
60R
F301 2
TP57TP62
TP66TP67
TP68TP69
TP70TP71
TP73
TP74TP75TP76TP77TP78
TP79
TP80
TP81TP82
TP83TP84TP85TP86TP87
TX_2_4_PTX_2_4_N
TX_1_4_PTX_1_4_NTX_1_3_PTX_1_3_N
TX_2_0_NTX_2_0_PTX_2_1_NTX_2_1_PTX_2_2_NTX_2_2_P
TX_2_CLK_NTX_2_CLK_P
TX_2_3_NTX_2_3_P
TX_1_CLK_PTX_1_CLK_N
TX_1_2_PTX_1_2_NTX_1_1_PTX_1_1_NTX_1_0_PTX_1_0_N
3V3_VCC
16V
100n
C10
4
TP88
C140
16V100u
R254100R
1
2
3
45
6
7
8
R4
R1
R3
R2
C14210u16V
BC858BQ34
1
2
3
Q25BC848B
1
2
3
S58
MEGA_DCR_OUT
S60
MEGA_DCR_INS61
50V220p
C122
21
4k7R16
1 2
1kR43
12
R174k71 2
C123
220p50V
21
50V
C124
220p
21
3V3_VCC
DIMMING
BC848BQ26
1
2
3
BACKLIGHT_DIM
4k7R18
1 2
LVDS OUT
SAM BASED 30070519
FHD 50Hz 3D FFC
LG BASED 30070519
19" TO 22" DOUBLE LVDS FFC OPTIONS
10_BIT PANEL
OPTIONS TABLE
15.6"WXGA FFC
SAM
LG
NC
PANEL SUPPLY SWITCH
DIMMING
Circuit Diagrams and PWB Layouts EN 33VES2.2E LA 10.
2013-Mar-15 back to div. table
10-2-7 B07, Audio, Headphone
19420_510_130312.eps130312
Audio, HeadphoneB07 B07
2012-12-172
17mb95sAudio, Headphone
TP93 1
TP94 1
TP95 1
U35TAS5719
123456789101112
13
14
15
16
17
18
19
20
21
22
23
24
363534333231302928272625
48
47
46
45
44
43
42
41
40
39
38
37OUT_D
PGND_CD
OUT_C
BST_C
BST_B
OUT_B
PGND_AB
OUT_A
BST_A
PVDD_AB
HP_PWMR
HP_PWML
RE
SE
TN
ST
ES
T
DV
DD
DV
SS
GN
D
AG
ND
VR
EG
SS
TIM
ER
HP
_SD
GV
DD
_OU
T
PV
DD
_CD
BS
T_DSCL
SDA
SDIN
SCLK
LRCLK
PDN
VR_DIG
DVSSO
OSC_RES
MCLK
A_SEL
AVDD
VR
_AN
A
PLL
_FLT
P
PLL
_FLT
M
AV
SS
HP
VD
D
CP
P
CP
N
HP
VS
S
HP
R_I
N
HP
R_O
UT
HP
L_O
UT
HP
L_IN
L2 15u
R70322R
AMP_EN
DVD_SPDIF
1kR277
1 2
S4
15kR274
10k
R26
2
18k2R798
18RR801
R80218R
220R
R80
3
50V100nC240
Q41BC848B
R71
710
k
16V100u
C619L22
10u
C11
71
10u
10V
HP_ROUT_HP_R
HP_MUTE680RR266
Q42BC848B
220R
R80
4
10k
R26
3
CN15
1
2
3
4
F56 60R
F54 60R
F57 60R
A_OUT1A
A_OUT1B
A_OUT2B
A_OUT2A
35V
100uC563
VDD_AUDIO
10uC31
10V10V10uC54
680RR265
HP_MUTE
D23
1N41
48
HP_MUTE
D28
C5V
6
22RR709
VDD_AUDIO
R71022R
R28127k
22RR711
C59610u6V3
50V
22p
C61
4
C61
5
22p
50V
50V
22p
C61
6
C61
7
22p
50V
C1201
1u6V3
C59
410
0n50
V
C613
1u50V
C59510u6V3
6V310uC597
50V560pC598
50V1nC547
A_OUT2B
A_OUT2A
A_OUT1B
A_OUT1A
R204k7
MAIN_L
C13
10V100n
1
2
AM
P_E
N
VDD_AUDIO
U3 PT2333
A1
A2
A3
B1
B2
B3
C1
C2
C3
OU
TP
SD
B
INN
GN
DB
VD
D1
VD
DA
OU
TN
GN
DA
INP
MAIN_R
AM
P_E
N
VDD_AUDIO
F55 60R
24V_VCC_AUD18
SK24
S1
R214k7
100n
C1610V
1
2
S212V_VCC
S35V_VCC
PT2333U12
A1
A2
A3
B1
B2
B3
C1
C2
C3
OU
TP
SD
B
INN
GN
DB
VD
D1
VD
DA
OU
TN
GN
DA
INP
220n 10
V
C11
1R
264k
74k
7R
225
220n 10
V
C11
6
C118
220n10V
10V
C125
220n
U16
DRV632
8
9
10
11
12
13
14
7
6
5
4
3
2
1 INR_P
INR_N
OUTR
GND
MUTE
VSS
CN
INL_P
INL_N
OUTL
UVP
GND1
VDD
CP
3V3_VCC
SC_R_OUT SC_L_OUT
60R
F2
10uC7
10uC8
50V47p
C145
10u
C947p 50V
C146
R27
83k
3
C147
50V180p
C17
1u
1u16V
C18
30kR279R280
30kSC_AUD_R_OUT
10kR271
1 2
SC_AUD_L_OUT
C19
16V 1u
16V100u
C618
15kR275
16V1u
C2347k
R26847k
R269180p
50V
C148
47kR270
C586
2u2
C587
2u2
SC_AUD_L_INSC_AUD_R_IN
SC_R_OUT SC_AUD_R_OUT
SC_L_OUT SC_AUD_L_OUT
8k2
R70
7
5k6R653
DSP_SC_L_OUTDSP_SC_R_OUT
C548
50V1n
50V1u
C612
SC_L_OUTDSP_SC_L_OUT
SC_R_OUT
R70
88k
2
DSP_SC_R_OUT
16V1uC1202
R6545k6
1n50V
C549
R19910k 12
R6555k6
50V220p
C520
LINE_R_IN
LIN
E_R
_IN
SC
_AU
D_R
_OU
T
LIN
E_L
_IN
LINE_L_IN 50V220p
C521R6565k6
SC
_AU
D_L
_OU
T
R20010k 12
R80018R
DSP_MAIN_R_OUTDSP_MAIN_L_OUT
S28
DSP_MAIN_R_OUT
R60
720
0k
50V3n3C453
DSP_MAIN_L_OUTS29
MAIN_L
S30S31
C4543n350V 20
0kR
608
MAIN_R
R349100R
C590
2u22u2
C591
SAV_R_INSAV_L_IN
C599560p50V
330p50V
C501
SAV_R_IN
SAV_L_IN
50V330pC502
R20110k
SAV_AUD_L_INR20210k
SAV_AUD_R_IN
R39
712
k
12k
R39
8
JK1
7
6
5
4
3
2
1
C20910u
10V100n
10V
C53C5541u50V
4u7C27
10V
60RF28
AUBCK_OUT
3V3_VCCR1454k7
L13 15u
L11 15u
50V
1uC55
5C
556
1u 50V
50V
1uC
557
OUT_HP_L
MSD8WB9BXU4
B9C10C9
B10
D9D8C8
E5E6
AE9AC10AD9
AE11AD11AD10AC11AE12AC12
Y10AA9
AB9AA10
Y9Y8
AC9AE8
AB11AA11AA12Y12LINEIN_L0
LINEIN_R0LINEIN_L2LINEIN_R2LINEIN_L3LINEIN_R3LINEIN_L4LINEIN_R4LINEIN_L5LINEIN_R5
EAR_OUTLEAR_OUTR
LINEOUT_L0LINEOUT_R0LINEOUT_L2LINEOUT_R2LINEOUT_L3LINEOUT_R3
AUVRPAUVAGAUVRM
SPDIF_INSPDIF_OUT
I2S_IN_BCKI2S_IN_SDI2S_IN_WS
I2S_OUT_BCKI2S_OUT_MCK
I2S_OUT_WSI2S_OUT_SD
7
16V100nC241
AUDIO_AVDD
18RR799
C242100n16V10V
4u7C28
AMP_EN
C12
171u 50
V
3V3_VCC AUDIO_AVDDF71
330R C243100n16V
AU
DIO
_AV
DD
AUDIO_DVDD
AU
DIO
_DV
DD16V
100nC244
3V3_VCC60R
F8
C245100n16V
EXT_RESET
C5372n250V
4k7R146
VD
D_A
UD
IO
C60433n50V C608
330p50V
15uL12
50V
1uC
558
R_AUDIO_N
L_AUDIO_N
L_AUDIO_P
R_AUDIO_N
R_AUDIO_P
C609
330p50V
R_AUDIO_P
C60533n
33nC60650V
330p
C610L_AUDIO_N
L_AUDIO_PC611
330p50V
C607
33n 50V
VDD_AUDIO
C180
16V47n
C466
4n750V
R695470k
C467
50V4n7C181
47n16V
R696470k
I2S_OUT_SD
I2S_OUT_BCKI2S_OUT_MCKI2S_OUT_WS
100RR350
R351100R
SYS_SCL
SYS_SDA
I2S_OUT_MCK
I2S_OUT_SD
I2S_OUT_WSI2S_OUT_BCK
TP
8
HP_L
10k
R20
51
2
R26410k 12
HP_DETECTR1474k7 1 3V3_VCC
HP_R
R3291k
OUT_HP_R
OUT_HP_L HP_L
C11
70
10u
10V
L21
10u
16V10nC1227
10k
R20
61
2
S361 2
R20
710
k1
2
S371 2
Q12BC848BAMP_MUTE
R20
810
k1
2
AMP_EN
R20910k 12
D1
1N41
48
5V_VCC
C888100n
10V
10k
R21
01
2
R39
310
0k1
2
S381 2
VD
D_A
UD
IO
12V_VCC 16V100u
C546
12
15k
R71
81
2
3k9
R57
31
2
10kR211
1 2
3V3_
VC
C
3V3_
ST
BY
10k
R21
2
R21
310
k
3V3_VCC
BC848BQ13
BC858BQ37
AMP_EN
SPDIF_OUT
C561100u
35V
TP175 1
TP176 1
TP177 1
TP178 1
50V
1uC
1218
C12
191u 50
V50
V1uC
1220
C122610n16V
6V31u
C1200
AUDIO AMP for >=26"
2w5 30069845
AUDIO AMP for <=24"
CLOSE TO PIN46CLOSE TO PIN35
RIGHT
I2C Address**pin A_SEL=Low0x54
I2C Address**pin A_SEL=High0x56
LEFT
NC
OPTINAL FOR LINE_OUT
8W 30067972
CLOSE TO MSTAR IC
ADRES SECIMI
HEADPHONE OUTPUT
Layoutta ust ustte yerlestirilecek...
POP NOISE CIRCUIT
NCNC
EN 34VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-2-8 B08, MST supply, keyboard
19420_511_130313.eps130313
MST supply, keyboardB08 B08
2012-12-172
17mb95sMST supply, keyboard
CN
26 654321
S7 12C5V6
D3512
6V3220uC11
TP102TP103
TP
104
R27
215
0R
D16
3
C5V
6
C5V6
D164C
5V6
D16
5
D16
6
C5V
6
C5V
6
D16
7
PWM1AUBCK_OUT I2S_OUT_MCKPWM_OUT_LED3
3V3_
VC
C
4k7
R13
81
2
R13
64k
71
2
4k7
R13
51
2
4k7
R13
31
2
R13
24k
71
2
4k7
R13
11
2
D34
C5V6
12
Q9BC848B
1
2
3
5V_VCCR1154k7 12
C239
16V100n
3D_ENABLE100RR346
4k7R117
12
4k7R118
12
S263V3_VCC 3D_EN
KEYBOARD_ONBOARD
S223V3_STBY
F140
1k
C630
10V100n
1
2
F139
1k
C5V
6
D16
21
2
47RR793
1 2
1k
F138
1k
F137TOUCHPAD_SCL
TOUCHPAD_SDA
KEYBOARD
TP
6
TP
5
TP
4
TP
3
R18
210
k
470R
R70
6R
701
2k
D17
C5V
6
12
TP2 KEYBOARD_ONBOARD
SW1
4 3 C T 2 1
E2
G4
G3
G2
G1
E1
KEYBOARD
C399220u6V3
PWM0
VDDCC56
10V100n
C57100n10V
100n10V
C5810u6V3
C441
F31
60R1V2_VCC
C40022u6V3
VDDC
F32
60R
60R
F33
VDDC
10V
C63100n
F34
60R2V5_VCC ADC2P5
10V
C64100n
AD
C2P
5
AVDD25_PGA2V5_VCC
10V100nC6560R
F35
60R
F36PGA_VCOM
10V100nC66
2V5_VCC60R
F37AVDD25_REF
6V310uC442
2V5_VCC60R
F38AVDD25_LAN
10V100nC67
AV
DD
25_R
EF
AV
DD
25_L
AN AVDD_MOD
100n10V
C682V5_VCC
60R
F393V3_VCC
F40
60R
AV
DD
_MO
D
AV
DD
25_P
GA
PG
A_V
CO
M
F41
60R3V3_STBY
10u6V3
C443AVDD_DVI
10V100nC69 C70
100n10V
AVDD_DMPLL
100n10V
C71
F42
60R3V3_STBY
AVDD_MPLLC72
10V100n
60R
F433V3_STBY
3V3_STBYF44
60R C73100n10V
AVDD_NODIEAVDD_EAR333V3_STBY60R
F45
10V100nC74
C75100n10V
60R
F463V3_STBY AU33
AV
DD
_NO
DIE
AV
DD
_DV
I
AV
DD
_MP
LLA
VD
D_D
MP
LL
MS
D8W
B9B
XU
4
W15
W13
W10
V18
V17
V15
V14
V12
V11
V10V9
U17
U16
U15
U14
U13
U12
U11
U10U9
U8
U7
T18
T17
T16
T15
T14
T13
T12
T11T9
T8
R18
R17
R13
R12
R11R9
R8
P18
P17
P16
P13
P12
P11P9
P8
P7
N22
N21
N20
N19
N17
N16
N15
N14
N13
N11
N10
M25
M22
M21
M20
M18
M16
M15
M11
M10M9
L19
L18
L14
L13
L12
L9K22
K19
K18
K14
K13K9
J25
J19
J18
J16
J15
J14
J13
J12
J11
J10
J9J8J7J5H19
H18
H17
H16
H15
H14
H13
H12
H11
H10H8
G24
G19
G18
G17
G14
G13
G12
G11
G10
G8
F19
F18
F17F8
E22
E19
E18
E17E8
D19
D18
D14
C23
C22
C19
C11
B17
A23A5
E9
M17
L17
L16
K17
L15
K16
K15
J17
V19
W18
W17
T19
R19R7
T7
M19P6
M8
L7K7
N7
W12
W11
W16
V16
W14
W9
W8
W7
V8
M14
L11
P19
R16
P10
T10
R15
R14
R10
P15
P14
N12
M13
M12
L10
K11
K10H9
G9
K12
AV
DD
LV_U
SB
VD
DC
_0V
DD
C_1
VD
DC
_2V
DD
C_3
VD
DC
_4V
DD
C_5
VD
DC
_6V
DD
C_7
VD
DC
_8V
DD
C_9
VD
DC
_10
VD
DC
_11
VD
DC
_12
VD
DC
_13
AV
DD
12
AV
DD
L_M
OD
FB
_CO
RE
AV
DD
_LA
N12
DV
DD
_DD
R
AV
DD
_AD
C25
_0A
VD
D_A
DC
25_1
AV
DD
_AD
C25
_2A
VD
D_R
EF
25
AV
DD
_LA
N25
AV
DD
_MO
D_0
AV
DD
_MO
D_1
AV
DD
_PG
A25
PG
A_C
OM
AV
DD
_ALI
VE
AV
DD
_DV
I_U
SB
_0A
VD
D_D
VI_
US
B_1
AV
DD
_MP
LLA
VD
D_D
MP
LL
BY
PA
SS
AV
DD
_AU
33A
VD
D_E
AR
33
VD
DP
_0V
DD
P_1
AV
DD
_LP
LL_0
AV
DD
_LP
LL_1
VD
DP
_2
AV
DD
_DD
R0_
0A
VD
D_D
DR
0_1
AV
DD
_DD
R0_
2A
VD
D_D
DR
0_3
AV
DD
_DD
R1_
0A
VD
D_D
DR
1_1
AV
DD
_DD
R1_
2A
VD
D_D
DR
1_3
TE
ST
2
GN
D_0
GN
D_1
GN
D_2
GN
D_3
GN
D_4
GN
D_5
GN
D_6
GN
D_7
GN
D_8
GN
D_9
GN
D_1
0G
ND
_11
GN
D_1
2G
ND
_13
GN
D_1
4G
ND
_15
GN
D_1
6G
ND
_17
GN
D_1
8G
ND
_19
GN
D_2
0G
ND
_21
GN
D_2
2G
ND
_23
GN
D_2
4G
ND
_25
GN
D_2
6G
ND
_27
GN
D_2
8G
ND
_29
GN
D_3
0G
ND
_31
GN
D_3
2G
ND
_33
GN
D_3
4G
ND
_35
GN
D_3
6G
ND
_37
GN
D_3
8G
ND
_39
GN
D_4
0G
ND
_41
GN
D_4
2G
ND
_43
GN
D_4
4G
ND
_45
GN
D_4
6G
ND
_47
GN
D_4
8G
ND
_49
GN
D_5
0G
ND
_51
GN
D_5
2G
ND
_53
GN
D_5
4G
ND
_55
GN
D_5
6G
ND
_57
GN
D_5
8G
ND
_59
GN
D_6
0G
ND
_61
GN
D_6
2G
ND
_63
GN
D_6
4G
ND
_65
GN
D_6
6G
ND
_67
GN
D_6
8G
ND
_69
GN
D_7
0G
ND
_71
GN
D_7
2G
ND
_73
GN
D_7
4G
ND
_75
GN
D_7
6G
ND
_77
GN
D_7
8G
ND
_79
GN
D_8
0G
ND
_81
GN
D_8
2G
ND
_83
GN
D_8
4G
ND
_85
GN
D_8
6G
ND
_87
GN
D_8
8G
ND
_89
GN
D_9
0G
ND
_91
GN
D_9
2G
ND
_93
GN
D_9
4G
ND
_95
GN
D_9
6G
ND
_97
GN
D_9
8G
ND
_99
GN
D_1
00G
ND
_101
GN
D_1
02G
ND
_103
GN
D_1
04G
ND
_105
GN
D_1
06G
ND
_107
GN
D_1
08G
ND
_109
GN
D_1
10G
ND
_111
GN
D_1
12G
ND
_113
GN
D_1
14G
ND
_115
GN
D_1
16G
ND
_117
GN
D_1
18G
ND
_119
GN
D_1
20G
ND
_121
GN
D_1
22G
ND
_123
GN
D_1
24G
ND
_125
GN
D_1
26G
ND
_127
GN
D_1
28G
ND
_129
GN
D_1
30G
ND
_131
GN
D_1
32G
ND
_133
GN
D_1
34
2
16V1uC1203
AU
33A
VD
D_E
AR
33
VDD33
10V
C76100n
10V100nC7760R
F473V3_VCC
C44
5
22u
6V3
3V3_VCCF48
60RAVDD_LPLL
C78100n10V 10V
100nC79
VD
D33
AV
DD
_LP
LL
VD
D33
C446
6V310u
AVDD_DDR0C80
10V100n
C81100n10V
F49
60R
1V5_VCC
AVDD_DDR0
10V100nC82
6V322uC401
10V100nC83
100nC84
10V
C85100n10V
10u6V3
C447 C86100n10V10V
100nC87 C88
100n10V
C89100n10V
C90
10V100n
C91100n10V
AV
DD
_DD
R0
R22
210
k1
2
2V5_
VC
C
3V3_STBY
S45
12 S46
12
Q16BC848B
1
2
3
R22410k1 2
IR_IN
1k
F143
Q1BC848B
1
2
3
C419
27p 50V21
10kR226
1 2
27p
50V
C42
0 21
10kR227
1 2
BC848BQ17
1
2
3
1k
F144
F146
1k5V_STBY
PWM_OUT_LED3
CN
27 1 2 3 4 5
LED
1
BC848BQ18
1
2
3
10k
R22
81
2
S481 2
S491 2
R71
922
0R1
222
0RR
720
12
1k
F147
Q38
BC858B1
2
3
Q39BC858B 1
2
3
R72
122
0R1
2
3V3_STBY
5V_STBY
R22
910
k1
2
LED2
R72
222
0R1
2
CN
1
1 2 3 4 5 6 7 8 9 10 11 12
TO
UC
HP
AD
_SC
L
TO
UC
HP
AD
_SD
AT
P12
S50
12
S51
12
TP
13
TP
181
1
TP
182
1
TP
183
1
TP
184
1
30067087
NC
MAGIC BUTTON
KEYBOARDTOUCH_PAD_OPTION
+ -
SO
UR
CE
nc
MSTAR BOOT CONFIG
NC
LED&VFD&RF
Circuit Diagrams and PWB Layouts EN 35VES2.2E LA 10.
2013-Mar-15 back to div. table
10-2-9 B09, Audio/video I/O, DVD
19420_512_130313.eps130313
Audio/video I/O, DVDB09 B09
2012-12-172
17mb95sAudio/video I/O, DVD
IR1
1
2
3VIN
VCC
GND
GS1
GS2
IR_IN
12V_VCC
TP
101
4A/24VDC
FS31 2
DVD_WAKEUP
100RR28
1 2
GS3
JK15
2
7
4
6
3
5
1
GS4
5V_VCC
GS5
DVD_SPDIF
DVD_SENSE
DVD_CVBS
F9
60R5V_VCC
10u10V
C328
SP
DIF
_CO
AX
SPDIF_COAX
D32
BA
V70
Q15BC848B
1
2
3
C514
330p50V
SAV_AUD_R_IN
50V
C513
330pSAV_AUD_L_IN
TP
401
TP
411
S106
BC848BQ14
1
2
3
C52
3
220p 50
V
21
R14
94k
71
2
10V100n
C94
2 1
10V
C93100n2 1
1kR330
12
4k7
R14
81
2
S44 12
50V220p
C522
2 1
S43
JK31
23
TP9
R22310kAMP_MUTE
R69310k 12
SPDIF_OUTR352100R 12
TP11
TP27
TP28
TP
391
180RR177
75RR203
S211 2
D13
C5V
6
4A/24VDC
FS51 2
CN7
109
87
65
43
21
16V
C2610u
R6
4k7
12
R27100R1 2
100n
10V
C12
021
R29
47k
12
TP29
TP30
Q3BC848B
1
2
3
TP31
DVD_IR
DVD_IR_ON/OFF4k
7R
71
2
4k7R9
12 3V3_VCC
C12
6
50V
27p
21
DVD_IR
50V
C121
220p
R72322k
R7254k7
C601560p50V
1k
F154
C5V
6
D15
1k
F163
F161
1k
1k
F162
50V560pC600
1k
F157
SC
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
SC
AR
T L
T1
1k
F148
SCART_AUD_R_IN
SCART_AUD_L_IN
SCART_AUD_L_IN
SCART_AUD_R_IN
SC_CVBS_IN
R353100R1 2
R354100R1 2
C95
10V100n
2 150V
33p
C381
75RR530
12
SC_FB
C503330p50V
330pC504
50V
SC_B
50V33p
C382
SC_R
SC_G
SC_CVBS_IN
R37347R 12
50V33pC383
75RR531
12
SC_PIN8
50V33p
C384
SC_CVBS_OUT
SC_AUD_L_OUT
75RR532
12
D29
CD
A4C
16G
TH 8765
4 3 2 1
SC_AUD_R_OUT
C385
50V33p
C468
50V4n7
50V
C386
33p
JK4
12
3
4YEL
WHT
RED
75R
R53
31
2
R53475R1 2
75RR535
12
75RR538
12
UART-TX-SC
UART-RX-SC
TP141
TP151
CD
A4C
16G
TH
D4
87654 3 2 1
4n7
C469
50V
TP161
TP171
TP181TP191
TP201
TP211
TP221
TP231
TP241
TP251
TP261
1k
F160
1k
F150
BC858BQ40
12V_VCC
68RR416
10u10V
C211CVBS0_OUT
390R
R72
8
R61
833
k
SC_CVBS_OUT
68k
R73
0
100RR794
R61
933
k
220RR419
16V
C85410u
100R
R35
5
100p50V
C809
CN29
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CD
A4C
16G
TH
D6
8 7 6 54321
R81810k
C11
78
10V
100n
21
BC848BQ20
5V_VCC
PC_DET
BA
V70
D17
0
510RR569
D7
NU
P40
04M
51
2
3 4 5R
230
10k
12
VGA_G
VGA_R
VGA_B
100n10V
C97
1
2
VGA_DDC_5V
TP43 1
10k
R23
11
2
ST24LC21
U341
2
3
45
6
7
8 VCC
WP
SCL
SDA GND
A2
A1
A0
10k
R23
21
2
VGA_DDC_5V
TP
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SC_AUD_R_IN
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SCART_AUD_L_INR23310k
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OPTIONAL
!
DVD CONNECTION
YPBPR INPUT
30069137
GASGET POSITIONS
SCART 1
INDIA OPTION
VGA INPUT
SCART AUDIO FILTER
SLIM SIDE AV
EN 36VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10-2-10 Layout top
19420_513_130313.eps130313
2010-11-222
17mb95sSSB Layout Top
R182
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Circuit Diagrams and PWB Layouts EN 37VES2.2E LA 10.
2013-Mar-15 back to div. table
10-2-11 Layout bottom
19420_514_130313.eps130313
2010-11-222
17mb95sSSB Layout Bottom
TP66
TP49
TP10
TP90
TP13
TP20
TP182
TP76
TP25
GS1
TP24
TP84
TP181
TP58
TP48
TP105
TP83
TP32
TP61
GS4
TP115
TP110
GS2
TP113
TP50
TP183
TP80
TP30
TP104
TP23
GS5
TP54
TP94
TP78
TP77
TP45
TP29
TP97
TP67
TP209
TP106
TP3
TP176
TP28
TP22TP
87
TP52
TP34
TP117
TP102TP
93
TP109
TP46
TP11
TP26
TP86
TP70
TP92
TP4
TP71
TP74
TP44
TP43
TP98
TP33
TP85
TP35
TP42
TP178
TP112
TP53 TP
12
TP210
TP81
TP69
TP37
TP40
TP114
TP21
TP41TP7
TP8
TP63
TP64
TP101
TP89
TP91
TP9
TP38
TP177
TP14
TP36
TP5
TP55
TP15
TP73
TP96
TP18
TP59
TP82
TP99
TP75
TP175
TP51
TP111
TP79
TP57
TP62
TP19
TP184
TP6
TP211
TP116
TP72
TP39
TP108
TP56
TP100
TP27
TP68
TP2
TP103
GS3
TP17
TP88
TP60
TP95
TP16
TP47
TP31
GF1
GF2
1
EN 38VES2.2E LA 10.Circuit Diagrams and PWB Layouts
2013-Mar-15 back to div. table
10.3 J 17LD141-2 IR/LED10-3-1 IR/LED
19420_515_130314.eps130314
LED/IRJ J
2012-03-052
17LD141-2LED/IR
IR
_T
SO
P5
82
3M
D1
1
OU
T
2
GN
D
3VS
1u
C1
1u
C3
1u
C2
PL2
1
2
3
4
5
50V
100n
C4
100RR1
22RR2
43
00
3C
BV
1D
50V
100n
C6
50V
100n
C5
220R
R4
Styling Sheets EN 39VES2.2E LA 11.
2013-Mar-15 back to div. table
11. Styling Sheets
11.1 3000 series 32"
19420_800_130314.eps130314
3000 series 32"
Pos No. Description Remarks
M1 LCD panel M2 SSB (Small Signal Board) M3 PSU (Power Supply Unit) M5 Loudspeaker M6 IR Board M8 Front Cabinet M9 Back Cabinet M10 Remote Control Not displayedM11 Detachable AC Cord Not displayedM12 Stand (Neck)M14 Stand (Base)
FOR ELECTRICAL PARTS/ASSEMBLIES SEE WIRING DIAGRAM CHAPTER 9
M1
M2
M3
M9
M5
M14
M12
M8
M6