Compal La-5891p r1.0 Schematics

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Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

NEW70 M/B LA-5891P Schematic 1.0Cover Page

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1 59Friday, January 08, 2010

2009/08/01 2010/08/01Compal Electronics, Inc.

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Intel Arrandale Processor with DDRIII + Ibex Peak-MNEW50/70/80/90 M/B Schematics Document

REV:1.0

Compal Confidential

2010-01-07

ATI Madision/Park

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NEW70 M/B LA-5891P Schematic 1.0Block Diagrams

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TI TPS6017

USB port 8USB port 11 USB port 9

USB port 12,13

page 5

CPU XDP

page 21

PCH XDP

PCI-E 2.0x16 5GT/s PER LANE100MHz

100MHz

133/120/100/96/14.318MHZ to PCH

33MHz

100MHz

133MHz

LS-5891P

LS-5893P

100MHz1GB/s x4

DMI x4

100MHz

FDI x8

page 41

port 2 port 1

LVDS Conn.page 29

CRT Conn.page 30

HDMI(UMA)

LVDS(DIS)HDMI(DIS)

Madision/Parkpage22,23,24,25,26,27,28

PEG(DIS)

CRT(DIS)

Sub-board

page 38

page 36

page 13

SPISATA x 6 (GEN1 1.5GT/S ,GEN2 3GT/S)

Model Name : NEW50/70/80/90

RTC CKT.page 15

3.3V 24MHz

LAN(GbE)BCM57780

page 33

MINI Card x2

CMOS Camera

WLAN, WWAN

PCI-Express x 8 (ARD PCIE2.0 2.5GT/s)

Dual Channel

2.7GT/s

Power On/Off CKT.

File Name : LA5891P

Touch Pad

LPC BUS

page 40

Processor

Compal Confidential

page 41

Int.KBD

page 38

BANK 0, 1, 2, 3

USB conn x3

ALC272X

(UMA)

DC/DC Interface CKT.

Arrandale (UMA/DIS)

3.3V 48MHz

RJ45

Clock GeneratorIDT: 9LVS3199AKLFTRealtek: RTM890N-631-VB-GRT

page 37

Fan Control

Power Circuit DC/DC

page 34

204pin DDRIII-SO-DIMM X2

page 38

Intel

BIOS ROM

1.5V DDRIII 800/1066

page 38

HDA Codec

page 12

Memory BUS(DDRIII)

PCH

HD Audio

page 38

page 4,5,6,7,8,9

Ibex Peak-M

page 10,11

page 38

ENE KB926

Audio AMP

page 34

page 35

USB port 1

page 36page 36 page 29

rPGA988A

Intel

page 31

HDMI Conn.

Bluetooth Conn

port 1SATA CDROM Conn. page 32

SPI ROM x1

page 41

page 40~48

CRT(UMA)LVDS(UMA)

TMDS(UMA)

USBx14

page 13,14,15,1617,18,19,20,21

HDMILevel Shift

page 31

Card ReaderRTS5160

page 36

port 0

page 32

SATA HDDConn.

LS-5892P

Power/B

page 36

Card ReaderUSB Port9

USB/B 2PortUSB Port0,2

Int. Speaker Phone Jack x 2

USB port 0, 2 onUSB/B

LS-5895P3GUSB Port10,13page 35

LS-5894PLID_SW/B

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NEW70 M/B LA-5891P Schematic 1.0Notes List

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USB 2.0 USB 1.1 Port3 ExternalUSB Port

USB Port (Left Side)

Camera

USB/B (Right Side)

Blue Tooth

0123456789

10111213

UHCI0

UHCI1

UHCI2

UHCI3

UHCI4

UHCI5

UHCI6

EHCI1

EHCI2

USB Port Table

HDMI@

1101 0010b

ON OFF OFF

Board ID / SKU ID Table for AD channel+0.75VS +0.75VP to +0.75VS switched power rail for DDR terminator

+RTCVCC RTC power

+1.5VS

+1.8VS (+5VALW or +3VALW) to 1.8V switched power rail to PCH & GPU

+3VS+5VALW

+3VALW +3VALW always on power rail

+VSB +VSBP to +VSB always on power rail for sequence control ON ON*ONON

ONON

BOARD ID Table

EC SM Bus1 addressDevice

OFF

DDR DIMM0 1001 000XbDDR DIMM2 1001 010Xb

+1.5V to +1.5VS switched power rail

+CPU_CORE

STATESIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re

Board ID Rb / Rd / Rf V min0123

08.2K +/- 5%

0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V

0.503 V0.819 V

0.538 V0.875 V

AD_BID V typAD_BID VAD_BID max

18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%

3.300 V

0 V 0 V

4567 NC

1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V

2.200 V3.300 V

2.341 V

1.185 V 1.264 V

Board ID01234567

PCB Revision0.1

PCH SM Bus addressDevice

Clock Generator (9LVS3199AKLFT,RTM890N-631-VB-GRT)

Address

Address Address

Voltage Rails

VIN

B+

+1.05VS_VTT

Adapter power supply (19V)

AC or battery power rail for power circuit.Core voltage for CPU

+1.05VS_VTTP to +1.05VS_VTT switched power rail for ARD CPU

ONOFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

ON

ONON ON*

OFF

OFF

0.2

BTO Option Table

Unpop

BTO Item BOM Structure

ON

ON

ON

ON

ON

ON

ON ON

ON

ON

ON

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

LOW

LOW LOW LOW LOW

LOWLOWLOW

LOW

LOW

LOW

HIGH HIGH HIGH HIGH

HIGHHIGHHIGH

HIGH

HIGH

HIGH

ON ON*

ON OFF OFF

+3V+3V_LAN

+3VALW to +3V power rail for PCH (Short Jumper)+3VALW to +3V_LAN power rail for LAN

ON ONON ON

S1

+5V

S3 S5

ONON

ON ON

OFF

N/A N/A N/A

N/AN/AN/A

Power Plane Description

EC SM Bus2 addressDevice

Smart Battery

OFFOFF

+1.5VP to +1.5V power rail for DDRIII ON ON OFF

0.31.0

0001 011X b

VRAM

UMA & DIS POP HDMI

ON*

OFF

UMA@UMA

DIS@Discrete

Blue Tooth BT@

Connector CONN@

Discrete HDMI VGAHD@

3G@3G

@

BOM Config

Discrete W/ HDMI SKU:

UMA W/ HDMI SKU: UMA W/O HDMI SKU:

USB/B (Right Side)

Card Reader

Mini Card(WLAN)Mini Card(GPS)

+1.5V

+1.0VSDGPU +1.0VSPDGPU to +1.0VSDGPU switched power rail for GPUON OFF OFF

+1.05VS_PCH +1.05VS_VTT to +1.05VS_PCH power for PCHON OFF OFF

UMA HDMI UMAHD@

BT@/3G@/UMA@/UMAO@/HDMI@/UMAHD@

BT@/3G@/DIS@/DISO@/VGA@/HDMI@/VGAHD@

BT@/3G@/UMA@/UMAO@

+VGA_CORE

ON OFF OFF

Core voltage for GPU+VGFX_CORE Core voltage for Arrandale GPU (only for arrandaleCPU) ON OFF OFF

BATT+ Battery power supply (12.6V) N/A N/A N/A

+1.5VSDGPU +1.5VS to +1.5VSDGPU switched power rail for GPU ON OFF OFF

+3VALW_EC +3VALW always to KBC ON ON ON*

ON*+3VALW to +3VS power rail +5VALWP to +5VALW power rail +5VALW to +5V switched power rail for PCH (Short resister)

+5VS +5VALW to +5VS switched power rail OFFON OFFON*

Switchable W HDMI SKU: BT@/3G@/DIS@/UMA@/VGA@/SG@/HDMI@/VGAHD@

Discrete W/O HDMI SKU: BT@/3G@/DIS@/DISO@/VGA@

Discrete Only

UMAO@UMA Only

DISO@

Switchable SG@

X761@:X762@:

X76@

VRAM P/N : Samsung : SA000035700 (S IC D3 64MX16 K4W1G1646E-HC12 FBGA 96P)Hynix : SA000032400 (S IC D3 64MX16 H5TQ1G63BFR-12C FBGA 1.5V )AMD: SA00003PF20 (S IC D3 23EY2387MB-12)

VRAM

Samsung 0

LocationVRAM_ID3

HYNIX 1

VRAM BOM ConfigR492

R491

X763@:X764@:

Park Samsung 512MBPark Hynix 512MBMadision Samsung 1024MBMadision Hynix 1024MB

GPU MadisionGPU Park

MADI@PARK@

GPU BOM ConfigMadision SKU:Park SKU:

MADI@PARK@

X76198BOL01X76198BOL02X76198BOL03X76198BOL04

R482

R483

VRAM

8PCS 0

LocationVRAM_ID2

4PCS 1

ID3 , ID1 : VRAM Vender ID2: VRAM Size

64Mx16

64Mx16

VRAM_ID1

0

0

R474

R473

R474

11 R491AMDSIM Card

X765@: Park AMD 512MBX76198BOL05X766@: Madision AMD 1024MBX76198BOL06

X X X X X

UMAVGA

V V XX

XVVX

UMAHD@ VGAHD@ HDMI@ @Option SG@XXVSG V V XX

NO HDMI

3G & BT Config3G SKU: 3G@BT SKU: BT@

BT@/3G@/DIS@/UMA@/VGA@/SG@Switchable W/O HDMI SKU:

LED BOM configNEW70,80 SKU: 7080@NEW50,90 SKU: 5090@

X76@VGA@GPU ALL Components

NEW70,80 LEDNEW50,90 LED

7080@5090@

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PEG_IRCOMP

EXP_RBIASDMI_PTX_HRX_N0

H_FDI_TXP0H_FDI_TXP1H_FDI_TXP2H_FDI_TXP3H_FDI_TXP4H_FDI_TXP5H_FDI_TXP6H_FDI_TXP7

H_FDI_TXN0H_FDI_TXN1H_FDI_TXN2H_FDI_TXN3H_FDI_TXN4H_FDI_TXN5H_FDI_TXN6H_FDI_TXN7

DMI_PTX_HRX_N1DMI_PTX_HRX_N2DMI_PTX_HRX_N3

DMI_PTX_HRX_P0DMI_PTX_HRX_P1

DMI_PTX_HRX_P3DMI_PTX_HRX_P2

DMI_HTX_PRX_N0DMI_HTX_PRX_N1

DMI_HTX_PRX_N3DMI_HTX_PRX_N2

DMI_HTX_PRX_P0DMI_HTX_PRX_P1

DMI_HTX_PRX_P3DMI_HTX_PRX_P2

PEG_GTX_C_HRX_N10PEG_GTX_C_HRX_N9PEG_GTX_C_HRX_N8PEG_GTX_C_HRX_N7PEG_GTX_C_HRX_N6PEG_GTX_C_HRX_N5PEG_GTX_C_HRX_N4PEG_GTX_C_HRX_N3PEG_GTX_C_HRX_N2PEG_GTX_C_HRX_N1PEG_GTX_C_HRX_N0

PEG_GTX_C_HRX_P15PEG_GTX_C_HRX_P14PEG_GTX_C_HRX_P13PEG_GTX_C_HRX_P12PEG_GTX_C_HRX_P11PEG_GTX_C_HRX_P10PEG_GTX_C_HRX_P9PEG_GTX_C_HRX_P8PEG_GTX_C_HRX_P7PEG_GTX_C_HRX_P6PEG_GTX_C_HRX_P5PEG_GTX_C_HRX_P4PEG_GTX_C_HRX_P3PEG_GTX_C_HRX_P2PEG_GTX_C_HRX_P1PEG_GTX_C_HRX_P0

PEG_HTX_GRX_N15

PEG_HTX_GRX_N13

PEG_HTX_GRX_N11PEG_HTX_GRX_N12

PEG_HTX_GRX_N14





PEG_HTX_GRX_N2PEG_HTX_GRX_N1PEG_HTX_GRX_N0

PEG_HTX_GRX_P15

PEG_HTX_GRX_P13

PEG_HTX_GRX_P11

PEG_HTX_GRX_P14

PEG_HTX_GRX_P12

PEG_HTX_GRX_P9

PEG_HTX_GRX_P7

PEG_HTX_GRX_P10

PEG_HTX_GRX_P8

PEG_HTX_GRX_P5

PEG_HTX_GRX_P3

PEG_HTX_GRX_P6

PEG_HTX_GRX_P4

PEG_HTX_GRX_P1PEG_HTX_GRX_P2

PEG_HTX_GRX_P0

PEG_HTX_C_GRX_N14PEG_HTX_C_GRX_N15








PEG_HTX_C_GRX_P2PEG_HTX_C_GRX_P3








PEG_GTX_C_HRX_N15PEG_GTX_C_HRX_N14PEG_GTX_C_HRX_N13

PEG_GTX_C_HRX_N11PEG_GTX_C_HRX_N12

CFG3

CFG6CFG5CFG4

CFG7

CFG10CFG9CFG8

CFG11

CFG15CFG14CFG13CFG12

CFG18CFG17CFG16

H_RSVD17_RH_RSVD18_R

CFG0CFG1CFG2

PEG_GTX_HRX_P0PEG_GTX_HRX_P1PEG_GTX_HRX_P2PEG_GTX_HRX_P3PEG_GTX_HRX_P4PEG_GTX_HRX_P5

PEG_GTX_HRX_P7PEG_GTX_HRX_P6

PEG_GTX_HRX_P8PEG_GTX_HRX_P9PEG_GTX_HRX_P10PEG_GTX_HRX_P11PEG_GTX_HRX_P12PEG_GTX_HRX_P13

PEG_GTX_HRX_P15PEG_GTX_HRX_P14

PEG_GTX_HRX_N8PEG_GTX_HRX_N9PEG_GTX_HRX_N10PEG_GTX_HRX_N11PEG_GTX_HRX_N12PEG_GTX_HRX_N13

PEG_GTX_HRX_N15PEG_GTX_HRX_N14

PEG_GTX_HRX_N0PEG_GTX_HRX_N1PEG_GTX_HRX_N2PEG_GTX_HRX_N3PEG_GTX_HRX_N4PEG_GTX_HRX_N5

PEG_GTX_HRX_N7PEG_GTX_HRX_N6

H_FDI_FSYNC0

H_FDI_LSYNC1

H_FDI_FSYNC1

H_FDI_INT

H_FDI_LSYNC0

RSVD65_RRSVD64_R

H_FDI_FSYNC015H_FDI_FSYNC115

H_FDI_INT15

H_FDI_LSYNC015H_FDI_LSYNC115

PEG_GTX_HRX_N[0..15] 22

PEG_HTX_C_GRX_P[0..15] 22PEG_HTX_C_GRX_N[0..15] 22

PEG_GTX_HRX_P[0..15] 22

DMI_HTX_PRX_N[0..3] 15DMI_HTX_PRX_P[0..3] 15

DMI_PTX_HRX_N[0..3] 15DMI_PTX_HRX_P[0..3] 15

H_FDI_TXN[0..7] 15H_FDI_TXP[0..7] 15

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NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (1/6) DMI,FDI,PEG

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WW41 Recommend not pull downPCIE2.0 Jitter is over on ES1

*1:Disabled; No Physical Display Port attached to Embedded Display Port0:Enabled; An external Display Port device is connected to the Embedded Display Port

*:Default

CFG4 - Display Port Presence

*1 :Normal Operation0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG0 - PCI-Express Configuration Select

CFG3 - PCI-Express Static Lane Reversal

*1:Single PEG0:Bifurcation enabled

eDP Signals Mapping

PEG_HTX_C_GRX_N1

PEG_GTX_C_HRX_N2

PEG_HTX_C_GRX_P2

PEG_HTX_C_GRX_P0

PEG_HTX_C_GRX_N2PEG_HTX_C_GRX_P3

PEG_GTX_C_HRX_P3

PEG_HTX_C_GRX_N0

PEG_HTX_C_GRX_N3

PEG_HTX_C_GRX_P1

PEG_GTX_C_HRX_P2

eDP_TX2PEG_HTX_C_GRX_N14

PEG Singals

PEG_GTX_C_HRX_N13eDP_HPD#

eDP_TX3

PEG_HTX_C_GRX_P13

Lane Reversal

PEG_GTX_C_HRX_P12

PEG_HTX_C_GRX_N13

PEG_HTX_C_GRX_P15

eDP_TX#1

PEG_HTX_C_GRX_P12

eDP SingaleDP_TX0eDP_TX#0 PEG_HTX_C_GRX_N15

eDP_TX#2

PEG_HTX_C_GRX_N12eDP_AUX

eDP_TX1 PEG_HTX_C_GRX_P14

eDP_TX#3PEG_GTX_C_HRX_P13

eDP_AUX#

(CFD Only)(CFD Only)

CheckList0.8 1.22Auburndale Graphics Disable

15mil

10mil

C174 0.1U_0402_16V7KDIS@C174 0.1U_0402_16V7KDIS@1 2

C75 0.1U_0402_16V7KDIS@C75 0.1U_0402_16V7KDIS@1 2

C547 0.1U_0402_16V7KDIS@C547 0.1U_0402_16V7KDIS@1 2

C557 0.1U_0402_16V7KDIS@C557 0.1U_0402_16V7KDIS@1 2

C129 0.1U_0402_16V7KDIS@C129 0.1U_0402_16V7KDIS@1 2

C76 0.1U_0402_16V7KDIS@C76 0.1U_0402_16V7KDIS@1 2

C106 0.1U_0402_16V7KDIS@C106 0.1U_0402_16V7KDIS@1 2

R493750_0402_1%

R493750_0402_1% 1 2

C99 0.1U_0402_16V7KDIS@C99 0.1U_0402_16V7KDIS@1 2

C167 0.1U_0402_16V7KDIS@C167 0.1U_0402_16V7KDIS@1 2

C571 0.1U_0402_16V7KDIS@C571 0.1U_0402_16V7KDIS@1 2

C558 0.1U_0402_16V7KDIS@C558 0.1U_0402_16V7KDIS@1 2

C580 0.1U_0402_16V7KDIS@C580 0.1U_0402_16V7KDIS@1 2

C81 0.1U_0402_16V7KDIS@C81 0.1U_0402_16V7KDIS@1 2

C98 0.1U_0402_16V7KDIS@C98 0.1U_0402_16V7KDIS@1 2

R515 1K_0402_5%DISO@R515 1K_0402_5%DISO@1 2

C579 0.1U_0402_16V7KDIS@C579 0.1U_0402_16V7KDIS@1 2

C559 0.1U_0402_16V7KDIS@C559 0.1U_0402_16V7KDIS@1 2

C161 0.1U_0402_16V7KDIS@C161 0.1U_0402_16V7KDIS@1 2

C585 0.1U_0402_16V7KDIS@C585 0.1U_0402_16V7KDIS@1 2

C572 0.1U_0402_16V7KDIS@C572 0.1U_0402_16V7KDIS@1 2

C113 0.1U_0402_16V7KDIS@C113 0.1U_0402_16V7KDIS@1 2

C548 0.1U_0402_16V7KDIS@C548 0.1U_0402_16V7KDIS@1 2

P

C

I

E

X

P

R

E

S

S

-

-

G

R

A

P

H

I

C

S

DMI

Intel(

R) FDI

JCPU1A

IC,AUB_CFD_rPGA,R1P0CONN@

P

C

I

E

X

P

R

E

S

S

-

-

G

R

A

P

H

I

C

S

DMI

Intel(

R) FDI

JCPU1A


DMI_RX#[0]A24DMI_RX#[1]C23DMI_RX#[2]B22DMI_RX#[3]A21

DMI_RX[0]B24DMI_RX[1]D23DMI_RX[2]B23DMI_RX[3]A22

DMI_TX#[0]D24DMI_TX#[1]G24DMI_TX#[2]F23DMI_TX#[3]H23

DMI_TX[0]D25DMI_TX[1]F24

DMI_TX[3]G23DMI_TX[2]E23

FDI_TX#[0]E22FDI_TX#[1]D21FDI_TX#[2]D19FDI_TX#[3]D18FDI_TX#[4]G21FDI_TX#[5]E19FDI_TX#[6]F21FDI_TX#[7]G18

FDI_TX[0]D22FDI_TX[1]C21FDI_TX[2]D20FDI_TX[3]C18FDI_TX[4]G22FDI_TX[5]E20FDI_TX[6]F20FDI_TX[7]G19

FDI_FSYNC[0]F17FDI_FSYNC[1]E17

FDI_INTC17

FDI_LSYNC[0]F18FDI_LSYNC[1]D17

PEG_ICOMPI B26PEG_ICOMPO A26

PEG_RBIAS A25PEG_RCOMPO B27

PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33

PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31

PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33

PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30

PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30

PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26

PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30

PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25

R48549.9_0402_1%

R48549.9_0402_1% 1 2

C584 0.1U_0402_16V7KDIS@C584 0.1U_0402_16V7KDIS@1 2

C141 0.1U_0402_16V7KDIS@C141 0.1U_0402_16V7KDIS@1 2

R593.01K_0402_1%

@R593.01K_0402_1%

@1 2

C72 0.1U_0402_16V7KDIS@C72 0.1U_0402_16V7KDIS@1 2

C555 0.1U_0402_16V7KDIS@C555 0.1U_0402_16V7KDIS@1 2

R5010_0402_5%

@

R5010_0402_5%

@1 2

C581 0.1U_0402_16V7KDIS@C581 0.1U_0402_16V7KDIS@1 2

R517 1K_0402_5%DISO@R517 1K_0402_5%DISO@1 2

C86 0.1U_0402_16V7KDIS@C86 0.1U_0402_16V7KDIS@1 2

C573 0.1U_0402_16V7KDIS@C573 0.1U_0402_16V7KDIS@1 2

C165 0.1U_0402_16V7KDIS@C165 0.1U_0402_16V7KDIS@1 2

R613.01K_0402_1% [email protected]_0402_1% DIS@1 2

C121 0.1U_0402_16V7KDIS@C121 0.1U_0402_16V7KDIS@1 2C123 0.1U_0402_16V7KDIS@C123 0.1U_0402_16V7KDIS@1 2

C575 0.1U_0402_16V7KDIS@C575 0.1U_0402_16V7KDIS@1 2

R583.01K_0402_1% @R583.01K_0402_1% @1 2

C153 0.1U_0402_16V7KDIS@C153 0.1U_0402_16V7KDIS@1 2

C583 0.1U_0402_16V7KDIS@C583 0.1U_0402_16V7KDIS@1 2

C160 0.1U_0402_16V7KDIS@C160 0.1U_0402_16V7KDIS@1 2

C553 0.1U_0402_16V7KDIS@C553 0.1U_0402_16V7KDIS@1 2

C560 0.1U_0402_16V7KDIS@C560 0.1U_0402_16V7KDIS@1 2

C105 0.1U_0402_16V7KDIS@C105 0.1U_0402_16V7KDIS@1 2

R

E

S

E

R

V

E

D

JCPU1E


R

E

S

E

R

V

E

D

JCPU1E


CFG[0]AM30CFG[1]AM28CFG[2]AP31CFG[3]AL32CFG[4]AL30CFG[5]AM31CFG[6]AN29CFG[7]AM32CFG[8]AK32CFG[9]AK31CFG[10]AK28CFG[11]AJ28CFG[12]AN30CFG[13]AN32CFG[14]AJ32CFG[15]AJ29CFG[16]AJ30CFG[17]AK30

RSVD34 AH25RSVD35 AK26

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2

RSVD_NCTF_43 AR1

RSVD_TP_86H16

RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33

RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35

RSVD58 AR32

RSVD_NCTF_30C35RSVD_NCTF_31B35

RSVD_NCTF_28A34RSVD_NCTF_29A33

RSVD27J28RSVD26J29

RSVD16A19RSVD15B19

RSVD17A20RSVD18B20

RSVD20T9RSVD19U9

RSVD22AB9RSVD21AC9

RSVD_NCTF_23C1RSVD_NCTF_24A3

RSVD_TP_66 AA5RSVD_TP_67 AA4RSVD_TP_68 R8

RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9

RSVD_TP_69 AD3

RSVD_TP_74 AG7

RSVD_TP_70 AD2

RSVD_TP_75 AE3

RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2

RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3

RSVD_TP_79 AD5

RSVD_TP_84 AE5

RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26RSVD_NCTF_37 AR2

RSVD1AP25RSVD2AL25RSVD3AL24RSVD4AL22RSVD5AJ33RSVD6AG9RSVD7M27RSVD8L28SA_DIMM_VREFJ17SB_DIMM_VREFH17RSVD11G25RSVD12G17RSVD13E31RSVD14E30

RSVD32 AJ13RSVD33 AJ12

RSVD_TP_59 E15RSVD_TP_60 F15

KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15

VSS AP34

C586 0.1U_0402_16V7KDIS@C586 0.1U_0402_16V7KDIS@1 2

R513 1K_0402_5%DISO@R513 1K_0402_5%DISO@1 2

C549 0.1U_0402_16V7KDIS@C549 0.1U_0402_16V7KDIS@1 2

C96 0.1U_0402_16V7KDIS@C96 0.1U_0402_16V7KDIS@1 2

R4970_0402_5%

@

R4970_0402_5%

@1 2

C151 0.1U_0402_16V7KDIS@C151 0.1U_0402_16V7KDIS@1 2

C574 0.1U_0402_16V7KDIS@C574 0.1U_0402_16V7KDIS@1 2

C115 0.1U_0402_16V7KDIS@C115 0.1U_0402_16V7KDIS@1 2

R519 1K_0402_5%DISO@R519 1K_0402_5%DISO@1 2

C128 0.1U_0402_16V7KDIS@C128 0.1U_0402_16V7KDIS@1 2

C142 0.1U_0402_16V7KDIS@C142 0.1U_0402_16V7KDIS@1 2

C551 0.1U_0402_16V7KDIS@C551 0.1U_0402_16V7KDIS@1 2

R603.01K_0402_1%

@R603.01K_0402_1%

@1 2

C149 0.1U_0402_16V7KDIS@C149 0.1U_0402_16V7KDIS@1 2

R1460_0402_5%

@

R1460_0402_5%

@ 12

C546 0.1U_0402_16V7KDIS@C546 0.1U_0402_16V7KDIS@1 2

C576 0.1U_0402_16V7KDIS@C576 0.1U_0402_16V7KDIS@1 2

C578 0.1U_0402_16V7KDIS@C578 0.1U_0402_16V7KDIS@1 2

C582 0.1U_0402_16V7KDIS@C582 0.1U_0402_16V7KDIS@1 2

C87 0.1U_0402_16V7KDIS@C87 0.1U_0402_16V7KDIS@1 2

C550 0.1U_0402_16V7KDIS@C550 0.1U_0402_16V7KDIS@1 2

R1470_0402_5%

@R1470_0402_5%

@ 12

R520 1K_0402_5%DISO@R520 1K_0402_5%DISO@1 2

C577 0.1U_0402_16V7KDIS@C577 0.1U_0402_16V7KDIS@1 2

C556 0.1U_0402_16V7KDIS@C556 0.1U_0402_16V7KDIS@1 2

C561 0.1U_0402_16V7KDIS@C561 0.1U_0402_16V7KDIS@1 2

C552 0.1U_0402_16V7KDIS@C552 0.1U_0402_16V7KDIS@1 2

C140 0.1U_0402_16V7KDIS@C140 0.1U_0402_16V7KDIS@1 2

C71 0.1U_0402_16V7KDIS@C71 0.1U_0402_16V7KDIS@1 2

C554 0.1U_0402_16V7KDIS@C554 0.1U_0402_16V7KDIS@1 2

C69 0.1U_0402_16V7KDIS@C69 0.1U_0402_16V7KDIS@1 2

C95 0.1U_0402_16V7KDIS@C95 0.1U_0402_16V7KDIS@1 2

C84 0.1U_0402_16V7KDIS@C84 0.1U_0402_16V7KDIS@1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_PWRGOOD_RPBTN_OUT#_XDP

XDP_TDIXDP_TMS

XDP_TRST#

XDP_TCLK

XDP_DBRESET#

CLK_CPU_XDP#CLK_CPU_XDP

H_RESET#_R

XDP_TDO

H_CPUPWRGD

XDP_PREQ#XDP_PRDY#

XDP_OBS0XDP_OBS1

XDP_OBS2XDP_OBS3

XDP_OBS5XDP_OBS4

XDP_OBS7XDP_OBS6

H_PWRGD_XDP

XDP_TMS

XDP_TRST#

XDP_TDI_RXDP_PREQ#XDP_TCLK

XDP_TDI_R XDP_TDIXDP_TDOXDP_TDO_M

XDP_TDI_MXDP_TDO_R

H_CPURST#PLT_RST#H_RESET#_R

SM_RCOMP_2

H_VTTPWRGD

H_COMP3

H_COMP1

H_PWRGD_XDP H_PWRGD_XDP_R

H_COMP0

H_COMP2

SKTOCC#_R

XDP_DBRESET#

PLT_RST#_R

H_CATERR#

H_PECI_R

PM_EXTTS#1_R

H_PROCHOT#

H_THERMTRIP#_R

H_CPURST#

XDP_PRDY#

H_PM_SYNC_R

XDP_PREQ#

XDP_TCLKXDP_TMS

CLK_CPU_DP#_R

XDP_TRST#

PM_DRAM_PWRGD_R

XDP_TDI_RXDP_TDO_R

XDP_TDO_MXDP_TDI_M

XDP_DBR#_R

H_CPUPWRGD_1

H_CPUPWRGD_0

XDP_PRDY#

CLK_CPU_DP#_RCLK_CPU_DP_R

XDP_OBS0XDP_OBS1XDP_OBS2XDP_OBS3XDP_OBS4XDP_OBS5XDP_OBS6XDP_OBS7

CLK_CPU_XDPCLK_CPU_XDP#

H_VTTPWRGD

PM_DRAM_PWRGD_R

H_VTTPWRGD_R

H_VTTPWRGD

SM_RCOMP_1SM_RCOMP_2

SM_RCOMP_0

H_CATERR#H_PROCHOT#H_CPURST#

H_VTTPWRGD_R

PM_EXTTS#0

SM_RCOMP_0SM_RCOMP_1

CLK_CPU_DP_R

PBTN_OUT#15,21,37

SMB_CLK_S321SMB_DATA_S321

PLT_RST#17,21,33,37

H_PECI18

H_THERMTRIP#18

PM_EXTTS#0_1 10,11

H_PM_SYNC15

H_CPUPWRGD18

SM_DRAMRST# 10

PM_DRAM_PWRGD15

XDP_DBRESET# 15,21

H_PROCHOT#54

CLK_CPU_DMI# 14CLK_CPU_DMI 14

CLK_CPU_BCLK# 18CLK_CPU_BCLK 18

H_VTTPWRGD52

+1.05VS_VTT

+1.05VS_VTT

+3VS

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

+3VALW

+1.5V_1

+3VALW

+1.05VS_VTT

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (2/6) CLK,JTAG

B



Title


Date: Sheet of





B



Title


Date: Sheet of





B



XDP Connector

Scan Chain(Default)

CPU Only

GMCH Only

STUFF -> R488 , R480 , R476NO STUFF -> R475 , R481

STUFF -> R488 ,R475NO STUFF -> R480 , R481 , R476

NO STUFF -> R488, R475 , R480STUFF -> R481,R476

JTAG MAPPING 2009/09/16 update

Delete dampling resistor forpower noise and Layout spaceissue

2009/2/4

2009/2/4#414044 DGUpdate Rev1.11

2009/08/14 #425302CP_S3PowerReductionWhitePaper_Rev1.0

#425302CP_S3PowerReductionWhitePaper_Rev0.7

2009/04/23Intel CRB 1.55 UpdateChange R68 to 1.1K_1%, R71 to 3.01K_1%

Need to check Voltage Level

2009/08/14 remove DP REF SSCLK

2009/8/14change back to 2K

U38

MC74VHC1G08DFT2G_SC70-5

U38


B2

A1Y 4

P

5

G

3

R496 51_0402_5%@R496 51_0402_5%@1 2

R62 51_0402_5%@R62 51_0402_5%@1 2

R811K_0402_5%

R811K_0402_5%

1 2

R540 0_0402_5%@

R540 0_0402_5%@1 2

R495 51_0402_5%@R495 51_0402_5%@1 2

R850_0402_5%

@R850_0402_5%

@1 2

R481 0_0402_5%@

R481 0_0402_5%@1 2

R539 10K_0402_5% R539 10K_0402_5% 1 2

R1220_0402_5%

R1220_0402_5%

1 2

R504 0_0402_5% R504 0_0402_5% 1 2

R538 10K_0402_5% R538 10K_0402_5% 1 2

R1240_0402_5%

R1240_0402_5%

1 2

R1500_0402_5%

R1500_0402_5%

1 2

R510 0_0402_5% R510 0_0402_5% 1 2

U11


U11


B 2

A 1Y4

P

5

G

3

R1210_0402_5%

R1210_0402_5%

1 2R87 0_0402_5% R87 0_0402_5% 1 2

R503 49.9_0402_1% R503 49.9_0402_1% 12

R1971K_0402_5%

R1971K_0402_5%

1 2

R499 51_0402_5% R499 51_0402_5% 1 2

R125750_0402_1%

R125750_0402_1%

1

2

R576 24.9_0402_1% R576 24.9_0402_1% 1 2

R476 0_0402_5%

R476 0_0402_5% 1 2

R1230_0402_5%

R1230_0402_5%

1 2

R521 49.9_0402_1% R521 49.9_0402_1% 12

R90 51_0402_5%@R90 51_0402_5%@1 2

R4800_0402_5%

R4800_0402_5%

1

2

C

L

O

C

K

S

MISC

THERMAL

PWR MANAG

EMENT

D

D

R

3

M

I

S

C

J

T

A

G

&

B

P

M

JCPU1B


C

L

O

C

K

S

MISC

THERMAL

PWR MANAG

EMENT

D

D

R

3

M

I

S

C

J

T

A

G

&

B

P

M

JCPU1B


SM_RCOMP[1] AM1SM_RCOMP[2] AN1

SM_DRAMRST# F6

SM_RCOMP[0] AL1

BCLK# B16BCLK A16

BCLK_ITP# AT30BCLK_ITP AR30

PEG_CLK# D16PEG_CLK E16

DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18

CATERR#AK14

COMP3AT23

PECIAT15

PROCHOT#AN26

THERMTRIP#AK15

RESET_OBS#AP26

VCCPWRGOOD_1AN14

VCCPWRGOOD_0AN27

SM_DRAMPWROKAK13

VTTPWRGOODAM15

RSTIN#AL14

PM_EXT_TS#[0] AN15PM_EXT_TS#[1] AP15

PRDY# AT28PREQ# AP27

TCK AN28TMS AP28

TRST# AT27

TDI AT29TDO AR27

TDI_M AR29TDO_M AP29

DBR# AN25

BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23

COMP2AT24

PM_SYNCAL15

TAPPWRGOODAM26

COMP1G16

COMP0AT26

SKTOCC#AH24

R573 130_0402_1% R573 130_0402_1% 1 2

R5470_0402_5%

R5470_0402_5%

1 2

R567 100K_0402_5%

R567 100K_0402_5% 1 2

R152

1.1K_0402_1%@R152

1.1K_0402_1%@

1

2

R475 0_0402_5%@R475 0_0402_5%@1 2

R7951_0402_5%

R7951_0402_5%

1 2

R578 100_0402_1% R578 100_0402_1% 1 2

C211

0.1U_0402_16V4Z@

C211

0.1U_0402_16V4Z@

1

2

R507 20_0402_1% R507 20_0402_1% 12

R148

3.01K_0402_1%@R148

3.01K_0402_1%@

1

2

R542

1K_0402_1%

R542

1K_0402_1%

1

2

R840_0402_5% R840_0402_5% 1 2

R512 20_0402_1% R512 20_0402_1% 12

R1261.5K_0402_1%

R1261.5K_0402_1%

1 2

R127 49.9_0402_1% R127 49.9_0402_1% 12

R4890_0402_5%

R4890_0402_5%

1 2

R151

1.5K_0402_1%

R151

1.5K_0402_1%

1

2

R5502K_0402_1%

R5502K_0402_1%

1 2

R89 51_0402_5%@R89 51_0402_5%@1 2

R548 0_0402_5% R548 0_0402_5% 1 2

R91 68_0402_5%@R91 68_0402_5%@ 12

R488 0_0402_5% R488 0_0402_5% 1 2

R149

750_0402_1%

R149

750_0402_1%

1

2

JP2

SAMTE_BSH-030-01-L-D-ACONN@

JP2

SAMTE_BSH-030-01-L-D-ACONN@

GND01OBSFN_A03OBSFN_A15GND27OBSDATA_A09OBSDATA_A111GND413OBSDATA_A215OBSDATA_A317GND619OBSFN_B021OBSFN_B123GND825OBSDATA_B027OBSDATA_B129GND1031OBSDATA_B233OBSDATA_B335GND1237PWRGOOD/HOOK039HOOK141VCC_OBS_AB43HOOK245HOOK347GND1449SDA51SCL53TCK155TCK057GND1659

GND1 2OBSFN_C0 4OBSFN_C1 6

GND3 8OBSDATA_C0 10OBSDATA_C1 12

GND5 14OBSDATA_C2 16OBSDATA_C3 18

GND7 20OBSFN_D0 22OBSFN_D1 24

GND9 26OBSDATA_D0 28OBSDATA_D1 30

GND11 32OBSDATA_D2 34OBSDATA_D3 36

GND13 38ITPCLK/HOOK4 40

ITPCLK#/HOOK5 42VCC_OBS_CD 44

RESET#/HOOK6 46DBR#/HOOK7 48

GND15 50TD0 52

TRST# 54TDI 56

TMS 58GND17 60

T7 PAD @T7 PAD @

R831K_0402_5%

R831K_0402_5%

1 2

R88 68_0402_5% R88 68_0402_5% 12

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_D63DDR_A_D62

DDR_A_D8

DDR_A_D5DDR_A_D4DDR_A_D3

DDR_A_D7DDR_A_D6

DDR_A_D59DDR_A_D58DDR_A_D57DDR_A_D56

DDR_A_D47DDR_A_D46


DDR_A_D45DDR_A_D44

DDR_A_D39DDR_A_D38


DDR_A_D37DDR_A_D36

DDR_A_D61DDR_A_D60


DDR_A_D55DDR_A_D54


DDR_A_D53DDR_A_D52

DDR_A_D31DDR_A_D30


DDR_A_D15DDR_A_D14


DDR_A_D13DDR_A_D12

DDR_A_D29DDR_A_D28

DDR_A_D23DDR_A_D22


DDR_A_D21DDR_A_D20

DDR_A_BS2DDR_A_BS1DDR_A_BS0

DDR_A_WE#DDR_A_RAS#DDR_A_CAS#

DDR_A_MA14

DDR_A_MA0DDR_A_MA1

DDR_A_MA4

DDR_A_MA2DDR_A_MA3

DDR_A_MA5DDR_A_MA6DDR_A_MA7DDR_A_MA8DDR_A_MA9

DDR_A_MA12DDR_A_MA13

DDR_A_MA11DDR_A_MA10

DDR_A_MA15

DDR_A_DQS#0DDR_A_DQS#1




DDR_A_DQS0

DDR_A_DQS2DDR_A_DQS3

DDR_A_DQS1

DDR_A_DQS4DDR_A_DQS5DDR_A_DQS6DDR_A_DQS7

DDR_A_DM7

DDR_A_DM5

DDR_A_DM2DDR_A_DM1

DDR_A_DM6

DDR_A_DM4

DDR_A_DM0

DDR_A_DM3

DDR_B_D32DDR_B_D33

DDR_B_D36DDR_B_D37DDR_B_D38DDR_B_D39

DDR_B_D48DDR_B_D49


DDR_B_D50DDR_B_D51

DDR_B_D56DDR_B_D57


DDR_B_D58DDR_B_D59

DDR_B_D34DDR_B_D35

DDR_B_D40DDR_B_D41


DDR_B_D42DDR_B_D43

DDR_B_D0DDR_B_D1


DDR_B_D16DDR_B_D17


DDR_B_D18DDR_B_D19

DDR_B_D24DDR_B_D25


DDR_B_D26DDR_B_D27

DDR_B_D2DDR_B_D3

DDR_B_D8DDR_B_D9


DDR_B_D10DDR_B_D11

DDR_B_MA2DDR_B_MA3

DDR_B_MA10DDR_B_MA11

DDR_B_MA8DDR_B_MA9

DDR_B_MA0

DDR_B_MA6DDR_B_MA7

DDR_B_MA1

DDR_B_MA4DDR_B_MA5

DDR_B_MA14

DDR_B_MA12DDR_B_MA13

DDR_B_MA15

DDR_B_DQS#5

DDR_B_DQS#7

DDR_B_DQS#3DDR_B_DQS#4

DDR_B_DQS#1DDR_B_DQS#0

DDR_B_DQS#6

DDR_B_DQS#2

DDR_B_DQS7

DDR_B_DQS0

DDR_B_DQS5DDR_B_DQS4DDR_B_DQS3

DDR_B_DQS6

DDR_B_DQS2DDR_B_DQS1

DDR_B_DM3

DDR_B_DM0DDR_B_DM1

DDR_B_DM5DDR_B_DM6DDR_B_DM7

DDR_B_DM2

DDR_B_DM4

DDR_B_BS2DDR_B_BS1DDR_B_BS0

DDR_B_CAS#

DDR_B_WE#DDR_B_RAS#

DDR_A_BS010DDR_A_BS110DDR_A_BS210

DDR_A_CAS#10DDR_A_RAS#10

DDR_A_WE#10

DDR_B_BS011DDR_B_BS111DDR_B_BS211

DDR_B_CAS#11DDR_B_RAS#11DDR_B_WE#11

DDR_A_CLK0 10

DDR_A_CLK1 10

DDR_B_CLK0 11

DDR_B_CLK1 11

DDR_A_CLK0# 10

DDR_A_CLK1# 10

DDR_B_CLK0# 11

DDR_B_CLK1# 11

DDR_A_CKE0 10

DDR_A_CKE1 10

DDR_B_CKE0 11

DDR_B_CKE1 11

DDR_A_CS0# 10DDR_A_CS1# 10

DDR_B_CS0# 11DDR_B_CS1# 11

DDR_A_ODT0 10DDR_A_ODT1 10

DDR_B_ODT0 11DDR_B_ODT1 11

DDR_B_MA[0..15]11DDR_B_DQS[0..7]11

DDR_B_DQS#[0..7]11DDR_B_DM[0..7]11DDR_B_D[0..63]11

DDR_A_D[0..63]10DDR_A_DM[0..7]10

DDR_A_DQS#[0..7]10DDR_A_DQS[0..7]10DDR_A_MA[0..15]10

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (3/6) DDRIII

B



Title


Date: Sheet of





B



Title


Date: Sheet of





B



D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

JCPU1C


D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

JCPU1C


SA_BS[0]AC3SA_BS[1]AB2SA_BS[2]U7

SA_CAS#AE1SA_RAS#AB3SA_WE#AE9

SA_CK[0] AA6

SA_CK[1] Y6

SA_CK#[0] AA7

SA_CK#[1] Y5

SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2SA_CS#[1] AE8

SA_ODT[0] AD8SA_ODT[1] AF9

SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13

SA_DQS[0] C8

SA_DQS#[0] C9

SA_DQS[1] F9

SA_DQS#[1] F8

SA_DQS[2] H9

SA_DQS#[2] J9

SA_DQS[3] M9

SA_DQS#[3] N9

SA_DQS[4] AH8

SA_DQS#[4] AH7

SA_DQS[5] AK10

SA_DQS#[5] AK9

SA_DQS[6] AN11

SA_DQS#[6] AP11

SA_DQS[7] AR13

SA_DQS#[7] AT13

SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6

SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9

SA_DQ[0]A10SA_DQ[1]C10SA_DQ[2]C7SA_DQ[3]A7SA_DQ[4]B10SA_DQ[5]D10SA_DQ[6]E10SA_DQ[7]A8SA_DQ[8]D8SA_DQ[9]F10SA_DQ[10]E6SA_DQ[11]F7SA_DQ[12]E9SA_DQ[13]B7SA_DQ[14]E7SA_DQ[15]C6SA_DQ[16]H10SA_DQ[17]G8SA_DQ[18]K7SA_DQ[19]J8SA_DQ[20]G7SA_DQ[21]G10SA_DQ[22]J7SA_DQ[23]J10SA_DQ[24]L7SA_DQ[25]M6SA_DQ[26]M8SA_DQ[27]L9SA_DQ[28]L6SA_DQ[29]K8SA_DQ[30]N8SA_DQ[31]P9SA_DQ[32]AH5SA_DQ[33]AF5SA_DQ[34]AK6SA_DQ[35]AK7SA_DQ[36]AF6SA_DQ[37]AG5SA_DQ[38]AJ7SA_DQ[39]AJ6SA_DQ[40]AJ10SA_DQ[41]AJ9SA_DQ[42]AL10SA_DQ[43]AK12SA_DQ[44]AK8SA_DQ[45]AL7SA_DQ[46]AK11SA_DQ[47]AL8SA_DQ[48]AN8SA_DQ[49]AM10SA_DQ[50]AR11SA_DQ[51]AL11SA_DQ[52]AM9SA_DQ[53]AN9SA_DQ[54]AT11SA_DQ[55]AP12SA_DQ[56]AM12SA_DQ[57]AN12SA_DQ[58]AM13SA_DQ[59]AT14SA_DQ[60]AT12SA_DQ[61]AL13SA_DQ[62]AR14SA_DQ[63]AP14

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

-

B

JCPU1D


D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

-

B

JCPU1D


SB_BS[0]AB1SB_BS[1]W5SB_BS[2]R7

SB_CAS#AC5SB_RAS#Y7SB_WE#AC6

SB_CK[0] W8

SB_CK[1] V7

SB_CK#[0] W9

SB_CK#[1] V6

SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8SB_CS#[1] AD6

SB_ODT[0] AC7SB_ODT[1] AD1

SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8

SB_DQS[4] AG2

SB_DQS#[4] AH2

SB_DQS[5] AL5

SB_DQS#[5] AL4

SB_DQS[6] AP5

SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5

SB_DQS#[0] D5

SB_DQS[1] E3

SB_DQS#[1] F4

SB_DQS[2] H4

SB_DQS#[2] J4

SB_DQS[3] M5

SB_DQS#[3] L4

SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5

SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1

SB_DQ[0]B5SB_DQ[1]A5SB_DQ[2]C3SB_DQ[3]B3SB_DQ[4]E4SB_DQ[5]A6SB_DQ[6]A4SB_DQ[7]C4SB_DQ[8]D1SB_DQ[9]D2SB_DQ[10]F2SB_DQ[11]F1SB_DQ[12]C2SB_DQ[13]F5SB_DQ[14]F3SB_DQ[15]G4SB_DQ[16]H6SB_DQ[17]G2SB_DQ[18]J6SB_DQ[19]J3SB_DQ[20]G1SB_DQ[21]G5SB_DQ[22]J2SB_DQ[23]J1SB_DQ[24]J5SB_DQ[25]K2SB_DQ[26]L3SB_DQ[27]M1SB_DQ[28]K5SB_DQ[29]K4SB_DQ[30]M4SB_DQ[31]N5SB_DQ[32]AF3SB_DQ[33]AG1SB_DQ[34]AJ3SB_DQ[35]AK1SB_DQ[36]AG4SB_DQ[37]AG3SB_DQ[38]AJ4SB_DQ[39]AH4SB_DQ[40]AK3SB_DQ[41]AK4SB_DQ[42]AM6SB_DQ[43]AN2SB_DQ[44]AK5SB_DQ[45]AK2SB_DQ[46]AM4SB_DQ[47]AM3SB_DQ[48]AP3SB_DQ[49]AN5SB_DQ[50]AT4SB_DQ[51]AN6SB_DQ[52]AN4SB_DQ[53]AN3SB_DQ[54]AT5SB_DQ[55]AT6SB_DQ[56]AN7SB_DQ[57]AP6SB_DQ[58]AP8SB_DQ[59]AT9SB_DQ[60]AT7SB_DQ[61]AP9SB_DQ[62]AR10SB_DQ[63]AT10

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_VTTVID1

VCCSENSE_RVSSSENSE_R

VCCSENSEVSSSENSE

VSS_SENSE_VTT

CPU_VID0

CPU_VID1

CPU_VID2

CPU_VID3

CPU_VID6

H_DPRSLPVR

CPU_VID4

CPU_VID5

H_PSI#

H_PSI# 54

CPU_VID0 54CPU_VID1 54CPU_VID2 54CPU_VID3 54CPU_VID4 54CPU_VID5 54CPU_VID6 54H_DPRSLPVR 54

VCCSENSE 54VSSSENSE 54

VTT_SENSE 52

IMVP_IMON 54

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+1.05VS_VTT

+1.05VS_VTT

+CPU_CORE

+1.05VS_VTT

+1.05VS_VTT

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (4/6) PWR,Bypass

Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



(Place these capacitors between inductor and socket on Bottom)

(Place these capacitors on CPU cavity, Bottom Layer)

TOP side (under inductor)

4 x 470uF(4.5mohm@100kHz; 4.0mohm@SRF)

(Place these capacitors on CPU cavity, Bottom Layer)

16X10uF 3m ohm/16

4X470uF 4m ohm/43m ohm/12

C,uF

MLCC 0805 X5R

+CPU-COREDecoupling

16X22uF

ESR, mohm

SPCAP,Polymer

Stuffing Option

2X470uF

H_VTTVID1 = low, 1.1VH_VTTVID1 = high, 1.05V

48A Continuous 18A

(Place these capacitors under CPU socket, top layer)CSC (Current Sense Configuration)8/25

VTT Rail

Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V

Peak 21AWW15 MOW

R459 1K_0402_1% R459 1K_0402_1% 1 2

+ C268

330U_X_2VM_R6M

+ C268

330U_X_2VM_R6M

1

2

C270

22U_0805_6.3V6M

C270

22U_0805_6.3V6M

1

2

C155

10U_0805_6.3V6M

C155

10U_0805_6.3V6M

1

2

C262

10U_0805_6.3V6M

C262

10U_0805_6.3V6M

1

2

C222

22U_0805_6.3V6M

C222

22U_0805_6.3V6M

1

2

+ C134

330U_X_2VM_R6M

+ C134

330U_X_2VM_R6M

1

2

C652

10U_0805_6.3V6M

C652

10U_0805_6.3V6M

1

2

C679

10U_0805_6.3V6M

C679

10U_0805_6.3V6M

1

2

C223

10U_0805_6.3V6M

C223

10U_0805_6.3V6M

1

2

C286

10U_0805_6.3V6M

C286

10U_0805_6.3V6M

1

2

C157

22U_0805_6.3V6M

C157

22U_0805_6.3V6M

1

2

C677

10U_0805_6.3V6M

C677

10U_0805_6.3V6M

1

2

C676

10U_0805_6.3V6M

C676

10U_0805_6.3V6M

1

2

R441 1K_0402_1% R441 1K_0402_1% 1 2

R458 1K_0402_1%@R458 1K_0402_1%@1 2

R440 1K_0402_1%@R440 1K_0402_1%@1 2

C651

22U_0805_6.3V6M

C651

22U_0805_6.3V6M

1

2

C261

10U_0805_6.3V6M

C261

10U_0805_6.3V6M

1

2

R436 1K_0402_1% R436 1K_0402_1% 1 2

C666

22U_0805_6.3V6M

C666

22U_0805_6.3V6M

1

2

C284

10U_0805_6.3V6M

C284

10U_0805_6.3V6M

1

2 C232

10U_0805_6.3V6M

C232

10U_0805_6.3V6M

1

2

C665

22U_0805_6.3V6M

C665

22U_0805_6.3V6M

1

2

R442 1K_0402_1%@R442 1K_0402_1%@1 2

R456 1K_0402_1%@R456 1K_0402_1%@1 2

R455 1K_0402_1% R455 1K_0402_1% 1 2

R450 0_0402_5% R450 0_0402_5% 1 2

C281

10U_0805_6.3V6M

C281

10U_0805_6.3V6M

1

2

C282

10U_0805_6.3V6M

C282

10U_0805_6.3V6M

1

2

R453 1K_0402_1%@R453 1K_0402_1%@1 2

C668

22U_0805_6.3V6M

C668

22U_0805_6.3V6M

1

2

R523 0_0402_5% R523 0_0402_5% 1 2

C658

22U_0805_6.3V6M

C658

22U_0805_6.3V6M

1

2

C278

22U_0805_6.3V6M

C278

22U_0805_6.3V6M

1

2

R452 1K_0402_1%@R452 1K_0402_1%@1 2

R448 100_0402_1%

R448 100_0402_1% 1 2

+ C667

330U_X_2VM_R6M

+ C667

330U_X_2VM_R6M

1

2

C275

10U_0805_6.3V6M

C275

10U_0805_6.3V6M

1

2

R449 0_0402_5% R449 0_0402_5% 1 2

R454 1K_0402_1% R454 1K_0402_1% 1 2

R451 1K_0402_1%@R451 1K_0402_1%@1 2

T8PAD

@ T8PAD

@

C274

10U_0805_6.3V6M

C274

10U_0805_6.3V6M

1

2

C231

22U_0805_6.3V6M

C231

22U_0805_6.3V6M

1

2

C257

10U_0805_6.3V6M

C257

10U_0805_6.3V6M

1

2

C288

10U_0805_6.3V6M

C288

10U_0805_6.3V6M

1

2

+ C97

330U_X_2VM_R6M

@

+ C97

330U_X_2VM_R6M

@

1

2

P

O

W

E

R

CPU CORE SUPPLY

1

.

1

V

R

A

I

L

P

O

W

E

R

S

E

N

S

E

L

I

N

E

S

C

P

U

V

I

D

S

JCPU1F


P

O

W

E

R

CPU CORE SUPPLY

1

.

1

V

R

A

I

L

P

O

W

E

R

S

E

N

S

E

L

I

N

E

S

C

P

U

V

I

D

S

JCPU1F


ISENSE AN35

VTT_SENSE B15

PSI# AN33

VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35

PROC_DPRSLPVR AM34

VTT_SELECT G15

VCC_SENSE AJ34

VSS_SENSE_VTT A15

VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26

VTT0_33 AF10VTT0_34 AE10VTT0_35 AC10VTT0_36 AB10VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12VTT0_42 J11

VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14

VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16VTT0_44 J15

C258

10U_0805_6.3V6M

C258

10U_0805_6.3V6M

1

2

C276

22U_0805_6.3V6M

C276

22U_0805_6.3V6M

1

2

R444 1K_0402_1%@R444 1K_0402_1%@1 2

R457 1K_0402_1% R457 1K_0402_1% 1 2

R438 1K_0402_1% R438 1K_0402_1% 1 2

C674

10U_0805_6.3V6M

C674

10U_0805_6.3V6M

1

2

+ C541

330U_X_2VM_R6M

+ C541

330U_X_2VM_R6M

1

2

R437 1K_0402_1% R437 1K_0402_1% 1 2

R439 1K_0402_1%@R439 1K_0402_1%@1 2

C277

22U_0805_6.3V6M

C277

22U_0805_6.3V6M

1

2C241

22U_0805_6.3V6M

C241

22U_0805_6.3V6M

1

2

C242

10U_0805_6.3V6M

C242

10U_0805_6.3V6M

1

2

+ C136

330U_X_2VM_R6M

+ C136

330U_X_2VM_R6M

1

2

R435 100_0402_1%

R435 100_0402_1% 1 2

C669

10U_0805_6.3V6M

C669

10U_0805_6.3V6M

1

2

C657

10U_0805_6.3V6M

C657

10U_0805_6.3V6M

1

2

R443 1K_0402_1% R443 1K_0402_1% 1 2

C256

22U_0805_6.3V6M

C256

22U_0805_6.3V6M

1

2

C269

10U_0805_6.3V6M

C269

10U_0805_6.3V6M

1

2

+ C251

330U_X_2VM_R6M

+ C251

330U_X_2VM_R6M

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

GFXVR_DPRSLPVR_R

+1.8VS_VCCSFR

GFXVR_EN

GFXVR_EN

VCC_AXG_SENSE 53VSS_AXG_SENSE 53

GFXVR_VID_0 53GFXVR_VID_1 53GFXVR_VID_2 53GFXVR_VID_3 53GFXVR_VID_4 53GFXVR_VID_5 53GFXVR_VID_6 53

GFXVR_EN 53GFXVR_DPRSLPVR 53GFXVR_IMON 53

+VGFX_CORE

+1.05VS_VTT

+1.8VS

+1.05VS_VTT

+1.05VS_VTT

+1.05VS_VTT

+1.5V+1.5V_1

+1.5VS

+1.5V_1 +1.5V

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (5/6) PWR

Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



15A

3A

0.6A

Short for +1.5VS to +1.5V_1

Reserved for +1.5V to +1.5V_1

40mil

11/03 add four 0.1u 0402 Intel suggest for S3 reduse

091211 EMI ADD 0.1U

C285

22U_0805_6.3V6M

C285

22U_0805_6.3V6M

1

2

J4

JUMP_43X118@

J4

JUMP_43X118@1 122

C7970.1U_0402_16V4Z

C7970.1U_0402_16V4Z

1 2

C307

1U_0402_6.3V4Z

C307

1U_0402_6.3V4Z

1

2

C224

1U_0402_6.3V4Z

C224

1U_0402_6.3V4Z

1

2

C315

22U_0805_6.3V6M

C315

22U_0805_6.3V6M

1

2

R98 470_0402_5%

R98 470_0402_5%

1 2

C308

1U_0402_6.3V4Z

C308

1U_0402_6.3V4Z

1

2

C7980.1U_0402_16V4Z

C7980.1U_0402_16V4Z

1 2

C283

22U_0805_6.3V6M

C283

22U_0805_6.3V6M

1

2

R99 1K_0402_5%DISO@R99 1K_0402_5%DISO@1 2

C7990.1U_0402_16V4Z

C7990.1U_0402_16V4Z

1 2

C6100.1U

_0402_16V4Z

C6100.1U

_0402_16V4Z

1

2

C310

1U_0402_6.3V4Z

C310

1U_0402_6.3V4Z

1

2

C233

22U_0805_6.3V6M

C233

22U_0805_6.3V6M

1

2

C8000.1U_0402_16V4Z

C8000.1U_0402_16V4Z

1 2

C253

22U_0805_6.3V6M

C253

22U_0805_6.3V6M

1

2

C267

10U_0805_6.3V6M

C267

10U_0805_6.3V6M

1

2

P

O

W

E

R

G

R

A

P

H

I

C

S

V

I

D

s

GRAPHICS

D

D

R

3

-

1

.

5

V

R

A

I

L

S

FDI

PEG & DMI

S

E

N

S

E

L

I

N

E

S

1

.

1

V

1

.

8

V

JCPU1G


P

O

W

E

R

G

R

A

P

H

I

C

S

V

I

D

s

GRAPHICS

D

D

R

3

-

1

.

5

V

R

A

I

L

S

FDI

PEG & DMI

S

E

N

S

E

L

I

N

E

S

1

.

1

V

1

.

8

V

JCPU1G


GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24

GFX_VR_EN AR25GFX_DPRSLPVR AT25

GFX_IMON AM24

VAXG_SENSE AR22VSSAXG_SENSE AT22

VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16

VTT1_45J24VTT1_46J23VTT1_47H25

VTT1_48K26VTT1_49J27VTT1_50J26VTT1_51J25VTT1_52H27VTT1_53G28VTT1_54G27VTT1_55G26VTT1_56F26VTT1_57E26VTT1_58E25

VDDQ1 AJ1VDDQ2 AF1VDDQ3 AE7VDDQ4 AE4VDDQ5 AC1VDDQ6 AB7VDDQ7 AB4VDDQ8 Y1VDDQ9 W7

VDDQ10 W4VDDQ11 U1VDDQ12 T7VDDQ13 T4VDDQ14 P1VDDQ15 N7VDDQ16 N4VDDQ17 L1VDDQ18 H1

VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10

VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26

VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19

C306

1U_0402_6.3V4Z

C306

1U_0402_6.3V4Z

1

2

C230

1U_0402_6.3V4Z

C230

1U_0402_6.3V4Z

1

2

C260

22U_0805_6.3V6M

C260

22U_0805_6.3V6M

1

2

+ C326330U_D2_2V_Y

+ C326330U_D2_2V_Y

1

2

C287

22U_0805_6.3V6M

C287

22U_0805_6.3V6M

1

2

C272

22U_0805_6.3V6M

UMA@

C272

22U_0805_6.3V6M

UMA@

1

2

C235

2.2U_0603_6.3V4Z

C235

2.2U_0603_6.3V4Z

1

2

R5140_0402_5%DISO@

R5140_0402_5%DISO@

1

2

+C675

330U_X_2VM_R6M

UMA@+C675

330U_X_2VM_R6M

UMA@

1

2

R970_0805_5%

R970_0805_5% 1 2

C672

10U_0805_6.3V6M

UMA@

C672

10U_0805_6.3V6M

UMA@

1

2

J2

JUMP_43X118@

J2

JUMP_43X118@1 122

J3

JUMP_43X118@

J3

JUMP_43X118@1 122

C309

1U_0402_6.3V4Z

C309

1U_0402_6.3V4Z

1

2

C673

10U_0805_6.3V6M

UMA@

C673

10U_0805_6.3V6M

UMA@

1

2

C234

4.7U_0805_10V4Z

C234

4.7U_0805_10V4Z

1

2

C303

22U_0805_6.3V6M

C303

22U_0805_6.3V6M

1

2

R92 0_0402_5% R92 0_0402_5% 1 2

C250

22U_0805_6.3V6M

UMA@

C250

22U_0805_6.3V6M

UMA@

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

H_NCTF1H_NCTF2

H_NCTF6H_NCTF7

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0PROCESSOR (6/6) VSS

Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



T14PAD@ T14PAD@

VSS

JCPU1H


VSS

JCPU1H


VSS1AT20VSS2AT17VSS3AR31VSS4AR28VSS5AR26VSS6AR24VSS7AR23VSS8AR20VSS9AR17VSS10AR15VSS11AR12VSS12AR9VSS13AR6VSS14AR3VSS15AP20VSS16AP17VSS17AP13VSS18AP10VSS19AP7VSS20AP4VSS21AP2VSS22AN34VSS23AN31VSS24AN23VSS25AN20VSS26AN17VSS27AM29VSS28AM27VSS29AM25VSS30AM20VSS31AM17VSS32AM14VSS33AM11VSS34AM8VSS35AM5VSS36AM2VSS37AL34VSS38AL31VSS39AL23VSS40AL20VSS41AL17VSS42AL12VSS43AL9VSS44AL6VSS45AL3VSS46AK29VSS47AK27VSS48AK25VSS49AK20VSS50AK17VSS51AJ31VSS52AJ23VSS53AJ20VSS54AJ17VSS55AJ14VSS56AJ11VSS57AJ8VSS58AJ5VSS59AJ2VSS60AH35VSS61AH34VSS62AH33VSS63AH32VSS64AH31VSS65AH30VSS66AH29VSS67AH28VSS68AH27VSS69AH26VSS70AH20VSS71AH17VSS72AH13VSS73AH9VSS74AH6VSS75AH3VSS76AG10VSS77AF8VSS78AF4VSS79AF2VSS80AE35

VSS81 AE34VSS82 AE33VSS83 AE32VSS84 AE31VSS85 AE30VSS86 AE29VSS87 AE28VSS88 AE27VSS89 AE26VSS90 AE6VSS91 AD10VSS92 AC8VSS93 AC4VSS94 AC2VSS95 AB35VSS96 AB34VSS97 AB33VSS98 AB32VSS99 AB31

VSS100 AB30VSS101 AB29VSS102 AB28VSS103 AB27VSS104 AB26VSS105 AB6VSS106 AA10VSS107 Y8VSS108 Y4VSS109 Y2VSS110 W35VSS111 W34VSS112 W33VSS113 W32VSS114 W31VSS115 W30VSS116 W29VSS117 W28VSS118 W27VSS119 W26VSS120 W6VSS121 V10VSS122 U8VSS123 U4VSS124 U2VSS125 T35VSS126 T34VSS127 T33VSS128 T32VSS129 T31VSS130 T30VSS131 T29VSS132 T28VSS133 T27VSS134 T26VSS135 T6VSS136 R10VSS137 P8VSS138 P4VSS139 P2VSS140 N35VSS141 N34VSS142 N33VSS143 N32VSS144 N31VSS145 N30VSS146 N29VSS147 N28VSS148 N27VSS149 N26VSS150 N6VSS151 M10VSS152 L35VSS153 L32VSS154 L29VSS155 L8VSS156 L5VSS157 L2VSS158 K34VSS159 K33VSS160 K30

T15PAD@ T15PAD@

T19PAD@ T19PAD@

T18PAD@ T18PAD@

VSS

N

C

T

F

JCPU1I


VSS

N

C

T

F

JCPU1I


VSS161K27VSS162K9VSS163K6VSS164K3VSS165J32VSS166J30VSS167J21VSS168J19VSS169H35VSS170H32VSS171H28VSS172H26VSS173H24VSS174H22VSS175H18VSS176H15VSS177H13VSS178H11VSS179H8VSS180H5VSS181H2VSS182G34VSS183G31VSS184G20VSS185G9VSS186G6VSS187G3VSS188F30VSS189F27VSS190F25VSS191F22VSS192F19VSS193F16VSS194E35VSS195E32VSS196E29VSS197E24VSS198E21VSS199E18VSS200E13VSS201E11VSS202E8VSS203E5VSS204E2VSS205D33VSS206D30VSS207D26VSS208D9VSS209D6VSS210D3VSS211C34VSS212C32VSS213C29VSS214C28VSS215C24VSS216C22VSS217C20VSS218C19VSS219C16VSS220B31VSS221B25VSS222B21VSS223B18VSS224B17VSS225B13VSS226B11VSS227B8VSS228B6VSS229B4VSS230A29

VSS_NCTF1 AT35VSS_NCTF2 AT1VSS_NCTF3 AR34VSS_NCTF4 B34VSS_NCTF5 B2VSS_NCTF6 B1VSS_NCTF7 A35

VSS231A27VSS232A23VSS233A9

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_A_CKE0

DDR_A_D59

DDR_A_MA3

D_CK_SCLK

DDR_A_CS1#

DDR_A_D39

DDR_A_BS1

DDR_A_WE#

DDR_A_MA7

DDR_A_MA0

DDR_A_DQS7

DDR_A_D57

DDR_A_D46

DDR_A_DQS#5

DDR_A_D51

DDR_A_DM4

DDR_A_D44DDR_A_D44

DDR_A_RAS#

DDR_A_D33

DDR_A_D58

DDR_A_DM5

DDR_A_MA8

DDR_A_CS0#

DDR_A_MA6

DDR_A_MA10

DDR_A_DQS#7

DDR_A_DQS#6

DDR_A_D40

DDR_A_MA9

DDR_A_DQS#4

DDR_A_D52

DDR_A_DQS5

DDR_A_D54

DDR_A_D49

DDR_A_BS2

DDR_A_D45

DDR_A_DM7

DDR_A_MA1

DDR_A_D60

DDR_A_BS0

DDR_A_CAS# DDR_A_ODT0

DDR_A_D37

DDR_A_MA5

DDR_A_MA14

DDR_A_D55

DDR_A_MA4

DDR_A_D62

DDR_A_D56

DDR_A_D53

DDR_A_D47

DDR_A_ODT1

DDR_A_D43

DDR_A_D34

DDR_A_CLK1DDR_A_CLK1#

DDR_A_D48

D_CK_SDATA

DDR_A_D38

DDR_A_CLK0DDR_A_CLK0#

DDR_A_D32

DDR_A_MA13

DDR_A_MA11

DDR_A_D50

DDR_A_D61

DDR_A_MA2

DDR_A_D41

DDR_A_D36

DDR_A_D63

DDR_A_DQS6

DDR_A_D35

DDR_A_MA12

DDR_A_DQS4

DDR_A_DM6

DDR_A_D42

DDR_A_CKE1

PM_EXTTS#0_1

DDR_A_MA15DIMM_DRAMRST#

RST_GATE

DDR_VREF_CA_DIMMA

DDR_A_D5

DDR_A_D22

DDR_A_D14

DDR_A_DQS#0

DDR_A_D31

DDR_A_D12

DDR_A_D6

DDR_A_DQS0

DDR_A_DM2

DDR_A_DM1

DDR_A_D28

DDR_A_D4

DDR_A_D30

DDR_A_DQS3

DIMM_DRAMRST#

DDR_A_D29

DDR_A_D7

DDR_A_D13

DDR_A_D20DDR_A_D21

DDR_A_D15

DDR_A_D23

DDR_A_DQS#3

DDR_A_D26

DDR_A_D2

DDR_A_D25

DDR_A_D27

DDR_A_D0

DDR_A_DM0

DDR_A_D19

DDR_A_DQS2

DDR_A_D10

DDR_A_D3

DDR_A_D1

DDR_A_D16

DDR_A_DM3

DDR_A_D9

DDR_A_DQS#1

DDR_A_D24

DDR_A_D18

DDR_A_DQS#2

DDR_A_D11

DDR_A_D8

DDR_A_DQS1

DDR_A_D17

DDR_A_CKE06

DDR_A_CS1#6

DDR_A_BS1 6

DDR_A_WE#6

DDR_A_RAS# 6

DDR_A_CS0# 6

DDR_A_BS26

DDR_A_BS06

DDR_A_CAS#6 DDR_A_ODT0 6

DDR_A_ODT1 6

DDR_A_CLK1# 6DDR_A_CLK1 6DDR_A_CLK06

DDR_A_CLK0#6

DDR_A_CKE1 6

PM_EXTTS#0_1 5,11D_CK_SDATA 11,12D_CK_SCLK 11,12

DDR_A_DQS#[0..7]6

DDR_A_DQS[0..7]6

DDR_A_D[0..63]6

DDR_A_DM[0..7]6

DDR_A_MA[0..15]6

SM_DRAMRST#5

RST_GATE18

DIMM_DRAMRST# 11

+0.75VS

+1.5V +1.5V

+DIMM_VREFCA

+3VS

+1.5V

+0.75VS

+DIMM_VREFDQA

+1.5V

+DIMM_VREFCA

+1.5V

+1.5V

+DIMM_VREFDQA

Title


Date: Sheet of




NEW70 M/B LA-5891P Schematic 1.0DDRIII-SODIMM SLOT1

Custom



Title


Date: Sheet of





Custom



Title


Date: Sheet of





Custom



DDR3 SO-DIMM A

Layout Note: Place these 4 Caps near Commandand Control signals of DIMMA

Layout Note:Place near JDIMM1.203 & JDIMM1.204

Layout Note:Place near JDIMM1

DIMMA VREFDQ M1 Circuit

DIMMA & DIMMB VREFCA circuit

#425302CP_S3PowerReductionWhitePaper_Rev1.0

H=8mm

20mil

20mil

20mil

R217

10K_0402_5%

R217

10K_0402_5%

1

2

R203

1K_0402_1%

R203

1K_0402_1%

1

2

G

DS

Q17BSS138LT1G_SOT23-3

G

DS

Q17BSS138LT1G_SOT23-3

2

13

R274

1K_0402_1%

R274

1K_0402_1%

1

2

C401

0.1U_0402_16V4Z

C401

0.1U_0402_16V4Z

1

2

R218 10K_0402_5% R218 10K_0402_5% 1 2

C388

1U_0402_6.3V4Z

C388

1U_0402_6.3V4Z

1

2

C358

2.2U_0603_6.3V4Z

C358

2.2U_0603_6.3V4Z

1

2

C406

10U_0805_6.3V6M

C406

10U_0805_6.3V6M

1

2

C4032.2U_0603_6.3V4Z

C4032.2U_0603_6.3V4Z

1

2

C397

1U_0402_6.3V4Z

C397

1U_0402_6.3V4Z

1

2

R222

1K_0402_1%

R222

1K_0402_1% 1

2

R227

1K_0402_1%

R227

1K_0402_1%

1

2

+ C425330U_2.5V_M_R15@

+ C425330U_2.5V_M_R15@

1

2

C361

0.1U_0402_16V4Z

C361

0.1U_0402_16V4Z

1

2

C396

1U_0402_6.3V4Z

C396

1U_0402_6.3V4Z

1

2

C394

10U_0805_6.3V6M

C394

10U_0805_6.3V6M

1

2

C400

0.1U_0402_16V4Z

C400

0.1U_0402_16V4Z

1

2

C398

0.1U_0402_16V4Z

C398

0.1U_0402_16V4Z

1

2

C404

10U_0805_6.3V6M

C404

10U_0805_6.3V6M

1

2

JDIMM1

FOX_AS0A626-U8RN-7F

JDIMM1

FOX_AS0A626-U8RN-7F

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

R202 0_0402_5% R202 0_0402_5% 1 2

C355

10U_0805_6.3V6M

C355

10U_0805_6.3V6M

1

2

R2540_0402_5%

@

R2540_0402_5%

@1 2

C362

0.1U_0402_16V4Z

C362

0.1U_0402_16V4Z

1

2

C356

10U_0805_6.3V6M

C356

10U_0805_6.3V6M

1

2

C391

1U_0402_6.3V4Z

C391

1U_0402_6.3V4Z

1

2

C405

10U_0805_6.3V6M

C405

10U_0805_6.3V6M

1

2

C402

2.2U_0603_6.3V4Z

C402

2.2U_0603_6.3V4Z

1

2

R201

1K_0402_1%

R201

1K_0402_1%

1

2

C399

0.1U_0402_16V4Z

C399

0.1U_0402_16V4Z

1

2

C422

0.047U_0402_16V7K

C422

0.047U_0402_16V7K

1 2

C354

10U_0805_6.3V6M

C354

10U_0805_6.3V6M

1

2

C363

0.1U_0402_16V4Z

C363

0.1U_0402_16V4Z

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_B_D26

DDR_B_D2

DDR_B_D5

DDR_B_D22

DDR_B_D25

DDR_B_D14

DDR_B_DQS#0

DDR_B_D31

DDR_B_D12

DDR_B_D6

DDR_B_DQS0

DDR_B_DM2

DDR_B_DM1

DDR_B_D0

DDR_B_D28

DDR_B_DM0

DDR_B_D19

DDR_B_D4

DDR_B_D30

DDR_B_DQS2

DDR_B_DQS3

DDR_B_D10

DDR_B_D27

DDR_B_D3

DIMM_DRAMRST#

DDR_B_D1

DDR_B_D16

DDR_B_D29

DDR_B_DM3

DDR_B_D9

DDR_B_D7

DDR_B_D13

DDR_B_D20

DDR_B_DQS#1

DDR_B_D21

DDR_B_D24

DDR_B_D15

DDR_B_D23DDR_B_D18

DDR_B_DQS#2

DDR_B_D11

DDR_B_DQS#3

DDR_B_D8

DDR_B_DQS1

DDR_B_D17

DDR_B_MA12

DDR_B_CKE0

DDR_B_MA3

DDR_B_CS1#

DDR_B_WE#

DDR_B_MA8

DDR_B_MA10

DDR_B_MA9

DDR_B_BS2

DDR_B_MA1

DDR_B_BS0

DDR_B_CAS#

DDR_B_MA5

DDR_B_CLK0DDR_B_CLK0#

DDR_B_MA13

DDR_B_DQS6

DDR_B_D35

DDR_B_DQS4

DDR_B_D42

DDR_B_D59

DDR_B_D57

DDR_B_D51

DDR_B_D33

DDR_B_D58

DDR_B_DM5

DDR_B_DQS#6

DDR_B_D40

DDR_B_DQS#4

DDR_B_D49

DDR_B_DM7

DDR_B_D56

DDR_B_D43

DDR_B_D34

DDR_B_D48

DDR_B_D32

DDR_B_D50

DDR_B_D41

DDR_B_CKE1

DDR_B_BS1

DDR_B_MA7

DDR_B_MA0

DDR_B_RAS#

DDR_B_CS0#

DDR_B_MA6

DDR_B_ODT0

DDR_B_MA14

DDR_B_MA4

DDR_B_ODT1

DDR_B_CLK1DDR_B_CLK1#

DDR_B_MA11

DDR_B_MA2

DDR_B_MA15

DDR_B_D62

DDR_B_D36

DDR_B_DM6

DDR_B_D39

DDR_B_DQS7

DDR_B_D46

DDR_B_DQS#5

DDR_B_DM4

DDR_B_D44

DDR_B_DQS#7

DDR_B_D52

DDR_B_DQS5

DDR_B_D54

DDR_B_D45

DDR_B_D60

DDR_B_D37

DDR_B_D55

DDR_B_D63

DDR_B_D53

DDR_B_D47

DDR_B_D38

DDR_B_D61

D_CK_SCLKD_CK_SDATAPM_EXTTS#0_1

DDR_VREF_CA_DIMMB

DDR_B_DQS#[0..7]6

DDR_B_DQS[0..7]6

DDR_B_D[0..63]6

DDR_B_MA[0..15]6

DDR_B_DM[0..7]6

DIMM_DRAMRST# 10

DDR_B_CKE06

DDR_B_CS1#6

DDR_B_WE#6

DDR_B_BS26

DDR_B_BS06

DDR_B_CAS#6

DDR_B_CLK06DDR_B_CLK0#6

DDR_B_CKE1 6

DDR_B_BS1 6DDR_B_RAS# 6

DDR_B_CS0# 6DDR_B_ODT0 6

DDR_B_ODT1 6

DDR_B_CLK1# 6DDR_B_CLK1 6

PM_EXTTS#0_1 5,10D_CK_SDATA 10,12D_CK_SCLK 10,12

+1.5V+1.5V

+1.5V

+0.75VS

+DIMM_VREFDQB

+1.5V

+0.75VS

+3VS

+DIMM_VREFCA

+DIMM_VREFDQB

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Title


Date: Sheet of





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Title


Date: Sheet of





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DDR3 SO-DIMM B

2008/9/8 #400755Calpella Clarksfield DDR3 SO-DIMM VREFDQ Platform Design Guide Change Details

Layout Note:Place near JDIMM2

Layout Note:Place near JDIMM2.203 & JDIMM2.204

Layout Note: Place these 4 Caps near Commandand Control signals of DIMMB

DIMMB VREFDQ M1 Circuit

H=4mm

20mil

20mil

C427

1U_0402_6.3V4Z

C427

1U_0402_6.3V4Z

1

2

R279 10K_0402_5% R279 10K_0402_5% 1 2

C429

0.1U_0402_16V4Z

C429

0.1U_0402_16V4Z

1

2

R270 0_0402_5% R270 0_0402_5% 1 2

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

JDIMM2

FOX_AS0A626-U4RN-7FCONN@

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A39

Documents

Compal La-5891p r1.0 Schematics