Devices(transistors,etc.)

Solid-StatePhysics

Hardware

DigitalLogic

Microarchitecture

InstructionSetArchitecture

OperatingSystem

ProgrammingLanguage

Compiler/Interpreter

Program,ApplicationSoftware

nextfewweeks

CtoMachineCodeandx86Basics

ISAcontextandx86historyTranslationtools:C-->assemblymachinecode

x86Basics:RegistersDatamovementinstructionsMemoryaddressingmodesArithmeticinstructions

2

CSAPPbookisveryuseful andwell-alignedwithclassfortheremainderofthecourse.

TurningCintoMachineCode

3

CCodevoid sumstore(long x, long y,

long *dest) {long t = x + y;*dest = t;

}Generatedx86AssemblyCode

sum:addq %rdi,%rsimovq %rsi,(%rdx)retq

sum.s

sum.c

gcc -Og -S sum.c

Human-readablelanguageclosetomachinecode.

compiler (CS301)

01010101100010011110010110001011010001010000110000000011010001010000100010001001111011000101110111000011

sum.o

assembler

ObjectCode

Executable:sumResolvereferencesbetweenobjectfiles,libraries,(re)locatedata

linker

MachineInstructionExampleCCode

Storevaluet whereindicatedbydestAssembly

Move8-bytevaluetomemory"Quadword"inx86-64speak

Operands:t: Register %rsidest: Register %rdx*dest: Memory M[%rdx]

ObjectCode3-byteinstructionencodingStoredataddress0x400539

*dest = t;

movq %rsi, (%rdx)

0x400539: 48 89 32

4

Disassembledbyobjdump -d sum0000000000400536 :

400536: 48 01 fe add %rdi,%rsi400539: 48 89 32 mov %rsi,(%rdx) 40053c: c3 retq

DisassemblingObjectCode

5

01010101100010011110010110001011010001010000110000000011010001010000100010001001111011000101110111000011...

Disassembler

DisassembledbyGDB0x0000000000400536 : add %rdi,%rsi0x0000000000400539 : mov %rsi,(%rdx)0x000000000040053c : retq

$ gdb sum(gdb) disassemble sumstore

(disassemblefunction)(gdb) x/7b sum

(examinethe13bytesstartingatsum)

Object0x00400536:

0x480x010xfe0x480x890x320xc3

CISCvs.RISCx86: realISA,widespreadCISC:maximalism

ComplexInstructionSetComputerManyinstructions,specialized.Variable-sizeencoding,complex/slowdecode.Gradualaccumulationovertime.Originalgoal:• humansprograminassembly• orsimplecompilersgenerate

assemblybytemplate• hardwaresupportsmanypatternsas

singleinstructions• fewerinstructionsperSLOCUsuallyfewerregisters.Wewillsticktoasmallsubset.

HW: toy,butbasedonrealMIPSISARISC:minimalism

ReducedInstructionSetComputerFewinstructions,general.Regularencoding,simple/fastdecode.1980s+reactiontobloatedISAs.Originalgoal:• humansusehigh-levellanguages• smartcompilersgeneratehighly

optimizedassembly• hardwaresupportsfastbasic

instructions• moreinstructionsperSLOCUsuallymanyregisters.

abriefhistoryofx86

7

ISA First Year8086 Intel8086 1978

First16-bitprocessor.BasisforIBMPC&DOS1MBaddressspace

IA32 Intel386 1985First32-bitISA.Flataddressing,improvedOSsupport

x86-64 AMDOpteron 2003*SlowAMD/Intelconversion,slowadoption.*Notactuallyx86-64untilfewyearslater.Mainstreamonlyafter~10years.

16

32

64

WordSize

240now:

2016:mostlaptops,desktops,servers.

ISAView

8

PC RegistersAddresses

Data

Instructions

Stack

ConditionCodes

Heap

...

Memory

StaticData(Global)

(String)Literals

Instructions

Processor

x86-64registers

9

64-bitswide

Somehavespecialusesforparticularinstructions

%rax

%rbx

%rcx

%rdx

%rsi

%rdi

%rsp

%rbp

%r8

%r9

%r10

%r11

%r12

%r13

%r14

%r15

Specialpurpose:Stackpointer

FunctionArgument1

FunctionArgument2

FunctionArgument3

FunctionArgument4

FunctionArgument5

FunctionArgument6

ReturnValue

%rax

%rbx

%rcx

%rdx

%rsi

%rdi

%rsp

%rbp

x86historicalartifacts

10

%eax

%ebx

%ecx

%edx

%esi

%edi

%esp

%ebp

%r8

%r9

%r10

%r11

%r12

%r13

%r14

%r15

%r8d

%r9d

%r10d

%r11d

%r12d

%r13d

%r14d

%r15d

Low32bitsof64-bitregister

x86historicalartifacts

11

%eax

%ecx

%edx

%ebx

%esi

%edi

%esp

%ebp

%ax

%cx

%dx

%bx

%si

%di

%sp

%bp

%ah

%ch

%dh

%bh

%al

%cl

%dl

%bl

Now:low16bits…

gene

ralpurpo

se

accumulate

counter

data

base

source index

destinationindex

stack pointer

basepointer

high/lowbytesofold16-bitregisters

Now:Low32bitsof64-bitregisters

x86:ThreeBasicKindsofInstructions1.Datamovement betweenmemoryandregister

Load datafrommemoryintoregister%regßMem[address]

Store registerdataintomemoryMem[address]ß %reg

2.Arithmetic/logic onregisterormemorydatac=a+b; z=x

Datamovementinstructionsmov_ Source,Dest

datasize_ isoneof{b, w, l, q}

movq Source,Dest:Move8-byte“quadword”

movl Source,Dest:Move4-byte“longword”

movw Source,Dest:Move2-byte“word”

movb Source,Dest:Move1-byte“byte”

13

Historicaltermsbasedonthe16-bitdays,not thecurrentmachinewordsize(64bits)

Datamovementinstructionsmovq Source,Dest:

OperandTypes:Immediate: Literalintegerdata

Examples:$0x400,$-533

Register:Oneof16registersExamples:%rax, %rdx

Memory: 8consecutivebytesinmemory,ataddressheldbyregisterSimplestexample:(%rax)

14

mov OperandCombinations

15

movq

Imm

Reg

Mem

RegMem

RegMem

Reg

Source Dest CAnalog

movq $0x4,%rax

movq $-147,(%rax)

movq %rax,%rdx

movq %rax,(%rdx)

movq (%rax),%rdx

a = 0x4;

*p = -147;

d = a;

*q = a;

d = *p;

Src,Dest

Cannotdomemory-memorytransferwithasingleinstruction.Howwouldyoudoit?

BasicMemoryAddressingModesIndirect (R) Mem[Reg[R]]

RegisterRspecifiesthememoryaddress

movq (%rcx),%rax

Displacement D(R) Mem[Reg[R]+D]RegisterRspecifiesbasememoryaddress

(e.g.thestartofanobject)

Displacement(offset)Dspecifiesoffsetfrombaseaddress(e.g.afieldintheobject)

movq 8(%rsp),%rdx

16

PointersandMemoryAddressing

17

void swap(long* xp, long* yp){long t0 = *xp;long t1 = *yp;*xp = t1;*yp = t0;

}

swap:movq (%rdi),%raxmovq (%rsi),%rdxmovq %rdx,(%rdi)movq %rax,(%rsi)retq

%rdi

%rsi

%rax

%rdx

MemoryRegistersRegister Variable%rdi ⇔ xp

%rsi ⇔ yp

%rax ⇔ t0

%rdx ⇔ t1

CompleteMemoryAddressingModesGeneralForm:

D(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]+D]D: Literal“displacement”valuerepresentedin1,2,or4bytesRb: Baseregister:AnyregisterRi: Indexregister:Anyexcept%rspS: Scale:1,2,4,or8(whythesenumbers?)

SpecialCases: Implicitly:(Rb,Ri) Mem[Reg[Rb]+Reg[Ri]] (S=1,D=0)D(Rb,Ri)Mem[Reg[Rb]+Reg[Ri]+D] (S=1)(Rb,Ri,S)Mem[Reg[Rb]+S*Reg[Ri]] (D=0)

18

AddressComputationExamples

%rdx

%rcx

0xf000

0x100

AddressExpression AddressComputation Address

0x8(%rdx)

(%rdx,%rcx)

(%rdx,%rcx,4)

0x80(,%rdx,2)

19

D(Rb,Ri,S) Mem[Reg[Rb]+S*Reg[Ri]+D]

Registercontents Addressingmodes

ex

"LovelyEfficientArithmetic"leaq Src,Dest loadeffectiveaddress

Src isaddressmodeexpressionStoreaddresscomputed inDestExample: leaq (%rdx,%rcx,4), %rax

DOESNOTACCESSMEMORY

Usesp = &x[i];

Arithmeticoftheformx+k*ik=1,2,4,or8

20

!!!

leaq vs.movq example

0x400

0xf

0x8

0x10

0x1

%rax

%rbx

%rcx

%rdx

0x4

0x100

Registers Memory

leaq (%rdx,%rcx,4), %raxmovq (%rdx,%rcx,4), %rbxleaq (%rdx), %rdimovq (%rdx), %rsi

0x120

0x118

0x110

0x108

0x100

Address

21

%rdi

%rsi

Addr Perm Contents Managedby Initialized

2N-1 Stack RW Procedurecontext Compiler Run-time

Heap RW Dynamicdata structuresProgrammer,malloc/free,new/GC

Run-time

Statics RW Globalvariables/staticdatastructuresCompiler/

Assembler/Linker Startup

Literals R Stringliterals Compiler/Assembler/Linker Startup

Text X Instructions Compiler/Assembler/Linker Startup

0

MemoryLayout

CallStack

Memoryregionfortemporarystoragemanagedwithstackdiscipline.

%rsp holdsloweststackaddress(addressof"top"element)

StackPointer:%rsp

stackgrowstoward

lower addresses

higheraddresses

Stack“Top”

Stack“Bottom”

23

CallStack:Push

pushq Src1. FetchvaluefromSrc2. Decrement%rsp by8 (why8?)3. Storevalueatnewaddress

givenby%rsp

Stack“Top”

Stack“Bottom”

-8

24

stackgrowstoward

lower addresses

higheraddresses

StackPointer:%rsp

CallStack: Pop

Stack“Top”

Stack“Bottom”

popq Dest1. Loadvaluefromaddress%rsp2. WritevaluetoDest3. Increment%rsp by8

25

Thosebitsarestillthere;we’rejustnotusingthem.

stackgrowstoward

lower addresses

higheraddresses

StackPointer:%rsp

ProcedurePreview (moresoon)call, ret, push, popProcedureargumentspassedin6registers:

Returnvaluein%rax.

Allocate/pushnewstackframe foreachprocedurecall.

Somelocalvariables,savedregistervalues,extraarguments

Deallocate/popframebeforereturn.26

ReturnAddress

SavedRegisters+

Local Variables

…

ExtraArgumentstocallee

CallerFrame

Stackpointer%rsp

CalleeFrame

%rax

%rbx

%rcx

%rdx

%rsi

%rdi

%rsp

%rbp

%r8

%r9

%r10

%r11

%r12

%r13

%r14

%r15

StackpointerArgument1Argument2Argument3Argument4

Argument5Argument6

ReturnValue

ArithmeticOperationsTwo-operandinstructions:

Format Computationaddq Src,Dest Dest = Dest + Srcsubq Src,Dest Dest = Dest – Src argumentorderimulq Src,Dest Dest =Dest *Srcshlq Src,Dest Dest =Dest >Src Arithmeticshrq Src,Dest Dest =Dest >>Src Logicalxorq Src,Dest Dest =Dest ^Srcandq Src,Dest Dest =Dest &Srcorq Src,Dest Dest =Dest |Src

One-operand(unary)instructionsincq Dest Dest = Dest + 1 incrementdecq Dest Dest = Dest – 1 decrementnegq Dest Dest = -Dest negatenotq Dest Dest = ~Dest bitwisecomplement

SeeCSAPP3.5.5for:mulq,cqto,idivq,divq 27

leaq forarithmetic

arith:leaq (%rdi,%rsi), %raxaddq %rdx, %raxleaq (%rsi,%rsi,2), %rdxsalq $4, %rdxleaq 4(%rdi,%rdx), %rcximulq %rcx, %raxret

28

long arith(long x, long y,long z){

long t1 = x+y;long t2 = z+t1;long t3 = x+4;long t4 = y * 48; long t5 = t3 + t4;long rval = t2 * t5;return rval;

}

Register Use(s)

%rdi Argumentx%rsi Argumenty%rdx Argumentz%rax%rcx

§ InstructionsindifferentorderfromCcode

§ Someexpressionsrequiremultipleinstructions

§ Someinstructionscovermultipleexpressions

§ Samex86codebycompiling:(x+y+z)*(x+4+48*y)

Anotherexample

29

long logical(long x, long y){long t1 = x^y;long t2 = t1 >> 17;long mask = (1