Computer System and Architecture

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    COMPUTER SYSTEM AND

    ARCHITECTURE

    (MODULE CODE- AICT001-3-2)

    CPU, MEMORY AND ADVANCED ARCHITECTURE

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    Introduction

    The report emphasizes on two things-

    General Architecturei.e. CPU and Memory

    Advanced architecture why it is developed, how it

    works, how it differs from the Von Neumann

    architecture, which CPU vendor uses it etc.

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    Microprocessors

    Microprocessors has input, output and process.

    Input and Output are a series of voltage used tocontrol external devices.

    Different Trends include-

    Increasing number of Cores

    Awareness and improvements in energy efficiency

    Include High Speed Cache and Buses Reducing the size of the Processor

    Continuing advances in virtualization

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    CPU and Memory

    For Better performance, Faster Program Execution,

    maximum throughput compatibility is required.

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    Cache

    Cache Coherence each CPU is having its own

    copy of data in its cache

    Bus Snooping

    Directory Based approach

    Onboard Cache on the motherboard or off chip

    Write Back Cache- two approaches to write data

    back in main memory. Implementation Direct Mapped Cache, Associate

    Mapping, Set Associative Mapping

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    Virtual Memory

    Illusion of Memory

    Implemented using two schemes-

    Demand Paging valid-invalid bit method, 1 for page

    present and o for absent (page fault). The they are

    loaded into frames.

    Demand Segmentation- each row of lookup table has a

    starting address of the logical memory, size of the

    block and starting address for physical memory

    However both operates the same.

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    Demand Paging

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    Problem of Fragmentation

    Fixed Memory Partitioning

    Variable Memory Partitioning

    Both leads to creation of small holes when theprocesses are swapped in.

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    Memory Hierarchy

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    Role of Registers

    Registers are defined to perform specific purposessuch as MAR, MDR, Accumulator etc.

    Used as calculator to perform arithmetic calculations

    such as Accumulator and are used to hold addressof instructions such as Address Registers.

    Special purpose register are used to store the statusof the program. It consist of program counter, stack

    pointer and status registers. It has a higher transfer rate and the minimum access

    time as it is directly attached to the CPU.

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    Addressing Modes

    Simplifies the memory references, adds convenience

    and flexibility to have modes of addressing, and it

    allows a large range of addressable memory while

    using a reasonable number of bits.

    Help writing programs that uses loops and all.

    For Example- Indexed Addressing. Now a days

    computer allows programmer accessible registersthat manipulate data directly between registers.

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    Numerical

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    ADVANCED ARCHITECTURE

    COMPUTER SYSTEM AND ARCHITECTURE

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    Multicore

    Doing several operations at a single time increases

    efficiency.

    Processor reads and executes fixed and variable

    length instructions.

    Reason for Development-

    Increasing CPU performance

    Applications demanded thread level parallelism Increased available space.

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    How it Works

    Concept of multi-threaded programs or software.

    Multithreaded software

    Operating systems that have the ability to split

    tasks and commands into a set of separate

    workloads that could then be processed and run

    simultaneously on each of the cores present.

    Vendors Intel and AMD AMD Phenom II X2, Intel Core Duo, and

    AMD Phenom II X 6, Intel Core i7 Extreme Edition 980

    X etc.

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    Different from Von Neumann

    Architecture

    The Von Neumann architecture is concerned with the

    sequential processing of instructions whereas in

    multicore several instructions can be processed

    concurrently.

    Consist of one CPU but multicore consist of more

    than one CPU.

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    Success/Failure

    Success-

    Low Heat Dispatch

    Thread level parallelism

    Failure

    Applications are not capable of splitting tasks