Con gurations and Optimizations of TDMA Schedules for ... · Con gurations and Optimizations of TDMA Schedules for Periodic Packet Communication on Networks on Chip Tim Harde1, Matthias

Configurations and Optimizations of TDMASchedules for Periodic Packet Communication on

Networks on Chip

Tim Harde1, Matthias Freier2,Georg von der Bruggen1, and Jian-Jia Chen1

1TU Dortmund University, Germany2Robert Bosch GmbH, Germany

11.10.2018

von der Bruggen (TU Dortmund) 1 / 19

Table of Content

• Model and Design• Communication Tasks• Network on Chip• TDMA

• TDMA Approach for a NoC• Greedy Heuristic• Rectangular Scheduling (Solver Based)

• Evaluation

• Conclusion


Communication Tasks

Periodic communication task τi = (Ti ,Di ,Pi ,Ri , ri , di )

• period Ti

• relative deadline Di

, implicit deadline: Di = Ti

• packet size Pi

• route Ri through the network• source node ri• destination node di• infinite number of packets Pi ,j

Pi,1 Pi,2 Pi,3

Ti

transmission time

Di

0t

communication task set τ = {τ1, τ2, ..., τn}• harmonic: ∀τi , τj ∈ τ : if Ti < Tj then Tj = a · Ti , a ∈ N


Communication Tasks

Periodic communication task τi = (Ti ,Di ,Pi ,Ri , ri , di )

• period Ti

• relative deadline Di , implicit deadline: Di = Ti

• packet size Pi

• route Ri through the network• source node ri• destination node di• infinite number of packets Pi ,j

Pi,1 Pi,2 Pi,3

Ti

transmission time

Di

0t

communication task set τ = {τ1, τ2, ..., τn}• harmonic: ∀τi , τj ∈ τ : if Ti < Tj then Tj = a · Ti , a ∈ N


Network on Chip

Architecture

• r × s 2D-mesh• directed graph:• nodes:• cores Cx,y

• switches Sx,y

• edges:• links Lnode1

node2

Packets and Flits• flow control units (flits):• atomic units of communication• maximum payload pmax : 32 bits

• packet Pi ,j :• segmented into flits if Pi > pmax

S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1 C1,1 C2,1

C0,2 C1,2 C2,2


Network on Chip

Architecture

• r × s 2D-mesh• directed graph:• nodes:• cores Cx,y

• switches Sx,y

• edges:• links Lnode1

node2

Packets and Flits• flow control units (flits):• atomic units of communication• maximum payload pmax : 32 bits

• packet Pi ,j :• segmented into flits if Pi > pmax

S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1 C1,1 C2,1

C0,2 C1,2 C2,2


Network-on-Chip

Cores Cx ,y

• execute computational tasks

• exchange messages (packets)• components:• processing unit• memory• network interface (up-/downlink)

Switches Sx ,y• forward flits through the NoC• components:

• routing logic• arbiter• switching fabric

S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1 C1,1 C2,1

C0,2 C1,2 C2,2


Network-on-Chip

Cores Cx ,y

• execute computational tasks

• exchange messages (packets)• components:• processing unit• memory• network interface (up-/downlink)

Switches Sx ,y• forward flits through the NoC• components:• routing logic• arbiter• switching fabric

S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1 C1,1 C2,1

C0,2 C1,2 C2,2


Network-on-Chip

Links Lnode1node2

• unidirectional connection• flit forwarding• constant link latency l

Synchronicity• fully synchronous system• global clock for NIs and switches

Routing• XY-Routing• deterministic (in-order delivery)• deadlock-free

S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1

C0,1

C1,1 C2,1

C0,2 C1,2 C2,2

C2,2

Example: communication task τi with ri = C0,1 and di = C2,2

⇒ route Ri : LC0,1

S0,1LS0,1S1,1

LS1,1S2,1

LS2,1S2,2

LS2,2C2,2


Network-on-Chip

Links Lnode1node2




S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1

C0,1

C1,1 C2,1

C0,2 C1,2 C2,2

C2,2



S0,1LS0,1S1,1

LS1,1S2,1

LS2,1S2,2

LS2,2C2,2


Network-on-Chip

Links Lnode1node2




S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1

C0,1

C1,1 C2,1

C0,2 C1,2 C2,2

C2,2



S0,1LS0,1S1,1

LS1,1S2,1

LS2,1S2,2

LS2,2C2,2


Network-on-Chip

Links Lnode1node2




S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1C0,1 C1,1 C2,1

C0,2 C1,2 C2,2C2,2



S0,1LS0,1S1,1

LS1,1S2,1

LS2,1S2,2

LS2,2C2,2


Network-on-Chip

Links Lnode1node2




S0,0 S1,0 S2,0

S0,1 S1,1 S2,1

S0,2 S1,2 S2,2

C0,0 C1,0 C2,0

C0,1C0,1 C1,1 C2,1

C0,2 C1,2 C2,2C2,2

Li5

Li1

Li3Li2

Li4



S0,1LS0,1S1,1

LS1,1S2,1

LS2,1S2,2

LS2,2C2,2


Time Division Multiple Access (TDMA)

slot 1 slot 2 slot 3 ... slot n

TDMA frame

TDMA slot

t

Idea: partitioning the access time to a specific resource

Advantages• bandwidth guarantees

• isolation

• predictable timing behavior

• good analyzability

Problem: parameter selection: frame size, slot size and alignment




TDMA frame

TDMA slot

t



• isolation



Disadvantages• global synchronization

• global overhead

• tough design problem

• empty





TDMA frame

TDMA slot

t



• isolation



Disadvantages• global synchronization

• global overhead

• tough design problem

• empty



Global TDMA Approach

τi τj

si sj0 ctL

• synchronous execution of the TDMA schedule on all nodes• start and end of a TDMA slot can be defined arbitrarily

⇒ unused bandwidth possible

TDMA Parameters• TDMA cycle length c

⇒ identical for all TDMA arbiters

• TDMA slot length si⇒ sufficient bandwidth to forward the flits of τi


Global TDMA Approach

τi τj

si sj0 ctL

• synchronous execution of the TDMA schedule on all nodes• start and end of a TDMA slot can be defined arbitrarily

⇒ unused bandwidth possible

TDMA Parameters• TDMA cycle length c

⇒ identical for all TDMA arbiters

• TDMA slot length si⇒ sufficient bandwidth to forward the flits of τi


TDMA Slot Aligning

τi

si0 ctLi1

τi

l si0 ctLi2

τi

2 · l si0 ctLi3

• align TDMA slots on consecutively traversed links⇒ immediate forwarding of flits⇒ no buffering required⇒ no flow control mechanism required (bandwidth guarantee)⇒ no contention from other packets (isolation property)

TDMA slot assignment respecting the alignment property


TDMA Slot Aligning

τi

si0 ctLi1

τi

l si0 ctLi2

τi

2 · l si0 ctLi3




TDMA Slot Aligning

τi

si0 ctLi1

τi

l si0 ctLi2

τi

2 · l si0 ctLi3




TDMA Parameter Selection - Cycle Length

TDMA Cycle Length

• identical for all TDMA arbiters in the NoC

TDMA cycle length c ∈ {T1,T2, ...,Tn}

Harmonic Property of τ :

⇒ packets are released at the same offset of the TDMA cycle

⇒ identical response times for consecutive packet releases

Fragmentation:

• Ti < c : integer number of packets releases per TDMA cycle

• Ti = c : one packet release per TDMA cycle

• Ti > c : one packet release every Tic TDMA cycles

Directly provides the slot size si for each task



TDMA Cycle Length






Fragmentation:







TDMA Cycle Length






Fragmentation:







TDMA Cycle Length






Fragmentation:







TDMA Cycle Length






Fragmentation:






TDMA Schedule Design - Overview

Given:• communication task set τ = {τ1, τ2, ..., τn}⇒ harmonic periods⇒ implicit deadlines

• r × s NoC platform

The problem is to determine

1 the TDMA cycle length

: c ∈ {T1,T2, ...,Tn}

2 the TDMA slot size si

: fragmentation, # releases

3 the offset of each TDMA slot in the TDMA cycles

all tasks can be feasibly scheduled and the TDMA slots are aligned

Approaches:

• First-Fit Greedy Heuristic

• Rectangular Scheduling (solver-based approach)






1 the TDMA cycle length

: c ∈ {T1,T2, ...,Tn}

2 the TDMA slot size si




Approaches:








1 the TDMA cycle length: c ∈ {T1,T2, ...,Tn}2 the TDMA slot size si




Approaches:








1 the TDMA cycle length: c ∈ {T1,T2, ...,Tn}2 the TDMA slot size si : fragmentation, # releases



Approaches:








1 the TDMA cycle length: c ∈ {T1,T2, ...,Tn}2 the TDMA slot size si : fragmentation, # releases



Approaches:




TDMA Design - Greedy Heuristics

• Communication Task Scheduling• tasks are scheduled successively• tasks are scheduled in a specific order

• TDMA Slot Assignment:• start as early as possible• alignment property is maintained• isolation property is maintained (non-overlapping slots)

• Ordering Strategies:• Largest Utilization First (LUF)• Smallest Utilization First (SUF)• Largest Period First (LPF)• Smallest Period First (SPF)• Random• Largest Hop Count First + {LUF, SUF,LPF,SPF}• Hop-Count Weighted LUF (HC-W-LUF)












TDMA Design - Greedy Heuristics (Example)

Communication Tasks• task τ1:• T1 = 10, LTT1 = 3• r1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2• r2 = C0,0, d1 = C2,0

NoC Parameters

• link latency: l = 1

TDMA Parameters

• TDMA cycle length: c = 10

• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

LTT2

0 c = 10tL

C0,0

S0,0

τ2

LTT2l

0 c = 10tL

S0,0S1,0

τ1

LTT1

0 c = 10tL

C1,0

S1,0

τ1

τ2

LTT1

LTT2

l

l

0 c = 10tL

S1,0S2,0

τ1

τ2

LTT1

LTT2

l

l

0 5 c = 10tL

S2,0S2,0




• task τ2:• T2 = 10, LTT2 = 2• r2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

LTT2

0 c = 10tL

C0,0

S0,0

τ2

LTT2l

0 c = 10tL

S0,0S1,0

τ1

LTT1

0 c = 10tL

C1,0

S1,0

τ1

τ2

LTT1

LTT2

l

l

0 c = 10tL

S1,0S2,0

τ1

τ2

LTT1

LTT2

l

l

0 5 c = 10tL

S2,0S2,0




• task τ2:• T2 = 10, LTT2 = 2• r2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

LTT2

0 c = 10tL

C0,0

S0,0

τ2

LTT2l

0 c = 10tL

S0,0S1,0

τ1

LTT1

0 c = 10tL

C1,0

S1,0

τ1

τ2

LTT1

LTT2

l

l

0 c = 10tL

S1,0S2,0

τ1

τ2

LTT1

LTT2

l

l

0 5 c = 10tL

S2,0S2,0




• task τ2:• T2 = 10, LTT2 = 2• r2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

LTT2

0 c = 10tL

C0,0

S0,0

τ2

LTT2l

0 c = 10tL

S0,0S1,0

τ1

LTT1

0 c = 10tL

C1,0

S1,0

τ1

τ2

LTT1

LTT2

l

l

0 c = 10tL

S1,0S2,0

τ1

τ2

LTT1

LTT2

l

l

0 5 c = 10tL

S2,0S2,0




• task τ2:• T2 = 10, LTT2 = 2• r2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

LTT2

0 c = 10tL

C0,0

S0,0

τ2

LTT2l

0 c = 10tL

S0,0S1,0

τ1

LTT1

0 c = 10tL

C1,0

S1,0

τ1 τ2

LTT1 LTT2l l

0 c = 10tL

S1,0S2,0

τ1 τ2

LTT1 LTT2l l

0 5 c = 10tL

S2,0S2,0


TDMA Design - Rectangular Scheduling

τi

NetworkTraversalTime(NTT )

tLi1

τitLi2

τi

0 ct

rectangular reservationLi3

Scheduling Strategy• Resource Reservations• reservations of width Network Traversal Time (NTT)• isolation property: non-overlapping rectangles• arrangement of the rectangular reservations:⇒ Integer Linear Programming (ILP) formulation⇒ Constraint Programming (CP) formulation

• TDMA Slot Assignment:• slots are allocated within rectangular reservations• maintain alignment property


TDMA Design - Rectangular Scheduling

τi

NetworkTraversalTime(NTT )

tLi1

τitLi2

τi

0 ct

rectangular reservationLi3

Scheduling Strategy• Resource Reservations• reservations of width Network Traversal Time (NTT)• isolation property: non-overlapping rectangles• arrangement of the rectangular reservations:⇒ Integer Linear Programming (ILP) formulation⇒ Constraint Programming (CP) formulation

• TDMA Slot Assignment:• slots are allocated within rectangular reservations• maintain alignment property


TDMA Design - Rectangular Scheduling (Example)

Communication Tasks• task τ1:• T1 = 10, LTT1 = 3,

NTT1 = 5• s1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2,

NTT2 = 5• s2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

NTT2

tLC0,0

S0,0

τ2

NTT2

tLS0,0S1,0

τ1

NTT1

tLC1,0

S1,0

τ1

τ2

NTT1

NTT2

tLS1,0S2,0

τ1

τ2

NTT1

NTT2

0 5 c = 10tL

S2,0S2,0




NTT1 = 5• s1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2,

NTT2 = 5• s2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

NTT2

tLC0,0

S0,0

τ2

NTT2

tLS0,0S1,0

τ1

NTT1

tLC1,0

S1,0

τ1

τ2

NTT1

NTT2

tLS1,0S2,0

τ1

τ2

NTT1

NTT2

0 5 c = 10tL

S2,0S2,0




NTT1 = 5• s1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2,

NTT2 = 5• s2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

NTT2

tLC0,0

S0,0

τ2

NTT2

tLS0,0S1,0

τ1

NTT1

tLC1,0

S1,0

τ1

τ2

NTT1

NTT2

tLS1,0S2,0

τ1

τ2

NTT1

NTT2

0 5 c = 10tL

S2,0S2,0




NTT1 = 5• s1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2,

NTT2 = 5• s2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

NTT2

tLC0,0

S0,0

τ2

NTT2

tLS0,0S1,0

τ1

NTT1

tLC1,0

S1,0

τ1

τ2

NTT1

NTT2

tLS1,0S2,0

τ1

τ2

NTT1

NTT2

0 5 c = 10tL

S2,0S2,0




NTT1 = 5• s1 = C1,0, d1 = C2,0

• task τ2:• T2 = 10, LTT2 = 2,

NTT2 = 5• s2 = C0,0, d1 = C2,0

NoC Parameters


TDMA Parameters


• s1 = LTT1 = 3

• s2 = LTT2 = 2

S0,0 S1,0 S2,0

C0,0 C1,0 C2,0

τ2

NTT2

tLC0,0

S0,0

τ2

NTT2

tLS0,0S1,0

τ1

NTT1

tLC1,0

S1,0

τ1 τ2

NTT1 NTT2

tLS1,0S2,0

τ1 τ2

NTT1 NTT2

0 5 c = 10tL

S2,0S2,0


Evaluation - 3 × 3 parameters

flitPayload (bit) 32

linkLatency (µs) 5

numberOfTasks 20, 25, 30, 35, 40, 45, 50, 100,200, 300, 400, 500, 750, 1000

utilization (%) 5, 10, 15, 20, 25, 30, 35, 40, 45,50, 55, 60, 65, 70, 75

simple strategies Random, LPF, SPF, LUF, SUFcombined strategies LHCF+{LPF,SPF,LUF,SUF}

HC-W-LUFsolver based CP, ILP

periods (µs) 10000, 20000, 40000, 80000,160000

# experiments 100

ILPTimeLimit (s) 60.0

CPTimeLimit (s) 60.0


Evaluation - Success Rate Analysis (3× 3 topology)

Random LPF

SPFLUF

SUF

LHCF+LPF

LHCF+SPF

LHCF+LUF

LHCF+SUF

HC-W-L

UF CPIL

P

0

0.5

1

1.5

2·104

21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000 21,000

11,580 11,619

13,496 13,797

10,97211,942

12,628 12,84511,889

13,746 13,744

5,9224,938 4,938

5,654 5,8294,831 5,128 5,324 5,383 5,118

5,799 5,936 5,922

#T

DM

Asc

hed

ule

s

Successful (≤100 tasks) Successful (>100 tasks) Unsolved


Evaluation - TDMA Cycle Length Analysis

• minimize TDMA slot length⇒ minimize memory to store TDMA schedule⇒ more accurate synchronization (TDMA cycle end)


Conclusion

Results:

• a framework to derive / verify a TDMA schedule for a NoC

• greedy heuristic which provides good results

• a solver-based problem formulation (rectangular scheduling)

• works with clock drift

Evaluation:• TDMA efficiently applied to NoC with reasonable utilization• harmonic periods• implicit deadlines• synchronous systems

• short TDMA cycle length (frame size)

Thank You!


Conclusion

Results:







Thank You!


Conclusion

Results:







Thank You!


Documents

Con gurations and Optimizations of TDMA Schedules for ... · Con gurations and Optimizations of TDMA Schedules for Periodic Packet Communication on Networks on Chip Tim Harde1, Matthias