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Application Report AN01274–April 2010 Configuring Stellaris® Microcontrollers with Pin Multiplexing ABSTRACT Many members of the Stellaris® family of microcontrollers provide system designers with a great deal of control over the placement and selection of peripheral module signals that are alternate functions for GPIO signals. This application note provides an overview of the pin muxing implementation, an explanation of how a system designer defines a pin configuration, and examples of the pin configuration process. Contents 1 Introduction ................................................................................................................................. 1 2 Pin Muxing Overview ..................................................................................................................... 1 3 Pin Allocation ............................................................................................................................... 2 4 Examples .................................................................................................................................... 2 5 Conclusion ................................................................................................................................ 36 6 References ................................................................................................................................ 37 1 Introduction Many members of the Stellaris® family of microcontrollers provide system designers with a great deal of control over the placement and selection of peripheral module signals that are alternate functions for GPIO signals. These devices have a various number of pins that can be used for peripheral functions or as GPIOs. These pins can be customized to provide the best possible signal combination for each individual system design. The remaining pins on the package are power and ground pins, crystal inputs, and a few other functions (Hibernation module signals, USB and Ethernet I/O signals, and BIAS inputs) that require fixed pin location and function. This application note provides an overview of the pin muxing implementation, an explanation of how a system designer defines a pin configuration, and examples of the pin configuration process using various Stellaris® microcontrollers. 2 Pin Muxing Overview Most of the GPIO pins default to GPIO signals at reset, with the following exceptions: JTAG/SWD signals needed at power up for the debugger UART0 Rx/Tx signals needed to allow the Stellaris Boot Loader to operate from ROM SSI0 Clk/Fss/Rx/Tx signals needed to allow the Stellaris Boot Loader to operate from ROM I 2 C SCL/SDA signals needed to allow the Stellaris Boot Loader to operate from ROM Users can select one from up to 11 possible alternate functions for each pin using the GPIO Port Control (GPIOPCTLx) registers. The "GPIO Pins and Alternate Functions" table in the Signal Tables chapter of a device data sheet shows all the possible functions for each GPIO pin. To configure a GPIO pin to an alternate function, follow these steps: 1. Enable the clock to the appropriate GPIO port using the SysCtlPeripheralEnable() function. 2. Enable the clock to the peripherals using the SysCtlPeripheralEnable() function. 3. Configure the pins to the appropriate function using the GPIOPinConfigure() function. 4. Configure the signal attributes using the GPIOPinTypexxx() function to configure the pins for specific peripheral function. Configuring Stellaris® Microcontrollers with Pin Multiplexing 1 AN01274–April 2010 Copyright © 2010 Texas Instruments Incorporated

Configuring Stellaris® Microcontrollers with Pin Multiplexing

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Find out more about the Stellaris line of Microcontrollers at: http://bit.ly/TI_StellarisThis application note provides an overview of the pin muxing implementation, an explanation of how a systemdesigner defines a pin configuration, and examples of the pin configuration process using various Stellaris®microcontrollers.Microcontroller http://www.ti.com/lsds/ti/microcontroller/home.page?DCMP=TI_MCUS&HQS=Other+OT+mcu8 bit microcontroller http://www.ti.com/mcu/docs/mcuproductcontentnp.tsp?sectionId=95&tabId=2858&familyId=193716 bit microcontroller http://www.ti.com/lsds/ti/microcontroller/16-bit_msp430/overview.page32 bit microcontroller http://www.ti.com/lsds/ti/microcontroller/32-bit_c2000/overview.pageARM microcontroller http://www.ti.com/lsds/ti/microcontroller/arm_stellaris/overview.page?DCMP=Luminary&HQS=Other+OT+stellaris

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Page 1: Configuring Stellaris® Microcontrollers with Pin Multiplexing

Application ReportAN01274–April 2010

Configuring Stellaris®Microcontrollers with PinMultiplexingABSTRACT

Many members of the Stellaris® family of microcontrollers provide system designers with a great deal ofcontrol over the placement and selection of peripheral module signals that are alternate functions for GPIOsignals. This application note provides an overview of the pin muxing implementation, an explanation of howa system designer defines a pin configuration, and examples of the pin configuration process.

Contents1 Introduction ................................................................................................................................. 12 Pin Muxing Overview ..................................................................................................................... 13 Pin Allocation ............................................................................................................................... 24 Examples .................................................................................................................................... 25 Conclusion ................................................................................................................................ 366 References ................................................................................................................................ 37

1 IntroductionMany members of the Stellaris® family of microcontrollers provide system designers with a great deal ofcontrol over the placement and selection of peripheral module signals that are alternate functions for GPIOsignals. These devices have a various number of pins that can be used for peripheral functions or as GPIOs.These pins can be customized to provide the best possible signal combination for each individual systemdesign. The remaining pins on the package are power and ground pins, crystal inputs, and a few other functions(Hibernation module signals, USB and Ethernet I/O signals, and BIAS inputs) that require fixed pin locationand function.

This application note provides an overview of the pin muxing implementation, an explanation of how a systemdesigner defines a pin configuration, and examples of the pin configuration process using various Stellaris®microcontrollers.

2 Pin Muxing OverviewMost of the GPIO pins default to GPIO signals at reset, with the following exceptions:• JTAG/SWD signals needed at power up for the debugger• UART0 Rx/Tx signals needed to allow the Stellaris Boot Loader to operate from ROM• SSI0 Clk/Fss/Rx/Tx signals needed to allow the Stellaris Boot Loader to operate from ROM• I2C SCL/SDA signals needed to allow the Stellaris Boot Loader to operate from ROM

Users can select one from up to 11 possible alternate functions for each pin using the GPIO Port Control(GPIOPCTLx) registers. The "GPIO Pins and Alternate Functions" table in the Signal Tables chapter of adevice data sheet shows all the possible functions for each GPIO pin.

To configure a GPIO pin to an alternate function, follow these steps:1. Enable the clock to the appropriate GPIO port using the SysCtlPeripheralEnable() function.2. Enable the clock to the peripherals using the SysCtlPeripheralEnable() function.3. Configure the pins to the appropriate function using the GPIOPinConfigure() function.4. Configure the signal attributes using the GPIOPinTypexxx() function to configure the pins for specific

peripheral function.

Configuring Stellaris® Microcontrollers with Pin Multiplexing 1AN01274–April 2010Copyright © 2010 Texas Instruments Incorporated

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3 Pin AllocationTo decide how to distribute the signals on the device, make a list of the signals needed in the system. Threefactors to keep in mind when allocating signals are:• The number of possible pin assignments for each signal. Some signals can only be assigned to one pin,

while others can be assigned to up to ten pins.• Some signals should be assigned to the same GPIO port so that they can be accessed in a single write,

for example, when using both PWM2 and PWM3 for bit banging.• Some signals with similar functions are fungible. For example, if you need 4 CCP signals, you can choose

any of the CCPx signals; if you need 1 Fault signal, you can choose any of the Faultx signals.

To begin pin allocation, first assign the signals that have only one available location, then assign the onesthat have two, then three, and so on, bearing in mind the factors listed above. Once the pins have beenallocated, then write the code to properly configure the GPIOs for the signal selections.

The "Possible Pin Assignments for Alternate Functions" table in the Signal Tables chapter of a device datasheet shows the possible pin assignments for that device.

4 ExamplesTable 1 summarizes the examples in this application note. The code for these examples can be found on theSoftware Updates page at www.ti.com/stellaris. If your application matches or is a subset of one of theseexamples, you can simply use the code for that example, modifying it to remove any unneeded signals. Ifyour application requires additional or different signals that have several possible pin assignments, you maybe able to easily modify one of the following examples to meet your requirements. However, if the additionalsignals your application requires have few possible pin assignments, it is usually easiest to start from scratchwith the pin assignments following the described in the Pin Allocation section.

The code to create the examples implements Steps 1 and 3 described in the “Pin Muxing Overview”. Steps2 and 4 are outside the scope of this example and are not included in the code.

Table 1. Example Configurations

CCPTimerExt

Ref

ADCI2SSSII2CUARTCANQEIFaultPWMHIBEPIaUSBEthEx.

84Y1602231NANANAYNHostY1

74Y412221NANANAYNOTGY2

04N00222b0NANANAYNOTGY3

04Y401112NANANAYHBOTGY4

04Y410110NANANAYGPOTGY5

74N1202211148NANOTGY6

24Y401122116NASNY7

14N411220000NAHBNY8

74N412231000NANHostY9

44Y401111016NAGPNY10

04Y400232118NAHBFNY11

14N1602220248YNNANA12

04Y402131000YSNANA13

04Y400022228YHBFNANA14

04Y400022228YSNANA15

84N41223b1000NANNNA16

64N211121000NAGPNNA17

AN01274–April 20102 Configuring Stellaris® Microcontrollers with Pin MultiplexingCopyright © 2010 Texas Instruments Incorporated

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Table 1. Example Configurations (continued)

CCPTimerExt

Ref

ADCI2SSSII2CUARTCANQEIFaultPWMHIBEPIaUSBEthEx.

54N211111000NAHBOTGNA18

64Y40102b0000NAHBOTGNA19

04Y401111124NAGPOTGNA20

04Y400001118NAGPOTGNA21

a. N = no EPI interface, HB = Host-Bus interface, GP = General-Purpose interface, S = SDRAM interface, HBF = Host-Bus FIFO interfaceb. UART1 uses modem controls

4.1 Example 1Example 1 uses the LM3S9B90 device with the modules and signals shown in Table 2.

Table 2. Example 1 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

Remaining signals have fixed locations.USB0PFLT, USB0EPENUSB Host

Signals have fixed locations.Hibernate

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1Tx, U2Rx, U2TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

PB[5:4], PD[7:0], PE[7:2], and PB6 usedas analog functions

AIN[15:0], VREFAADC

CCP0, CCP1, CCP2, CCP3, CCP4, CCP5, CCP6, CCP74 Timers, 8 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)• Port F - LED1 (PF2), LED0 (PF3)

Step 2: Assign signals with 2 available pin assignments:• This configuration does not use any of the pins with 2 possible pin assignments.

Step 3: Assign signals with 3 available pin assignments:• Port H - SSI1Clk (PH4), SSI1Fss (PH5), SSI1Rx (PH6), SSI1Tx (PH7)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)• Port G - U2Rx (PG0), U2Tx (PG1)• Port J - I2C1SCL (PJ0), I2C1SDA (PJ1)

Step 5: Assign signals with 5 available pin assignments:• Port C - CCP4 (PC4)

Configuring Stellaris® Microcontrollers with Pin Multiplexing 3AN01274–April 2010Copyright © 2010 Texas Instruments Incorporated

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• Port H - CCP6 (PH0), CCP7 (PH1), USB0EPEN (PH3)

Step 6: Assign signals with 6 available pin assignments:• Port C - U1Rx (PC6), U1Tx (PC7)• Port G - CCP5 (PG7)

Step 7: Assign signals with 7 available pin assignments:• Port C - CCP1 (PC5)• Port E - USB0PFLT (PE0)

Step 8: Assign signals with 8 available pin assignments:• Port F - CCP3 (PF1)

Step 9: Assign signals with 9 available pin assignments:• Port E - CCP2 (PE1)• Port F - CCP0 (PF4)

Table 3 shows the final pin assignments for Example 1. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 3. Final Pin Assignments for Example 1

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

I2C1SCLCCP6U2Rx-USB0PFLTAIN15TCK/

SWCLK

-U0Rx0

I2C1SDACCP7U2TxCCP3CCP2AIN14TMS/

SWDIO

-U0Tx1

--NALED1AIN9AIN13TDII2C0SCLSSI0Clk2

NAUSB0EPENNALED0AIN8AIN12TDO/

SWO

I2C0SDASSI0Fss3

NASSI1ClkNACCP0AIN3AIN7CCP4AIN10SSI0Rx4

NASSI1FssNA-AIN2AIN6CCP1AIN11SSI0Tx5

NASSI1RxNANAAIN1AIN5U1RxVREFACAN0Rx6

NASSI1TxCCP5NAAIN0AIN4U1TxNMICAN0Tx7

4.2 Example 2Example 2 uses the LM3S9B90 device with the modules and signals shown in Table 4.

Table 4. Example 2 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

Signals have fixed locations.Hibernate

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

AN01274–April 20104 Configuring Stellaris® Microcontrollers with Pin MultiplexingCopyright © 2010 Texas Instruments Incorporated

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Table 4. Example 2 Module and Signal List (continued)

NotesSignalsModule

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:4] and PB6 used as analogfunctions

AIN[3:0], VREFAADC

CCP0, CCP1, CCP2, CCP3, CCP4, CCP5, CCP64 Timers, 7 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)• Port D - I2S0RXSCK (PD0), I2S0RXWS (PD1)• Port F - I2S0TXMCLK (PF1), LED1 (PF2), LED0 (PF3)

Step 2: Assign signals with 2 available pin assignments:• Port D - I2S0RXSD (PD4), I2S0RXMCLK (PD5)• Port F - I2S0TXSD (PF0)

Step 3: Assign signals with 3 available pin assignments:• Port D - I2S0TXSCK (PD6), I2S0TXWS (PD7)• Port E - SSI1Clk (PE0), SSI1Fss (PE1), SSI1Rx (PE2), SSI1Tx (PE3)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)• Port G - I2C1SCL (PG0), I2C1SDA (PG1)

Step 5: Assign signals with 5 available pin assignments:• Port C - USB0EPEN (PC5), CCP4 (PC7)• Port H - CCP6 (PH0)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB4), U1Tx (PB5)• Port D - CCP5 (PD2)

Step 7: Assign signals with 7 available pin assignments:• Port C - CCP1 (PC4)• Port H - USB0PFLT (PH4)

Step 8: Assign signals with 8 available pin assignments:• Port C - CCP3 (PC6)

Step 9: Assign signals with 9 available pin assignments:• Port D - CCP0 (PD3)• Port F - CCP2 (PF5)

Table 5 shows the final pin assignments for Example 2. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Configuring Stellaris® Microcontrollers with Pin Multiplexing 5AN01274–April 2010Copyright © 2010 Texas Instruments Incorporated

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Table 5. Final Pin Assignments for Example 2

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

-CCP6I2C1SCLI2S0TXSDSSI1ClkI2S0RXSCKTCK/

SWCLK

USB0IDU0Rx0

--I2C1SDAI2S0TXMCLKSSI1FssI2S0RXWSTMS/

SWDIO

USB0VBUSU0Tx1

--NALED1SSI1RxCCP5TDII2C0SCLSSI0Clk2

NA-NALED0SSI1TxCCP0TDO/

SWO

I2C0SDASSI0Fss3

NAUSB0PFLTNA-AIN3I2S0RXSDCCP1U1RxSSI0Rx4

NA-NACCP2AIN2I2S0RXMCLKUSB0EPENU1TxSSI0Tx5

NA-NANAAIN1I2S0TXSCKCCP3VREFACAN0Rx6

NA--NAAIN0I2S0TXWSCCP4NMICAN0Tx7

4.3 Example 3Example 3 uses the LM3S9B90 device with the modules and signals shown in Table 6.

Table 6. Example 3 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

Signals have fixed locations.Hibernate

U0Rx, U0Tx, U1Rx, U1Tx, U1CTS, U1DCD, U1DSR, U1DTR,U1RI, U1RTS

UART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)• Port D - U1RI (PD4), U1DTR (PD7)• Port F - U1DSR (PF0), U1RTS (PF1), LED1 (PF2), LED0 (PF3)

Assign signals with 2 available pin assignments:• This configuration does not use any of the pins with 2 possible pin assignments.

Step 3: Assign signals with 3 available pin assignments:• Port A - U1CTS (PA6), U1DCD (PA7)• Port E - SSI1Clk (PE0), SSI1Fss (PE1), SSI1Rx (PE2), SSI1Tx (PE3)

Step 4: Assign signals with 4 available pin assignments:

AN01274–April 20106 Configuring Stellaris® Microcontrollers with Pin MultiplexingCopyright © 2010 Texas Instruments Incorporated

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• Port G - I2C1SCL (PG0), I2C1SDA (PG1)

Step 5: Assign signals with 5 available pin assignments:• Port C - USB0EPEN (PC5)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB4), U1Tx (PB5)

Step 7: Assign signals with 7 available pin assignments:• Port C - USB0PFLT (PC6)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use the pin with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• This configuration does not use any of the pins with 9 possible pin assignments.

Table 7 shows the final pin assignments for Example 3. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 7. Final Pin Assignments for Example 3

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

--I2C1SCLU1DSRSSI1Clk-TCK/

SWCLK

USB0IDU0Rx0

--I2C1SDAU1RTSSSI1Fss-TMS/

SWDIO

USB0VBUSU0Tx1

--NALED1SSI1Rx-TDII2C0SCLSSI0Clk2

NA-NALED0SSI1Tx-TDO/

SWO

I2C0SDASSI0Fss3

NA-NA--U1RI-U1RxSSI0Rx4

NA-NA---USB0EPENU1TxSSI0Tx5

NA-NANA--USB0PFLT-U1CTS6

NA--NA-U1DTR-NMIU1DCD7

4.4 Example 4Example 4 uses the LM3S9B90 device with the modules and signals shown in Table 8.

Table 8. Example 4 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface to Host Bus

Signals have fixed locations.Hibernate

CAN0Rx, CAN0Tx, CAN1Rx, CAN1TxCAN

U0Rx, U0TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

Configuring Stellaris® Microcontrollers with Pin Multiplexing 7AN01274–April 2010Copyright © 2010 Texas Instruments Incorporated

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Table 8. Example 4 Module and Signal List (continued)

NotesSignalsModule

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3), EPI0S19 (PD4), EPI0S28 (PD5), EPI0S29 (PD6), EPI0S30

(PD7)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port F - CAN1Rx (PF0), CAN1Tx (PF1), LED1 (PF2), LED0 (PF3), EPI0S12 (PF4), EPI0S15 (PF5)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• This configuration does not use any of the pins with 2 possible pin assignments.

Step 3: Assign signals with 3 available pin assignments:• This configuration does not use any of the pins with 3 possible pin assignments.

Step 4: Assign signals with 4 available pin assignments:• Port D - CAN0Rx (PD0), CAN0Tx (PD1)

Step 5: Assign signals with 5 available pin assignments:• Port A - USB0EPEN (PA6)

Step 6: Assign signals with 6 available pin assignments:• This configuration does not use any of the pins with 6 possible pin assignments.

Step 7: Assign signals with 7 available pin assignments:• Port A - USB0PFLT (PA7)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use the pin with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• This configuration does not use any of the pins with 9 possible pin assignments.

Table 9 shows the final pin assignments for Example 4. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

AN01274–April 20108 Configuring Stellaris® Microcontrollers with Pin MultiplexingCopyright © 2010 Texas Instruments Incorporated

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Table 9. Final Pin Assignments for Example 4

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13CAN1RxEPI0S8CAN0RxTCK/

SWCLK

USB0IDU0Rx0

EPI0S17EPI0S7EPI0S14CAN1TxEPI0S9CAN0TxTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1NALED1EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

NAEPI0S0NALED0EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

NAEPI0S10NAEPI0S12AIN3EPI0S19EPI0S2EPI0S23SSI0Rx4

NAEPIS011NAEPI0S15AIN2EPI0S28EPI0S3EPI0S22SSI0Tx5

NAEPI026NANAAIN1EPI0S29EPI0S4VREFAUSB0EPEN6

NAEPI027EPI0S31NAAIN0EPI0S30EPI0S5NMIUSB0PFLT7

4.5 Example 5Example 5 uses the LM3S9B90 device with the modules and signals shown in Table 10.

Table 10. Example 5 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface inGeneral-Purpose mode

Signals have fixed locations.Hibernate

U0Rx, U0TxUART

I2C0SCL, I2C0SDAI2C

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port D - I2S0RXSCK (PD0), I2S0RXWS (PD1), EPI0S20 (PD2), EPI0S21 (PD3), EPI0S19 (PD4), EPI0S28

(PD5), EPI0S29 (PD6), EPI0S30 (PD7)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port F - I2S0TXMCLK (PF1), LED1 (PF2), LED0 (PF3), EPI0S12 (PF4), EPI0S15 (PF5)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)

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• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),EPI0S26 (PH6), EPI0S27 (PH7)

• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port A - I2S0RXSD (PA2), I2S0RXMCLK (PA3)• Port F - I2S0TXSD (PF0)

Step 3: Assign signals with 3 available pin assignments:• Port A - I2S0TXSCK (PA4), I2S0TXWS (PA5)

Step 4: Assign signals with 4 available pin assignments:• This configuration does not use any of the pins with 4 possible pin assignments.

Step 5: Assign signals with 5 available pin assignments:• Port A - USB0EPEN (PA6)

Step 6: Assign signals with 6 available pin assignments:• This configuration does not use any of the pins with 6 possible pin assignments.

Step 7: Assign signals with 7 available pin assignments:• Port A - USB0PFLT (PA7)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use the pin with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• This configuration does not use any of the pins with 9 possible pin assignments.

Table 11 shows the final pin assignments for Example 5. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 11. Final Pin Assignments for Example 5

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13I2S0TXSDEPI0S8I2S0RXSCKTCK/

SWCLK

USB0IDU0Rx0

EPI0S17EPI0S7EPI0S14I2S0TXMCLKEPI0S9I2S0RXWSTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1NALED1EPI0S24EPI0S20TDII2C0SCLI2S0RXSD2

NAEPI0S0NALED0EPI0S25EPI0S21TDO/

SWO

I2C0SDAI2S0RXMCLK3

NAEPI0S10NAEPI0S12AIN3EPI0S19EPI0S2EPI0S23I2S0TXSCK4

NAEPI0S11NAEPI0S15AIN2EPI0S28EPI0S3EPI0S22I2S0TXWS5

NAEPI0S26NANAAIN1EPI0S29EPI0S4VREFAUSB0EPEN6

NAEPI027EPI0S31NAAIN0EPI0S30EPI0S5NMIUSB0PFLT7

4.6 Example 6Example 6 uses the LM3S9B92 device with the modules and signals shown in Table 12.

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Table 12. Example 6 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, Fault0,Fault1, Fault2, Fault3

PWM

PhA0, PhB0, IDX0QEI

CAN0Rx, CAN0TxCAN

U0Rx, U0TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

PB[5:4], PD[7:4], and PE[7:2] used asanalog functions.

AIN[11:0]ADC

CCP0, CCP1, CCP2, CCP4, CCP5, CCP6, CCP74 Timers, 7 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), Fault1 (PB6), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)• Port F - LED1 (PF2), LED0 (PF3)

Step 2: Assign signals with 2 available pin assignments:• Port C - PWM6 (PC4), Fault2 (PC5)• Port H - Fault3 (PH2)

Step 3: Assign signals with 3 available pin assignments:• Port C - PWM7 (PC6)• Port D - PhA0 (PD1)• Port H - SSI1Clk (PH4), SSI1Fss (PH5), SSI1Rx (PH6), SSI1Tx (PH7)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)• Port D - PWM2 (PD2), PWM3 (PD3)• Port J - I2C1SCL (PJ0), I2C1SDA (PJ1)

Step 5: Assign signals with 5 available pin assignments:• Port C - PhB0 (PC7)• Port D - IDX0 (PD0)• Port F - PWM0 (PF0), PWM1 (PF1)• Port H - CCP7 (PH1), USB0EPEN (PH3)

Step 6: Assign signals with 6 available pin assignments:• Port G - CCP5 (PG7)• Port H - CCP6 (PH0)

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• Port J - CCP4 (PJ4)

Step 7: Assign signals with 7 available pin assignments:• Port E - USB0PFLT (PE0), Fault0 (PE1)

Step 8: Assign signals with 8 available pin assignments:• Port G - PWM4 (PG0), PWM5 (PG1)• Port J - CCP1 (PJ6)

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

Step 9: Assign signals with 10 available pin assignments:• Port J - CCP0 (PJ2), CCP2 (PJ5)

Table 13 shows the final pin assignments for Example 6. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 13. Final Pin Assignments for Example 6

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

I2C1SCLCCP6PWM4PWM0USB0PFLTIDX0TCK/

SWCLK

USB0IDU0Rx0

I2C1SDACCP7PWM5PWM1Fault0PhA0TMS/

SWDIO

USB0VBUSU0Tx1

CCP0Fault3NALED1AIN9PWM2TDII2C0SCLSSI0Clk2

-USB0EPENNALED0AIN8PWM3TDO/

SWO

I2C0SDASSI0Fss3

CCP4SSI1ClkNA-AIN3AIN7PWM6AIN10SSI0Rx4

CCP2SSI1FssNA-AIN2AIN6Fault2AIN11SSI0Tx5

CCP1SSI1RxNANAAIN1AIN5PWM7Fault1CAN0Rx6

-SSI1TxCCP5NAAIN0AIN4PhB0NMICAN0Tx7

4.7 Example 7Example 7 uses the LM3S9B92 device with the modules and signals shown in Table 14.

Table 14. Example 7 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

EPI0S[31:28], EPI0S[19:0]EPI interface to SDRAM

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, Fault0PWM

PhA0, PhB0, IDX0QEI

CAN0Rx, CAN0Tx, CAN1Rx, CAN1TxCAN

U0Rx, U0Tx, U1Rx, U1TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

CCP0, CCP14 Timers, 2 CCP inputs

NMISystem Control

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Table 14. Example 7 Module and Signal List (continued)

NotesSignalsModule

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port E - EPI0S8 (PE0), EPI0S9 (PE1)• Port F - CAN1Rx (PF0), CAN1Tx (PF1), LED1 (PF2), LED0 (PF3), EPI0S12 (PF4), EPI0S15 (PF5)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S19 (PD4), EPI0S28 (PD5), EPI0S30 (PD7)• Port J - EPI0S29 (PJ5)

Step 3: Assign signals with 3 available pin assignments:• Port E - PhA0 (PE2)

Step 4: Assign signals with 4 available pin assignments:• Port D - CAN0Rx (PD0), CAN0Tx (PD1), PWM2 (PD2), PWM3 (PD3)

Step 5: Assign signals with 5 available pin assignments:• Port A - PWM0 (PA6), PWM1 (PA7)• Port B - IDX0 (PB4)• Port E - PhB0 (PE3)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)

Step 7: Assign signals with 7 available pin assignments:• Port D - Fault0 (PD6)

Step 8: Assign signals with 8 available pin assignments:• Port H - PWM4 (PH6), PWM5 (PH7)• Port J - CCP1 (PJ6)

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

Step 9: Assign signals with 10 available pin assignments:• Port B - CCP0 (PB5)

Table 15 shows the final pin assignments for Example 7. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 15. Final Pin Assignments for Example 7

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13CAN1RxEPI0S8CAN0RxTCK/

SWCLK

U1RxU0Rx0

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Table 15. Final Pin Assignments for Example 7 (continued)

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S17EPIOS7EPI0S14CAN1TxEPI0S9CAN0TxTMS/

SWDIO

U1TxU0Tx1

EPI0S18EPI0S1NALED1PhA0PWM2TDII2C0SCLSSI0Clk2

-EPI0S0NALED0PhB0PWM3TDO/

SWO

I2C0SDASSI0Fss3

-EPI0S10NAEPI0S12AIN3EPI0S19EPI0S2IDX0SSI0Rx4

EPI0S29EPI0S11NAEPI0S15AIN2EPI0S28EPI0S3CCP0SSI0Tx5

CCP1PWM4NANAAIN1Fault0EPI0S4VREFAPWM06

-PWM5EPI0S31NAAIN0EPI0S30EPI0S5NMIPWM17

4.8 Example 8Example 8 uses the LM3S9B92 device with the modules and signals shown in Table 16.

Table 16. Example 8 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

EPI0S[31:0]EPI interface to Host Bus

U0Rx, U0Tx, U1Rx, U1TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:4] used as analog functions.AIN[3:0]ADC

No signals.CCP04 Timers, 1 CCP input

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port D - I2S0RXSCK (PD0), I2S0RXWS (PD1), EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port F - I2S0TXMCLK (PF1), LED1 (PF2), LED0 (PF3), EPI0S12 (PF4), EPI0S15 (PF5)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - I2S0RXSD (PD4), I2S0RXMCLK (PD5), EPI0S29 (PD6)• Port F - I2S0TXSD (PF0)• Port J - EPI0S19 (PJ3), EPI0S28 (PJ4), EPI0S30 (PJ6)

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Step 3: Assign signals with 3 available pin assignments:• Port B - I2S0TXSCK (PB6)• Port D - I2S0TXWS (PD7)

Step 4: Assign signals with 4 available pin assignments:• Port A - I2C1SCL (PA6), I2C1SDA (PA7)

Step 5: Assign signals with 5 available pin assignments:• This configuration does not use any of the pins with 5 possible pin assignments.

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)

Step 7: Assign signals with 7 available pin assignments:• This configuration does not use any of the pins with 7 possible pin assignments.

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

Step 9: Assign signals with 10 available pin assignments:• Port J - CCP0 (PJ7)

Table 17 shows the final pin assignments for Example 8. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 17. Final Pin Assignments for Example 8

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13I2S0TXSDEPI0S8I2S0RXSCKTCK/

SWCLK

U1RxU0Rx0

EPI0S17EPIOS7EPI0S14I2S0TXMCLKEPI0S9I2S0RXWSTMS/

SWDIO

U1TxU0Tx1

EPI0S18EPI0S1NALED1EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

EPI0S19EPI0S0NALED0EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

EPI0S28EPI0S10NAEPI0S12AIN3I2S0RXSDEPI0S2EPI0S23SSI0Rx4

-EPI0S11NAEPI0S15AIN2I2S0RXMCLKEPI0S3EPI0S22SSI0Tx5

EPI0S30EPI0S26NANAAIN1EPI0S29EPI0S4I2S0TXSCKI2C1SCL6

CCP0EPI0S27EPI0S31NAAIN0I2S0TXWSEPI0S5NMII2C1SDA7

4.9 Example 9Example 9 uses the LM3S9B92 device with the modules and signals shown in Table 18.

Table 18. Example 9 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

USB0PFLT, USB0EPENUSB Host

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1Tx, U2Rx, U2TxUART

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Table 18. Example 9 Module and Signal List (continued)

NotesSignalsModule

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:4] used as analog functions.AIN[3:0]ADC

CCP0, CCP1, CCP2, CCP4, CCP5, CCP6, CCP74 Timers, 7 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)• Port D - I2S0RXSCK (PD0), I2S0RXWS (PD1)• Port F - I2S0TXMCLK (PF1), LED1 (PF2), LED0 (PF3)

Step 2: Assign signals with 2 available pin assignments:• Port D - I2S0RXSD (PD4), I2S0RXMCLK (PD5)• Port F - I2S0TXSD (PF0)

Step 3: Assign signals with 3 available pin assignments:• Port B - I2S0TXSCK (PB6)• Port D - I2S0TXWS (PD7)• Port E - SSI1Clk (PE0), SSI1Fss (PE1), SSI1Rx (PE2), SSI1Tx (PE3)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)• Port G - U2Rx (PG0), U2Tx (PG1)• Port J - I2C1SCL (PJ0), I2C1SDA (PJ1)

Step 5: Assign signals with 5 available pin assignments:• Port C - USB0EPEN (PC5)• Port D - CCP7 (PD3)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB4), U1Tx (PB5)• Port D - CCP6 (PD2)• Port G - CCP5 (PG7)• Port J - CCP4 (PJ4)

Step 7: Assign signals with 7 available pin assignments:• Port C - USB0PFLT (PC6)

Step 8: Assign signals with 8 available pin assignments:• Port J - CCP1 (PJ6)

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

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Step 9: Assign signals with 10 available pin assignments:• Port J - CCP2 (PJ5), CCP0 (PJ7)

Table 19 shows the final pin assignments for Example 9. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 19. Final Pin Assignments for Example 9

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

I2C1SCL-U2RxI2S0TXSDSSI1ClkI2S0RXSCKTCK/

SWCLK

-U0Rx0

I2C1SDA-U2TxI2S0TXMCLKSSI1FssI2S0RXWSTMS/

SWDIO

-U0Tx1

--NALED1SSI1RxCCP6TDII2C0SCLSSI0Clk2

--NALED0SSI1TxCCP7TDO/

SWO

I2C0SDASSI0Fss3

CCP4-NA-AIN3I2S0RXSD-U1RxSSI0Rx4

CCP2-NA-AIN2I2S0RXMCLKUSB0EPENU1TxSSI0Tx5

CCP1-NANAAIN1-USB0PFLTI2S0TXSCKCAN0Rx6

CCP0-CCP5NAAIN0I2S0TXWS-NMICAN0Tx7

4.10 Example 10Example 10 uses the LM3S9B92 device with the modules and signals shown in Table 20.

Table 20. Example 10 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

EPI0S[31:0]EPI interface inGeneral-Purpose mode

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, Fault0PWM

CAN0Rx, CAN0TxCAN

U0Rx, U0TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

CCP0, CCP1, CCP2, CCP34 Timers, 4 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)

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• Port F - LED1 (PF2), LED0 (PF3), EPI0S12 (PF4), EPI0S15 (PF5)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S30 (PD7)• Port J - EPI0S19 (PJ3), EPI0S28 (PJ4), EPI0S29 (PJ5)

Step 3: Assign signals with 3 available pin assignments:• This configuration does not use any of the pins with 3 possible pin assignments.

Step 4: Assign signals with 4 available pin assignments:• Port B - PWM2 (PB0), PWM3 (PB1)• Port D - CAN0Rx (PD0), CAN0Tx (PD1)

Step 5: Assign signals with 5 available pin assignments:• Port F - PWM0 (PF0), PWM1 (PF1)

Step 6: Assign signals with 6 available pin assignments:• This configuration does not use any of the pins with 6 possible pin assignments.

Step 7: Assign signals with 7 available pin assignments:• Port D - Fault0 (PD6)

Step 8: Assign signals with 8 available pin assignments:• Port A - PWM4 (PA6), PWM5 (PA7)• Port D - CCP3 (PD4)• Port J - CCP1 (PJ6)

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

Step 9: Assign signals with 10 available pin assignments:• Port D - CCP2 (PD5)• Port J - CCP0 (PJ7)

Table 21 shows the final pin assignments for Example 10. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 21. Final Pin Assignments for Example 10

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13PWM0EPI0S8CAN0RxTCK/

SWCLK

PWM2U0Rx0

EPI0S17EPI0S7EPI0S14PWM1EPI0S9CAN0TxTMS/

SWDIO

PWM3U0Tx1

EPI0S18EPI0S1NALED1EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

EPI0S19EPI0S0NALED0EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

EPI0S28EPI0S10NAEPI0S12AIN3CCP3EPI0S2EPI0S23SSI0Rx4

EPI0S29EPI0S11NAEPI0S15AIN2CCP2EPI0S3EPI0S22SSI0Tx5

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Table 21. Final Pin Assignments for Example 10 (continued)

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

CCP1EPI0S26NANAAIN1Fault0EPI0S4VREFAPWM46

CCP0EPI0S27EPI0S31NAAIN0EPI0S30EPI0S5NMIPWM57

4.11 Example 11Example 11 uses the LM3S9B92 device with the modules and signals shown in Table 22.

Table 22. Example 11 Module and Signal List

NotesSignalsModule

Remaining signals have fixed locations.LED0, LED1Ethernet

EPI0S31, EPI0S[29:26], EPI0S[7:0]EPI interface in Host-Bus 8FIFO mode

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, Fault0PWM

PhA0, PhB0, IDX0QEI

CAN0Rx, CAN0Tx, CAN1Rx, CAN1TxCAN

U0Rx, U0Tx, U1Rx, U1Tx, U2Rx, U2TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3 (PC5),

EPI0S4 (PC6), EPI0S5 (PC7)• Port F - CAN1Rx (PF0), CAN1Tx (PF1), LED1 (PF2), LED0 (PF3)• Port G - EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S26 (PH6), EPI0S27 (PH7)

Step 2: Assign signals with 2 available pin assignments:• Port A - PWM6 (PA4)• Port D - EPI0S28 (PD5)• Port J - EPI0S29 (PJ5)

Step 3: Assign signals with 3 available pin assignments:• Port A - PWM7 (PA5)• Port E - PhA0 (PE2)

Step 4: Assign signals with 4 available pin assignments:• Port A - I2C1SCL (PA6), I2C1SDA (PA7)• Port B - CAN0Rx (PB4), CAN0TX (PB5)• Port D - U2Rx (PD0), U2Tx (PD1), PWM2 (PD2), PWM3 (PD3)

Step 5: Assign signals with 5 available pin assignments:

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• Port D - IDX0 (PD7)• Port E - PhB0 (PE3)• Port G - PWM0 (PG0), PWM1 (PG1)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)

Step 7: Assign signals with 7 available pin assignments:• Port D - Fault0 (PD6)

Step 8: Assign signals with 8 available pin assignments:• Port A - PWM4 (PA2), PWM5 (PA3)

On the LM3S9B92 microcontroller, no signals have 9 possible pin assignments.

Step 9: Assign signals with 10 available pin assignments:• This configuration does not use any of the pins with 10 possible pin assignments.

Table 23 shows the final pin assignments for Example 11. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 23. Final Pin Assignments for Example 11

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

-EPI0S6PWM0CAN1Rx-U2RxTCK/

SWCLK

U1RxU0Rx0

-EPI0S7PWM1CAN1Tx-U2TxTMS/

SWDIO

U1TxU0Tx1

-EPI0S1NALED1PhA0PWM2TDII2C0SCLPWM42

-EPI0S0NALED0PhB0PWM3TDO/

SWO

I2C0SDAPWM53

--NA-AIN3-EPI0S2CAN0RxPWM64

EPI0S29-NA-AIN2EPI0S28EPI0S3CAN0TxPWM75

-EPI0S26NANAAIN1Fault0EPI0S4VREFAI2C1SCL6

-EPI0S27EPI0S31NAAIN0IDX0EPI0S5NMII2C1SDA7

4.12 Example 12Example 12 uses the LM3S2B93 device with the modules and signals shown in Table 24.

Table 24. Example 12 Module and Signal List

NotesSignalsModule

Signals have fixed locations.Hibernate

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, Fault0,Fault1, Fault2, Fault3

PWM

PhA0, PhB0, IDX0, PhA1, PhB1, IDX1QEI

U0Rx, U0Tx, U1Rx, U1TxUART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

PB[5:4], PD[7:0], PE[7:2] and PB6 usedas analog functions.

AIN[15:0]ADC

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Table 24. Example 12 Module and Signal List (continued)

NotesSignalsModule

CCP04 Timers, 1 CCP input

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)

Step 2: Assign signals with 2 available pin assignments:• Port G - PhA1 (PG6)• Port H - Fault3 (PH2)

Step 3: Assign signals with 3 available pin assignments:• Port C - Fault2 (PC5)• Port F - SSI1Clk (PF2), SSI1Fss (PF3), SSI1Rx (PF4), SSI1Tx (PF5)• Port G - IDX1 (PG2), PhB1 (PG7)

Step 4: Assign signals with 4 available pin assignments:• Port A - I2C1SCL (PA6), I2C1SDA (PA7)• Port C - PWM6 (PC4), PWM7 (PC6)• Port F - PhA0 (PF6)• Port H - PWM2 (PH0), PWM3 (PH1)

Step 5: Assign signals with 5 available pin assignments:• Port B - Fault1 (PB6)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)• Port C - PhB0 (PC7)• Port F - PWM0 (PF0), PWM1 (PF1)• Port G - IDX0 (PG5)

Step 7: Assign signals with 7 available pin assignments:• This configuration does not use the pin with 7 possible pin assignments.

Step 8: Assign signals with 8 available pin assignments:• Port G - PWM4 (PG0), PWM5 (PG1)

Step 9: Assign signals with 9 available pin assignments:• Port E - Fault0 (PE1)• Port J - CCP0 (PJ2)

Table 25 shows the final pin assignments for Example 12. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

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Table 25. Final Pin Assignments for Example 12

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

-PWM2PWM4PWM0-AIN15TCK/

SWCLK

U1RxU0Rx0

-PWM3PWM5PWM1Fault0AIN14TMS/

SWDIO

U1TxU0Tx1

CCP0Fault3IDX1SSI1ClkAIN9AIN13TDII2C0SCLSSI0Clk2

NA--SSI1FssAIN8AIN12TDO/

SWO

I2C0SDASSI0Fss3

NA--SSI1RxAIN3AIN7PWM6AIN10SSI0Rx4

NA-IDX0SSI1TxAIN2AIN6Fault2AIN11SSI0Tx5

NA-PhA1PhA0AIN1AIN5PWM7Fault1I2C1SCL6

NA-PhB1Fault1AIN0AIN4PhB0NMII2C1SDA7

4.13 Example 13Example 13 uses the LM3S2B93 device with the modules and signals shown in Table 26.

Table 26. Example 13 Module and Signal List

NotesSignalsModule

Signals have fixed locations.Hibernate

EPI0S[31:28], EPI0S[19:0]EPI interface to SDRAM

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1Tx, U2Rx, U2TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S19 (PD4), EPI0S28 (PD5), EPI0S29 (PD6), EPI0S30 (PD7)• Port E - EPI0S8 (PE0), EPI0S9 (PE1)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port F - EPI0S12 (PF7)• Port G - EPI0S15 (PG4)

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Step 3: Assign signals with 3 available pin assignments:• Port F - SSI1Clk (PF2), SSI1Fss (PF3), SSI1Rx (PF4), SSI1Tx (PF5)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)• Port D - U2Rx (PD0), U2Tx (PD1)

Step 5: Assign signals with 5 available pin assignments:• This configuration does not use any of the pins with 5 possible pin assignments.

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)

Step 7: Assign signals with 7 available pin assignments:• This configuration does not use the pin with 7 possible pin assignments.

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• This configuration does not use any of the pins with 9 possible pin assignments.

Table 27 shows the final pin assignments for Example 13. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 27. Final Pin Assignments for Example 13

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13-EPI0S8U2RxTCK/

SWCLK

U1RxU0Rx0

EPI0S17EPI0S7EPI0S14-EPI0S9U2TxTMS/

SWDIO

U1TxU0Tx1

EPI0S18EPI0S1-SSI1Clk--TDII2C0SCLSSI0Clk2

NAEPI0S0-SSI1Fss--TDO/

SWO

I2C0SDASSI0Fss3

NAEPI0S10EPI0S15SSI1RxAIN3EPI0S19EPI0S2-SSI0Rx4

NAEPI0S11-SSI1TxAIN2EPI0S28EPI0S3-SSI0Tx5

NA---AIN1EPI0S29EPI0S4VREFACAN0Rx6

NA-EPI0S31EPI0S12AIN0EPI0S30EPI0S5NMICAN0Tx7

4.14 Example 14Example 14 uses the LM3S2B93 device with the modules and signals shown in Table 28.

Table 28. Example 14 Module and Signal List

NotesSignalsModule

Signals have fixed locations.Hibernate

EPI0S31, EPI0S[29:26], EPI0S[7:0]EPI interface to Host-Bus 8FIFO mode

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, Fault0,Fault1

PWM

PhA0, PhB0, IDX0, PhA1, PhB1, IDX1QEI

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Table 28. Example 14 Module and Signal List (continued)

NotesSignalsModule

CAN0Rx, CAN0Tx, CAN1Rx, CAN1TxCAN

U0Rx, U0Tx, U1Rx, U1TxUART

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1)• Port B - NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S28 (PD5), EPI0S29 (PD6)• Port F - CAN1Rx (PF0), CAN1Tx (PF1)• Port G - EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S26 (PH6), EPI0S27 (PH7)

Step 2: Assign signals with 2 available pin assignments:• Port G - PhA1 (PG6)

Step 3: Assign signals with 3 available pin assignments:• Port E - PhB1 (PE2)• Port G - IDX1 (PG2)

Step 4: Assign signals with 4 available pin assignments:• Port A - PWM6 (PA4), PWM7 (PA5)• Port B - CAN0Rx (PB4), CAN0Tx (PB5)• Port D - PhA0 (PD1), PWM2 (PD2), PWM3 (PD3)

Step 5: Assign signals with 5 available pin assignments:• Port F - Fault1 (PF7)

Step 6: Assign signals with 6 available pin assignments:• Port A - PWM0 (PA6), PWM1 (PA7)• Port B - U1Rx (PB0), U1Tx (PB1), IDX0 (PB2)• Port E - PhB0 (PE3)

Step 7: Assign signals with 7 available pin assignments:• This configuration does not use the pin with 7 possible pin assignments.

Step 8: Assign signals with 8 available pin assignments:• Port A - PWM4 (PA2), PWM5 (PA3)

Step 9: Assign signals with 9 available pin assignments:• Port B - Fault0 (PB3)

Table 29 shows the final pin assignments for Example 14. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

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Table 29. Final Pin Assignments for Example 14

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

-EPI0S6-CAN1Rx--TCK/

SWCLK

U1RxU0Rx0

-EPI0S7-CAN1Tx-PhA0TMS/

SWDIO

U1TxU0Tx1

-EPI0S1IDX1-PhB1PWM2TDIIDX0PWM42

NAEPI0S0--PhB0PWM3TDO/

SWO

Fault0PWM53

NA---AIN3-EPI0S2CAN0RxPWM64

NA---AIN2EPI0S28EPI0S3CAN0TxPWM75

NAEPI0S26PhA1-AIN1EPI0S29EPI0S4VREFAPWM06

NAEPI0S27EPI0S31Fault1AIN0-EPI0S5NMIPWM17

4.15 Example 15Example 15 uses the LM3S2B93 device with the modules and signals shown in Table 30.

Table 30. Example 15 Module and Signal List

NotesSignalsModule

Signals have fixed locations.Hibernate

EPI0S[31:28], EPI0S[19:0]EPI interface to SDRAM

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, Fault0,Fault1

PWM

PhA0, PhB0, IDX0, PhA1, PhB1, IDX1QEI

CAN0Rx, CAN0Tx, CAN1Rx, CAN1TxCAN

U0Rx, U0Tx, U1Rx, U1TxUART

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1)• Port B - NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S19 (PD4), EPI0S28 (PD5), EPI0S29 (PD6), EPI0S30 (PD7)• Port E - EPI0S8 (PE0), EPI0S9 (PE1)• Port F - CAN1Rx (PF0), CAN1Tx (PF1)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port F - EPI0S12 (PF4), EPI0S15 (PF5)

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• Port G - PhA1 (PG6)

Step 3: Assign signals with 3 available pin assignments:• Port E - PhB1 (PE2)• Port G - IDX1 (PG2)

Step 4: Assign signals with 4 available pin assignments:• Port A - PWM6 (PA4), PWM7 (PA5)• Port B - CAN0Rx (PB4), CAN0Tx (PB5)• Port D - PhA0 (PD1), PWM2 (PD2), PWM3 (PD3)

Step 5: Assign signals with 5 available pin assignments:• Port F - Fault1 (PF7)

Step 6: Assign signals with 6 available pin assignments:• Port A - PWM0 (PA6), PWM1 (PA7)• Port B - U1Rx (PB0), U1Tx (PB1), IDX0 (PB2)• Port E - PhB0 (PE3)

Step 7: Assign signals with 7 available pin assignments:• This configuration does not use the pin with 7 possible pin assignments.

Step 8: Assign signals with 8 available pin assignments:• Port A - PWM4 (PA2), PWM5 (PA3)

Step 9: Assign signals with 9 available pin assignments:• Port B - Fault0 (PB3)

Table 31 shows the final pin assignments for Example 15. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 31. Final Pin Assignments for Example 15

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13CAN1RxEPI0S8-TCK/

SWCLK

U1RxU0Rx0

EPI0S17EPI0S7EPI0S14CAN1TxEPI0S9PhA0TMS/

SWDIO

U1TxU0Tx1

EPI0S18EPI0S1IDX1-PhB1PWM2TDIIDX0PWM42

NAEPI0S0--PhB0PWM3TDO/

SWO

Fault0PWM53

NAEPI0S10-EPI0S12AIN3EPI0S19EPI0S2CAN0RxPWM64

NAEPI0S11-EPI0S15AIN2EPI0S28EPI0S3CAN0TxPWM75

NA-PhA1-AIN1EPI0S29EPI0S4VREFAPWM06

NA-EPI0S31Fault1AIN0EPI0S30EPI0S5NMIPWM17

4.16 Example 16Example 16 uses the LM3S5B91 device with the modules and signals shown in Table 32.

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Table 32. Example 16 Module and Signal List

NotesSignalsModule

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1Tx, U1CTS, U1DCD, U1DSR, U1DTR,U1RI, U1RTS, U2Rx, U2Tx

UART

I2C0SCL, I2C0SDA, I2C1SCL, I2C1SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0Tx, SSI1Clk, SSI1Fss,SSI1Rx, SSI1Tx

SSI

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:4] used as analog functions.AIN[3:0]ADC

CCP0, CCP1, CCP2, CCP3, CCP4, CCP5, CCP6, CCP74 Timers, 8 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3)

Step 2: Assign signals with 2 available pin assignments:• Port D - I2S0RXSCK (PD0)• Port F - I2S0TXSD (PF0), I2S0TXMCLK (PF6)• Port G - I2S0RXWS (PG6)• Port J - U1DSR (PJ5)

Step 3: Assign signals with 3 available pin assignments:• Port B - I2S0TXSCK (PB6)• Port D - U1RI (PD4), I2S0TXWS (PD7)• Port E - SSI1Clk (PE0), SSI1Fss (PE1), SSI1Rx (PE2), SSI1Tx (PE3)• Port F - U1RTS (PF1)• Port G - I2S0RXSD (PG2), I2S0RXMCLK (PG3), U1DTR (PG5)

Step 4: Assign signals with 4 available pin assignments:• Port A - U1CTS (PA6), U1DCD (PA7)• Port B - CAN0Rx (PB4), CAN0Tx (PB5)• Port D - U2Tx (PD1), U2Rx (PD5)• Port G - I2C1SCL (PG0), I2C1SDA (PG1)

Step 5: Assign signals with 5 available pin assignments:• Port D - CCP7 (PD3)

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)• Port D - CCP6 (PD2)

Step 7: Assign signals with 7 available pin assignments:• Port C - CCP4 (PC4)• Port G - CCP5 (PG7)

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Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• Port C - CCP1 (PC5), CCP3 (PC6)

Step 10: Assign signals with 10 available pin assignments:• Port C - CCP0 (PC7)• Port F - CCP2 (PF5)

Table 33 shows the final pin assignments for Example 16. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 33. Final Pin Assignments for Example 16

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

--I2C1SCLI2S0TXSDSSI1ClkI2S0RXSCKTCK/

SWCLK

U1RxU0Rx0

--I2C1SDAU1RTSSSI1FssU2TxTMS/

SWDIO

U1TxU0Tx1

--I2S0RXSD-SSI1RxCCP6TDII2C0SCLSSI0Clk2

--I2S0RXMCLK-SSI1TxCCP7TDO/

SWO

I2C0SDASSI0Fss3

----AIN3U1RICCP4CAN0RxSSI0Rx4

U1DSR-U1DTRCCP2AIN2U2RxCCP1CAN0TxSSI0Tx5

--I2S0RXWSI2S0TXMCLKAIN1-CCP3I2S0TXSCKU1CTS6

--CCP5-AIN0I2S0TXWSCCP0NMIU1DCD7

4.17 Example 17Example 17 uses the LM3S5B91 device with the modules and signals shown in Table 34.

Table 34. Example 17 Module and Signal List

NotesSignalsModule

EPI0S[31:0]EPI interface toGeneral-Purpose mode

CAN0Rx, CAN0TxCAN

U0Rx, U0Tx, U1Rx, U1TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:6] used as analog functions.AIN[1:0]ADC

CCP0, CCP1, CCP2, CCP3, CCP4, CCP54 Timers, 6 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)

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• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3(PC5), EPI0S4 (PC6), EPI0S5 (PC7)

• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - I2S0RXSCK (PD0), I2S0RXWS (PD1), EPI0S29 (PD6)• Port E - I2S0TXSD (PE5)• Port F - I2S0TXMCLK (PF1), EPI0S12 (PF4), EPI0S15 (PF5)• Port J - EPI0S19 (PJ3), EPI0S28 (PJ4), EPI0S30 (PJ6)

Step 3: Assign signals with 3 available pin assignments:• Port B - I2S0TXSCK (PB6)• Port D - I2S0RXSD (PD4), I2S0RXMCLK (PD5), I2S0TXWS (PD7)

Step 4: Assign signals with 4 available pin assignments:• Port A - CAN0Rx (PA6), CAN0Tx (PA7)

Step 5: Assign signals with 5 available pin assignments:• This configuration does not use any of the pins with 5 possible pin assignments.

Step 6: Assign signals with 6 available pin assignments:• Port B - U1Rx (PB0), U1Tx (PB1)

Step 7: Assign signals with 7 available pin assignments:• Port F - CCP4 (PF7)• Port G - CCP5 (PG5)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• Port F - CCP1 (PF6)• Port G - CCP3 (PG4)

Step 10: Assign signals with 10 available pin assignments:• Port E - CCP2 (PE4)• Port J - CCP0 (PJ7)

Table 35 shows the final pin assignments for Example 17. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 35. Final Pin Assignments for Example 17

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13-EPI0S8I2S0RXSCKTCK/

SWCLK

U1RxU0Rx0

EPI0S17EPI0S7EPI0S14I2S0TXMCLKEPI0S9I2S0RXWSTMS/

SWDIO

U1TxU0Tx1

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Table 35. Final Pin Assignments for Example 17 (continued)

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S18EPI0S1--EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

EPI0S19EPI0S0--EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

EPI0S28EPI0S10CCP3EPI0S12CCP2I2S0RXSDEPI0S2EPI0S23SSI0Rx4

-EPI0S11CCP5EPI0S15I2S0TXSDI2S0RXMCLKEPI0S3EPI0S22SSI0Tx5

EPI0S30EPI0S26-CCP1AIN1EPI0S29EPI0S4I2S0TXSCKCAN0Rx6

CCP0EPI0S27EPI0S31CCP4AIN0I2S0TXWSEPI0S5NMICAN0Tx7

4.18 Example 18Example 18 uses the LM3S5B91 device with the modules and signals shown in Table 36.

Table 36. Example 18 Module and Signal List

NotesSignalsModule

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface to Host-Busmode

CAN0Rx, CAN0TxCAN

U0Rx, U0TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

I2S0RXMCLK, I2S0RXSCK, I2S0RXSD, I2S0RXWS,I2S0TXMCLK, I2S0TXSCK, I2S0TXSD, I2S0TXWS

I2S

PE[7:6] used as analog functions.AIN[1:0]ADC

CCP0, CCP1, CCP2, CCP3, CCP44 Timers, 5 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB2), I2C0SDA (PB3), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S29 (PD6)• Port E - I2S0TXSD (PE5)• Port F - I2S0TXMCLK (PF1), EPI0S12 (PF4), EPI0S15 (PF5)

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• Port G - I2S0RXSCK (PG5), I2S0RXWS (PG6)• Port J - EPI0S19 (PJ3), EPI0S28 (PJ4), EPI0S30 (PJ6)

Step 3: Assign signals with 3 available pin assignments:• Port B - I2S0TXSCK (PB6)• Port D - I2S0RXSD (PD4), I2S0RXMCLK (PD5), I2S0TXWS (PD7)

Step 4: Assign signals with 4 available pin assignments:• Port D - CAN0Rx (PD0), CAN0Tx (PD1)

Step 5: Assign signals with 5 available pin assignments:• Port A - USB0EPEN (PA6)

Step 6: Assign signals with 6 available pin assignments:• This configuration does not use any of the pins with 6 possible pin assignments.

Step 7: Assign signals with 7 available pin assignments:• Port A - USB0PFLT (PA7)• Port F - CCP4 (PF7)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• Port F - CCP1 (PF6)• Port G - CCP3 (PG4)

Step 10: Assign signals with 10 available pin assignments:• Port E - CCP2 (PE4)• Port J - CCP0 (PJ7)

Table 37 shows the final pin assignments for Example 18. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 37. Final Pin Assignments for Example 18

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13-EPI0S8CAN0RxTCK/

SWCLK

USB0IDU0Rx0

EPI0S17EPI0S7EPI0S14I2S0TXMCLKEPI0S9CAN0TxTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1--EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

EPI0S19EPI0S0--EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

EPI0S28EPI0S10CCP3EPI0S12CCP2I2S0RXSDEPI0S2EPI0S23SSI0Rx4

-EPI0S11I2S0RXSCKEPI0S15I2S0TXSDI2S0RXMCLKEPI0S3EPI0S22SSI0Tx5

EPI0S30EPI0S26I2S0RXWSCCP1AIN1EPI0S29EPI0S4I2S0TXSCKUSB0EPEN6

CCP0EPI0S27EPI0S31CCP4AIN0I2S0TXWSEPI0S5NMIUSB0PFLT7

4.19 Example 19Example 19 uses the LM3S5B91 device with the modules and signals shown in Table 38.

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Table 38. Example 19 Module and Signal List

NotesSignalsModule

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface to Host-Busmode

U0Rx, U0Tx, U1Rx, U1Tx, U1CTS, U1DCD, U1DSR, U1DTR,U1RI, U1RTS

UART

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

CCP0, CCP1, CCP2, CCP3, CCP4, CCP54 Timers, 6 CCP inputs

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S28 (PD5), EPI0S29 (PD6)• Port F - U1DSR (PF0), EPI0S12 (PF4), EPI0S15 (PF5)• Port J - EPI0S19 (PJ3), EPI0S30 (PJ6)

Step 3: Assign signals with 3 available pin assignments:• Port D - U1RI (PD4), U1DTR (PD7)• Port F - U1RTS (PF1)

Step 4: Assign signals with 4 available pin assignments:• Port A - U1CTS (PA6), U1DCD (PA7)

Step 5: Assign signals with 5 available pin assignments:• Port B - USB0EPEN (PB2)

Step 6: Assign signals with 6 available pin assignments:• Port D - U1Rx (PD0), U1Tx (PD1)

Step 7: Assign signals with 7 available pin assignments:• Port B - USB0PFLT (PB3)• Port F - CCP4 (PF7)• Port G - CCP5 (PG5)

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Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• Port F - CCP1 (PF6)• Port G - CCP3 (PG4)

Step 10: Assign signals with 10 available pin assignments:• Port J - CCP2 (PJ5), CCP0 (PJ7)

Table 39 shows the final pin assignments for Example 19. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 39. Final Pin Assignments for Example 19

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13U1DSREPI0S8U1RxTCK/

SWCLK

USB0IDU0Rx0

EPI0S17EPI0S7EPI0S14U1RTSEPI0S9U1TxTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1--EPI0S24EPI0S20TDIUSB0EPENSSI0Clk2

EPI0S19EPI0S0--EPI0S25EPI0S21TDO/

SWO

USB0PFLTSSI0Fss3

-EPI0S10CCP3EPI0S12AIN3U1RIEPI0S2EPI0S23SSI0Rx4

CCP2EPI0S11CCP5EPI0S15AIN2EPI0S28EPI0S3EPI0S22SSI0Tx5

EPI0S30EPI0S26-CCP1AIN1EPI0S29EPI0S4VREFAU1CTS6

CCP0EPI0S27EPI0S31CCP4AIN0U1DTREPI0S5NMIU1DCD7

4.20 Example 20Example 20 uses the LM3S5B91 device with the modules and signals shown in Table 40.

Table 40. Example 20 Module and Signal List

NotesSignalsModule

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface to Host-Busmode

PWM0, PWM1, PWM2, PWM3, Fault0, Fault1PWM

PhA0, PhB0, IDX0QEI

CAN0Rx, CAN0TxCAN

U0Rx, U0TxUART

I2C0SCL, I2C0SDAI2C

SSI0Clk, SSI0Fss, SSI0Rx, SSI0TxSSI

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

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Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1), SSI0Clk (PA2), SSI0Fss (PA3), SSI0Rx (PA4), SSI0Tx (PA5)• Port B - I2C0SCL (PB0), I2C0SDA (PB1), EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S19 (PD4), EPI0S28 (PD5)• Port F - EPI0S12 (PF4), EPI0S15 (PF5)• Port J - EPI0S29 (PJ5), EPI0S30 (PJ6)

Step 3: Assign signals with 3 available pin assignments:• This configuration does not use any of the pins with 3 possible pin assignments.

Step 4: Assign signals with 4 available pin assignments:• Port D - CAN0Rx (PD0), CAN0Tx (PD1)• Port F - PWM2 (PF2), PWM3 (PF3), PhA0 (PF6)

Step 5: Assign signals with 5 available pin assignments:• Port A - USB0EPEN (PA6)• Port F - Fault1 (PF7)

Step 6: Assign signals with 6 available pin assignments:• Port D - IDX0 (PD7)• Port F - PhB0 (PF0)• Port G - PWM0 (PG2), PWM1 (PG3)

Step 7: Assign signals with 7 available pin assignments:• Port A - USB0PFLT (PA7)

Step 8: Assign signals with 8 available pin assignments:• This configuration does not use any of the pins with 8 possible pin assignments.

Step 9: Assign signals with 9 available pin assignments:• Port D - Fault0 (PD6)

Step 10: Assign signals with 10 available pin assignments:• This configuration does not use any of the pins with 10 possible pin assignments.

Table 41 shows the final pin assignments for Example 20. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 41. Final Pin Assignments for Example 20

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13PhB0EPI0S8CAN0RxTCK/

SWCLK

USB0IDU0Rx0

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Table 41. Final Pin Assignments for Example 20 (continued)

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S17EPI0S7EPI0S14-EPI0S9CAN0TxTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1PWM0PWM2EPI0S24EPI0S20TDII2C0SCLSSI0Clk2

-EPI0S0PWM1PWM3EPI0S25EPI0S21TDO/

SWO

I2C0SDASSI0Fss3

-EPI0S10-EPI0S12AIN3EPI0S19EPI0S2EPI0S23SSI0Rx4

EPI0S29EPI0S11-EPI0S15AIN2EPI0S28EPI0S3EPI0S22SSI0Tx5

EPI0S30EPI0S26-PhA0AIN1Fault0EPI0S4VREFAUSB0EPEN6

-EPI0S27EPI0S31Fault1AIN0IDX0EPI0S5NMIUSB0PFLT7

4.21 Example 21Example 21 uses the LM3S5B91 device with the modules and signals shown in Table 42.

Table 42. Example 21 Module and Signal List

NotesSignalsModule

USB0ID and USB0VBUS use PB0 andPB1 as analog functions, remainingsignals have fixed locations.

USB0PFLT, USB0EPENUSB OTG

EPI0S[31:0]EPI interface toGeneral-Purpose mode

PWM0, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7 Fault0PWM

PhA0, PhB0, IDX0QEI

CAN0Rx, CAN0TxCAN

PE[7:4] and PB6 used as analogfunctions.

AIN[3:0], VREFAADC

No signals.4 Timers

NMISystem Control

TCK/SWCLK, TMS/SWDIO, TDI, TDO/SWOJTAG/SWD

Step 1: Assign signals with only 1 available pin assignment:• Port A - U0Rx (PA0), U0Tx (PA1)• Port B - EPI0S23 (PB4), EPI0S22 (PB5), NMI (PB7)• Port C - TCK/SWCLK (PC0), TMS/SWDIO (PC1), TDI (PC2), TDO/SWO (PC3), EPI0S2 (PC4), EPI0S3

(PC5), EPI0S4 (PC6), EPI0S5 (PC7)• Port D - EPI0S20 (PD2), EPI0S21 (PD3)• Port E - EPI0S8 (PE0), EPI0S9 (PE1), EPI0S24 (PE2), EPI0S25 (PE3)• Port G - EPI0S13 (PG0), EPI0S14 (PG1), EPI0S31 (PG7)• Port H - EPI0S6 (PH0), EPI0S7 (PH1), EPI0S1 (PH2), EPI0S0 (PH3), EPI0S10 (PH4), EPI0S11 (PH5),

EPI0S26 (PH6), EPI0S27 (PH7)• Port J - EPI0S16 (PJ0), EPI0S17 (PJ1), EPI0S18 (PJ2)

Step 2: Assign signals with 2 available pin assignments:• Port D - EPI0S19 (PD4), EPI0S28 (PD5), EPI0S29 (PD6), EPI0S30 (PD7)• Port F - EPI0S12 (PF4), EPI0S15 (PF5)

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Step 3: Assign signals with 3 available pin assignments:• This configuration does not use any of the pins with 3 possible pin assignments.

Step 4: Assign signals with 4 available pin assignments:• Port D - CAN0Rx (PD0), CAN0Tx (PD1)• Port F - PWM2 (PF2), PWM3 (PF3), PhA0 (PF6)

Step 5: Assign signals with 5 available pin assignments:• Port A - USB0EPEN (PA6)

Step 6: Assign signals with 6 available pin assignments:• Port B - IDX0 (PB2)• Port F - PhB0 (PF0)• Port G - PWM0 (PG2), PWM1 (PG3)

Step 7: Assign signals with 7 available pin assignments:• Port A - PWM4 (PA2), PWM5 (PA3), USB0PFLT (PA7)

Step 8: Assign signals with 8 available pin assignments:• Port A - PWM6 (PA4), PWM7 (PA5)

Step 9: Assign signals with 9 available pin assignments:• Port B - Fault0 (PB3)

Step 10: Assign signals with 10 available pin assignments:• This configuration does not use any of the pins with 10 possible pin assignments.

Table 43 shows the final pin assignments for Example 21. “NA” appears in a column when a pin is not availableon the microcontroller. “-” appears in a column when a pin is not used for an analog or alternate digital function.

Table 43. Final Pin Assignments for Example 21

Port JPort HPort GPort FPort EPort DPort CPort BPort APin

EPI0S16EPI0S6EPI0S13PhB0EPI0S8CAN0RxTCK/

SWCLK

USB0IDU0Rx0

EPI0S17EPI0S7EPI0S14-EPI0S9CAN0TxTMS/

SWDIO

USB0VBUSU0Tx1

EPI0S18EPI0S1PWM0PWM2EPI0S24EPI0S20TDIIDX0PWM42

-EPI0S0PWM1PWM3EPI0S25EPI0S21TDO/

SWO

Fault0PWM53

-EPI0S10-EPI0S12AIN3EPI0S19EPI0S2EPI0S23PWM64

-EPI0S11-EPI0S15AIN2EPI0S28EPI0S3EPI0S22PWM75

-EPI0S26-PhA0AIN1EPI0S29EPI0S4VREFAUSB0EPEN6

-EPI0S27EPI0S31-AIN0EPI0S30EPI0S5NMIUSB0PFLT7

5 ConclusionThe pin muxing capability of many Stellaris microcontrollers is highly flexible and easy to implement using thefunctions provided by the StellarisWare® Peripheral Driver Library. A system designer can choose the mostefficient pin configuration targeted for specific system requirements.

AN01274–April 201036 Configuring Stellaris® Microcontrollers with Pin MultiplexingCopyright © 2010 Texas Instruments Incorporated

Conclusion www.ti.com

Page 37: Configuring Stellaris® Microcontrollers with Pin Multiplexing

6 ReferencesDocuments used in the generation of this application note include:• Stellaris® LM3S9B92 Microcontroller Data Sheet, Publication Number DS-LM3S9B92• Stellaris® LM3S9B0 Microcontroller Data Sheet, Publication Number DS-LM3S9B90• Stellaris® LM3S5B91 Microcontroller Data Sheet, Publication Number DS-LM3S5B91• Stellaris® LM3S2B93 Microcontroller Data Sheet, Publication Number DS-LM3S2B93• Stellaris® Peripheral Driver Library User’s Guide – An element of each StellarisWare Firmware

Development Package downloadable from http://www.luminarymicro.com/products/software_updates.html

Configuring Stellaris® Microcontrollers with Pin Multiplexing 37AN01274–April 2010Copyright © 2010 Texas Instruments Incorporated

Referenceswww.ti.com