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BASIC SEMICONDUCTOR THEORY 5
TRANSISTOR CONSTRUCTION TECHNIQUES .. 8
Major Parameters 11
Rectifier Construction 13
BIASING 15
BASIC AMPLIFIERS 18Single Stage Audio Amplifier 18Two Stage R -C Coupled Amplifier 18Class B Push -Pull Output Stages 19Class A Output Stages 20Class A Driver Stages 21Design Charts 21Amplifier Circuit Diagrams 26
HI-FI CIRCUITS 30Preamplifiers 30Hybrid Preamplifier 31Tone Controls 32Power Amplifiers 34Stereophonic Tape System 35Hi-Fi Circuit Diagrams 36
RADIO CIRCUITS 38Autodyne Converters 38IF Amplifiers 39Automatic Volume Controls 40Reflex Circuits 43Complete Radio Circuit Diagrams 44
Continued - following page
Page
UNIJUNCTION TRANSISTOR CIRCUITS 56Theory of Operation 56Parameters - Definition and Measurement 57Relaxation Oscillator 59Sawtooth Wave Generator 60Multivibrator 60Hybrid Multivibrator 62Relay Delay 62
TRANSISTOR SWITCHES 63Temperature Effects on Switching Circuits 64Power Dissipation 68Saturation 68Transient Response Time 73Flip -Flop Design Procedures 77Triggering 87
LOGIC 91Binary Arithmetic 98
TETRODE TRANSISTORS 99
SILICON CONTROLLED RECTIFIER 103
POWER SUPPLIES 105Circuits 108
TRANSISTOR SPECIFICATIONS 110How to Read a Specification Sheet 110Explanation of Parameter Symbols 113G -E Transistor Summary 115G -E Transistor Specifications 116Registered JETEC Transistor Types with Interchangeability
Information 150G -E Outline Drawings 161
CIRCUIT DIAGRAM INDEX 165Notes on the Circuit Diagrams 167
READING LIST 168
BASIC SEMICONDUCTOR THEORY
Transistors and junction rectifiers are the natural outgrowth of our rapidly advanc-ing technology and the need for electronic devices with small size and high efficiencyand reliability. They are made from materials known as semiconductors - materialsthat will pass more current than an insulator, but not as much as a metal. The twomaterials now being utilized in the manufacture of semiconductor products areGermanium and Silicon.
It is possible to change the electrical characteristics of semiconductor materials byadding closely controlled amounts of certain impurities. Impurities such as arsenicand antimony cause a surplus of electrons, or free negative charges, while others suchas gallium and indium cause a deficiency of electrons, which may be considered asholes in the crystalline structure, and act as mobile positive charges.
A crystal with a surplus of holes, or positive active electric "particles" is known asp -type while a crystal with a surplus of electrons, or negative active electric particlesis known as n -type. As might be expected, when a positive charge and a negativecharge meet in the crystal, they combine and cease to exist as mobile charge carriers -the excess mobile electron meets a mobile electron deficiency or hole and fills the hole,becoming a fixed part of the crystalline structure.
Therefore, in a semiconductor material such as silicon or germanium, we have amaterial which is a very poor conductor of electricity unless we add mobile chargecarriers, and we can add either positive or negative charge carriers. The significanceof this will become apparent when we consider what happens when we join a crystalof p -type and a crystal of n -type material together forming a distinct boundary, orjunction, between the two types, as in Figure 1.
+ + +
FIGURE 1
4- P TYPE1- JUNCTION
4- N TYPE
This crystal is now capable of passing current readily in one direction while blockingcurrent in the opposite direction and we have a useful electronic device, a rectifier.
; t tP
N
FIGURE 2-T
B
When a battery is attached as shown In Figure 2 the electrons will be pushedtowards the junction by the negative voltage of the battery and combine with holesattracted towards the junction by the battery's negative voltage. Electrons constantlyenter the crystal at the n -terminal to replenish the electrons that have combined withholes, and electrons leave the p -terminal to replenish the hole supply of the p -typeportion of the crystal, and current flows.
5
BASIC SEMICONDUCTOR THEORY
If we reverse the polarity of the battery as in Figure 3 we have the followingsituation:
P
N
FIGURE 3
+TB
Now the positive and negative particles are drawn away from the junction by thebattery's voltage, leaving the section of the crystal near the junction practically voidof charge carriers and crystal effectively blocks current. A few random charge carriersdo remain in the junction area allowing a minute current to pass. This current is knownas "leakage current" and is usually in the order of a few microamperes.
We have seen how semiconductors are capable of rectifying current by the use of asingle junction within a crystal. By adding a second junction and making a P -N -P orN -P -N sandwich of N and P types we have a device capable of amplification known
as a transistor.The transistor may be compared to a triode tube in some ways, so let's quickly
review the triode tube. The tube represented in Figure 4 has three distinct elements:
FIGURE 4
1. The cathode, which emits electrons; 2. The plate which collects the emitted elec-trons, and 3. The control grid, which controls the charge concentration of the spacesA and B separating the elements by altering the charge of these spaces. When a largefixed voltage is applied between the cathode and plate and a small varying voltageis applied to the control grid, the plate current varies as much as it would if we madelarge changes in the plate voltage, giving us a device capable of amplifying voltage.
Now consider the transistor. Again we have three elements, separated by junctionsas shown in Figure 5.
EMITTER BASE COLLECTOR
FIGURE 5
6
BASIC SEMICONDUCTOR THEORY
Here the emitter emits electrons, the collector collects electrons and the base controlsthe flow of electrons by controlling the charge concentration in the base region, soin the broadest sense, the function of the three elements in the triode tube and the tran-sistor are similar. However, in the transistor we are amplifying current, not voltage, andits operation is not really as analogous to the tube's operation as this comparison shows.
Let's look a little closer at how a transistor works. First of all we will put thetransistor in a circuit as in Figure 6.
EMITTER JUNCTIONN
COLLECTOR JUNCTIONN
T+EMITTER BA SE COLLECTOR
FIGURE 6
-T
Here we see that the emitter junction will pass current easily, because it has a forwardbias. The collector junction however, will not pass current from the collector to base,because this junction is back biased. These bias conditions are necessary for transistoroperation. It is found that the majority of the current flows between the emitter and thecollector because of the large number of electrons from the emitter which diffusethrough the very thin base region and into the collector without combining with theholes in the base. As the base is made more positive, more electrons are pulled out ofthe emitter and are made available for diffusion into the collector.
If the base is made less positive, less electrons are pulled from the emitter, so lessreach the collector. The electrons that enter the base, but do not reach the collector,combine with holes in the base and contribute to the base current, reducing the gainof the transistor. To reduce the base current, the base is kept as thin as possible(usually less than a thousandths of an inch thick) and the hole content kept to a mini-mum by using high -purity material, or in other words, the base material is only slightly"p" type material.
The ratio of the collector current to the base current is called beta, usually shownon specification sheets as h1E, and the ratio of the collector current to the emittercurrent is called alpha, usually shown as hFB. Of course it is desirable to have the alphaof a transistor as high as possible and alphas of 0.95 to 0.99 are common in com-mercial transistors.
No current (except a small leakage current) will flow in the collector circuit unlesscurrent is introduced into the emitter. Since very little voltage (.1 to .5 volts) is neededto cause appreciable current flow into the emitter, the input power is very low. Almostall the emitter current (emitter current times alpha) will flow in the collector circuitwhere the voltage can be as high as 45 volts. Therefore, a relatively large amount ofpower can be controlled in an external load and the power gain (G,) of a transistor(power out/power in) can be up to 40,000 in some applications.
7
TRANSISTOR CONSTRUCTION TECHNIQUES
The most common type of junction transistor is the PNP diffused alloyed type.This transistor is made by taking a wafer of "N" type germanium, mounting it on aholder and pressing indium dots into each side. The assembly is then heated in afurnace until the indium melts and alloys with the germanium forming a "P" layerwithin the "N" type germanium. The complete assembly is shown by Figure 7.
FIGURE 7
By changing the size of the indium dots and the depth to which the indium isalloyed into the base material, it is possible to obtain a transistor optimized either foraudio amplifiers or high speed switching. In addition, by starting with P type germa-nium, it is possible to make a NPN transistor. With the alloy type of structure, it ispossible to pass currents of up to 1/2 an ampere through the transistor. This structureis not generally suitable for high frequency linear amplifiers since the indium dotsproduce a high capacitance between collector and base making the unit inherentlyunstable at high frequencies.
The rate grown transistor is produced by an entirely different technique. A barof germanium is grown from a bath of molten germanium so doped that the materialwill change from "P" type to "N" type depending on the temperature and rate ofpulling. By suitable growing techniques, 10 to 15 thin "P" type layers are formed ina bar about the size of a cigar. This bar is then sawed up into pieces about 10 milsby 10 mils by 100 mils with the thin "P" layer in the center and long "N" regionson each side. About 7 to 10 thousand transistor bars can be cut from each ingot ofgermanium. The internal appearance of one of these transistors is shown in Figure 8.This transistor has a low collector capacitance and has excellent gain up to severalmegacycles. It is stable at high frequencies and is ideally suited for the radio fre-quency section of broadcast receivers. A rate grown transistor also makes an excellentunit for high speed gates and counting circuits.
8
TRANSISTOR CONSTRUCTION TECHNIQUES
FIGURE 8
The meltback method of transistor construction starts off with a bar of germaniumabout 10 x 10 x 100 mils. The end of the bar is melted and allowed to refreeze veryquickly. By suitable doping of the original material, the junction between the meltedportion and the unmelted portion becomes a thin layer of "P" type material and themelted and unmelted portion of "N" type material remains "N" type material. Thistransistor is essentially a rate grown transistor, but the rate growing is done on anindividual small bar rather than on the large germanium ingot. By the addition of anextra base connection to a triode, a tetrode is formed. If a current is passed throughthe base region from one base lead to the other, the active portion of the base regionis electrically narrowed and high gain is possible up to 200 mc.
Another method of making semiconductor devices is by gaseous diffusion of impuri-ties. In this type of construction, the base material and the impurity are sealed togetherin a quartz tube and the complete assembly heated to about 1200°C. At this hightemperature, the impurities form a gas which diffuses into the surface of the basematerial forming P or N type layers. With this technique, it is possible to form verylarge flat junctions of precisely controlled thickness. An example of a transistor builtusing this technique is the 2N451 silicon 85 watt power transistor shown in Figure 9.
EMITTERETCH
B E
TIN -
ANTIMONY
TIN CLADNICKEL LEAD
TITANIUMBACK UP
ALUMINUMALLOY
FIGURE 9
9
TRANSISTOR CONSTRUCTION TECHNIQUES
By using two impurities diffused simultaneously, it is possible to form a P type layer.2 mil thick and an N type emitter layer .3 mil thick. By making contacts to the baseand emitter regions, a transistor is produced capable of carrying up to 10 amperes.Since the diffused layers are very thin, the frequency response of this power transistoris good up to 5 to 10 mc.
Another recently developed device using diffusion techniques is the ControlledRectifier. A Controlled Rectifier is a four layer PNPN structure as shown in Figure 10.
CATHODE GATE
FIGURE 10
By making connections to three of the layers, a regenerative switch is obtainedacts in a manner very similar to a vacuum tube thyratron. This device will switch onin less than 1 sec and with the large areas made possible by diffusion, it will carry15 amperes continuously and 150 amperes on a surge basis.
G -E silicon signal transistors are grown junction devices with a diffused base andutilize an entirely new type of pellet mounting to obtain maximum mechanical strengthand reliability. This construction, used with both the silicon triode and the siliconunijunction transistors is called the ceramic disk construction or fixed-bed mounting,and is shown in Figure 11. A wafer of ceramic which has the same coefficient as thepellet forms the basic mechanical structure. Gold is deposited on the disk in three areas
to form the electrical contacts. The silicon bar is mounted across a narrow slit in thedisk and between two of the gold contacts. The third connection is made betweenthe silicon bar and the third gold contact by means of a small aluminum wire. Thealuminum wire forms the base contact of the silicon triode, and the emitter contactof the unijunction transistor. After the transistor is assembled on the ceramic disk, theentire disk assembly is mounted on a standard header by soldering the gold to thetransistor leads.
The use of this fixed -bed construction results in a number of importantadvantages:1. The mechanical strength of the structure is increased greatly since the basic
transistor structure is not subjected to stress during shock and vibration.
2. The transfer of heat between the transistor bar and the case is improvedpermitting higher power ratings.
3. The possibility of failure from extreme temperature cycling is greatly reducedbecause of the matched temperature coefficients of the structure.
4. The electrical characteristics are more stable and reproducible from unit tounit because of the improved uniformity of the mechanical structure.
10
TRANSISTOR CONSTRUCTION TECHNIQUES
GOLD FILM
EMITTER LEADOR BASE LEADTRANSISTOR
BARCERAMIC DISK
SLITLEADS
TOP VIEW
FIGURE 11
MAJOR PARAMETERS
SIDE VIEW
There are many properties of a transistor which can be specified, but this sectionwill only deal with the more important specifications. A fundamental limitation to theuse of transistors in circuits is BVcER, the breakdown voltage in the grounded emitterconnection. The grounded emitter breakdown voltage is a function of the resistancefrom the base to the emitter and it is necessary to specify this resistance shown asR in Figure 12.
+FOR NPNVCER ? -FOR PNP
FIGURE 12
Since the breakdown voltage is not sharp, it is also necessary to specify a value ofcollector current at which breakdown will be considered to have taken place. Forexample, in PNP audio transistors the collector current is specified to be less than600 ga with 25 volts applied and the resistance R equal to 10,000 ohms. With NPNtransistors, the collector current should be less than 300 Aa. with 15 volts applied, andthe base open -circuited.
The small signal parameters of transistors are usually specified in terms of the "h"or hybrid parameters. These parameters are defined for any network by the followingequations:
e IN
iIN 4- OUT0
e OUT
=hi hrlout = hf ho eotttwhere hi = input impedance (ohms)hr = feedback voltage ratio (dimensionless)he = forward current transfer ratio (dimensionless)h. = output conductance (mhos)
11
TRANSISTOR CONSTRUCTION TECHNIQUES
For transistors, a second subscript is added to designate which terminal of thetransistor is grounded. For example, hfe is the grounded emitter forward current trans-fer ratio.
The current transfer ratio is equal to the ratio of an a -c variation in collectorcurrent to an a -c variation in base current. This current gain can be specified either
oIcB- hfe -
FIGURE 13
for small a -c values of base current or for large values of base current in which caseit would be known as hFE, the d -c current gain. The current gain is the most importantproperty of a transistor in determining the gain of audio amplifiers.
The small signal "h" parameters of a transistor are a function of frequency andbias conditions. For a P -N -P alloy audio transistor, typical h parameters at 270 cps,and bias conditions of 5 volts (collector to emitter) and 1 ma collector current are:
Grounded Base Grounded Emitterh15 30 ohms hie 1500 ohmshrb 4 x 10-4 hr. 11 x 10-4hob -0.98 14. 50hob 1 x 10' mhos h.. 50 x 10
The h parameters at other bias conditions are shown by Figure 14.
10.0
4 5.0
2.0
01.0
0.5
0.2
1
0-10 -20 -5.0 -10 -20 -50COLLECTOR VOLTAGE Woe/ VOLTS
hOb hfe
fl,hib
IS...1441
hob
hfe
hrbbib
CHARACTERISTICSVS
COLLECTOR VOLTAGE
I I
-100
10
g 5.042
2.00
ill' 1.0
r-:13 0.5
I-
erIt 0.2
0.f
hibhob
hrb
hi-hfbhfe
irtifbhrb--------life
hob 'libCHARACTERISTICS
EMITTERVS
CURRENT
i
0.1 0 2 0.5 1.0 2.0 5.0EMITTER CURRENT (IE) MA
10
FIGURE 14
12
TRANSISTOR CONSTRUCTION TECHNIQUES
With transistors used as radio frequency amplifiers, it is necessary to specify atransformer coupled power gain as indicated in Figure 15. The power gain is the ratioof output power to input power under conditions where the input and output im-pedances are matched by means of the transformers. The input and output impedancesmust also be specified to select the proper transformer.
15K'500
Another common transistor specification is the alpha cut-off frequency. This is thefrequency at which the grounded base current gain has decreased to 0.7 of its lowfrequency value. For audio transistors, the alpha cut-off frequency is in the region of1 mc. For transistors used in the rf section of radios, the alpha cut-off frequencyshould be 3 to 15 mcs. Other examples of transistor specifications are shown on thespecification sheets starting on page 110.
RECTIFIER CONSTRUCTION
Germanium and Silicon rectifiers are two -element semiconductor devices con-structed around the single P -N junction described earlier in Figures 1, 2 and 3. Becauseof their inherently low forward resistance and high reverse resistance, these devicesare widely used for converting alternating current to direct current, to block reversecurrents in control circuits, and to increase the power gain of magnetic amplifiersthrough the effects of self -saturation.
Rectifiers are generally designed to handle power rather than small signals, andsizeable currents in addition to high voltages. These capabilities are attained throughuse of large cross-sectional area junctions and efficient means for dissipating heatlosses, such as fins, heat sinks, etc.
A section through a typical low power germanium rectifier is shown in Figure 16.The germanium pellet, which is soldered to the base disc, is approximately 1/16 inchsquare. Yet the junction of this germanium pellet with the indium alloy can rectify
FIGURE 16
13
TRANSISTOR CONSTRUCTION TECHNIQUES
over 1/4 ampere at room temperature and block voltages in the reverse direction upto 300 volts peak. This latter rating is called the "Peak Inverse Voltage" of the cell.When this same cell is mounted on a 1-1/2 inch square fin as shown in Figure 17, itscurrent carrying capabilities are increased to over 3/4 ampere at room temperature.
FIGURE 17
Germanium rectifiers of this type offer outstanding advantages over other types ofrectifiers:
1. Low forward drop, unexcelled by any other type of rectifier with the sameinverse voltage rating.
2. Reverse resistance so high as to be negligible for most applications.3. No aging, and therefore indefinitely long life. Also, no filament to burn out.
4. No junction forming required . . . it is always ready to function after prolongedidleness.
5. Withstands corrosive atmospheres and fluids . . . the junction is protected by awelded hermetic seal.
6. Wide temperature range, from -65°C to as high as +85°C.7. Ability to withstand shock and vibration . . . no moving parts, flimsy supports,
or sensitive filament.
FIGURE 18
When ambient temperatures exceed 85°C, or when extremely low reverse currentsare required, the silicon rectifier shown in cross-section in Figure 18 can be used. Inoutward appearance, the silicon rectifier looks identical to the germanium rectifier.However, instead of a germanium -indium junction inside, this cell employs the junctionof a piece of aluminum wire alloyed into a wafer of the metal silicon. This device canoperate in ambients up to 165°C and can handle currents up to 3/4 ampere at roomtemperature. Whereas its forward resistance is approximately 40% higher than agermanium device of the same rating, its reverse leakage current may be severalhundred times less than a comparable germanium cell. It too can be mounted on a fin
for higher current rating.
14
BIASING
A major problem with transistor amplifiers is establishing and maintaining theproper collector to emitter voltage and collector current (called biasing conditions)in the circuit. These biasing conditions must be maintained despite variations inambient temperature and variations of gain and leakage current between transistorsof the same classification.
If the current gain (hFE) of a transistor was constant with temperature and theleakage current was negligible, it would be possible to set up the bias conditions byfeeding a base current of the proper magnitude into the transistor as indicated byFigure 19.
E
FIGURE 19
"s- h EFE -RI
The collector current that flows is equal to hFE Rl . This type of biasing is extremely
dependent upon the hFE of the transistor and is not recommended except in caseswhere the biasing resistance can be individually adjusted for optimum results.
In general, it is necessary to use some type of feedback circuit so that the biasconditions of the transistor tend to be relatively independent of the transistor param-eters. The use of an emitter resistor will provide feedback to stabilize the operatingpoint. This type of biasing is shown by Figure 20.
#1,INER2
Icy
FIGURE 20
15
BIASING
A voltage divider consisting of resistors R. and R2 is connected to the base and theresistance R. is placed in the emitter. Since the emitter junction is forward biased,the current that flows in the emitter circuit is essentially equal to the voltage at thebase divided by R.. To prevent degeneration of the a -c signal to be amplified, theemitter resistance is by-passed with a large capacitance. Good design practice is tomake R2 no larger than 5 to 10 times R.. A typical value of R. is 500-1000 ohms. Themethod outlined above does not consider the variations of base to emitter voltage dropor the variations of leakage current with temperature. A more general approach tothe biasing problem is to consider the circuit of Figure 21.
VB
FIGURE 21
From this general circuit, the following equations can be derived:VB = [(1 - a) RB + RE] IE VBE LORD
VBE is the base to emitter voltage drop at the specified biasing point. At 25°C thisis 0.2 volts for germanium and 0.7 volts for silicon. At higher temperatures, VBE is-0.1 for germanium and 0.5 for silicon. If the minimum acceptable emitter current,minimum alpha, maximum emitter current and maximum alpha and maximum leakagecurrent are known, the following equation can be derived for the value of RB:
RB(IEm" IBM I") RE + VBEM n VBEm"
IEminIcon " - (1 -am") IEm" + (1 - am th)As an example, consider the 2N525 transistor with the following characteristics
used in a typical circuit:
E = 20 voltsRL = 8.2 K ohmsToe" = 100 /Lamp 55°C
hEEm" = 66, am" - 66- 67
30hEEmi° = 30, ain -- 31VBEm" = 0.2, VBEmIB = -0.1Desired 'Erna' = 1.24 maDesired hmin = 0.81
Substituting these values into the equation and assuming various RE's gives thefollowing results for RB:
for RE = lk, RE = 1.2kRE = 2.2k, RB = 5.8kRE = 3.3k, RB = 10k
16
BIASING
By substituting the value of R. into the original equation, a value of V. can beobtained. For example, using a 3.3K emitter resistance and a 10K value of RB, thevalue of V. equals 3.1 volts. Transforming from VB and R. to a more practical voltagedivider type biasing is done with the equations in Figure 22.
tE
RBERI-
B
R1 VBR2-
E-VB
FIGURE 22
+E
By use of the above approach, it is possible to design a bias circuit which willaccommodate all the variations of the transistor and maintain the bias points withinthe value desired.
17
BASIC AMPLIFIERS
SINGLE STAGE AUDIO AMPLIFIER
Figure 23 shows a typical single stage audio amplifier using a 2N190 PNPtransistor.
SINGLE STAGE AUDIO AMPLIFIERFIGURE 23
With the resistance values shown, the bias conditions on the transistor are 1 maof collector current and six volts from collector to emitter. At frequencies at
which Ci provides good by-passing, the input resistance is given by the formula:R1 = (1 + hfe) hib . At 1 ma for a design center 2N190, the input resistance wouldbe 37 X 30 or about 1100 ohms.
The a -c voltage gain e*" is approximately equal to . For the circuit shown thisnib
would be500030 or approximately 167.
The frequency at which the voltage gain is down 3 db from the 1 Kc valuedepends on rg. This frequency is given approximately by the formula:
low f rk,3db
i+hferg6.28( C1)
TWO STAGE R -C COUPLED AMPLIFIER
The circuit of a two stage R -C coupled amplifier is shown by Figure 24. Theinput impedance is the same as the single stage amplifier and would be ap-proximately 1100 ohms.
FIGURE 24
18
BASIC AMPLIFIERS
The load resistance for the first stage is now the input impedance of the secondstage. The voltage gain is given approximately by the formula:
Av hfe RLhib
More exact formulas for the performance of audio amplifiers may be found inthe Reading List at the end of this manual.
CLASS B PUSH-PULL OUTPUT STAGES
In the majority of applications, the output power is specified so a design willusually begin at this point. The circuit of a typical push-pull Class B output stage isshown in Figure 25.
FROMDRIVERSTAGE
FIGURE 25
The voltage divider consisting of resistor, R and the 47 ohm resistor gives a slightforward bias on the transistors to prevent cross -over distortion. Usually about 1/10 ofa volt is sufficient to prevent cross -over distortion and under these conditions, theno -signal total collector current is about 1.5 ma. The 8.2 ohm resistors in the emitterleads stabilize the transistors so they will not go into thermal runaway when the junc-tion temperature rises to 60°C. Typical collector characteristics with a load line areshown below:
I MAX.
COLLECTOR CURRENTLOAD LINE
COLLECTOR VOLTAGE
FIGURE 26
NO SIGNAL OPERATINGPOINT
It can be shown that the maximum a -c output power without clipping using a push-pull stage is given by the formula:
Pout = 2
Since the load resistance is equal to
'max Ec
RE = - im..E0
19
BASIC AMPLIFIERS
and the collector to collector impedance is four times the load resistance per collector,the output power is given by the formula:
2 E,2P. = R,_,
(1)
Thus, for a specified output power and supply voltage the collector to collector loadresistance can be determined. For output powers in the order of 50 mw to 750 mw,the load impedance is so low that it is essentially a short circuit compared to the out-put impedance of the transistors. Thus, unlike small signal amplifiers, no attempt ismade to match the output impedance of transistors in power output stages.The power gain is given by the formula:
Pout I.2 RL-Power Gain - P;,, .1.
=TIn2 To
Since L is equal to the current gain, Beta, for small load resistance, the power gain
formula can be written as:Re_e
P. C. =19- Rb-b(2)
where Re_, = collector to collector load resistance.Rb-b = base to base input resistance.p grounded emitter current gain.
Since the load resistance is determined by the required maximum undistorted outputpower, the power gain can be written in terms of the maximum output power by com-bining equations (1) and (2) to give:
2132E2cP. G. It
( 3 )b -b Pout
CLASS A OUTPUT STAGES
A Class A output stage is biased as shown on the collector characteristics below:
I MAX.
COLLECTOR CURRENT DC OPERATING POINT
E c 2E,COLLECTOR VOLTAGE
FIGURE 27
The operating point is chosen so that the output signal can swing equally in the posi-tive and negative direction. The maximum output power without clipping is equal to:
Ee lePout = 2
The load resistance is then given by the formula:
RL =E.
20
BASIC AMPLIFIERS
Combining these two equations, the load resistance can be expressed in terms of thesupply voltage and power output by the formula below:
Eo2RL -- (4)2 P.
For output powers of 10 mw and above, the load resistance is very small compared tothe transistor output impedance and the current gain of the transistor is essentially theshort circuit current gain Beta. Thus for a Class A output stage the power gain is givenby the formula:
132 RLP. G. RE. - 2 Rt. Po
CLASS A DRIVER STAGES
(5)
For a required output power of 250 mw, the typical gain for a push-pull outputstage would be in the order of 23 db. Thus the input power to the output stage wouldbe about 1 to 2 mw. The load resistance of a Class A driver stage is then determinedby the power that must be furnished to the output stage and this load resistance isgiven by equation (4). For output powers in the order of a few milliwatts, the loadresistance is not negligible in comparison to the output impedance of the transistors,therefore, more exact equations must be used to determine the power gain of a Class Adriver stage. From four terminal network theory, after making appropriate approxima-tions, it can be shown that the voltage gain is given by the formula:
Rr,= LIl (6)ib
where bib = grounded base input impedance.The current gain is given by the formula:
A, = 1-a + RL hobwhere hob = grounded base output conductance.
The power gain is the product of the current gain and the voltage gain, thus unlikethe formula for high power output stages, there is no simple relationship betweenrequired output power and power gain for a Class A driver amplifier.
a
DESIGN CHARTS
(7)
Figures 28 through 36 are design charts for determination of transformer imped-ances and typical power gains for Class A driver stages, Class A output stages, andClass B push-pull stages. Their use can be best understood by working through atypical example. It will be assumed that it is desired to design a driver and push-pullamplifier capable of delivering a 250 mw with a 9 volt supply. Using Figure 28, for250 mw of undistorted output power, the required collector to collector load resistanceis 450 ohms. From Figure 30 using a typical 2N187, the power gain is 22.5 db. Innumerical terms, a power gain of 22.5 db is 178. Therefore, the required input powerto the driver stage would be:
250131' = 178
or 1.4 mw. Assuming about 70% efficiency in the transformers, the required outputpower of the driver stage will be 2 mw. From Figure 32, for 2 mw of undistorted out-put power, the load resistance is slightly over 10,000 ohms so a 10,000 ohm trans-former could be used. From Figure 35 assuming a 2N191 driver transistor, the powergain is 41 db. The typical power gain of the two stages using a 2N191 driver and
21
BASIC AMPLIFIERS
2N187's in the output would be 63.5 db. The secondary impedance of the driving
transformer should be 2,000 ohms center tapped as shown on the specification sheet
for the 2N186, 2N187 and 2N188. The secondary impedance of the output transformer
should be selected to match the impedance of the load.
1000
700
500
300
200
100
70
50
30
20
10
N
6 VOLT SUPPLY
DESIGN CHART FOROUTPUT TRANSFORMERIN CLASS B PUSH-PULLAUDIO AMPLIFIERS
2 VOLT SUPPLY9 VOLT SUPPLY
\100 200 300 500 1000 2000 3000 5000 10,000
COLLECTOR TO COLLECTOR LOAD -OHMS
1000
600
400
20
100
60
40
20
10
6
4
2
FIGURE 28
MAXIMUM RATED POWER
2N187A))
(2N186A) _ _ __ MAXIMUM RATEDPOW ER
r -1
(2NI86)
((22NN118887))
TYPICAL POWER GAINFOR CLASS B,
PUSH-PULL AMPLIFIERS
6 VOLT SUPPLY
12 14 16 18 20 22 24 26 28 30
POWER GAIN -DECIBELS
FIGURE 29
22
BASIC AMPLIFIERS
1000
600
111.00
_1200
,L1000.o.I- 60
40cc
° 200 10re0
0co - 6
z 4
2 2
100 0
600
400
200
100
60
40
20
10
6
4
2
MAXIMUM RATED POWER
(2N188A)(2N187A)
(2N 186A) MAXIMUM RATED POWER
(2N1136)2NI88)
(2N187)
TYPICAL POWER GAINFOR CLASS 8,
PUSH-PULL AMPLIFIERS9 VOLT SUPPLY
14 16 18 20 22 24 26 28 30 32POWER GAIN -DECIBELS
FIGURE 30
(2NI86A
(2N186)
MAXIMUM RATED POWER1
(2N188A)(2N I87A )MAXIMUM RATED POWER
(2N188)(2N187)
TYPICAL POWER GAINFOR CLASS B,
PUSH-PULL AMPLIFIERS
12 VOLT SUPPLY
18 20 22 24 26 28 30 32 34 36POWER GAIN DECIBELS
FIGURE 31
23
BASIC AMPLIFIERS
10
7
5
3
2
1.0
0.7
0.5
a3
0.2
0.1
1000
11<
I-
I1
0rew
00- cn
<1- 100
ac70
co 550
D
72 30
20
10
12 VOLTS SUPPLY
9 VOLTS SUPPLY6 VOLTS SUPPLY
DESIGN CHART FOROUTPUT TRANSFORMER
IN CLASS A-S1NGLEENDED OUT PUT STAGES
10K
COLLECTOR LOAD RESISTANCE OHMS
FIGURE 32
100K
DESIGN CHART FOROUTPUT TRANSFORMER
IN CLASS A -SINGLEENDED OUTPUT STAGES
12 VOLTS SUPPLY9 VOLTS SUPPLY
6 VOLTS SUPPLY
1 1 1
100 1000COLLECTOR LOAD RESISTANCE OHMS
10,000
FIGURE 33
24
BASIC AMPLIFIERS
100
70
IL; 3500
I20
rc
O3
5
o 2
o;a:0.5
I100
70
I Li 50
3 20
10
I- 50
o 5rc
3 3
2
o I
MAXIMUM RATED POWE R
12N188A){2N187A)
(2N186A) 11, MAXIMUM RATED POWER
Ih.( 2N192 12N191)
(2N189)
SINGLE
TYPICAL POWERFOR CLASS
ENDEDAMPLIFIERS
6 VOLT
GAINA -
SUPPLY
20 24 28 32 36POWER GAIN - DECIBELS
a 0.705
2
40 44
FIGURE
I
MAXIMUM RATED POWER
88AatN1187A
i
(2N186A)- _ _ _ MAXIMUM_ --RATED POWER-
li.(2N192)(2N191)
TYPICAL POWER GAINFOR CLASS A-
SINGLE ENDED AMPLIFIERS
12 VOLT SUPPLY
FIGURE 34
F 100
702 50
F. 30
F- 20
010
g 7a 5
1- 3cc
I
2 0.7TI
0.5
- - - - - - _
I 1
MAXIMUM RATED POWER-
2NI88A2N187A
2N186A- MAXIMUM RATED POWER
2N192
2N 191
2N190".2N 189"
TYPICAL POWER GAINFOR CLASS A -
SINGLE ENDED AMPLIFIERS9 VOLT SUPPLY
22 26 30 34 38POWER GAIN - DECIBELS
FIGURE 36
42 46
I
24 28 32 36 40POWER GAIN - DECIBELS
44 48
25
AMPLIFIER CIRCUIT DIAGRAMS
1pfd
INPUTH
.05.0 f
AUDIOINPUT
SIMPLE AUDIO AMPLIFIERFIGURE 37
R +3
2000HEADPHONES
2NI07
22.r
2KPHONE
R SHOULD BE ADJUSTED FOR OPTIMUM RESULTS
22K
DIRECT COUPLED "BATTERY SAVER" AMPLIFIERFIGURE 38
G.E. 01.uf2N 107
50K 'OWf
KEY
2KILPHONES
(MAGNETIC)
CODE PRACTICE OSCILLATORFIGURE 39
26
BASIC AMPLIFIERS
0
AUDIOINPUT
SW
6V
TI
6V
LOUDSPEAKER AUDIO AMPUFIERFIGURE 40
2N107LT2
*El
TI -TRIAD A -8I XOR EQUIV.
T2=TRIAD S-5IXOR EQUIV.
R1, 220,000 OHMMAXIMUM POWER OUTPUT : .35 WATTSC1 --60d, 12V
VOLUME CONTROL 10000 OHM MAXIMUM POWER OUT AT 10%R2 02 -10004, 3V03, C4 -50µfd, I2V
-pad
I/2W AUDIO TAPER HARMONIC DISTORTION : 25 WATTS68,000 OHM SENSITIVITY FOR 50 MILLIWATTS143, C5, .02
TR1,-GE. 2N192 OR 2N265TR2,TR3rG.E. 2N2414
*71 6101/51CDCT
10000 OHM470 OHM220 OHM1800 OHM
REFERENCE POWER OUTPUT: .2 VOLTSFOR USE WITH MAGNETIC CARTRIDGEOMIT RI, IN THIS CONDITION SENSITIVITY:5 MILLIVOLTS
134,
135,
R6,*T2 50011CT/ V.C.R7,
33 OHMR8,-R6,R10,-
811'
8.2 OHM
4.7K OHMW FOR FURTHER COMPONENT INFORMATION SEE PAGE 167
THREE TRANSISTOR PHONO AMPUFIERFIGURE 41
27
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67
FIV
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"HI -Fl" CIRCUITS
Transistors are ideally suited for Hi-Fi amplifiers since there is no problem withmicrophonics or hum pick-up from filaments as there is with tubes. Transistors areinherently low impedance devices and thus offer better matching to magnetic pick-upsand loudspeakers for more efficient power transfer.
Transistor circuits with negative feedback can give the wide frequency responseand low distortion needed in hi-fi equipment.
PREAMPLIFIERSPreamplifiers have two major functions (1) increasing the signal level from a
pick-up device to 1 or 2 volts rms, and (2) providing compensation if required toequalize the input signal for a constant output with frequency.
The circuit of Figure 44 meets these requirements when the pick-up device is avariable reluctance phono cartridge such as the General Electric VRII, or a tape head.
MAGNETICTAPE ORPHONOPICKUP
TAPE(NARTB)
2010 3V 8V TR3
20V 25332
PHONO-TAPE PREAMPLIFIERFIGURE 44
This preamp will accommodate most magnetic pick-up impedances. The inputimpedance to the preamp increases with frequency because of the frequency selective
negative feedback to the emitter of TR1. The impedance of the magnetic pick-upswill also increase with frequency but are below that of the preamp.
The first two stages of this circuit have a feedback bias arrangement for currentstabilization of both stages. The 330K from the emitter of TR2 provides this DCcurrent feedback to the base of TR1. The output stage is well stabilized with a 5Kemitter resistance.
The AC negative feedback from the collector of TR2 to the emitter of TR1 is fre-
quency selective to compensate for the standard NARTB recording characteristic for
tape or the standard RIAA for phonograph records. The flat response from a standardNARTB pre-recorded tape occurs with the tone control (R12) at mid -position or 12Kohms. (See Figure 45.) There is 7 to 8 db of treble boost with the control at 25Kmaximum position, and approximately 20 db of treble cut with R12=0. Mid -positionof the tone control also gives flat response from a standard RIAA recording.
30
"HI -Fl" CIRCUITS
+10
0
c10
5 20
RI2 25K
RI2=12K
NA R12 - 0
40 100 I KC 10 15KCTAPE PREAMPLIFIER RESPONSE FROM HARTS RECORDING
FIGURE 45
The voltage feedback from the collector of TR2 decreases at low frequenciesbecause of the increasing reactance of the feedback capacitor in series with the tonecontrol. Each of the two feedback networks give the desired increase in gain at thelower frequencies to accomplish the correct compensation. If this feedback capacitorwere shunted by an electrolytic capacitor, the preamplifier would give constant gainat all frequencies (in the "Tape" switch position). This gain is determined by R12/R1.
The RIAA feedback network (with tone control at mid -position) has a net feedbackresistance of 6K to decrease the gain because of the higher level input. This resistancehas a .01 pf capacitor in parallel for decreasing the amplifier gain at the higherfrequencies in accordance with RIAA requirements. This eliminates the need to loada reluctance pick-up with the proper resistance for high frequency compensation. Ifit is desirable to build the preamplifier for phonograph use only, the compensatingfeedback network would consist only of a .04 of feedback capacitor in series with a 6Kresistor (or a 10K Tone control) which has a .01 of capacitor in parallel.
The emitter -follower output stage of the preamp gives a low impedance output fora cable run to a power amplifier, and acts as a buffer so that any preamp loading willnot affect the equalization characteristic.
The Tone control should have a linear taper and the Volume control an audiotaper. Two 9 volt batteries will give good life in this application since the total supplydrain is approximately 3.5 ma DC. This 18 volts may also be obtained by suitabledecoupling from a higher voltage supply that is available.
HYBRID PREAMPLIFIER
The hybrid preamplifier circuit of Figure 46 uses a similar feedback equalizationtechnique to that of Figure 44. There is a small amount of treble boost above 10 KCdue to the .01 Af capacitor from the 12AX7 cathode to ground. The Treble Control isset at the same position (R4 = 20K) for a compensated output from a standard RIAArecording or an NARTB recorded tape.
The 2N508 transistor is biased at approximately .7 ma from a constant currentsource for good current stability with temperature and transistor interchangeability. R1biases the base for the desired VcE, and since this bias is taken from the collector, the
31
"HI -Fl" CIRCUITS
MAGNETICPICKUP
205f20V
R(+CI
TAPEPHO NO +110VD.C.
201(
150K
TREBLEEQUALIZATIO
.01
.03 220K
66V.05
RI
560K
6.8V
30KR4
2N508
I0.4V
1/2 12AX7
27 §10K §2.2MEG. 2.2K
+100 pf-15V
.01
OUTPUT-o
HYBRID PHONO-TAPE PREAMPLIFIERFIGURE 46
d -c feedback helps to keep VCE in the range of 1 to 5 volts. This voltage varies withleakage current of Cl and with 11E. for different transistors. This range of Vcj bias
has little effect on the operation of the preamplifier.
The standard reference level for S/N (signal-to-noise) measurements in tape
recording is the maximum level at which a 400 cycle signal can be recorded at 2%
harmonic distortion. The hybrid preamplifier of Figure 46 is capable of a S/N inexcess of 60 db. The signal output from this reference level is approximately 1.5 volts.
The variation of treble equalization for tape is shown in Figure 47.
+5
0
-510
-15
20
- 25100 1KC
FIGURE 47
R4=30KR4 = 20K
R4= 0
10 I5KC
A dual preamp for a stereophonic disc or tape system could be built with twoidentical preamps as in Figure 46, using only one tube (12AX7) and two transistors
(2N508).
TONE CONTROLS
Tone control circuits for transistor amplifiers are somewhat different than con-ventional vacuum tube tone controls since the impedance levels in transistor circuits
are lower. A satisfactory bass and treble tone control for use between transistor stages
is shown by Figure 48. *"Transistor Electronics," Lo, Endres et al (Prentice-Hall).
32
"HI -Fl" CIRCUITS
FROM 5PRE -AMPLIFIER-11
VOLUME100K
FIGURE 48
10K 5(-POUT PUT
.008
The action of the tone controls is easily understoodif they are considered ascurrent transfer networks rather than voltage transfer networks as in vacuum tubeamplifiers. The output current from the preceding stage goes to the volume controlwhere part of it is shunted to ground and the rest goes to the junction of the 0.02 12fdand 0.2 µfd capacitors and the center arms of the potentiometers. At 1000 cycles, theequivalent circuit of the tone controls is very simple, as shown in Figure 49(A). At thisfrequency, the current is divided so that 10/11ths of the current is shunted to groundand 1/11th goes on to the next transistor. The low -frequency equivalent circuit for the"bass boost" condition is shown in Figure 49(B). With the movable arm of the potenti-ometer near the top, the 0.02 pid capacitor is bypassed and more of the current isshunted into the 10,000 ohm resistor as the impedance of the 0.2 µfd capacitor risesat low frequencies.
The high -frequency equivalent circuit of the tone control is shown in Figure 49(C)for the "treble cut" condition. Depending on the potentiometer setting, most of thehigher frequencies will be shunted to ground as compared to a 1000 cycle signal.With the potentiometer arm at the top, the higher frequency current would bypassthe 10,000 ohm resistor and a treble boost would be achieved.
The performance of the tone control is shown by Figure 50.
IN
10K 10KOUT .OUT OUT
:02 2K IN .008
(A)
48K
(B)
IN
10K
K
I.
(C)
48K
2K
(A) A I KC EQUIVALENT CIRCUIT. (B) LOW -FREQUENCY EQUIVALENTCIRCUIT, AND (C) THE EQUIVALENT CIRCUIT AT HIGH FREQUENCIES.
FIGURE 49
33
"HI -Fl" CIRCUITS
+1
+1
2
D
44)(
1 I3
5
D
414-t CC''.11: 00-
100 IKC
FREQUENCY -CPS
FIGURE 50
POWER AMPLIFIERS
10KC
A great deal of effort has gone into developing transformerless push-pull amplifiersusing vacuum tubes. Practical circuits, however, use many power tubes in parallel toprovide the high currents necessary for direct driving of low impedance loudspeakers.
The advent of power transistors has given new impetus to the development oftransformerless circuits since the transistors are basically low voltage, high currentdevices. The emitter follower stage, in particular, offers the most interesting possi-bilities since it has low inherent distortion and low output impedance.
SIX WATT POWER AMPUFIERFIGURE 51
Figure 51 is a direct coupled power amplifier with excellent low frequency response,and also has the advantage of a feedback arrangement for current stabilization of allstages. The feedback system also stabilizes the voltage division across the power outputtransistors TR4 and TR6 which operate in a Class B push-pull arrangement. TR3 andTR5 also operate Class B in the Darlington connection to increase the current gain.Using an NPN for TR5 gives the required phase inversion for driving TR6 and alsohas the advantage of push-pull emitter follower operation. TR4 and TR6 have a smallforward bias to minimize crossover distortion. This bias is set by the voltage dropacross the 1K resistors that shunt the input to TR4 and TR6. TR3 and TR5 are biasedfor the same reason with the voltage drop across the 1N91. A 68 ohm resistor wouldserve the same function as the 1N91 except there would be no temperature compensa-tion. Thermistors have also been used to compensate for the temperature variation ofthe emitter -base resistance, but they do not track this variation as well as a germaniumjunction diode which has temperature characteristics similar to the transistor.
34
"HI -Fl" CIRCUITS
TR2 is a Class A driver requiring a very low impedance drive which is accomplishedby an emitter follower TR1. TR1 needs a current source for low distortion thus R1and the Level Control supply the desired drive impedance. The Level Control shouldbe set for a value of approximately 1K ohms when this amplifier is driven by thepreamplifier of Figure 44. This will permit the amplifier to be driven to full output.TR1 has an emitter current of .8 to 1 ma, and TR2 has a 2.5 to 3 ma bias.The bias adjuster R2 is set for one-half the supply voltage across TR6. TR4 and TR6have a beta cut-off at approximately 7Kc. The phase shift and drop in beta gives riseto a decline in transistor efficiency which causes an elevation of junction temperature.To help stabilize this runaway condition, the higher frequency drive has been decreasedby the .005 thf capacitors in parallel with the 1K ohm drive resistors. This reduces thedrive by 3 db at 30 Kc. The .001 /.4f feedback from collector to base of TR2 also aidsin this stabilization by reducing the high frequency gain of this stage. The 220 /.4/.fcapacitor shunting the bias network further aids the stabilization of the amplifierwith high frequency negative feedback from output to input. This circuit has approxi-mately 17 db of overall voltage feedback with the 20K resistor from load to input. Theoutput to speaker is shunted by 22 ohms in series with .2 Ad to prevent the continuedrise of speaker impedance and its accompanying phase shift beyond the audio spectrum.The overall result, from using direct coupling, no transformers, and ample degenera-tion, is an amplifier with output impedance less than one ohm for good speakerdamping, and very low total harmonic distortion. The frequency response at 100milliwatts is fiat over the audio spectrum. When checking for maximum power outat the higher frequencies, a sinewave can be applied only for a short duration beforesufficient heating for runaway results as indicated above. To protect the power tran-sistors, a current meter should be used in series with the voltage supply for quick, visualindication of runaway while checking power output above approximately 2Kc. Thereis not sufficient sustained high frequency power in regular program material to precipi-tate this instability. Thus the actual performance of the amplifier does not suffer sincethe power level in music and speech declines as the frequency increases beyondabout 1Kc.
This amplifier is capable of a 5 watt output with less than 1% harmonic distortioninto a 4, 8 or 16 ohm speaker when used with the power supply of Figure 153, page 108.The power transistors TR4 and TR6 should be mounted on an adequate heatradiator such as used for transistor output in an automobile radio, or mounted on a3" x 4" x 1/s" aluminum plate.
STEREOPHONIC TAPE SYSTEMA complete semiconductor, stereophonic tape playback system may be assembledby using the following circuits in conjunction with a stereophonic tape deck.
#ITRACK
TAPEPREAMP
FIG.44
6 WATTPOWER
AMPFIG.51
SPEAKER
STEREOTAPEDECK
POW ERSUPPLY
FIG. 154
# 2 TAPEPREAMP
FIG.44
6 WATTPOWER -I( SPEAKERTRACK
AMPFIG. 51
BLOCK DIAGRAM OF STEREOPHONIC TAPE SYSTEMFIGURE 52
35
"HI -Fl" CIRCUITS
Two identical tape preamplifier circuits can use a common 18 volt battery supply.The circuitry of Figure 44 may be used with the switch and RIAA network eliminatedif the preamps are to be used for tape only.
The output of each preamp is fed to a power amplifier as indicated in Figure 52.Two identical power amplifiers with circuitry as in Figure 51 can use a common powersupply as shown in Figure 154, page 108. The output coupling capacitor of the pre -amps may be eliminated when fed to an amplifier with an input coupling capacitoras in Figure 51. The output of each amplifier fed to its respective speaker completesthe stereo system as shown in Figure 52.
A dual 10 watt stereo system consists of two identical amplifiers with circuitry ofFigure 53 using the common power supply of Figure 155, page 109. This power supplyhas separate decoupled outputs for each amplifier. The 1N1115 rectifiers should bemounted on a metal chassis with the electrically insulating mounting kit provided witheach unit. The stereo system uses the same tape preamplifiers as that of Figure 52.
-50V(15ma-NO SIGNAL
4A (ol 10WATTS)I I/2A
TR42NI73
1506 I000pf
(BIASLEVEL ADJ) 2211
0=120pf 520V
INPUT
TEN WATT POWER AMPLIFIERFIGURE 53
2
8 OR1611 SPEAKER
The power amplifier of Figure 53 is the same circuit as Figure 51 except for thetransistors which have a higher voltage rating. This amplifier with the power supply ofFigure 155, page 109, is capable of a 10 watt output with very low distortion into an8 or 16 ohm speaker.
HI-FI CIRCUIT DIAGRAMS
180V .5mo
330 Kto5V
2N 169
390K
.1
030 VACUUM TUBEAMPLIFIER
39 K
10uf
NPN PREAMPLIFIER FOR MAGNETIC PICKUPSFIGURE 54
36
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5
RADIO CIRCUITS
AUTODYNE CONVERTER CIRCUITS
The converter stage of a transistor radio is a combination of a local oscillator, amixer and an IF amplifier. A typical circuit for this stage is shown in Figure 56.
AC =190.6
L.435mh
8TURNS
I5K:500AAUTOMATIC 725
FOR ADDITIONAL INFORMATION SEE PAGE 167
AUTODYNE CONVERTERFIGURE 56
Redrawing the circuit to illustrate the oscillator and mixer sections separately, weobtain Figures 57A and 57B.
+9V
FIGURE 57A
FIGURE 57B
The operation of the oscillator section (57A) is as follows:Random noise produces a slight variation in base current which is subsequently
amplified to a larger variation of collector current. This A.C. signal in the primary ofL2 induces an A.C. current into the secondary of L2 tuned by CB to the desiredoscillator frequency. C2 then couples the resonant frequency signal back into theemitter circuit. If the feedback (tickler) winding of L2 is properly phased the feedbackwill be positive (regenerative) and of proper magnitude to cause sustained oscillations.The secondary of L2 is an auto -transformer to achieve proper impedance match be-tween the high impedance tank circuit of L2 and the relatively low impedance of theemitter circuit.
38
RADIO CIRCUITS
Ci effectively bypasses the biasing resistors R. and R. to ground, thus the base isA.C. grounded. In other words, the oscillator section operates essentially in thegrounded base configuration.
The operation of the mixer section (57B) is as follows:
The ferrite rod antenna Li exposed to the radiation field of the entire frequencyspectrum is tuned by CA to the desired frequency (broadcast station).
The transistor is being biased in a relatively low current region, thus exhibitingquite non-linear characteristics. This enables the incoming signal to mix with theoscillator signal present, creating signals of the following four frequencies:
1. The local oscillator signal.2. The received incoming signal.3. The sum of the above two.4. The difference between the above two.
The IF load impedance Ti is tuned here to the difference between the oscillatorand incoming signal frequencies. This frequency is called the intermediate frequency(I.F.) and is conventially 455 KC/S. This frequency will be maintained fixed since CAand Cs are mechanically geared (ganged) together. 114 and C. make up a filter to pre-vent undesirable currents to flow through the collector circuit. C. essentially bypassesthe biasing and stabilizing resistor R1 to ground. Since the emitter is grounded andthe incoming signal injected into the base, the mixer section operates in the "groundedemitter" configuration.
IF AMPLIFIERS
A typical circuit for a transistor IF amplifier is shown by Figure 58.
AUTOMATIC
15KINPUT
AUTOMATIC 725(EX0-3926)
10K
2N293
FIGURE 58+9V
I
tI OU579g1
_ J
The collector current is determined by a voltage divider on the base and a largeresistance in the emitter. The input and output are coupled by means of tuned IFtransformers. The .05 capacitors are used to prevent degeneration by the resistancein the emitter. The collector of the transistor is connected to a tap on the outputtransformer to provide proper matching for the transistor and also to make the per-formance of the stage relatively independent of variations between transistors of thesame type. With a rate -grown NPN transistor such as the 2N293, it is unnecessaryto use neutralization to obtain a stable IF amplifier. With PNP alloy transistors, itis necessary to use neutralization to obtain a stable amplifier and the neutralizationcapacitor depends on the collector capacitance of the transistor. The gain of a tran-sistor IF amplifier will decrease if the emitter current is decreased. This propertyof the transistor can be used to control the gain of the IF amplifier so that weakstations and strong stations will produce the same audio output from a radio. Typicalcircuits for changing the gain of an IF amplifier in accordance with the strengthof the received signal are explained in the A.V.C. section of this chapter.
39
RADIO CIRCUITS
AUTOMATIC VOLUME CONTROLSA.V.C. is a system which automatically varies the total amplification of the signal
in a radio receiver with changing strength of the received signal carrier wave.From the definition given, it would be correctly inferred that a more exact term
to describe the system would be automatic gain control (A.G.C.).Since broadcast stations are at different distances from a receiver and there is a
great deal of variation in transmitted power from station -to -station, the field strengtharound a receiver can vary by several orders of magnitude. Thus, without some sortof automatic control circuit, the output power of the receiver would vary considerablywhen tuning through the frequency band. It is the purpose of the A.V.C. or A.G.C.circuit to maintain the output power of the receiver constant for large variations ofsignal strengths.
Another important purpose of this circuit is its so-called "anti -fading" properties.The received signal strength from a distant station depends on the phase and amplituderelationship of the ground wave and the sky wave. With atmospheric changes thisrelationship can change, yielding a net variation in signal strength. Since these changesmay be of periodic and/or temporary nature, the A.V.C. system will maintain theaverage output power constant without constantly adjusting the volume control.
The A.V.C. system consists of taking, at the detector, a voltage proportional to theincoming carrier amplitude and applying it as a negative bias to the controlled amplifierthereby reducing its gain.
In tube circuits the control voltage is a negative going DC grid voltage creatinga loss in transconductance (Gm).
In transistor circuits various types of A.V.C. schemes can be used:
EMITTER CURRENT CONTROL
As the emitter current of a transistor is reduced (from 1.0 ma to .1 ma for instance)various parameters change considerably (see Figure 59).
10
Vo 5 r
GAO.EMITTER
10
EMITTER SIAS M.
CHARACTERISTICS VS. EMITTER CURRENT
FIGURE 59
The effect of these changes will be twofold:1. A change in maximum available gain and2. A change in impedance matching since it can be seen that both hb
and hbb vary radically.Therefore, a considerable change in power gain can be obtained as shown by Figure 60.
40
RADIO. CIRCUITS
db34
32
30
28
26
24
22
20
Zzt 18
16.+
8: 14
12
10
8
V,89v
VC1 .5......----,...\
GE 2NI68AAGC CURVE/ POWER GA N VS EMITTER CURRENT
INPUT MATCHED AT I, 'maOUTPUT TUNED AT 455 KCZ LOAD 15K0.1 VcE 5 VOLTS
.04 2 .4 .6 B I
EMITTER CURRENT -ma
FIGURE 60
4 6 8
On the other hand, as a result of Ico (collector leakage current) somecurrent always flows, thus a transistor can be controlled only up to apoint and cannot be "cut-off" completely. This system yields generallyfair control and is, therefore, used more than others. For performancedata see Figure 61.
+6
+4
+2
0
-2-4
-6-9
-10
-12
-14
-16
-180.0001 0.001 0.01 0.1
EMITTER CURRENTPLUS AUXILIARY A.V.0 DIODE
STRONGSI GNALS
SIGNAL STRENGTH IN VOLTS /METER
FIGURE 61
AUXILIARY A.V.C. SYSTEMS
EMITTER CURRENTCONTROL ONLY
N (OVERLOAD\ ABOVE .1 V/ m
YIELDS DISTORTION)
1.0
Since most A.V.C. systems are somewhat limited in performance, toobtain improved control, auxiliary diode A.V.C. is sometimes used.The technique used is to shunt some of the signal to ground whenoperating at high signal levels, as shown by Figure 62.
41
RADIO CIRCUITS
CONVERTERTR!
Ebb
C
FIGURE 62
202nd
A.VCFROM DETECTOR
In the circuit of Figure 62 diode CRi is back -biased by the voltage drops acrossR2 and R2 and represents a high impedance across Ti at low signal levels. As the signalstrength increases, the conventional emitter current control A.V.C. system creates abias change reducing the emitter current of the controlled stage. This current reductioncoupled with the ensuing impedance mismatch creates a power gain loss in the stage.As the current is further reduced, the voltage drop across R2 becomes smaller thuschanging the bias across CRI. At a predetermined level CR, becomes forward biased,constituting a low impedance shunt across T1 and creating a great deal of additionalA.V.C. action. This system will generally handle high signal strengths as can be seenfrom Figure 61. Hence, almost all radio circuit diagrams in the circuit section of thismanual use this system in addition to the conventional emitter current control.
"TETRODE" OR BASE #2 CONTROL
In tetrode transistor amplifiers the high frequency gain of the transistordepends on the base -to -base bias voltage, varying the latter will givegood gain control. For circuit see Figure 63.
Ebb
A.V.0DETECTOR
R6
FIGURE 63
42
RADIO CIRCUITS
REFLEX CIRCUITS
"A reflex amplifier is one which is used to amplify at two frequencies - usuallyintermediate and audio frequencies.-*
The system consists of using an I.F. amplifier stage and after detection to returnthe audio portion to the same stage where it is then amplified again. Since in Figure 64,
AUXILIARY
A.V.C.
IN640 AUDIO
AUTOOYNE
CONVERTERFIRST I.F.
AMPLIFIER
2nd I.F. +
AUDIO DRIVER
DIODEDETECTOR
A.V.0
AUDIOPOWEROUTPUT
2N168A 2N292 2NI69 IN646 2NI88A
AUDIO
A.V.C.
FIGURE 64
two signals of widely different frequencies are amplified, this does not constitute a"regenerative effect" and the input and output loads of these stages can be split audio- I.F. loads. In Figure 65, the I.F. signal (455 Kc/s) is fed through T2 to the detectorcircuit CR1, C3 and R5. The detected audio appears across the volume control R5and is returned through C4 to the cold side of the secondary of Tl.
TI
AUDIOOUTPUT
O
13 PLUS
FIGURE 65* F. Langford -Smith, Radiotron Designers Handbook, Australia, 1953, p. 1140
43
RADIO CIRCUITS
Since the secondary only consists of a few turns of wire, it is essentially a shortcircuit at audio frequencies. Cl bypasses the I.F. signal otherwise appearing acrossthe parallel combination of RI and R2. The emitter resistor R3 is bypassed for bothaudio and I.F. by the electrolytic condenser C2. After amplification, the audio signalappears across R4 from where it is then fed to the audio output stage. C5 bypasses R4for I.F. frequencies and the primary of T2 is essentially a short circuit for theaudio signal.
The advantage of "reflex" circuits is that one stage produces gain otherwiserequiring two stages with the resulting savings in cost, space, and battery drain. Thedisadvantages of such circuits are that the design is considerably more difficult,although once a satisfactory receiver has been designed, no outstanding productiondifficulties should be encountered. Other disadvantages are a somewhat higher amountof playthrough (i.e. signal output with volume control at zero setting), and a minimumvolume effect. The latter is the occurrence of minimum volume at a volume controlsetting slightly higher than zero. At this point, the signal is distorted due to thebalancing out of the fundamentals from the normal signal and the out -of -phase play -through component. Schematics of complete radios are on pages 44 through 55.
COMPLETE RADIO CIRCUIT DIAGRAMS
FERRITE COREANTENNA232u
5K
365 gar EARPHONEAlf d
DIRECT COUPLED VEST POCKET RADIOFIGURE 66
G. E.DIODE
I N 64
MILLERLOOP
STICK*6300
OREQUIV.
220K
SIMPLE RADIO RECEIVERFIGURE 67
2N107
MILLERLOOPSTICK*6300
OREQUIV.
VSW
2N107
2000n.HEAD
PHONES
2KPHONES
TI-PRI 200KOSEC
ARGONNEAR100 OR
EQUIV.
TWO TRANSISTOR RADIO RECEIVERFIGURE 68
44
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79
UNIJUNCTION TRANSISTOR CIRCUITS
The unijunction transistor is a three -terminal semiconductor device which haselectrical characteristics that are quite different from those of conventional two -junction
transistors. Its most important feature is its highly stable negative resistance character-istic which permits its application in oscillator circuits, timing circuits and bistablecircuits. Circuits such as sawtooth generators, pulse generators, delay circuits, multi -vibrators, one -shots, trigger circuits and pulse rate modulators can be greatly simplified
by the use of the unijunction transistor..
THEORY OF OPERATION
The construction of the unijunction transistor is shown in Figure 81. Two ohmic
contacts, called base -one ( B1) and base -two (B2) are made at opposite ends of asmall bar of n -type silicon. A single rectifying contact, called the emitter ( E), is madeon the opposite side of the bar close to base -two. An interbase resistance, RBB, ofbetween 5K and 10K exists between base -one and base -two. In normal circuit opera-tion, base -one is grounded and a positive bias voltage, VBB, is applied at base -two.With no emitter current flowing, the silicon bar acts like a simple voltage divider(Figure 82) and a certain fraction, n, of VBB will appear at the emitter. If the emittervoltage, VE, is less than '7 YEE, the emitter will be reverse -biased and only a smallemitter leakage current will flow. If VE becomes greater than n VBB, the emitter will beforward biased and emitter current will flow. This emitter current consists primarilyof holes injected into the silicon bar. These holes move down the bar from the emitterto base -one and result in an equal increase in the number of electrons in the emitterto base -one region. The net result is a decrease in the resistance between emitter andbase -one so that as the emitter current increases, the emitter voltage decreases and anegative resistance characteristic is obtained (Figure 84).
1E
I B2
B2
BIVBB P -N EMITTER
JUNCTIONN -TYPE
SILICON BAR
Symbol for unijunction transistor withindentifieation of principle voltages and
currentsFIGURE 80
OHMICCONTACTS
Construction of unijunction transistor-cross sectional view
FIGURE 81
The operation of the unijunction transistor may be best understood by the repre-sentative circuit of Figure 82. The diode represents the emitter diode, RBI. representsthe resistance of the region in the silicon bar between the emitter and base -one andRB, represents the resistance between the emitter and base -two. The resistance Rai
varies with the emitter current as indicatd in Figure 83.
58
UNIJUNCTION TRANSISTOR CIRCUITS
IE
(MA.)RBI
(OHMS)
0 46001 2000
2 9005 24010 15020 9050 40
Unijunction transistor representative Variation of RBI. with IB in representa-circuit tive circuit typical 2N492)
FIGURE 82 FIGURE 83
The large signal properties of the unijunction transistor are usually given in theform of characteristic curves. Figure 84 gives typical emitter characteristic curves asplots of emitter voltage vs. emitter current for fixed values of interbase voltage. Figure85 gives typical interbase characteristic curves as plots of interbase voltage vs. base -twocurrent for fixed values of emitter current. On each of the emitter characteristic curvesthere are two points of interest, the peak point and the valley point. On each of theemitter characteristic curves the region to the left of the peak point is called the cut-offregion; here the emitter is reverse biased and only a small leakage current flows. Theregion between the peak point and the valley point is the negative resistance region.The region to the right of the valley point is the saturation region; here the dynamicresistance is positive and lies in the range of 5 to 200.
le
15
13
IN
1
10
0 9
POINTS
15
VA LEY PO/
5V
TSI00
2 3 4 5 6 7 /3 9 10 II 12 13 MI
EMITTER CURRE T-1, - MILLIAMPERES
Typical emitter characteristics(type 2N492)FIGURE 84
19
13
12
s 10
3
1,50MA
4 5.
Ic20.
1,101/14
1,SMA
1, 0
10 15 0 25 0 35 00 45 50INTERSASE VOLTAGE - V55 VOLTS
Typical interbase characteristics(type 2N492)FIGURE 85
PARAMETERS-DEFINITION AND MEASUREMENT1. RBB - Interbase Resistance. The interbase resistance is the resistance measured
between base -one and base -two with the emitter open circuited. It may be measuredwith any conventional ohmmeter or resistance bridge if the applied voltage is fivevolts or less. The interbase resistance increases with temperature at about 0.8%/°C.This temperature variation of RBB may be utilized for either temperature compensationor in the design of temperature sensitive circuits.
2. , - Intrinsic Stand-off Ratio. This parameter is defined in terms of the peakpoint voltage, Vp, by means of the equation: VP = nVBB + VD . where VD isabout 0.70 volt at 25°C and decreases with temperature at about 3 millivolts/ °C. It is
57
UNIJUNCTION TRANSISTOR CIRCUITS
+ VI 05V -40V
R3
500
found that n is constant over wide ranges of temperature and interbase voltage. Acircuit which may be used to measure n is shown in Figure 86. In this circuit RI, C1,and the unijunction transistor form a relaxation oscillator and the remainder of thecircuit serves as a peak voltage detector with the diode automatically subtracting thevoltage VD. To use the circuit, the voltage Vi is set to the value desired, the "cal."button is pushed and R. adjusted to make the meter read full scale. The "test" buttonis then pushed and the value of n is read directly from the meter ( 1.0 full scale). Ifthe voltage V,. is changed, the meter must be recalibrated.
3. Ip - Peak Point Current. The peak point current corresponds to the emittercurrent at the peak point. It represents the minimum current which is required to firethe unijunction transistor or required for oscillation in the relaxation oscillator circuit.Ip is inversely proportional to the interbase voltage. Ip may be measured in the circuitof Figure 87. In this circuit, the voltage V1 is increased until the unijunction transistorfires as evidenced by noise from the loudspeaker. V,. is then reduced slowly until theunijunction ceases to fire and the current through the meter is read as Ii..
TEST
0'.
100µa
TEST CIRCUIT FOR INTRINSIC STANDOFF RATIO (1)
FIGURE 86
20µa
+ VI0- 200V
+VBB
TEST CIRCUIT FOR PEAK POINT EMITTERCURRENT (IP)
FIGURE 87
4. Vp - Peak Point Emitter Voltage. This voltage depends on the interbase voltageas indicated in (2). Vp decreases with increasing temperature because of the changein VD and may be stabilized by a small resistor in series with base -two.
5. VE (sat) - Emitter Saturation Voltage. This parameter indicates the forwarddrop of the unijunction transistor from emitter to base -one when it is conducting themaximum rated emitter current. It is measured at an emitter current of 50 ma andan interbase voltage of 10 volts.
8. IE. (mod) - Interbase Modulated Current. This parameter indicates the effectivecurrent gain between emitter and base -two. It is measured as the base -two currentunder the same condition used to measure VE ( sat).
7. 1E0 - Emitter Reverse Current. The emitter reverse current is measured with
60 volts between base -two and emitter with base -one open circuit. This current varieswith temperature in the same way as the Ico of a conventional transistor.
8. Vv - Valley Voltage. The valley voltage is the emitter voltage at the valleypoint. The valley voltage increases as the interbase voltage increases, it decreaseswith resistance in series with base -two and increases with resistance in series withbase -one.
9. Iv - Valley Current. The valley current is the emitter current at the valleypoint. The valley current increases as the interbase voltage increases and decreaseswith resistance in series with base -one or base -two.
58
UNIJUNCTION TRANSISTOR CIRCUITS
RELAXATION OSCILLATORThe relaxation oscillator circuit shown in Figure 88 is a basic circuit for many appli-cations. It is chiefly useful as a timing circuit, a pulse generator, a trigger circuitor a sawtooth wave generator.
v,
122VE (MAX)
V B2 VE 1/VT(MINI
Kai V81-- E
Conditions for Oscillation.VU - VP - Vv IvR1 Ft,
R2 =
The maximum and minimum voltages of the emitter voltage waveform may becalculated from:
BASIC RELAXATION OSCILLATORWITH TYPICAL WAVEFORMS
FIGURE 88
It is found that these conditions are very broad permitting a 1000 to 1 range of R1from about 2K to 2M. R2 is used for temperature compensation, its value may be cal-culated from the equation:0.65 RBB
VS (max.) = V, = nVBB + 0.7VEI (min.) 1/2 VB (sat)
The frequency of oscillation is given by the equation:1
fRiC In ( 1 )1 - n
and may be obtained conveniently from the nomogram of Figure 89.
ro ::9'
O RESISTANCE - R I - K I LOHMS
2 2 2 N 2 e. 2
MAXIMUM FREQUENCY TYPES 2N 491 , 2N492NOMINAL FREQUENCY TYPES 2 N 489 , 2N 490
FREQUENCY- f - CYCLES PER SECOND
(0
I
77.0.56
0.1 10 10 2 2 2, FEe y \ 1,f Sqt Sq../ rrle" m
b 2 2 2 2 .22 00 § g g 4 5, 5 5, g
MINIMUM FREQUENCY TYPES 2N49I 2N492NOMINAL FREQUENCY TYPES 2N 493 , 2N 494
.6 0.68
I 1 I I ' 1 ' 1 11 1'1' ..... "1' 1 ' '1'1 ' "1 ' Io a N N
9 t; o o "c3 :;1 0 0 0 0 r? :8 :39CAPACITANCE -C - MICROFARADS
Nomogram for calculating frequency of relaxation oscillationFIGURE 89
59
UNIJUNCTION TRANSISTOR CIRCUITS
The emitter voltage recovery time, tvE, is defined as the time between the 90%
and 10% points on the emitter voltage waveform. The value of tvE is determined
primarily by the size of the capacitor C in Figure 88 and may be obtained from
Figure 90.
,`;', 30O' 20
2 10
5
3x 2
.7./I I
LL
MIII11111=111M1111 I=MIN11111,1111 imimmoniimugaargia
1111111111M111111
1111111111111111111111111111.11111110
immulesiumm........o.minsammossuummision
MEAN
MIN 80:
111111111111111111111111111111111111111111
.001 .01 0 1
CAPAC ITANCE -C- (MI CROFARADS)
1.0 10
-.1 DIVE90%1
V,
I 1, 2 tVE
IE,IB B
Recovery time of unijunction transistor relaxation oscillator vs. capacityFIGURE 90
The pulse amplitude at base -one or base -two may be determined from the equations:
[V - 1/2 VE (sat)] CIE (peak) tV'S
IBA (mod)1E2 (peek) =7 LE(penk)
SAWTOOTH WAVE GENERATOR
The circuit of Figure 91 may be used as a linear sawtooth wave generator. The NPN
transistor serves as an output buffer amplifier with the capacitor C2 and resistor R2
serving in a bootstrap circuit to improve the linearity of the sawtooth. The output of
the circuit shown has an amplitude of about 12 volts peak to peak and a frequency of
about 2 Kc. Note that a negative synchronizing pulse may be used at base -two.
+20 V
SYNC
OUTPUT 4/1
LINEAR SAWTOOTH GENERATORFIGURE 91
MULTIVIBRATOR
10 V
Figure 92 shows a unijunction transistor multivibrator circuit which has a frequency
of about 1 Kc. The conditions for oscillation of this circuit are the same as for the
relaxation oscillator. The length of time during which the unijunction transistor is off
(no emitter current flowing) is determined primarily by R1. The length of time during
60
UNIJUNCTION TRANSISTOR CIRCUITS
which the unijunction transistor is on is determined primarily by R2. The periods maybe calculated from the equations:
t. = R,C In [Vvii \\77:1
t2 = 112C In [V. + V,, - VE1V,
+ R2)(R1Where VE is measured at an emitter current of IE -V.and may be obtainedR.112
from the emitter characteristic curves.
+ VI
+ 25V
V82
VE
VB2
V0
UNIJUNCTION TRANSISTOR MULTIVIBRATORWITH TYPICAL WAVE FORMS
FIGURE 92
-+ 12.5 V- + 3 V
-+ 21 V+ 16 V
+ 0.7
- - 8.5 V
An NPN transistor may be direct coupled to the multivibrator circuit by replacingthe diode as shown in Figure 93. This circuit has the advantage that the load doesnot have any effect on the timing of the circuit.
RELAY
Unijunction transistor multivibrator used to drive NPN transistorFIGURE 93
61
UNIJUNCTION TRANSISTOR CIRCUITS
HYBRID MULTIVIBRATOR
The circuit of Figure 94 illustrates how the unijunction transistor may be used inconjunction with conventional transistors to obtain the maximum advantages of each.The two PNP transistors form a conventional flip-flop with the unijunction serving thetiming and triggering function. The timing capacitor CT is charged alternately throughRT1 and RT2. The advantages obtained by a circuit of this type are:
(1) The two periods may be adjusted independently over a rangeof as much as 1000 to 1. (2) The output at the collector of each of thetransistors is very nearly an ideal rectangular waveform. (3) The circuitwill tolerate large changes in Ico or beta of the transistors. It is notprone to "lock -up" or non -oscillation. (4) The timing stability is verygood. (5) A small timing capacitor CT may be used, avoiding the useof electrolytic capacitors in many applications.
0,.1091
HYBRID MULTIVIBRATORFEATURING WIDE RANGE OPERATION
FIGURE 94
20V
RELAY DELAYFigure 95 shows the use of the unijunction transistor to obtain a precise delay in
the operation of a relay. When the switch SW1 is closed, the capacitor C is charged tothe peak point voltage at which time the unijunction transistor fires and the capacitordischarges through the relay thus causing it to close. One set of relay contacts hold therelay closed. For supply voltages of 30 volts or above, about one second of delay canbe obtained per microfarad of capacitance.
3K -300KCHOOSE FOR
DESIRED PERIOD
1-100 MFD
RELAY50 - 50011
RELAYCONTACTS
+25VSW1
500-1KCHOOSE TOMATCH RELAY
TIME DELAY CIRCUIT WITH RELAYFIGURE 95
62
TRANSISTOR SWITCHES
A switch is characterized by a high resistance when it is open and a low resistancewhen it is closed. Transistors can be used as switches. They offer the advantages of nomoving or wearing parts and are easily actuated from various electrical inputs. Transis-tor collector characteristics as applied to a switching application is shown in Figure 96.The operating point A at which Ia = Too /1-a indicates the transistor's high resistance
vcE
COLLECTOR CHARACTERISTICS
FIGURE 96
when Is = 0. Since 1-a is a small number, Ic may be many times greater than 'co.Shorting the base to the emitter results in a smaller Ic. If the base to emitter junctionis reversed biased by more than .2v, Io will approach Ica. Reverse biasing achievesthe highest resistance across an open transistor switch.When the transistor switch is turned on, the voltage across it should be a minimum.At operating point B of Figure 96, the transistor is a low resistance. Alloy transistorssuch as the 2N525 have about one ohm resistance when switched on. Grown junc-tion transistors, such as the 2N167 have approximately 80 ohms resistance whichmakes them less suitable for high power switching although they are well suited forhigh speed computer applications. In order that a low resistance be achieved, it isnecessary that point B lie beyond the knee of the characteristic curves. The regionbeyond the knee is referred to as the saturation region. Enough base current mustbe supplied to ensure that this point is reached. It is also important that both the onand off operating points lie in the region below the maximum rated dissipation toavoid transistor destruction. It is permissible, however, to pass through the high dissi-pation region very rapidly since peak dissipations of about one watt can be toleratedfor a few microseconds with a transistor rated at 150 mw. In calculating the Is neces-sary to reach point B, it is necessary to know how him varies with L. Curves such asFigure 97 are provided for switching transistors. Knowing lips from the curve gives
FIGURE 97
VCF
O. C. BASE CURRENT GAIN 1 A. R) VS COLLECTOR CURRENT
TRANSISTOR SWITCHES
IcIB 1. since IB m = . Generally Is is made two or three times greater than IB mlu
LIFE
to allow for variations in hFE with temperature or aging. The maximum rated collector
voltage should never be exceeded since destructive heating may occur once a transistor
breaks down. Inductive loads can generate injurious voltage transients. These can be
avoided by connecting a diode across the inductance to absorb the transient as shown
in Figure 98.
INDUCTANCEII
-E
PNP
DIODEIN34 FOR SMALL INDUCTANCEINS! FOR LARGE INDUCTANCE
DIODE USED TO PROTECT TRANSISTOR FROM INDUCTIVE
VOLTAGE TRANSIENTS.
FIGURE 98
Lighted incandescent lamps have about 10 times their off resistance. Consequently,
IB must be increased appreciably to avoid overheating the switching transistor when
lighting a lamp.A typical switching circuit is shown in Figure 99. The requirement is to switch a
-25V TYPICAL VALUES
1250 z, 80/4 A SWITCH OPEN
5 WATTSZc = 0.2A SWITCH CLOSED
Is = 10mA CURRENT THROUGH SWITCH
2N525Vice = .19V SWITCH CLOSED
Vbe = .48V SWITCH CLOSED
IN PUT POWER 15 MILLI WATTS
LOAD POWER = 5 WATTS
Typical transistor switch applicationFIGURE 99
200 ma current in a 25 volt circuit, delivering 5 watts to the load resistor. The
mechanical switch contacts are to carry a low current and be operated at a low voltage
to minimize arcing. The circuit shown uses a 2N525. The 1K resistor from the base
to ground reduces the leakage current when the switch is open. Typical values are
indicated in Figure 99.
TEMPERATURE EFFECTS ON SWITCHING CIRCUITS
At high junction temperatures,Ico can become a problem. In the off condition,
both the emitter and collector junctions are generally reverse-biased. As a rule, the
bias source has an appreciable resistance permitting a voltage to be developed across
the resistance by Ico. The voltage can reduce the reverse bias to a point where the
base becomes forward biased and conduction occurs. Conduction can be avoided by
reducing the bias source resistance, by increasing the reverse bias voltage or by
reducing Ico through a heat sink or a lower dissipation circuit design.
nA
TRANSISTOR SWITCHES
The Ico of a transistor is generated in three ways. One component originates inthe semiconductor material in the base region of the transistor. At any temperature,there are a number of interatomic energy bonds which will spontaneously break intoa hole -electron pair. If a voltage is applied, the hole and electron drift in oppositedirections and can be seen as the Ico current. If no voltage is present, the hole andelectron eventually recombine. The number of bonds that will break can be predictedtheoretically to double about every 10°C in germanium transistors and every 6°C insilicon. Theory also indicates that the number of bonds broken will not depend onvoltage over a considerable voltage range. At low voltages, Ico appears to decreasebecause the drift field is too small to extract all hole -electron pairs before they recom-bine. At very high voltages, breakdown occurs.
A second component of 'co is generated at the surface of the transistor by surfaceenergy states. The energy levels established at the center of a semiconductor junctioncannot end abruptly at the surface. The laws of physics demand that the energy levelsadjust to compensate for the presence of the surface. By storing charges on the surface,compensation is accomplished. These charges can generate an Ico component; in fact,in the processes designed to give the most stable Too, the surface energy levels con-tribute much Ico current. This current behaves much like the base region componentwith respect to voltage and temperature changes. It is described as the surfacethermal component in Figure 100.
'co
0. HOLE= ELECTRON
ARROWS SHOW DIRECTIONOF CARRIER DRIFT
0.0.SURFACE / %LEAKAGECURRENT
I LOWe BREAKDOWN
MEASURED ICO
BASEMATERIAL
'CO
CROSS-SECTION OF PNP ALLOYTRANSISTOR SHOWING REGIONS GENERATING IC0
SURFACE LEAKAGE
-1-*//I SURFACE THERMAL Ico-}I BASE REGION 'co
COLLECTOR VOLTAGE
VARIATION OF ILO COMPONENTS
WITH COLLECTOR VOLTAGE
(A)
COLLECTOR VOLTAGE
SURFACETHERMAL
'CO
CURVES A -INDICATE THE BASE REGION
CURVES B-IINACtaz marALB/ScE. REGION
CURVES C -INCLUDE THE SURFACE LEAKAGECOMPONENT AND INDICATE THEMEASURED ICD
VARIATION OF I. COMPONENTSWITH TEMPERATURE
(9) (C)
FIGURE 100
65
TRANSISTOR SWITCHES
A third component of Ico is generated at the surface of the transistor by leakage
across the junction. This component can be the result of impurities, moisture or surface
imperfections. It behaves like a resistor in that it is relatively independent of tempera-
ture but varies markedly with voltage. Figure 100(a) shows the regions which contribute
to the three components. Figure 100(b) illustrates how the components vary with
voltage. It is seen that while there is no way to measure the base region and surface
energy state components separately, a low voltage Ico consists almost entirely of these
two components. Thus, the surface leakage contribution to a high voltage Ico can be
readily determined by subtracting out the low voltage value of Ico.
Figure 100(c) shows the variation of Ico with temperature. Note that while thesurface thermal and base Ico components have increased markedly, the leakage com-ponent is unchanged. For this reason, as temperature is changed the high voltage lc()
will change by a smaller percentage than the low voltage Ico.
210141012421E02,111127
SD'
-IV MAE IAT GRIDS APE Kr
(A)
100
1 1 1 1 1 1 1 1 1 1 1 I
- 7IrrrCitintrriZ- TYPES 21094, VOSS- 2/096, 2.91
20Y
p0 20 le aWIPE AMME.yPCI
(B)
FIGURE 101
°c"-V.M lakiVRE
.1
xcr lo° o° nf oo°
,JURSTION TEMPER TU0E-DEGREES GERTIORADE
(C)
Figure 101 shows the variation of Ico with temperature and voltage for a number
of transistor types. Note that the three curves for the 2N396 agree with the principlesabove and show a leakage current less than one microampere.
The variation of current gain at high temperatures is also significant. Since hrE is
defined as Ic/IB, hrE depends on Ico since Ic hf., (IB Lo). If IB = 0 i.e., if the base
is open circuited, a collector current still flows, Ic = hfeIco. Thus hrE is infinite when
IB = 0. As base current is applied, the ratio lc/IB becomes more meaningful. If hrE
is measured for a sufficiently low le, then at a high temperature hfaco will become
equal to L. At this temperature hrE becomes infinite since no In is required to maintain
L. The AC current gain however, is relatively independent of Ico and generally
increases about 2:1 from -55°C to 85°C.
The different electrical properties of the base, emitter and collector regions tend
to disappear at high temperatures with the result that transistor action ceases. This
temperature usually exceeds 85°C and 150°C in germanium and silicon transistors
respectively.At high junction temperatures, it is possible for the transistor to heat itself regen-
eratively until it destroys itself. The factors which enter into this problem are Ico, VcB,
and collector load resistance and the thermal impedance of the transistor. If the load
66
TRANSISTOR SWITCH ES
resistance is large enough, it can limit the transistor dissipation to a safe value; other-wise, the transistor is heated by Ico X VcE. As the temperature rises, this heating canbecome appreciable.
The following procedure, illustrated in Figure 102 gives a conservative estimate ofthe run -away temperature for a transistor with both junctions reverse biased. Thermalrun -away will occur at the temperature where the rate at which Ico increases heating,exceeds the thermal derating factor. To calculate this temperature, let us assume a1°C rise in junction temperature. The increased heating due to the rise will be, 0.08Ico ( Vcc - 2RLIco ), since Ico increases about 8% per 1°C. If this power will in factraise the junction temperature by 1°C according to the derating factor, run -away occurs.
CIRCUITRL = I K VCC = -30V
+IV 2N527
CALCULATE
0.08 IcoE ( Vcc - 2%, loom) = 1/Kwhere Ico at run -away tempera-ture = ICOM. Use:
Data from specificationsK = .27°C/mw
Data from circuitRn = 1K
Vcc = 30 volts. The solution bysubstitution isIcom = 1.75 ma or 13.2 ma.
The smaller value is always the correctone.
Using Ico = 10 /la max at TU =25°C, from Figure 101A,Ts = 100 ° C when Ico = 1.75 ma.
Heating due to Ico& isP = loom ( Vcc - Rr, loom) = 49.5 mw.
Rise in junction temperature aboveambient temperature is
KP = ( .27) (49.5) =13.4°C=Ts- TA
TA = 86.6°C = thermal run -awaytemperature.
Since worst condition values wereused throughout, the circuit can safelybe used to 86°C.
Calculation of Thermal Run -away TemperatureFIGURE 102
The major problem encountered in low temperature operation is the reduction ofhFE. Figure 103 shows the variation of hFE for the 2N525 indicating that 11E5 drops about50% from its 25°C value when IT = -55°C. Most transistors show approximately thisvariation in hFE.
2D
-0 + 0 +30 +50 amJUNCTION 1.21APENSIVIIN 1.01
CURRENT GAIN (40 VS TEMPERATURE NORMALIZED TO 25°C
+90
FIGURE 103
67
TRANSISTOR SWITCHES
POWER DISSIPATION
As with most electrical components, the transistor's range of operating conditionsis limited by the transistor power dissipation.
Because the transistor is capable of a very low Vc5 when it is in saturation it ispossible to use load lines which exceed the maximum rated dissipation during theswitching transient, but do not exceed it in the steady state. Such load lines can beused safely if the junction temperature does not rise to the runaway temperatureduring the switching transient. If the transient is faster than the thermal time constantof the junction, the transistor case may be considered to be an infinite heatsink. Thejunction temperature rise can then be calculated on the basis of the infinite heatsinkderating factor. Since the thermal mass of the junctions is not considered, the calcula-tion is conservative.
In some applications there may be a transient over -voltage applied to transistorswhen power is turned on or when circuit failure occurs. If the transistor is manufacturedto high reliability standards, the maximum voltages may be exceeded provided thedissipation is kept within specifications. While quality alloy transistors and grownjunction transistors can tolerate operation in the breakdown region, low quality alloytransistors with irregular junctions should not be used above the maximum voltageratings.
Quality transistors can withstand much abuse. In experimental work, a 2N43 wasoperated at a peak power of 15 watts and a peak current of 0.5 amperes with nochange in characteristics. 2N396 Transistors in an avalanche mode oscillator wereoperated at peak currents of one ampere. 3N37 Tetrodes rated at 50 milliwatts and25 milliamperes maximum were operated at a peak power of one watt and a peakcurrent of 200 milliamperes without change in characteristics. Standard productionunits however should be operated within ratings to ensure consistent circuit perform-ance and long life.
It is generally desirable to heatsink a transistor to lower its junction temperaturesince life expectancy as well as performance decreases at high temperatures. Heatsinks also minimize thermal fatigue problems, if any exist.
SATURATION
A transistor is said to be in saturation when both junctions are forward biased.Looking at the common emitter collector characteristics shown in Figure 104(a) thesaturation region is approximately the region below the knee of the curves, since 65
160
140
120
I 100
60
La -40
-20
COLLECTOR10Ornw 1
DISSIPATION50mw IIIIIIIIIIIIII
11,
I I
COMMON EMITTER COLLECTOR CHARACTERISTICSFOR A TYPICAL UNITTYPE\ I,- a
TA=25°CIs. -2.5rnaXI2N3961
Te.-2.0rno
1
1 \ IB=-1.5ma----..
.....\ \ 1B- -1.0ma (-----°,77,- -0.8rr... 1._...1.___.----------"....---
,, 0.6ma
le z-0 4ma,---
-- .....--... _ IB =-0 2rna
-........ -
0
COLLECTOR VOLTAGE, VCE (VOLTS)
-10 -II -12
FIGURE 104(A)68
TRANSISTOR SWITCHES
usually falls rapidly when the collector is forward biased. Since all the characteristiccurves tend to become superimposed in the saturation region, the slope of the curvesis called the saturation resistance. If the transistor is unsymmetrical electrically -and most transistors are unsymmetrical - then the characteristics will not be directedtowards the zero coordinates but will be displaced a few millivolts from zero. For easeof measurement, generally the characteristics are assumed to converge on zero so thatthe saturation resistance is r. VcE(sat)
IC
g
mv
..-----------180
160
COMMON EMITTER COLLECTORIN SATURATION REGION FOR
TYPE ENO%
CHARACTERISTICSA TYPICAL UNIT
e-03
//*100
eo
s-5rn100
3,A rnSO
/60A 2m
' TA 25 C90
.9-1m
20 /-00 -20 -90 -60 -80 -1 0 -120 -190 -160 -180 -2 0 -220 -290 -260 -2E
COLLECTOR VOLT. , (CE (MILLIVOLTS)
FIGURE 104 (13)
While the characteristic curves appear superimposed, an expanded scale showsthat VcE(sat) depends on Is for any given Ic. The greater Is is made, the lower VcE(sat)becomes until Is is so large that it develops an appreciable voltage across the ohmicemitter resistance and in this way increases VcE(sat). In most cases the saturationvoltage, VcE(sat), is specified rather than the saturation resistance. Figure 104(b) show-ing the collector characteristics in the saturation region, illustrates the small voltageoff -set due to asymmetry and the dependence of r. on Is. Note also that I-, is a lowresistance to both AC and DC.
3V
62011
-0.02V 0.50V
VCE (sat) ir_oire...VBE-0.50V
4JDIA68
DIRECT COUPLED TRANSISTOR LOGIC (DCTL) FLIP-FLOPFIGURE 105
Some circuits have been designed making specific use of saturation. The directcoupled transistor logic (DCTL) flip-flop shown in Figure 105 utilizes saturation.In saturation VcE(sat) can be so low that if this voltage is applied between the baseand emitter of another transistor, as in this flip-flop, there is insufficient forward biasto cause this transistor to conduct appreciably. The extreme simplicity of the circuit
69
TRANSISTOR SWITCHES
is self evident and is responsible for its popularity. However, special requirements areplaced on the transistors. The following are among the circuit characteristics:
First, the emitter junction is never reverse biased permitting excessive current toflow in the off transistor at temperatures above 40°C in germanium. In silicon, how-ever, operation to 150°C has proved feasible.
Second, saturation is responsible for a storage time delay, slowing up circuit speed.In the section on transient response we see the importance of drawing current out ofthe base region to increase speed. In DCTL, this current results from the differencebetween VcE(sat) and VBE of a conducting transistor. To increase the current, VcE(sat)should be small and r'b should be small. However, if one collector is to drive morethan one base, r'b should be relatively large to permit uniform current sharing betweenbases since large base current unbalance will cause large variations in transientresponse resulting in circuit design complexity.
Third, since VcE(sat) and VBE differ by less than .3 volt, in germanium, strayvoltage signals of this amplitude can cause faulty performance. While stray signalscan be minimized by careful circuit layout, this leads to equipment design com-plexity. Silicon transistors with a .7 volt difference between VcE(sat) and VBE are lessprone to being turned on by stray voltages but are still susceptible to turn off signals.This is somewhat compensated for in transistors with long storage time delay sincethey will remain on by virtue of the stored charge during short turn-off stray signals.This leads to conflicting transistor requirements - long storage time for freedom fromnoise; short storage time for circuit speed.
Another application of saturation is saturated flip-flops of conventional configura-tion. Since VcE(sat) is generally very much less than other circuit voltages, saturatingthe transistors permits the assumption that all three electrodes are nearly at the samepotential making circuit voltages independent of transistor characteristics. This yieldsgood temperature stability, and good interchangeability. The stable voltage levels areuseful in generating precise pulse widths with monostable flip-flops. The section onflip-flop design indicates the ease with which saturated circuits can be designed.
In general, the advantages of saturated switch design are: (a) simplicity of circuitdesign, (b) well defined voltage levels, (c) fewer parts required than in non -saturatingcircuits, (d) low transistor dissipation when conducting, and (e) immunity to shortstray voltage signals. Against this must be weighed the reduction in circuit speed.Speed is affected in a number of ways: (a) much higher trigger power is requiredto turn off a saturated transistor than an unsaturated one, (b) since VcE(sat), hFE andVBE all vary markedly with temperature, circuit speed also depends on temperature.
Ecc
RL hFE
1IBED
EDIC ECC VCE
DIODE COLLECTOR COLLECT CHARACTERISTICSCLAMPING CIRCUIT TO SHOWING LOAD LINE AND OPERATING
AVOID SATURATION POINT PATH
Collector voltage clampFIGURE 106
70
TRANSISTOR SWITCHES
A number of techniques are used to avoid saturation. The simplest is shown inFigure 106. The diode clamps the collector voltage so that it cannot fall below thebase voltage to forward bias the collector junction. Response time is not improvedappreciably over the saturated case since Ic is not clamped but rises to hFEIB. Withtypical variations of Is and hFE with temperature and life for a standard transistor, Icmay vary by as much as 10:1. Care should be taken to ensure that the diode preventssaturation with the highest L. When the transistor is turned off, Ic must fall below thevalue given by (Ecc-ED)/Iir, before any change in collector voltage is observed. Thetime required can be determined from the fall time equations in the section on transientresponse. The diode can also have a long recovery time from the high currents it hasto handle. This can further increase the delay in turning off.
RLR2 ECC
VCERL hFE+.92
ECC R2 if RLhFE vCE<< ECC
Collector current clamp without biassupply
FIGURE 107 (A)
Iin
LVCE -- 0 7V at 25° C.
Si
Collector current clamp using siliconand germanium diodes
FIGURE 107(C)
Iin
VCER2 (Ecc + I3RLhFE)
ROFE+ R2
( 13)
if VCE<< ECC
Collector current using bias supplyFIGURE 107(B)
A much better way of avoiding saturation is to control IB in such a way that Ic isjust short of the saturation level. This can be achieved with the circuit of Figure107(a). The diode is connected between a tap on the base drive resistor and thecollector. When the collector falls below the voltage at the tap, the diode conductsdiverting base current into the collector, preventing any further increase in Ic. Thevoltage drop across R2 is approximately IcR2/hFE since the current in R2 is Is. Sincethe voltage drop across the diode is approximately the same as the input voltage tothe transistor, VcE is approximately IcR2/hEE. It is seen that if the load decreases (Icis reduced) or hFE becomes very high, VcE decreases towards saturation. Where thechange in hFE is known and the load is relatively fixed, this circuit prevents saturation.
71
TRANSISTOR SWITCHES
To avoid the dependence of VCE on Ic and hFE, R. may be added as in Figure 107(b).By returning R. to a bias voltage, an additional current is drawn through R.. Now
hIeVeE is approximately (
Fs+ 13) R2. 13 can be chosen to give a suitable minimum \
The power consumed by R. can be avoided by using the circuit of Figure 107(c). The
silicon diode replaces R2. Since the silicon diode has a forward voltage drop ofapproximately .7 volts over a considerable range of current, it acts as a constantvoltage source making VCE approximately .7 volts. If considerable base drive is used, itmay be necessary to use a high conductance germanium diode to avoid momentarysaturation as the voltage drop across the diode increases to handle the large base drive
current.In applying the same technique to silicon transistors with low saturation resistance,
it is possible to use a single germanium diode between the collector and base. Whilethis permits VCE to fall below VBE, the collector diode remains essentially non-conducting since the .7 volt forward voltage necessary for conduction cannot bereached with the germanium diode in the circuit.
The diode requirements are not stringent. The silicon diode need never be backbiased, consequently, any diode will be satisfactory. The germanium diode will haveto withstand the maximum circuit VCE, conduct the maximum base drive with alow forward voltage and switch rapidly under the conditions imposed by the circuit,but these requirements are generally easily met.
Care should be taken to include the diode leakage currents in designing thesecircuits for high temperatures. All the circuits of Figure 107 permit large base drivecurrents to enhance switching speed, yet they limit both IB and Ic just before saturationis reached. In this way, the transistor dissipation is made low and uniform amongtransistors of differing characteristics.
It is quite possible to design flip-flops which will be non -saturating without theuse of clamping diodes by proper choice of components. The resulting flip-flop issimpler than that using diodes but it does not permit as large a load variation beforemalfunction occurs. The design procedure for an undamped non -saturating flip-flopcan be found in Transistor Circuit Engineering by R. F. Shea, et al (Wiley).
Vi
Stored neutralization by capacitorFIGURE 108
Another circuit which is successful in minimizing storage time is shown in Figure108. If the input is driven from a voltage source, it is seen that if the input voltageand capacitor are appropriately chosen, the capacitor charge can be used to neutralizethe stored charge, in this way avoiding the storage time delay. In practical circuits,the RC time constant in the base necessary for this action limits the maximum pulse
repetition rate.
72
TRANSISTOR SWITCH ES
TRANSIENT RESPONSE TIME
The speed with which a transistor switch responds to an input signal depends onthe load impedance, the gain expected from the transistor, the operating conditions justprior to the input signal, as well as on the transistor's inherent speed. The followingdiscussion will assume that the collector load resistance is sufficiently small that271-11LCcf. << 1 where Cc is the collector capacitance. If this is not the case, all theresponse time equations must be multiplied by the correction factor (1 2arRLCcf.).
-0
o
112.10
+ lOy
-t-
-*Rd
OV- +
1111 tr 14-
L:p14-
I, B2
I
---10%
I- - + - -90%
-so is 1.4g
-11.1f .1-TIME
TYPICAL CIRCUIT
IBI /B2'2.05 MG1c IP ma
IC %* h FE131
( b ) WAVEFORM GENERATEDAT A BY SWITCH
) WAVEFORM AT BSHOWING FORWARD BIASON BASE DURINGSATURATION
( d ) BASE CURRENT WAVEFORMNOTE REVERSE CURRENTIB2 DUE TO BASE BIASWRING SATURATION
(e) COLLECTOR WAVEFORMSHOWING STANDARDDEFINITIONS OFRESPONSE TIMES
Transient responseFIGURE 109
Let us consider the simple circuit of Figure 109(a). If we close and open the switchto generate a pulse as shown in 109(b), we will obtain the other waveforms shown inthe figure. When the switch closes, current flows through the 20K resistor to turn onthe transistor. However there is a delay before collector current can begin to flow sincethe 20K must discharge the emitter capacitance which was charged to -10 volts priorto closing the switch. Time must also be allowed for the emitter current to diffuseacross the base region. A third factor adding to the delay time is the fact that at lowemitter current densities current gain and frequency response decrease. The total delayfrom all causes is called the "delay time" and is measured conventionally from thebeginning of the input pulse to the 10% point on the collector waveform as shown inFigure 109(e). Delay time can be decreased by reducing the bias voltage across theemitter capacitance, and by reducing the base drive resistor in order to reduce thecharging time constant. At high emitter current densities, delay time becomes neg-ligible. Figure 110 shows typical delay times for the 2N396 transistor.
73
TRANSISTOR SWITCHES
0.5
0.
0.
0.1
PNP ALLOY
PULSE
TRANSISTOR TYPERESPONSE DELAY TIME,
td IFS) VS 181 (ma)
c -.K11
RB . 10 Ka
RL5t
2N396
liSiimili...._. BIASVOLTAGE
L--F1?25:.08,4V
-.-'9./k --.- 5.0V
-2.5V
0 -05 -1.0 -1.5 -201131 IMO
FIGURE 110
-25 -30
The rise time refers to the turn -on of collector current. By basing the definition ofrise time on current rather than voltage it becomes the same for NPN and PNP tran-sistors. The collector voltage change may be of either polarity depending on the tran-sistor type. However, since the voltage across the collector load resistor is a measureof collector current, it is customary to discuss the response time in terms of the collectorvoltage. The theoretical analysis of rise time suggests that a single exponential curve asdefined in Figure 111 fits the experimental results.
rc
rc
h FE 1131
V. -EXPONENTIAL CURVE
TIME -SP
GRAPHICAL ANALYSIS OF RISE TIMESYMBOLS DEF INEDJN FIGURE ION
THE INTERCEPT OF IC AND THE CURVE GIVES tr.
FIGURE 111
If the load resistor RE in Figure 109(a) is small enough that a current, hrEIBi, throughit will not drive the transistor into saturation, the collector current will rise expon-entially to hpBBBi with a time constant, 6./274.. However, if RE limits the current toless than hFEIBi, the same exponential response will apply except that the curve will
be terminated at Ic = Vet:,. Figure 111 illustrates the case for Ic hFEIB1/2. Note that
the waveform will no longer appear exponential but rather almost linear. This curvecan be used to demonstrate the roles of the circuit and the transistor in determiningrise time. For a given lin@ and f., it is seen that increasing hrEIBiRe will decrease risetime by having Ic intersect the curve closer to the origin. On the other hand, for a givenIBS and Ic, speed will be proportional to fa but nearly independent of hrE since itseffect on the time constant is balanced by its effect on the curve amplitude. A usefulexpression for rise time is tr = 274.. It is valid for Ie/IB < hFE/5. Since this
74
TRANSISTOR SWITCHES
analysis assumes that him and f, are the same for all operating points the calculatedresults will not fit experimental data where these assumptions are invalid. Figure 112shows that the rise time halves as the drive current doubles, just as the expression fortr suggests. However the calculated value for tr is in error by more than 50%. Thisshows that even though the calculations may be in error, if the response time is specifiedfor a circuit, it is possible to judge fairly accurately how it will change with circuitmodifications using the above equations.
1.4
1.2
ID
i0.
0
Q4
0.2
PNP ALLOYPULSE
TRANSISTOR TYPERESPONSE RISE TIMEtr (p.S) VS IBI (ma)
VcC= 5VIc = 5moRL = 1 KIIRB : 10 Kfl
2N396
-0.5 -10 -15IB1 - ma
FIGURE 112
-2A -25
Storage time is the delay a transistor exhibits before its collector current starts toturn off. In Figure 109, RB and R. are chosen so that Kr, rather than hrE will limit thecollector current. The front edge of the collector waveform, Figure 109(e), shows thedelay time followed by the nearly linear risetime. When the collector voltage fallsbelow the base voltage, the base to collector diode becomes forward biased with theresult that the collector begins emitting. By definition, the transistor is said to be insaturation when this occurs. This condition results in a stored charge of carriers inthe base region. Since the flow of current is controlled by the carrier distribution inthe base, it is impossible to decrease the collector current until the stored carriers areremoved. When the switch is opened in Figure 109, the voltage at A drops immedi-ately to -10 volts. The base voltage at B however cannot go negative since the tran-sistor is kept on by the stored carriers. The resulting voltage across RB causes thecarriers to flow out of the base to produce a current I.2. This is illustrated in Figure109(c) and 109(d). As soon as the stored carriers are swept out, the transistor starts toturn off; the base voltage dropping to -10 volts and the base current decreasing tozero. The higher hi is, the greater the stored charge; the higher IB2 is, the fasterthey are swept out. Since both junctions are forward biased during storage time, theinverse characteristics of the transistor are involved. The inverse characteristics areobtained by interchanging the collector and emitter connections in any test circuit.They are identified by the subscript I following the parameter, e.g., 112,51 is the inverseDC beta. Figure 113 shows a curve which is useful for calculating storage time graph-ically. The maximum value is 1123(IBid-IB2) where IB2 is given the same sign asignoring the fact it flows in the opposite direction. The time constant of the curveinvolves the forward and inverse current gain and frequency cut-off. The storage timecorresponds to the time required to reach the current It can be seen thatfor a given frequency response, high h2,. gives long storage time. The storage timealso decreases as IB2 is increased or IB1 is decreased.
75
TRANSISTOR SWITCH ES
h FE US! '2121
hrE40-rc ,/ `-EXPONENTIAL CURVE
GRAPHICAL ANALYSIS OF STORAGE TIME.THE INTERCEPT OF IhpE / AND THE CURVE GIVES t5
FIGURE 113
FiniThe timetime constant for a very unsymmetrical transistor is approximately
h274.11, It is
seen that the generally specified normal h.13 and fa are of little use in determiningstorage time. For a symmetrical transistor, the time constant is approximatelyhrE ±1 It is possible for a symmetrical transistor to have a longer storage time than
274.
1.4
1.2
10
0.
0.6
OA
0.2
PNP TRANSISTOR
- PULSE
VCC - 5V,c - 5maR, 16.0RB MCI
TYPE 2N396RESPONSE STORAGEto (VS) VS 1E0(ma)
-.."'.2
IBB ma
5TIME
1.0
L5
2.02.5
-15 -2.0-m.
FIGURE 114
-2 5
an unsymmetrical transistor with the same hi,E and f.. Figure 114 shows the depend-ence of storage time on LH and 1,32 for the 2N396 transistor.
182 h FE +1C71
TC
EXPONENTIAL CURVE
tf hFE/2rfa TIME -p
GRAPHICAL ANALYSIS OF FALL TIMETHE INTERCEPT OF k AND THE CURVE GIVES tf
FIGURE 115
The collector current fall time can be analyzed in muchthe same manner. Figure115 indicates the exponential curve of amplitude Ic hrEIB2, and a time constant,
76
TRANSISTOR SWITCHES
hrB /274.. The fall time is given by the time it takes the exponential to reach Ic. IfhFEIB2 >> Ic, fall time is given by the expression,
1 IIFE Ic/IB2is 274. hrE Ic/IB2As hrE becomes large, this expression reduces to,
1 IctF
2740 IB2which is identical to the expression for t, except that Isa replaces hi. Figure 116 showstypical fall time measurements for a 2N396.
Lo
0.9
0.8
0.7
0.66-5
05
0.4
0.3
02
0.1
O
PNP ALLOY TRANSISTOR TYPE 2N396
PULSE RESPONSE FALL TIMEA (AS) VS 181 Ono/
Vac= -5Vle . -5MaR. = IKII.AB = !OKA In (ma )
.25
---------
AO
.75
IQ
- 0.5 -1.0 LS -2.0191 (ma)
FIGURE 116
FLIP-FLOP DESIGN PROCEDURES
The bistable Eccles -Jordan circuit or flip-flop is a building block for counters,shift registers, data storage and control machinery. At the outset, the designer hasthe choice of using saturating or non -saturating circuits. If he chooses saturatingcircuits, the design becomes very straightforward.
SATURATING FLIP-FLOPS
The simplest flip-flop possible is shown in Figure 105, however, for standardtransistor types the circuit in Figure 117(a) is preferable at moderate temperatures.We shall refer to the conducting and non -conducting transistors as the on and off
25V
2.2K 220µµf 220µµf 2.2K
2N525 2N525
220 OHMS
SATURATED FLIP-FLOPS
255 VCC
RI
2N525 2N525
VE
33K Ra 33K 220 OHMSR4
FIGURE 117 (A)
77
FIGURE 117(B)
TRANSISTOR SWITCH ES
transistors respectively. For stability, the circuit depends on the low collector toemitter voltage of the saturated on transistor to reduce the base current of the offtransistor to a point where the circuit gain is too low for regeneration. The 2200emitter resistor could be removed if emitter triggering is not used. By addingresistors from base to ground as in Figure 117(b), the off transistor has both junctionsreverse biased for greater stability. While the 33K resistors divert some of the formerlyavailable base current, operation no longer depends on a very low saturation voltageconsequently less base current may be used. Adding the two resistors permits stableoperation beyond 50°C ambient temperature.
OUTPUT OUTPUT
TRIGGER
750 OHMS
(C)
SATURATED FLIP-FLOPFIGURE 117(C)
The circuit in Figure 117(c) is stabilized to 100°C. The price that is paid for thestability is (1) smaller voltage change at the collector, (2) more battery power con-sumed, (3) more trigger power required, (4) a low Ico transistor must be used. The
capacitor values depend on the trigger characteristics and the maximum trigger repeti-
tion rate as well as on the flip-flop design.
By far, the fastest way to design saturating flip-flops is to define the collector and
emitter resistors by the current and voltage levels generally specified as load require-
ments. Then assume a tentative cross -coupling network. With all components specified,
it is easy to calculate the on base current and the off base voltage. For example, thecircuit in Figure 117(b) can be analyzed as follows. Assume VEE = .3 volt and WE =
.2 volt when the transistor is on. Also assume that VEB = .2 volts will maintain the off
transistor reliably cut-off. Transistor specifications are used to validate the assumptions.
I. Check for the maximum temperature of stability.
VBRiV 220
= + 2200 220(25) = 2.3 volts+
Vc = VE ITCE on = 2.3 ± .2 = 2.5 volts
Assuming no Ico, the base of the off transistor can be considered connected to
a potential, 2.V'B = VC on through a resistor R'B =--
R2 + 118 RRR2+ R.(2.5) (33K)
V'E = 1.1 volts(42K + 33K)(33K) (42K)
WE = = 18.5K75K
78
TRANSISTOR SWITCHES
The 'co of the off transistor will flow through R's reducing the base to emitterpotential. If the Ico is high enough, it can forward bias the emitter to base junctioncausing the off transistor to conduct. In our example, V. = 2.3 volts and VEB = .2 voltswill maintain off conditions. Therefore, the base potential can rise from 1.1 volts to2.1 volts (2.3 - .2) without circuit malfunction. This potential is developed across
2.1 - 1.1R'B by Ico = = 54 p.a. A germanium transistor with Ico = 10 /ha at 25°C
18.5Kwill not exceed 54 /la at 50°C. If a higher operating temperature is required, R2 and 112may be decreased and/or R4 may be increased.
II. Check for sufficient base current to saturate the on transistor.VB on = VE VBE on = 2.3 + .3 = 2.6 volts
2.6vThe current through 112 = 1.2 =
33K= .079 ma
The current through Ri and R2 in series is 12 = VCC - VB on 25 - 2.6+ R2 - 42K + 2.2K
= .506 ma
The available base current is Is = 12 - I8 = .43 ma
The collector current is Ic = Vcc - Vc , 25 -2.5=10.25 ma2.2K
The transistor will be in saturation if h.. at 10 ma is greater thanIo 10.25I. .43 - 24
If this circuit were required to operate to -55°C, allowance must be made forthe reduction of hFE at low temperatures. The minimum allowable room temperaturehp. should be doubled, or hBE min
Generally it is not necessary to include the effect of Ico flowing through R1 whencalculating 12 since at temperatures where Ico subtracts from the base drive it simulta-neously increases hFE. If more base drive is required, R2 and R2 may be decreased.If their ratio is kept constant, the off condition will not deteriorate, and so need not berechecked.
III. Check transistor dissipation to determine the maximum junction temperature.The dissipation in the on transistor is
VBE on Is(.3) (.43) (.2) (10.25)VCE on Ic - = 2.18 mw1000 1000
The dissipation in the off transistor resulting from the maximum 'CO is
Vc.Ico(25)10(55) = 1.4 mw
°
Generally the dissipation during the switching transient can be ignored at speedsjustifying saturated circuitry. In both transistors the junction temperature is within 1°Cof the ambient temperature if transistors in the 2N394-97 or 2N524-27 series are used.
NON -SATURATED FLIP-FLOP DESIGN
The abundance of techniques to prevent saturation makes a general design pro-cedure impractical if not impossible. While it is a simple matter to design a flip-flopas shown above, it becomes quite tedious to check all the worst possible combinationsof component change to ensure manufacturability and long term reliability. Often thejob is assigned to a computer which calculates the optimum component values andtolerances. While a number of flip-flop design procedures have been published, theygenerally make simplifying assumptions concerning leakage currents and the voltagesdeveloped across the conducting transistors.
79
TRANSISTOR SWITCHES
CIRCUIT CONFIGURATION FORNON -SATURATINGFLIP-FLOP DESIGN PROCEDURE
Characteristics:Trigger input at points ETrigger steering by D2 and R5Collector clamping by DI and 112Connect points A, B, C, D, E as shown in
Figure 119 to get counter or shift registeroperation
Cl and C2 chosen on basis of speed re-quirements
FIGURE 118(A)
The design procedure described here is for the configuration in Figure 118(a). Nosimplifying assumptions are made but all the leakage currents and all the potentialsare considered. The design makes full allowance for component tolerances, voltagefluctuations, and collector output loading. The anti -saturation scheme using one resistor(R3) and one diode (Dl) was chosen because of its effectiveness, low cost andsimplicity. The trigger gating resistors (R5) may be returned to different collectors toget different circuit functions as shown in Figure 119. This method of triggering offersthe trigger sensitivity of base triggering and the wide range of trigger amplitudepermissible in collector triggering. The derivation of the design procedure wouldrequire much space, therefore for conciseness, the procedure is shown without anysubstantiation. The procedure involves defining the circuit requirements explicitly thendetermining the transistor and diode characteristics at the anticipated operating points.A few astute guesses of key parameters yield a fast solution. However, since theprocedure deals with only one section of the circuit at a time, a solution is readilyreached by cut and try methods without recourse to good fortune. A checking pro-cedure permits verification of the calculations. The symbols used refer to Figure118(a) or in some cases are used only to simplify calculations. A bar over a symboldenotes its maximum value; a bar under it, its minimum. The example is based onpolarities associated with NPN transistors for clarity. The result is that only E2 isnegative. While the procedure is lengthly, its straightforward steps lend themselvesto computation by technically unskilled personnel and the freedom from restrictingassumptions guarantees a working circuit when a solution is reached. The circuitdesigned by this procedure is shown in Figure 118(b).
620 OHMS
LOAD -3J6 VOLTS
2N396
22°-T
-16V
.2K
V
620 OHMS
LOAD -3.16 VOLTS
2N396
NON -SATURATED FLIP-FLOPFIGURE 118(B)
80
TRANSISTOR SWITCHES
The same procedure can be used to analyze existing flip-flops of this configurationby using the design check steps.
91051
3.3 KA
2N123
HD 2085
3.3 K
12 0µµ f14
Hb 2085
HD6001 HD6001
91051
B
2N123
9100 9100
+5 VINI92 T EIN192
C (D2.2 K 250piLf 1250µµf 2.2K
E
(a) FLIP- FLOP
B
E D
INPUT 0-(b) INTER CONNECTION AS COUNTER
A
-0-
10 V
0- A
C E D
A
C E D
(C) INTERCONNECTION AS SHIFT REGISTER
500 KC COUNTER -SHIFT REGISTER FLIP-FLOPFIGURE 119
-0--
TRIGGER
81
ST
EP
I
NO
N -
SAT
UR
AT
ING
FL
IP-F
LO
P D
ESI
GN
PR
OC
ED
UR
E
DE
FIN
ITIO
N O
F O
PE
RA
TIO
NI S
YM
BO
L I
SA
MP
LE D
ES
IGN
FO
R 2
N39
6 T
RA
NS
IST
OR
(A)
Cir
cuit
Req
uire
men
ts a
nd D
evic
e C
hara
cter
istic
s
1A
ssum
e m
axim
um v
olta
ge d
esig
n to
lera
nce
Ae
Let
ze
= ±
5%
2A
ssum
e m
axim
um r
esis
tor
desi
gn to
lera
nce
Ar
Let
or
= ±
7%
(as
sum
ing
± 5
% r
esis
tors
)
3A
ssum
e m
axim
um a
mbi
ent t
empe
ratu
reT
AL
et T
A =
40°
C
4A
ssum
e m
axim
um lo
ad c
urre
nt o
ut o
f th
e of
f si
de10
Let
Io
= 1
ma
5A
ssum
e m
axim
um lo
ad c
urre
nt in
to th
e on
sid
eL
Let
II
= 0
.2 m
a
6E
stim
ate
the
max
imum
req
uire
d co
llect
or c
urre
nt in
the
ontr
ansi
stor
LL
et I
I <
17.
5 m
a
7A
ssum
e m
axim
um d
esig
n Ic
o at
25°
CFr
om s
pec
shee
t Ico
< 6
µa
8E
stim
ate
the
max
imum
junc
tion
tem
pera
ture
T,
Let
T3.
= 6
0°C
9C
alcu
late
Ico
at T
3 as
sum
ing
Ico
doub
les
ever
y 10
°C o
rIc
oTj =
Ic,
023
ejr
"Tj-
25)
1312
= 6
e "'
= 7
1 µa
; Let
I2
= 1
00 µ
a
10A
ssum
e th
e m
axim
um b
ase
leak
age
curr
ent i
s eq
ual t
o th
em
axim
um I
coL
Let
13
= 1
00 µ
a
11C
alcu
late
the
allo
wab
le tr
ansi
stor
dis
sipa
tion
2N39
6 is
der
ated
at 2
.5 m
w/ °
C. T
he ju
nctio
n te
mpe
ratu
reri
se is
est
imat
ed a
s 20
°C th
eref
ore
50 m
w c
an b
e al
low
ed.
Let
Pc
= 5
0 m
w
12E
stim
ate
hFE
min
imum
taki
ng in
to a
ccou
nt lo
w te
mpe
ratu
rede
grad
atio
n an
d sp
ecif
ic a
ssum
ed o
pera
ting
poin
tpm
o.
Let
am
,,. =
0.9
4 or
flm
I. =
15.
67
13E
stim
ate
the
max
imum
des
ign
base
to e
mitt
er v
olta
ge o
fth
e "o
n" tr
ansi
stor
Vi
Let
V, =
0.3
5 vo
lts
14A
ssum
e vo
ltage
logi
c le
vels
for
the
outp
uts
Let
the
leve
l sep
arat
ion
be >
7 v
olts
ST
EP
DE
FIN
ITIO
N O
F O
PE
RA
TIO
NS
YM
BO
LS
AM
PLE
DE
SIG
N F
OR
2N
396
TR
AN
SIS
TO
R15
Cho
ose
the
max
imum
col
lect
or v
olta
ge p
erm
issi
ble
for
the
"on"
tran
sist
orV
2L
et V
2 <
2.0
vol
ts
16C
hoos
e su
itabl
e di
ode
type
sL
et a
ll di
odes
be
1N19
817
Est
imat
e th
e m
axim
um le
akag
e cu
rren
t of a
ny d
iode
LM
axim
um le
akag
e es
timat
ed a
s <
25
µa. L
et L
= 4
0 µa
at
end
of li
fe18
Cal
cula
te L
= I
. ± 1
4Is
40 +
100
= 1
40 µ
a19
aC
hoos
e th
e m
inim
um c
olle
ctor
vol
tage
for
the
"off
" tr
ansi
stor
keep
ing
in m
ind
14 a
nd 1
5 ab
ove
V8
Let
V. >
9.0
vol
ts
19b
Cho
ose
the
max
imum
col
lect
or v
olta
ge f
or th
e "o
ff"
tran
-si
stor
V,
Let
V, <
13.
0 vo
lts
20C
hoos
e th
e m
inim
um d
esig
n ba
se to
em
itter
rev
erse
bia
s to
assu
re o
ff c
ondi
tions
V5
Let
V5
= 0
.5 v
olt
21a
Est
imat
e th
e m
axim
um f
orw
ard
volta
ge a
cros
s th
e di
odes
V.
Let
Vs
= 0
.8 v
olt
21b
Est
imat
e th
e m
inim
um f
orw
ard
volta
geV
7L
et V
, = 0
.2 v
olt
22E
stim
ate
the
wor
st s
atur
atio
n co
nditi
ons
that
can
be
tol-
erat
ed.
22a
Est
imat
e th
e m
inim
um c
olle
ctor
vol
tage
that
can
be
tole
rate
dV
.L
et V
8 =
0.1
vol
t22
bE
stim
ate
the
max
imum
bas
e to
col
lect
or f
orw
ard
bias
vol
t-ag
e th
at c
an b
e to
lera
ted
V.
Let
V. =
0.1
vol
t
23a
Cal
cula
te V
. + V
,V
,.2
+ 0
.2 =
2.2
vol
ts23
bC
alcu
late
V2
+ V
8V
U2
+ 0
.8 =
2.8
vol
ts24
aC
alcu
late
V8
+ V
7V
220.
1 +
0.2
= 0
.3 v
olt
24b
Cal
cula
te V
8 +
V6
Vu
0.1
+ 0
.8 =
0.9
vol
t25
Cal
cula
te V
8 +
V9
Vu
0.1
+ 0
.1 =
0.2
vol
t
ST
EP
NO
N -
SAT
UR
AT
ING
FL
IP-F
LO
P D
ESI
GN
PRO
CE
DU
RE
(C
ON
TIN
UE
D)
DE
FIN
ITIO
N O
F O
PE
RA
TIO
NS
YM
BO
LS
AM
PLE
DE
SIG
N F
OR
2N
396
TR
AN
SIS
TO
R
(B)
Cut
and
Try
Cir
cuit
Des
ign
1A
ssum
e E
2L
et E
2 =
-16
vol
ts -
± 5
%; E
s =
-15
.2 v
; E2
= -
16.8
v
2a(1
+ A
r)K
.1.
071.
15C
alcu
late
(1 -
Ar)
0.93
=
2b(1
+V
ie)
K2
1.05
1.10
5C
alcu
late
(1 -
Ae)
0.95
-
2cC
alcu
late
13K
s17
.51.
117
P. I
.=
ma
15.6
7
2dC
alcu
late
Is
+ 1
0 +
214
K4
0.1
+ 1
.0 +
0.0
8 =
1.1
8 m
a
2eV
6 -V
4K
s0.
8 -
0.04
54C
alcu
late
Vs
+ V
s -E
_0.
1 +
0.1
+0.
115
.2
31
pips
-V
1K
iE
s)1
r2.
2 -
0.35
1.15
16.8
)14
.03
KC
alcu
late
FT
<-
(V. -
- K
sL
KiK
s]
(0.3
5 +
] =
1.11
7 L
(1.
15)
(0.0
454)
4C
hoos
e R
.,11
4L
et R
4 =
13K
71-
7%
;T4
= 1
3.91
K; R
4 =
12.
09 K
5C
alcu
late
Rs
> K
5 R
4(0
.045
4) (
13.9
1K)
= 0
.632
K
6C
hoos
e It
sIl
sL
et R
s =
0.6
8 K
-±
- 7%
; Fa
= 0
.727
6 K
; Rs
= 0
.632
4 K
711
4 (V
10 -
V1)
(12.
09 K
) (2
.2 -
0.3
5)=
0.7
30 K
; cho
ice
ofC
heck
Rs
by c
alcu
latin
g rc
i, <
2V
I. -
E +
IC
s R
40.
35 +
16.
8 +
(1.
117)
(12
.09)
Rs
satis
fact
ory
8It
K6
13.9
1 K
1.09
1 K
/VC
alcu
late
-Vs
- E
2 -
15 R
4=
-0.5
+ 1
5.2
- (0
.14)
(13
.91)
ST
EP
DE
FIN
ITIO
N O
F O
PE
RA
TIO
NS
YM
BO
LS
AM
PLE
DE
SIG
N F
OR
2N
396
TR
AN
SIS
TO
R9
K6
(V2
+ V
6) -
R3
>(1
.091
) (2
.0 +
0.5
) K
- 0
.632
K2.
19 K
Cal
cula
te R
21
- K
a.1
- (1
.091
) (0
.04)
-10
Cho
ose
R2
-If
ther
ear
e di
ffic
ultie
s at
this
poi
nt, a
ssum
ea
diff
eren
t E6.
-R
2L
et R
2 =
2.7
K ÷
7%
; R2
:---
- 2.
889
K; R
2 =
2.5
11 K
11C
alcu
late
K.'
[V8
- V
.2 -
I- I
C. R
2]IC
,(1
.15)
2[9.
0 -
0.3
+ (
1.18
) (2
.511
)]1.
51V
4 -
VII
,13
.0 -
2.8
12.
KA
T. -
V3
Cal
cula
te E
. <(1
.51)
(13
.0)
- 9.
017
.63
K7
- 1/
K2
-vo
lts1.
51 -
1/1
.105
13C
hoos
e E
.E
.L
et E
. = 1
6 vo
lts ±
5%
; E. 1
6.8
volts
; E. =
15.
2 vo
lts14
(E. -
V8)
112
E(1
5.2
- 9.
0) (
2.51
1)1.
335
KC
alcu
late
<V
3 -V
+ K
4 R
2I2
9.0
- 0.
3 +
(1.
18)
(2.5
11)
-
15(E
l - V
4) M
OC
alcu
late
R. >
(18.
8 -
13.0
) (2
.889
)1.
077
K,.-
--V
4 ..-
V..
II13
.0 -
2.8
16C
hoos
e R
.R
.L
et R
. = 1
.2 K
-±
7%
; R. =
1.2
84 K
; R. =
1.1
16 K
(C)
Des
ign
Che
cks
1C
heck
"of
f" s
tabi
lity.
Rev
erse
bia
svo
ltage
is g
iven
by:
Y.
VE
,.<E
;[v
2E
L R
2i2
R3)
]V
EB
13.9
115
.2+
._-
-F±
(R2
±R
. ± R
a ±
R2
Cir
cuit
stab
le if
NT
EB
< -
72
-+
17.0
5[2
+ 1
5.2
+ (
0.0
4 )
( 2.
511
) +
( 0
.14
) (3
.14)
] =
-0.
7 vo
ltsT
he d
esig
n va
lue
of V
6w
as 0
.5 v
olts
. The
refo
re, t
he "
off"
cond
ition
is s
tabl
e.2
Che
ck f
or n
on -
satu
ratio
n un
der
the
wor
st c
ondi
tions
.(R
. V...
-E
)V
BE
< Y
.v.
13.9
1 (0
.9 +
15.
2)15
.20.
19±
it -4
± R
.
Cir
cuit
non
-sat
urat
ed if
VB
E <
V14
-±
-vo
lts14
.54
The
des
ign
max
imum
of
V14
was
0.2
vol
ts.
z O
NO
N -
SAT
UR
AT
ING
FL
IP-F
LO
P D
ESI
GN
PR
OC
ED
UR
E (
CO
NT
INU
ED
)
ST
EP
DE
FIN
ITIO
N O
F O
PE
RA
TIO
NS
YM
BO
LS
AM
PLE
DE
SIG
N F
OR
2N
396
TR
AN
SIS
TO
R
3C
heck
for
sta
bilit
y. C
alcu
late
:3a
RA
= I
TI
+ R
2R
A1.
284
+ 2
.889
= 4
.173
K
3bR
B =
IC
+ r
t; +
IT
+ R
4R
B1.
284
+ 2
.889
+ .7
28 +
12.
09 =
16.
99 K
3cR
D =
tr. ±
Ri
Rs
.728
+ 1
2.09
= 1
2.82
K
3dE
'7=
Ei-
K,E
E'1
15.2
- (
1.18
) (1
.284
) =
13.
68 v
olts
3eR
D =
Ri.
-FT
1.2
+IL
-FT
L,
RD
1.11
6 ±
2.8
89 +
.728
+ 1
3.91
= 1
8.64
3 K
3fR
D (
E1
- V
.) -
Ri.
[Ei.
- E
S -
IS I
I4 -
I4
OR
; + I
F4)1
___
_16
Is18
.64
(16.
8 -
2) -
1.1
16 [
16.8
+ 1
6.8
- (0
.14)
(13
.91)
1.11
6 (1
8.64
- 1
.116
)=
Ri.
(RD
- I
L)
- (.
04)
(.72
8 +
13.
91)]
12.3
4=
ma
3gR
s1
Vio
)E
2)L
(13.
68 +
16.
8)2.
2)1.
266
L =
W. -
(E'1
16.9
9-
-%
RD
RD
-(1
3.68
-=
ma
(4.1
73)
(12,
82)
12.8
2
3hII
+ 1
6 +
17
LL
0.2
+ 1
2.34
+ 1
.266
=fl
m16
+ R
4/R
e=
0.83
1 m
a15
.67
± 1
2.09
/12.
82
(12
.09
,
16.8
13.6
8316
.8)
-k1
-F
14.2
.818
173
) (
+16
.99
±
3iR
4 -R
A(
1 +
) (E
'1 -
E^)
V'B
E
12.0
912
.09
V'B
E =
E2
+R
e-
Rs
-'12
.818
(13'
683
- 2'
2) -
0.8
3116
.99
114
(V,.
-Vi,)
161.
14-
( R
R' -
R-1
- i
1-3
)t7
3 (1
2. 0
9)4.
173
- 0.
7276
) =
--
RR
cR
Be
.55V
k(4.
112)
818
.
.55V
is g
reat
er th
an V
i = .3
5V, t
here
fore
the
desi
gn is
satis
fact
ory.
TRANSISTOR SWITCHES
TRIGGERING
Flip-flops are the basic building blocks for many computer and switching circuitapplications. In all cases it is necessary to be able to trigger one side or the other intoconduction. For counter applications, it is necessary to have pulses at a single inputmake the two sides of the flip-flop conduct alternately. Outputs from the flip-flop musthave characteristics suitable for triggering other similar flip-flops. When the countingperiod is finished, it is generally necessary to reset the counter by a trigger pulse toone side of all flip-flops simultaneously. Shift registers, and ring counters have similartriggering requirements.
In applying a trigger to one side of a flip-flop, it is preferable to have the triggerturn a transistor off rather than on. The off transistor usually has a reverse -biasedemitter junction. This bias potential must be overcome by the trigger before switchingcan start. Furthermore, some transistors have slow turn on characteristics resulting ina delay between the application of the trigger pulse and the actual switching. On theother hand, since no bias has to be overcome, there is less delay in turning off atransistor. As turn-off begins, the flip-flop itself turns the other side on.
A lower limit on trigger power requirements can be determined by calculatingthe base charge required to maintain the collector current in the on transistor. Thetrigger source must be capable of neutralizing this charge in order to turn off thetransistor. It has been determined that the base charge for a non -saturated transistor isapproximately QB = 1.22 I0/274.. The turn-off time constant is approximatelyhFE/274.. This indicates that circuits utilizing high speed transistors at low collectorcurrents will require the least trigger power. Consequently, it may be advantageous touse high speed transistors in slow circuitry if trigger power is critical. If the on tran-sistor was in saturation, the trigger power must also include the stored charge. Thestored charge is given by
1 1 1 \ 1 IcQs =21r f. f.! - aNai 11FE /
where the symbols are defined in the section on transient response time.
Generally, the trigger pulse is capacitively coupled. Small capacitors permit morefrequent triggering but a lower limit of capacitance is imposed by base charge con-siderations. When a trigger voltage is applied, the resulting trigger current causes thecharge on the capacitor to change. When the change is equal to the base charge justcalculated, the transistor is turned off. If the trigger voltage or the capacitor are toosmall, the capacitor charge may be less than the base charge resulting in incomplete
turn-off. In the limiting case C = 1:3 . The speed with which the trigger turns off av T
transistor depends on the speed in which QB is delivered to the base. This is determinedby the trigger source impedance and r'b.
In designing counters, shift registers or ring counters, it is necessary to makealternate sides of a flip-flop conduct on alternate trigger pulses. There are so-calledsteering circuits which accomplish this. At low speeds, the trigger may be applied atthe emitters as shown in Figure 120. It is important that the trigger pulse be shorterthan the cross coupling time constant for reliable operation. The circuit features fewparts and a low trigger voltage requirement. Its limitations lie in the high triggercurrent required.
At this point, the effect of trigger pulse repetition rate can be analyzed. In orderthat each trigger pulse produce reliable triggering, it must find the circuit in exactlythe same state as the previous pulse found it. This means that all the capacitors in thecircuit must stop charging before a trigger pulse is applied. If they do not, the result
87
TRANSISTOR SWITCHES
+10V
2N167 2NI67
150/.94
(-o _Sru-u6.8K GT WAVE
INPUT
EMITTER TRIGGERINGMAXIMUM TRIGGER RATE EXCEEDS 500KCS WITH TRIGGERAMPLITUDE FROM 2V TO I2V
FIGURE 120
is equivalent to reducing the trigger pulse amplitude. The transistor being turned offpresents a low impedance permitting the trigger capacitor to charge rapidly. Thecapacitor must then recover its initial charge through another impedance which isgenerally much higher. The recovery time constant can limit the maximum pulse rate.
36p.p.f INI91 36µµf
6800 6.8K 6.8K
2.7K
+10V
39K
11000µµf
CT
50E -°p4, WSOAlirE
INPUT
COLLECTOR TRIGGERINGMAXIMUM TRIGGER RATE EXCEEDS INC WITH TRIGGERAMPLITUDE FROM 4V TO I2V.
FIGURE 121
36µµf 36p.µf
6800 6.8K 6.8K
+10V
2.7 K
2NI67
CT
(-°150 Milltr" SQUARE
WAVEINPUT
1000µµfd
BASE TRIGGERINGMAXIMUM TRIGGER RATE EXCEEDS I MCWITH TRIGGER AMPLITUDE FROM 0.75 TO3 VOLTS.
FIGURE 122
Steering circuits using diodes are shown in Figures 121 and 122. The collectorsare triggered in 121 by applying a negative pulse. As a diode conducts during trigger-ing, the trigger pulse is loaded by the collector load resistance. When triggeringis accomplished, the capacitor recovers through the biasing resistor RT. To minimizetrigger loading, RT should be large; to aid recovery, it should be small. To avoid therecovery problem mentioned above, RT can be replaced by a diode as shown in 123.The diode's low forward impedance ensures fast recovery while its high back im-pedancp avoids shunting the trigger pulse during the triggering period.
Collector triggering requires a relatively large amplitude low impedance pulse buthas the advantage that the trigger pulse adds to the switching collector waveform toenhance the speed. Large variations in trigger pulse amplitude are also permitted.
88
TRANSISTOR SWITCHES
2.7K
410V
KCT "In_(-6isoppfd
2NI67 2N167
T.1000p.p.fd6.13K
COLLECTOR TRIGGERINGDIODE TO SUPPLY VOLTAGE REDUCESTRIGGER POWER AND EXTENDS MAXIMUMTRIGGER RATE.
FIGURE 123
10V
2.7 K
N167
2N167
1000µµfd
68pp.fd
-7 -1-LTIrSQUAREWAVE
4.7K INPUT
COLLECTOR TRIGGERING WITH TRIGGER AMPLIFIER
FOR I MC TRIGGER RATE LESS THAN I VOLT TRIGGERAMPLITUDE REQUIRED.
FIGURE 124
In designing a counter, it may be advantageous to design all stages identically thesame to permit the economies of automatic assembly. Should it prove necessary toincrease the speed of the early stages, this can be done by adding a trigger amplifieras shown in Figure 124, without any change to the basic stage.
Base triggering shown in Figure 122 produces steering in the same manner ascollector triggering. The differences are quantitative with base triggering requiringless trigger energy but a more accurately controlled trigger amplitude. A diode canreplace the bias resistor to shorten the recovery time.
10K 10K1122569 HD2569
2 Op.µf (-IISH 220F µ fBASE TRIGGERING WITH HYBRID GATE
FIGURE 125
Hybrid triggering illustrated in Figure 125 combines the sensitivity of basetriggering and the trigger amplitude variation of collector triggering. In all the othersteering circuits, the bias potential was fixed, in this one the bias potential varies inorder to more effectively direct the trigger pulse. By returning the bias resistor to thecollector, the bias voltage is VcK. For the conducting transistor, VCB is much less thanfor the off transistor, consequently, the trigger pulse is directed to the conductingtransistor. This steering scheme is particularly attractive if VCB for the conductingtransistor is very small as it is in certain non -saturating circuits such as shown inFigure 107.
Care should be taken that the time constant CTRT does not limit the maximumcounting rate. Generally RT can be made approximately equal to RK the cross -couplingresistor.
89
TRANSISTOR SWITCH ES
To design a shift register or a ring counter, it is only necessary to return RTto the appropriate collector to achieve the desired switching pattern. The connectionsfor the shift register are shown in Figure 119(a) and (b). A ring counter connectionresults from connecting the shift register output back to its input as shown in Figure
119(c).
SYMMETRICAL TRANSISTOR TRIGGERS BOTH SIDES OFFLIP-FLOP SIMULTANEOUSLY.
FIGURE 126(A)
I500µµf
1-111RESET
51<
6V
TRIGGER TRANSISTORS SIMULTANEOUSLY SUPPLY CURRENTTO TURN OFF ONE SIDE OF FLIP-FLOP AND TO DEVELOP AVOLTAGE ACROSS THE COLLECTOR LOAD ON THE OTHER SIDE.
FIGURE 126(B)
CIRCUIT OF FIGURE 126(b) WITH TRIGGER STEERINGADDED FOR COUNTER APPLICATION
TRIGGER CIRCUITSUSING TRIGGER POWER TO INCREASE SWITCHING SPEED
FIGURE 126(C)
By using transistors as trigger amplifiers, some circuits superpose the trigger on theoutput of the flip-flop so that an output appears even if the flip-flop is still in thetransient condition. Figure 126(a) shows a symmetrical transistor used for steering. Thetransistor makes the trigger appear in opposite phase at the flip-flop collectors speedingup the transition. The circuit in Figure 126(b) can have Rc and RK so chosen so thata trigger pulse will bring the collector of the transistor being turned on to ground eventhough the transistor may not have started conducting. The circuit in 126(b) may beconverted to a steering circuit by the method shown in 126(c).
90
LOGIC
Large scale scientific computers, smaller machine control computers and electronicanimals all have in common the facility to take action without any outside help whenthe situation warrants it. For example, the scientific computer recognizes when it hascompleted an addition, and tells itself to go on to the next part of the problem. Amachine control computer recognizes when the process is finished and another partshould be fed in. Electronic animals can be made to sense obstructions and changetheir course to avoid collisions. Mathematicians have determined that such logicaloperations can be described using the conjunctives AND, OR, AND NOT, OR NOT.Boolean algebra is the study of these conjunctives, the language of logic. Transistorscan be used to accomplish logic operations. To illustrate this an example from automo-bile operation will be used.
Let us consider the interactions between the ignition switch, the operation of the motorand the oil pressure warning light. If the ignition is off, the motor and light will both beoff. If the ignition is turned on, but the starter is not energized the warning lampshould light because the motor has not generated oil pressure. Once the motor isrunning, the ignition is on and the lamp should be off. These three combinations ofignition, motor and lamp conditions are the only possible combinations signifyingproper operation. Note that the three items discussed have only two possible stateseach, they are on or off. This leads to the use of the binary arithmetic system, whichhas only two symbols corresponding to the two possible states. Binary numbers will bediscussed later in the chapter.
I M L ResultI 0 0 02 0 0 I X
3 0 I 0 X4 0 I I X
5 I 0 0 X
6 I 0 I
7 I I 08 I I I X
I =IGNITIONM =MOTORL =LAMPR =RESULTI =ON
0 = OFFI-= ACCEPTABLEX =UNACCEPTABLEN = 3= NO. OF VARIABLES
2N=8
Table of all possible combinations of ignition, motor and lamp conditionsFIGURE 127
To write the expressions necessary to derivea circuit, first assign letters to thevariables, e.g., I for ignition, M for motor and L for lamp. Next assign the number oneto the variable if it is on; assign zero if it is off. Now we can make a table of all possiblecombinations of the variables as shown in Figure 127. The table is formed by writingones and zeros alternately down the first column, writing ones and zeros in series oftwo down the second; in fours down the third, etc. For each additional variable,double the number of ones or zeros written in each group. Only 2N rows are written,where N is the number of variables, since the combinations will repeat if more rowsare added. Indicate with a check mark in the result column if the combination repre-sented in the row is acceptable. For example, combination 4 reads, the ignition is offand the motor is running and the warning light is on. This obviously is an unsatisfactory
91
LOGIC
situation. Combination 7 reads, the ignition is on and the motor is running and the
warning light is off. This obviously is the normal situation while driving. If we indicate
that the variable is a one by its symbol and that it is a zero by the same symbol with
a bar over it,and if we use the symbol plus (+) to mean "OR" and multiplication to
mean "AND" we can write the Boolean equation IML IML IML R where R
means an acceptable result. The three terms on the left hand side are combinations 1, 6,
and 7 of the table since these are the only ones to give a check mark in the result
column. The plus signs indicate that any of the three combinations individually is
acceptable. While there are many rules for simplifying such equations, they are beyond
the scope of this book.
INPUTS
T
A PICTORIAL PRESENTATIONOF THE GATES REQUIRED TOEXPRESS THE BOOLEAN
EQUATION
IML+IMLXIMLA
FIGURE 128
v
A PICTORIAL PRESENTATIONOF THE GATES REQUIRED TOEXPRESS THE BOOLEAN EQU.
ATM.!II.N.LIIT.M.LHT.M.LIN
FIGURE 129
To express this equation in circuitry, two basic circuits are required. They are
named gates because they control the signal passing through. An "AND" gate generates
an output only if all the inputs representing the variables are simultaneously applied and
an "OR" gate generates an output whenever it receives any input. Our equation trans-
lated into gates would be as shown in Figure 128. Only if all three inputs shown for an
"AND" gate are simultaneously present will an output be generated. The output will
pass through the "OR" gate to indicate a result. Note that any equation derived from
the table can be written as a series of "AND" gates followed by one "OR" gate.
It is possible to rearrange the equation to give a series of "OR" gates followed by one
"AND" gate. To achieve this, interchange all plus and multiplication signs, and remove
bars where they exist and add them where there are none. This operation gives us,
(I -F N4 -F I,) (I+ N4 -ET) (I+ N4 -1- L) IT
In ordinary language this means if any of the ignition or motor or lamp is on, and
simultaneously either the ignition is off or the motor is on or the lamp is off, and
simultaneously either the ignition is off or the motor is off or the lamp is on, then the
result is unacceptable. Let us apply combination 4 to this equation to see if it is accept-
able. The ignition is off therefore the second and third brackets are satisfied. The first
bracket is not satisfied by the ignition because it requires that the ignition be on.
However, the motor is on in combination 4, satisfying the conditions of the first bracket.
Since the requirements of all brackets are met, an output results. Applying combination
7 to the equation we find that the third bracket cannot be satisfied since its condi-
tions are the opposite of those in combination 7. Consequently, no output appears.
Note that for this equation, an output indicates an unacceptable situation, rather than
an acceptable one, as in the first equation. In gate form, this equation is shown in
Figure 129.92
LOGIC
Consider the circuits in Figure 130. The base of each transistor can be connectedthrough a resistor either to ground or a positive voltage by operating a switch. InFigure 130(a) if both switches are open, both transistors will be non -conducting exceptfor a small leakage current. If either switch A or switch B is closed, current will flowthrough RL. If we define closing a switch as being synonymous with applying an inputthen we have an "OR" gate. When either switch is closed, the base of the transistorsees a positive voltage, therefore, in an "OR" gate the output should be a positivevoltage also. In this circuit it is negative, or "NOT OR". The circuit is an "OR" gatewith phase inversion. It has been named a "NOR" circuit. Note that if we defineopening a switch as being synonymous with applying an input, then we have an"AND" circuit with phase inversion since both switch A and switch B must be openbefore the current through RL ceases. We see that the same circuit can be an "AND"or an "OR" gate depending on the polarity of the input.
(A)
+ boy
GATE USING NPN TRANSISTORSIF CLOSING A SWITCH IS AN INPUT, THIS IS AN "OR" GATEIF OPENING A SWITCH IS AN INPUT, THIS IS AN "AND" GATENOTE: PHASE INVERSION OF INPUT
+10 V
( B )47 K 4.7K
OUTPUT
GATE USING PNP TRANSISTORSIF CLOSING A SWITCH IS AN INPUT THIS IS AN "AND" GATEIF OPENING A SWITCH IS AN INPUT THIS IS AN "OR" GATENOTE: PHASE INVERSION OF INPUT
BASIC LOGIC CIRCUITS USING PARALLEL TRANSISTORSFIGURE 130
The circuit in Figure 130(b) has identically the same input and output levels butuses PNP rather than NPN transistors. If we define closing a switch as being an input,
93
LOGIC
we find that both switches must be closed before the current through RI, ceases. There-fore, the inputs which made the NPN circuit an "OR" gate make the PNP circuit an"AND" gate. Because of this, the phase inversion inherent in transistor gates does notcomplicate the overall circuitry excessively.
Figure 131(a) and (b) are very similar to Figure 130(a) and (b) except that thetransistors are in series rather than in parallel. This change converts "OR" gates into"AND" gates and vice versa.
(A)
GATE USING NPN TRANSISTORSIF CLOSING A SWITCH IS AN INPUT THIS IS AN "AND" GATEIF OPENING A SWITCH IS AN INPUT THIS IS AN "OW GATENOTE: PHASE INVERSION OF INPUT
(B)
GATE USING PNP TRANSISTORSIF CLOSING A SWITCH IS AN INPUT THIS IS AN "OR" GATEIF OPENING A SWITCH IS AN INPUT THIS IS AN "AND"GATENOTE: PHASE INVERSION OF INPUT
BASIC LOGIC CIRCUITSUSING SERIES TRANSISTORS
FIGURE 131
Looking at the logic of Figure 129, let us define an input as a positive voltage; alack of an input as zero voltage. By using the circuit of Figure 130(a) with threetransistors in parallel, we can perform the "OR" operation but we also get phaseinversion. We can apply the output to an inverter stage which is connected to an"AND" gate of three series transistors of the configuration shown in Figure 131(b).An output inverter stage would also be required. This is shown in Figure 132(a).
By recognizing that the circuit in Figure 130(a) becomes an "AND" gate if the inputsignal is inverted, the inverters can be eliminated as shown in Figure 132(b).
94
LOGIC
(A)
tIO
ALL TRANSISTORS - 2N6.1'NOR GATE
TO
I NOVTEHRETRE R
10K
INVERTER
INVERTERS COMPENSATE FOR PHASE INVERSION OF GATES
ION
NOT AND.SATE
(B) 'N"."TE TO ZnAIL
OUTPUT
INVERTER
4100
OUTPUT
PHASE INVERSION UTILIZED TO ACHIEVE WID.AND'OR. FUNCTIONS FROM THE SAME CIRCUIT.
Circuits representing (I M L) (f+ M + L) L) =ITFIGURE 132
If the transistors are made by processes yielding low saturation voltages and highbase resistance, the series base resistors may be eliminated. Without these resistors thelogic would be called direct -coupled transistor logic DCTL. While DCTL offers ex-treme circuit simplicity, it places severe requirements on transistor parameters anddoes not offer the economy, speed or stability offered by other logical circuitry.
The base resistors of Figure 132 relax the saturation voltage and base input voltagerequirements. Adding another resistor from each base to a negative bias potentialwould enhance temperature stability.
Note that the inputs include both "on" and "off" values of all variables e.g., bothI and I appear. In order that the gates function properly, I and I cannot both be posi-tive simultaneously but they must be identical and oppositely phased, i.e. when I ispositive I must be zero and vice versa. This can be accomplished by using a phaseinverter to generate I from I. Another approach, more commonly used, is to take Iand I from opposite sides of a symmetrical flip-flop.
IF A OR 8 OR C IS RAISED FROM ZERO TO12 VOLTS THE TRANSISTOR WILL CONDUCT.
BASIC NOR CIRCUITFIGURE 133
"NOR" logic is a natural extension of the use of resistors in the base circuit. In thecircuit of Figure 133, if any of the inputs is made positive, sufficient base current95
LOGIC
results to cause the transistor to conduct heavily. The "OR" gating is performed by
the resistors; the transistor amplifying and inverting the signal. The logic of Figure
129 can now be accomplished by combining the "NOR" circuit of Figure 133 withthe "AND" circuit of Figure 131(a). The result is shown in Figure 134. In comparing thecircuits in Figure 132(a) and 134, we see that the "NOR" circuit uses one-fourth asmany transistors and one-half as many resistors as the brute force approach. In fact if
we recall that the equation we are dealing with gives R rather than R, we see that
we can get R by removing the output phase inverter and making use of the inherent
inversion in the "NOR" circuit.
47K
IOS
I_ ALL TRANSISTORS2N635
!WATERII27K
(A)
OUTPUT
"NOR" logic using series transistors for"AND" gate
(B)"NOR" logic using inversion for
"AND" gate
FIGURE 134
Because of the fact that a generalized Boolean equation can be written as a series
of "OR" gates followed by an "AND" gate as was shown, it follows that such equations
can be written as a series of "NOR" gates followed by a "NOR" gate. The low costof the resistors used to perform the logic and the few transistors required make "NOR"
logic attractive.VCC
DEFINITIONSI, .MINIMUM CURRENT THROUGH R, FOR
TURNING TRANSISTOR ONIs ',MINIMUM BASE CURRENT FOR
TURNING TRANSISTOR ONIT .BIAS CURRENT TO KEEP TRANSISTOR
OFF AT HIGH TEMPERATURESM = MAX. NUMBER OF INPUTS PERMITTEDN MAX. NUMBER OF OUTPUTS PERMITTEDVss MA X. BASE TO EMITTER VOLTAGE WHEN
THE TRANSISTOR IS ON.VCs = MAX. COLLECTOR TO EMITTER VOLTAGE WHEN
THE TRANSISTOR IS ON.
Circuit used for design of "NOR" circuitryFIGURE 135
96
LOGIC
A detailed "NOR" building block is shown in Figure 135. The figure defines thebasic quantities. The circuit can readily be designed with the aid of three basicequations. The first derives the current IK under the worst loading conditions at thecollector of a stage.
Vcc - VBE ICOMRC where Icor,/ (A)RE NRc
is the maximum Ico that is expected at the maximum junction temperature. The secondequation indicates the manner in which Ix is split up at the base of the transistor.
IKM (VcEm - VCEN VBE - VEB) (VBE VCEN)
ICON (B)RE
where VCEN is the minimum expected saturation voltage, VCEM is the maximum expectedsaturation voltage and VEB is the reverse bias required to reduce the collector currentto ICO. VEB is a negative voltage. The third equation ensures that VEB will be reachedto turn off the transistor.
Icom(VcEm - VEB)M
(C)RE
Knowing IT and choosing a convenient bias potential permits calculation of RT. Inusing these equations, first select a transistor type. Assume the maximum possiblesupply voltage and collector current consistent with the rating of the transistor and themaximum anticipated ambient temperature. This will ensure optimization of N andM. From the transistor specifications values of ICOM, VBE, VCEN, and IB (min) can becalculated. IB (min) is the minimum base current required to cause saturation. Rc iscalculated from the assumed collector current. In equation (A) solve for IK using thedesired value of N and an arbitrary value for RE. Substitute the value for IK in equa-tion (B) along with a chosen value for M and solve for IB. While superficially IB needonly be large enough to bring the transistor into saturation, increasing IB will improvethe rise time.
OUTPUT
(a) CLAMPING DIODE REDUCES STORAGETIME TO INCREASE SPEED
INPUTS
(b) CAPACITORS REDUCE STORAGETIME TO INCREASE SPEED
FIGURE 136
Circuit speed can also be enhanced by using a diode as shown in Figure 136(a)to prevent severe saturation or by shunting RE by a capacitor as in 136(b). The capaci-tors may cause malfunction unless the stored charge during saturation is carefully
97
LOGIC
controlled; they also aggravate crosstalk between collectors. For this reason it is pref-erable to use higher frequency transistors without capacitors when additional speedis required.
BINARY ARITHMETIC
Because bistable circuits can be readily designed using a variety of componentsfrom switches to transistors, it is natural for counters to be designed to use binarynumbers, i.e. numbers to the base 2. In the conventional decimal system, a numberwritten as 2904 is really a contraction for 2 X 103 + 9 X 102 + 0 X 10' + 4 X 1. Wesee that each place refers to a different power of 10 in ascending order from the right.In the binary system, only two symbols are permitted, 0 and 1. All numbers areconstructed on the basis of ascending powers of 2. For example, 11011 means1 x + 1 x 28 0 X 22 + 1 X 2' 1 X 1. This is 27 in the decimal system. Usingthis construction, we can compare the form of binary and decimal numbers.
Binary Decimal0 0
1 1
10 211 3
100 4101 5
110 6
111 7
We see that the table in Figure 127 is actually a list of the first 8 binary numbers. Thecount in a binary counter can be determined by noting whether each stage is in the1 or 0 condition, and then assigning the appropriate power of 2 to the stage to constructthe number as in our examples.
To multiply a number by 10 we add a zero to the right hand side in the decimalsystem. In the binary system, we add a zero when multiplying by two. This is equiva-.lent to shifting the number one place to the left. This operation is done by a shiftregister.
If it is required to count to a base other than 2, a binary counter can be modifiedto counter to another base.
The rules for accomplishing the modification will be illustrated by constructing acounter to the base 10.
Rule Example1) Determine the number of binary stages M = 10
(N) required to count to the desired 28 < 10<2knew base (M) N = 4
2) Subtract M from 2N 24 - 10 = 63) Write the remainder in binary form 6 = 110
4) When the count reaches 2', feed = 23 = 1000back a one to each stage having a one Feedback added givesin the remainder 1 110
As additional pulses are added they will count through to M and then recycle tozero. This method is based on advancing the count at the point 2' to the extent thatthe indicated count is 2N when M input pulses are applied. The feedback is appliedwhen the most significent place becomes a one but it is imperative that feedbackbe delayed until the counter settles down in order to avoid interference with thenormal counter action.
98
TETRODE TRANSISTORS
TranSistor types 3N36 and 3N37 are grown germanium NPN tetrodes manufac-tured by the meltback process. The 3N36 is generally used between 30 MC and 90MC while the 3N37 is used from 90 MC to 200 MC. Primarily intended for highfrequency use as RF amplifiers, IF amplifiers, mixers and oscillators, these transistorsare also excellent for wide band video amplifiers. The use of base -two for AGC controlis also attractive in that very little detuning of the collector circuit results.
Formerly designated by the development number ZJ-22, these types are now inquantity production. The case dimensions of these transistors conform to theJETEC TO -12 package. They are electrically isolated from the case, which may begrounded by the indexing tab, if required for shielding purposes. The design is suitablefor automatic insertion into printed circuit boards.
It has long been recognized that smaller bar size will improve high frequencytransistor performance. In particular, small cross section base regions will reduce thebase spreading resistance, eb, (or high frequency base resistance). High r',, is the mostdegradating high frequency parameter and is almost always the performance -limitingfactor. One approach to reducing r'b is to use physically minute bars. While this solvesthe electrical problem and is technically possible, the cost of manufacture is high andmechanical reliability is low. To overcome these problems, G.E. uses a reasonablesize bar and obtains the high frequency performance by electrical means. With theaddition of a second base lead and the application of a suitable cross -base bias, anelectric field is established which "compresses" the active base region and thereby brings
base resistance. See Figure 137.
Effect of base -two bias on current distributionFIGURE 137
Improvements in base resistance of the order of 10 to 1 are achieved by the tetrodeover the triode. Since the collector -base junction is normally biased in the inversedirection, the addition of base -two bias has relatively little effect on the collectorjunction. It merely increases the average bias by VB1B2/2 which at any collector biasover a few volts has practically no effect.
Operation in the common emitter configuration is generally recommended for sev-eral reasons. Operation is more stable and is less likely to be regenerative. Power gainis higher except at the upper frequency limits. The effect of collector capacity on
99
TETRODE TRANSISTORS
internal feedback is approximately halved when base -two is connected to a -c ground.
See Figure 138 for a simplified equivalent circuit.
BI
INPUT
Approximate equivalent circuit of tetrodeFIGURE 138
OUTPUT
As can be seen, half the collector capacity is across the load and can be tuned
out. Thus, it does not contribute to the internal feedback. Output impedance is
increased by a factor of 2, with a corresponding improvement in high frequency
available power gain. Figure 139 shows the typical power gain variations of a 3N36
at 60 MC with collector voltage, emitter current and base -two bias. Curves for the
3N37 at 150 MC have the same general shape.
14
12
10
8
,%, 6
4
2
I 2 3 4 5 6 7
COLLECTOR VOLTS
14
12
10
6
4
2
14
12
10
a 8
2
2 3 4 5 6 7
EMITTER CURRENT(MA.)
.5 45 2 2.5 3 3 5
CROSS -BASE BIAS(VOLTS)
Power gain variations with biasFIGURE 139
100
TETRODE TRANSISTORS
Typical d -c biasing methods are shown in Figures 140 and 141. Recommendedconditions are:
Collector to emitter voltage, VcE = 5 volts; base -one to base -twovoltage, VE,E2 = 2 volts; base -one to base-two current, IB1B2 =.5 ma; emitter current, IE = 1.5 ma.
COMMON EMITTER-12
Typical biasing methodsFIGURE 140
COMMON BASE
Typical biasing methodsFIGURE 141
Typical circuit configurations utilizing tetrode transistors are shown in Figures142, 143, and 144.
CRYSTAL CONTROLLED OSCILLATOR
FIGURE 142
101
TETRODE TRANSISTORS
BASE 2 AGC FOR RF AND IF AMPLIFIERS
FIGURE 143
4.5MC---L7-LAA_AT°SND.
CONTRAST
T
AGC AMPLIFIER
BRIGHTNESS
RETRACESUPPRESSION
TV VIDEO AMPLIFIER (FOR HIGH Gm PICTURE TUBES)
FIGURE 144
102
POWER SUPPLIES
Both silicon and germanium cells can be used in the types of power supplies illus-trated in Figures 149, 150, 151, and 152. All four of these power supplies are designed forlow ripple output and high reliability at minimum expense. However, they are limitedto Class A types of load in which the average load current does not vary with theamplitude of the impressed signal. Class B loads require a stiffer voltage source than
RI
117 V AC
O
G. EIN91
IN91
CI R2 V OUTPUT
0 +
OUTPUTVOLTAGE
V
OUTPUTCURRENT RI CI R2* APPROX.
RIPPLE
250µf12 VOLTS I MA. 43K, 1/2 W 15 VOLT 180K 0.1%
ELECTROLYTIC 1/2W
250 pt12 VOLTS 2 MA. 22K, I/2W 15 VOLT 100K 0.1%
ELECTROLYTIC 1/2W
250µt25 VOLTS 2 MA. 18K,1/2W 30 VOLT 180K 0.1%
ELECTROLYTIC 1/2W
*TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,ADJUST R2.
GENERAL PURPOSETRANSISTOR
POWER SUPPLYFIGURE 150
CI
117 V AC
G. E.INS!
G. E. 2IN91
R2
PRE -AMP POWER SUPPLYFIGURE 149
C2 C3 R3 V OUTPUTT+_0+
OUTPUTVOLTAGE
V
OUTPUTCURRENT RI R2 R3*
CIMETALLIZED
PAPERC2 C3 APPROX.
RIPPLE
12 VOLTS IOOMA.20
1 WATT100112W
220011I W
THREE2-0 INPARALLEL
200 V
250µf15 VOLT
ELECTROLYTIC
250µf15 VOLT
ELECTROLYTIC
0.5%
12 VOLTS 150MA 212
I WATT
10011
IOW22000
IW
FOUR2-µt INPARALLEL
200V
250015 VOLT
ELECTROLYTIC
250µ115 VOLT
ELECTROLYTIC0.5%
25 VOLTS 50MA 20I WATT
25002W
10,0000I W
TWO2-µf IN
PARALLEL200V
100µf50 VOLT
ELECTROLYTIC
250p.t30 VOLT
ELECTROLYTIC0.5%
* TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,ADJUST R3.
105
POWER SUPPLIES
OUTPUTVOLTAGE
V
OUTPUTCURRENT
RI R2 CI C2RECT.
I
APPROXRIPPLE
40 VOLTS I AMP 311 2051 3041 100010 I%10 WATTS 20 WATTS 150 VOLT 50 VOLT
ELECTROLYTIC ELECTROLYTICr-,rninzLLi0CC=0IL
TI - U. T. C. R-43 AUTOTRANSFORMER OR EQUAL
2:1 WINDING RATIO
POWER SUPPLY FOR HIGH POWER CLASS A TRANSISTOR AMPLIFIER
FIGURE 151
the resistance -capacity combinations of the illustrated power supplies can provide. For
Class B and other loads that require good voltage regulation, it is recommended that
the line voltage be reduced through transformers rather than series resistance orcapacitance, and that chokes be substituted for the series resistance in the filter
elements. Alternately, a regulated power supply such as shown on page 108 can be used.
This circuit uses a step-down transformer and full -wave rectifier as a source ofunregulated DC. A power transistor acts as a series regulator and mercury batteries
are used for the voltage reference. The battery drain is very small so their life is essen-
tially equal to the shelf life.When a semiconductor rectifier feeds a capacity -input filter such as in Figures 149
through 152, it is necessary to limit the high charging current that flows into the input
capacitor when the circuit is energized. Otherwise this surge of current may destroythe rectifier. Resistor R1 is used in Figures 149 through 152 to limit this chargingcurrent to safe values.
As shown, the four power supplies do not isolate the load circuit from the 117 voltAC line. In Figures 149 and 150, the load circuit may be grounded provided a polarized
106
POWER SUPPLIES
OUTPUTVOLTAGE
V
OUTPUTCURRENT RI R2 CI C2
RECT.I
APPROXRIPPLE
40 VOLTS I AMP 31210 WATTS
2057.20 WATTS
300/0150 VOLT
ELECTROLYTIC
1000;050 VOLT
ELECTROLYTICt. -ininZ_
iii0Erm0ii..
I%
TI - U. T C. R-43 AUTOTRANSFORMER OR EQUAL2:1 WINDING RATIO
POWER SUPPLY FOR HIGH POWER CLASS A TRANSISTOR AMPLIFIERFIGURE 151
the resistance -capacity combinations of the illustrated power supplies can provide. ForClass B and other loads that require good voltage regulation, it is recommended thatthe line voltage be reduced through transformers rather than series resistance orcapacitance, and that chokes be substituted for the series resistance in the filterelements. Alternately, a regulated power supply such as shown on page 108 can be used.
This circuit uses a step-down transformer and full -wave rectifier as a source ofunregulated DC. A power transistor acts as a series regulator and mercury batteriesare used for the voltage reference. The battery drain is very small so their life is essen-tially equal to the shelf life.
When a semiconductor rectifier feeds a capacity -input filter such as in Figures 149through 152, it is necessary to limit the high charging current that flows into the inputcapacitor when the circuit is energized. Otherwise this surge of current may destroythe rectifier. Resistor R1 is used in Figures 149 through 152 to limit this chargingcurrent to safe values.
As shown, the four power supplies do not isolate the load circuit from the 117 voltAC line. In Figures 149 and 150, the load circuit may be grounded provided a polarized
106
POWER SUPPLIES
RI
117 V. ACR2
V OUTPUT
OUTPUTVOLTAGE
V
OUTPUTCURRENT RI R2 CI C2 R3* RECT
I
APPROX.RIPPLE
40 VOLTS I AMP 511
20W7512
100W1001c f
150 VOLTS
ELECTROLYTIC
300p.f50 VOLTS
ELECTROLYTIC
I000 S2
2 W 03rooz,Licp
crz2
I%
TO ADJUST VOLTAGE OUTPUT FOR OTHER OUTPUT CURRENTS,ADJUST R3.
POWER SUPPLY FOR HIGH POWER CLASS A TRANSISTOR AMPLIFIERFIGURE 152
plug is used on the AC linecord to ensure that the grounded side of the AC line isalways connected to the grounded side of the load. Figures 151 and 152 utilize what iscalled a single phase bridge rectifier circuit to achieve full wave rectification, andhence, lower ripple. Since ground cannot be carried through on a common line to theload in this type of circuit, it is necessary to insulate the load "ground" from accidentalcontact with true ground, or to insert an isolation transformer ahead of the powersupply to isolate the two systems. Careful attention to these factors is of particularimportance when supplying DC to high gain amplifiers to eliminate hum.As illustrated, Figures 149 and 150 develop a negative output voltage with respectto ground as required when supplying P -N -P transistors with grounded emitters. Todevelop a positive voltage with respect to ground, it is only necessary to reverse therectifiers and electrolytic capacitors in the circuit.The power supply of Figure 151 uses an autotransformer to reduce the line voltageto one-half normal value before applying to the rectifiers. Provided the additional heatdissipation is not objectionable, Figure 152 provides a cheaper means of achieving thesame objective by using resistor R2 to reduce the voltage to the desired value.
107
COMPLETE POWER SUPPLY CIRCUITS
117 VAC
STANCORP-6469
IA
40 V (NO LOAD)33V (44)
CI -1500µf,50 VOLTSSILICON BRIDGE - FOUR- 1 NI692
POWER SUPPLY FOR FIVE -WATT AMPLIFIERFIGURE 153
UTCFT -I0
11/2A
38 V (NO LOAD)34 V (44)
CI- 1500µf ,50VSILICON BRIDGE -FOUR- IN537IS
POWER SUPPLY FOR DUAL SIX -WATT AMPLIFIERFIGURE 154
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F
TRANSISTOR SPECIFICATIONS
HOW TO READ A SPECIFICATION SHEETSemiconductors are available in a large variety of different types, each with its own
unique characteristics. At the present time there are over 2200 different types of diodesand rectifiers and over 750 different types of transistors being manufactured.
The Characteristics of each of these devices are usually presented in specificationsheets similar to the ones represented on the next two pages. These specifications,particularly the transistor specification on the next page, contain many terms andratings that are probably new to you, so we have selected several of the more importantones and explained what they mean.
NOTES ON TRANSISTOR SPECIFICATION SHEET
0 The lead paragraph is a general description of the device and usually containsthree specific pieces of information - The kind of transistor, in this case a silicon NPNtriode, -A few major application areas, amplifier and switch, - General sales features,electrical stability and a standard size hermetically sealed package.
® The Absolute Maximum Ratings are those ratings which should not be exceededunder any circumstances. Exceeding them may cause device failure.
® The Power Dissipation of a transistor is limited by its junction temperature.Therefore, the higher the temperature of the air surrounding the transistor (ambienttemperature), the less power the device can dissipate. A factor telling how much thetransistor must be derated for each degree of increase in ambient temperature in de-grees centigrade is usually given. Notice that this device can dissipate 150mw at 25°C.By applying the given derating factor of lmw for each degree increase in ambienttemperature, we find that the power dissipation has dropped to 0mw at 175°C, whichis the maximum operating temperature of this device.0 All of the remaining ratings define what the device is capable of under specifiedtest conditions. These characteristics are needed by the design engineer to designmatching networks and to calculate exact circuit performance.CD Current Transfer Ratio is another name for beta. In this case we are talking aboutan a -c characteristic, so the symbol is hfe. Many specification sheets also list the d -cbeta using the symbol hFE. Beta is partially dependent on frequency, so some specifica-tions list beta for more than one frequency.® The Noise Figure is a measurement derived to evaluate the amount of electricalnoise produced by the transistor in a circuit.® The Frequency Cutoff of a transistor is defined as that frequency at which thegrounded base current gain drops to .707 of the lkc value. It gives a rough indication
of the useful frequency range of the device.
® The Collector Cutoff Current is the leakage current from collector to base whenno emitter current is being applied. This leakage current varies with temperaturechanges and must be taken into account whenever any semiconductor device is de-signed into equipment used over a wide range of ambient temperature.
® The Switching Characteristicsgiven show how the device re-
181INPUT PULSE
sponds to an input pulse under thespecified driving conditions. These
on the circuit used. The terms usedOUTPUT PULSE
90%
response times are very dependent
tr tf l -are explained in the curves at right.
110
TRANSISTOR SPECIFICATIONS
The General Electric Type 2N332 is a silicon NPN triodetransistor intended for amplifier applications in the audio 2N332and radio frequency range and for general purpose switch-
Outline Drawing No. 4ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150hour 200°C cycled aging operation included in the manufacturing process. All unitsare subjected to a rigorous mechanical drop test to control mechanical reliability. Thistransistor is hermetically sealed in a welded case. The case dimensions and lead con-figuration conform to the JETEC TO -5 package and are suitable for insertion inprinted boards by automatic assembly equipment.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base (Emitter Open) Vt_RO 45 voltsEmitter to Base (Collector Open) VE1,1 1 volt
Collector Current Ic 25 ma
Power*Collector Dissipation (25°C) Pc 150 mwCollector Dissipation (125°C) Pc 50 mwTemperature RangeStorage TSTG -65°C to 200°COperating TA -55°C to 175°C-Derate lmw/°C increase in ambient temperature.
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified; Ven = 5v;1E = -1 ma; f =- Ike/
Small Signal Characteristics
Current Transfer RatioInput ImpedanceReverse Voltage Transfer RatioOutput Admittance
111-C
Power Gain(VcE = 20v; In = -2ma; f = Ike;Ra = 1K ohms; RE = 20K ohms)
Noise Figure
111-{ Frequency CutoffHigh Frequency Characteristics
(Vol = 5v; In = -1ma)Collector to Base Capacity
(Vea = 5v; IE = -lma; f = line)Power Gain (Common Emitter)
111
(Vca = 20v; IE = -2ma; f= 5mc)
D -C Characteristics
Collector Breakdown Voltage(kilo = 50µa; Is = 0; TA = 25°C)
Collector Cutoff Current(Vca = 30v; IE = 0; TA r--- 25°C)(Ws = 5v; IE = 0; TA = 150°C)
Collector Saturation Resistance(Is = lma; Ic = 5ma)
Ie- Switching Characteristics
Ic = 2.8 ma)Delay TimeRise TimeStorage TimeFall Time
(Is, = 0.4 ma; IE2 = -0 4 ma;
MIN. NOM. MAX.hr. 9 15 20hib 30 53 80 ohmshrb .25 1.0 5.0 X 10-4hob 0.0 .25 1.2 µmhos
G.NF
3528
dbdb
Lb 15 meCob 7 figG. 17 db
BVcao 45 volts
Ica° .02 2 µaIca() 50 µaRsc 80 200 ohms
td .75 µseet. .5 µseet. .05 µseet. .15 usec
111
TRANSISTOR SPECIFICATIONS
NOTES ON RECTIFIER SPECIFICATION SHEETThe performance of a rectifier is judged primarily on four key measurements, or
parameters. They are always given for specific ambient conditions, such as still airand 55°C, and are based on a 60 cycles per second (A -C) input with the rectifierfeeding a resistive or inductive load (see ® below). A capacitive load will increasethe Peak Inverse Voltage and necessitate a different set ---EAKof ratings than shown here. These key parameters are:
&IPNVERSE
® Maximum Peak Inverse Voltage (usually referredVOLTAGEto as Ply), the peak a -c voltage which the unit will
withstand in the reverse direction;60 CPS (CYCLES PER SECOND)
Maximum Allow- A -C INPUT
able D -C Output Current, which varies with ambienttemperature; 0 Maximum Allowable One -cycle Surge Current, representing themaximum instantaneous current which the rectifier can withstand, usually encount-ered when the equipment is turned on; C) Maximum Full -load Forward Voltage Drop,measured with maximum d -c output flowing and maximum PIV applied. This is ameasure of the rectifier's efficiency.
1N1692, 1N1693
1N1694, 1N1695
These alloy junction silicon rectifiers are designedfor general purpose applications requiring maxi-mum economy. These rectifiers are hermeticallysealed and will perform reliably within the oper-ating specifications.
RATINGS AND SPECIFICATIONS
060 CPS, Resistive or Inductive)
1N1692 1N1693 1N1694 1N16950
®-C Max. Allowable Peak Inverse Voltage 100 200 300 400 volts
Max. Allowable RMS Voltage 70 140 210 280 volts
Max. Allowable Continuous ReverseDC Voltage 100 200 300 400 volts
Max. Allowable DC Output 100°C Ambient 250 250 250 250 ma
Max. Allowable DC Output 50°C Ambient 600 600 600 600 ma
0[ Max. Allowable One Cycle Surge Current 20 20 20 20 amps
0-( Max. Full Load Forward Voltage Drop( Full cycle average at 100°C) .60 .60 .60 .60 volts
Max. Leakage Current at Rated PIV(Full cycle average at 100°C) 0.5 0.5 0.5 0.5 ma
Peak Recurrent Forward Current 2.0 2.0 2.0 2.0 amps
Max. Operating Temperature 115°C+
The other ratings or specifications are additional yardsticks of performance which
are more or less critical depending on the operating conditions to be experienced.
For instance, the IN536 Series for which specifications are shown, being silicon recti-
fiers, are able to show a higher range of Ambient Operating Temperatures with higher
output than a germanium unit would, and are preferred on this basis for many appli-cations. Maximum Leakage Current refers to the reverse current which will flow whepvoltage is applied, and here, too, can be a critical measure of performance for specific
applications such as magnetic amplifiers.Sometimes there is confusion as to whether a unit is a Diode or a Rectifier. Actually
the word Diode means "two" and both rectifiers and diodes have two elements.However, rectifiers are capable of handling much larger currents than diodes. The term
diode is used to describe units used in high frequency, low current, signal applications
such as in high frequency circuits of television receivers.
112
TRANSISTOR SPECIFICATIONS
EXPLANATION OF PARAMETER SYMBOLS
SMALL SIGNAL & HIGH FREQUENCY PARAMETERS (at specified bias)Symbols
Abbreviated Definitionsbos Com. base - output admittance, input AC open -circuitedbib Corn. base - input impedance, output AC short-circuitedhrb Com. base - reverse voltage transfer ratio, input AC open -circuitedhib Corn. base
hr.hre
Com. emitter
Corn. collector
forward current transfer ratio,output AC short-circuited
hoe, hie Examples of other corresponding com. emitter symbolsfob
foe
Corn. base the frequency at which the magnitude of the small -signal short-circuit forward current transfer ratio isCom. emitter 0.707 of its low frequency value.flux Maximum frequency of oscillationCob
Coe
Collector to base t Capacitance measured across the output terminalsCollector to emitter s with the input AC open -circuited
eb Base spreading resistance
G. Com. emitter Power Gain ( use GI, for corn. base )CG. Conversion gain
NF Noise Figure
SWITCHING CHARACTERISTICS (at specified bias)to
t,Ohmic delay time
Rise timeThese depend on both transistor
to Storage time and circuit parameters
ti Fall time
Saturation voltage at specified Ic and Is. This is defined only with the collectorsaturation region.Von (SAT.)
has
IsCorn. emitter - static value of short-circuit forward current transfer ratio, his
Ishen (INV) Inverted has (emitter and collectorleads switched )
UNIJUNCTION TRANSISTOR MEASUREMENTSIss (MOD) Modulated interbase current
IP Peak point emitter current
Iv Valley current
RBBO Interbase resistance
VBB Interbase voltage
Vv Valley voltage
Intrinsic stand-off ratio. Defined by VP =, Vas + 200(in ° Kelvin)TO
113
TRANSISTOR SPECIFICATIONS
DC MEASUREMENTS
Ic, In, In DC currents into collector, emitter, or base terminal
VCB, VE8 Voltage collector to base, or emitter to base
Vol° Voltage collector to emitter
VHS Voltage base to emitter
BVcaoBreakdown voltage, collector to base junction reverse biased, emitter open -circuited(value of Ic should be specified)
VCEOVoltage collector to emitter, at zero base current, with the collector junctionreverse biased. Specify It.
BVcxoBreakdown voltage, collector to emitter, with base open -circuited. This may be afunction of both "m" (the charge carrier multiplication factor) and the hrb of thetransistor. Specify Ic.
VCER Similar to VCEO except a resistor of value "R" between base and emitter.
VCE8 Similar to VCEO but base shorted to emitter.
VPTPunch -through voltage, collector to base voltage at which the collector spacecharge layer has widened until it contacts the emitter junction. At voltages abovepunch -through, VPT = VCB - VEB
VccB Supply voltage collector to base NOTE - third subscriptVcca Supply voltage collector to emitter may be omitted if noVBBE Supply voltage base to emitter confusion results.
ICO, 'CB°Collector current when collector junction is reverse biased and emitter is DCopen -circuited.
IEO, IEBOwhen emitter junction is reverse biased and collector is DC
open -circuited.
Iczo Collector current with collector junction reverse biased and base open-circuited.
Ices Collector current with collector junction reverse biased and base shorted to emitter.
Imes Emitter current with emitter junction reverse biased and base shorted to collector.
Rsc Collector saturation resistance
OTHER SYMBOLS USED
Pcm Peak collector power dissipation for a specified time limit
PCAV Average maximum collector power dissipation
Po Power output
Zi Input impedance
Zo Output impedance
Ts Operating Temperature
TJ Junction Temperature
TSTG Storage Temperature
NOTE: In devices with several electrodes of the same type, indicate electrode by number. Example:Is2. In multiple unit devices, indicate device by number preceding electrode subscript. Example: Isc.Where ambiguity might arise, separate complete electrode designations by hyphens or commas. Exam-ple: Vici-om (Voltage between collector #1 of device #1 and collector #1 of device #2. )
NOTE: Reverse biased junction.means biased for current flow in the high resistance direction.
114
TRANSISTOR SPECIFICATIONS
TRANSISTOR SUMMARY
The table below shows all current General Electric Signal Transistor types alongwith the maximum dimension of the package base and general application area.
PNP PNP NPN NPNINLINEAE1 TRIAD G1LP LEAD 111E LEAD TRIANGULAR LEAD.460 MAX 84(.s
cr<1-'
:1
1
ErWI-
0.,
2QU
..i<E2
I-D0Z...
00J
W
AMPLIFIER& COMPUTER
2N3322N3332N335
N'-'U [JUNCTION
2N489*2N490*2N491*2N492*2N493*2N494*
*A PN Device
?-,....
2<2X140
AUDIOPNP
2N432N43A2N442N44A
2N5242N5252N5262N527
COMPUTERPNP
2N1232N3942N3952N3962N397
2N4502N518
COMPUTERNPN
2N782N167
2N6342N6352N636
TETRODE NPN 3N363N37
F-ZW
2Z74I-reWE"ZW
2nZ<2frLLI
0
IF NPN
2N168A2N1692N169A2N292
2N293
AUDIOPNP
2N1862N186A2N1872N187A2N1882N188A2N1892N1902N1912N1922N2412N241A2N265
2N3192N3202N3212N3222N3232N3242N508
11S
TRANSISTOR SPECIFICATIONS
GENERAL ELECTRICTRANSISTOR SPECIFICATIONS
2N43Outline Drawing No. 1
The General Electric Type 2N43 Germanium Alloy Junc-tion Transistor Triode is a PNP unit particularly recom-mended for high gain, low power applications. A hermeticenclosure is provided by use of glass -to -metal seals andwelded seams.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: 125°C)
VoltagesCollector to BaseCollector to EmitterEmitter to Base
Collector Current
Total Transistor Dissipation
TemperatureStorageOperating Junction
VcaVCEVER
IC
PM
TSTGTr
-45 volts-30 volts-5 volts
-300 ma
240 mw
Max. +100 °C Min. -65 °CMax. 85 °C
ELECTRICAL CHAR4CTERISTICS: (25°C)Small Signal Characteristics MIN. MAX.
DESIGNCENTER
Woo or VCE = -5 volts, It; = I ma;f = 270 cps unless otherwise specified)
Common base output admittance( input A -C open circuited) hob .1 1.5 .8 µmhos
Forward current transfer ratio( output A -C short circuited) h ro 30 66 42
Common base input impedance( output A -C short circuited) h 1 o 25 35 29 ohms
Common base reverse voltage transferratio ( input A -C open circuited) hro 1 15 5 X 10-4
Common base output capacity ( inputA -C open circuited f = 1 mc ) Cob 20 60 40 Aid
Noise Figure ( f = 1 ICc; BW = 1 cycle) NF 20 6 dbFrequency cutoff ( Common Base) fob .5 3.5 1.3 me
D -C CharacteristicsCollector cutoff current ( VCBO = -45v) Ico -16 -8 µampsEmitter cutoff current (Vim = -5v) IE0 -10 -4 µampsBase input voltage, common emitter
( VcE = -1 volt; Ic = -20 ma) VBE -.23 voltsCommon emitter static forward current
transfer ratio ( VcE = -1 volt;Ic = -20 ma) hFE 34 65 53
Common emitter static forward currenttransfer ratio ( VcE = -1 volt;Ic = -100 ma) hoc 30 48
Collector to emitter voltage ( 10 K ohmsresistor base to emitter; Ic = -0.6 ma) VCER -30 volts
Punch -through voltage VI'T -30 volts
Thermal CharacteristicsJunction temperature rise/unit collector
or emitter dissipation (in free air) 0.25 °C/mwJunction temperature rise/unit collector
or emitter dissipation ( infinite heat sink) 0.11 °C /mw
116
TRANSISTOR SPECIFICATIONS
The 2N43A is a commercial version of the military type2N43A per MIL -T-19500, and is tested to the same elec-trical, mechanical and degradation tests.
The General Electric Type 2N44 Germanium Alloy Junc-tion Transistor Triode is a PNP unit particularly recom-mended for medium gain, low power applications. A her-metic enclosure is provided by use of glass -to -metal sealsand welded seams.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base VcsCollector to Emitter VCEEmitter to Base VEBCollector Current IcPowerTotal Transistor Dissipation PM
240 mwTemperatureStorage TST0 Max. +100 °C Min. -65 °COperating Junction
T.). Max. + 85 °C
2N43AOutline Drawing No. 1
2N44Outline Drawing No. 1
ELECTRICAL CHARACTERISTICS: (25°C)Small Signal Characteristics
(Vol or VCE = -5 volts, In = 1 ma;f = 270 cps unless otherwise specified)
Common base output admittance
DESIGNMIN. MAX. CENTER
( input A -C open circuited) hob .1Forward current transfer ratio( output A -C short circuited) hr.Common base input impedance( output A -C short circuited) bib 27Common base reverse voltage transferratio (input A -C open circuited) hrb 1.0Common base output capacity (inputA -C open circuited; f = 1 mc ) Cob 20Noise Figure ( f = 1 Kc; BW = 1 cycle) NFFrequency cutoff ( Common Base) fob .5
D -C CharacteristicsCollector cutoff current ( Vcso = -45v) IcoEmitter cutoff current ( VEso = -5v) IBCBase input voltage, common emitter VBECommon emitter static forward current
transfer ratio ( VcE = -1 volt;Ic = -20 ma) hFE 18Common emitter static forward currenttransfer ratio ( VcE = -1 volt;Ic = -100 ma) hFE 13Collector to emitter voltage (10 K ohmsresistor base to emitter; Ic = -0.6 ma) VCER -30Punch -through voltage VET -30
Thermal CharacteristicsJunction temperature rise/unit collector
or emitter dissipation ( in free air )Junction temperature rise/unit collector
or emitter dissipation ( infinite heat sink)
The 2N44A is a commercial version of the military type2N44A per M1L-T-19500, and is tested to the same elec-trical, mechanical and degradation tests.
-45 volts-30 volts
-5 volts-300 ma
1.5 .9 gmhos
25
38 31 ohms13 4 X 10-460 40 µµ115 6 db
3.0 1.0 me
-16 -8 /tamps-10 -4 µamps- .25 volts
43 31
25
voltsvolts
0.25 °C/mw0.11 °C/mw
2N44AOutline Drawing No. 1
117
TRANSISTOR SPECIFICATIONS
2N78The General Electric 2N78 is a grown junction NPN highfrequency transistor intended for high gain RF and IFamplifier service and general purpose applications. The
Outline Drawing No. 3 G.E. rate -growing process used in the manufacture of the2N78 provides the uniform and stable characteristics re-
quired for military and industrial service.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)Collector to Emitter Voltage (base open), VCE0Collector to Base Voltage (emitter open), Wm,Collector Current, IcEmitter Current, IECollector Dissipation*, PCB(Storage Temperature, TSTG
ELECTRICAL CHARACTERISTICS: (25°C)
15 volts15 volts20 ma
-20 ma65 mw85 °C
Low Frequency Characteristics (Common Base) DESIGN LIMITS
WEE = 5 V, IE = -1 ma, f = 270 cps) CENTER MIN. MAX.
Input Impedance ( output short circuit), hib 55 ohmsVoltage Feedback Ratio (input short circuit), hrb 2 .8 10 x 10-4Current Amplification ( output short circuit ), hib -.983DC Base Current Gain (In = 20 µa; VCE = 1 V) h113 70 45 135Output Admittance (input open circuit ), hob .2 µmhosNoise Figure ( Vcii = 1.5 V; IE = -0.5 ma; f = 1 KC ), NF 12 db
High Frequency Characteristics (Common Base)(VcE = 5 V, IE = -1 ma)
Alpha Cutoff Frequency, fob 9 5 mcOutput Capacity (f = 2 mc), Cob 3 6 AtiLf
Voltage Feedback Ratio (f = 1 mc), hrb 12 X 10-3Power Gain in Typical IF Test Circuit, Ge 27 db
Cutoff Characteristics 5 itaCollector Cutoff Current ( Vcit = 15 V) IcoICollector Cutoff Current (Von = 5 V), co .7 µa
*Derate 1.1 mw/°C increase in ambient temperature.
2N107Outline Drawing No. 1
The General Electric type 2N107 is an alloy junctionPNP transistor particularly suggested for students, ex-perimenters, hobbyists, and hams. It is available only fromfranchised General Electric distributors. The 2N107 ishermetically sealed and will dissipate 50 milliwatts in25°C free air.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)Collector Voltage (referred to base), Von -12 voltsCollector Current, Ic -10 maEmitter Current, IE 10 maJunction Temperature, T.i 60 °C
ELECTRICAL CHARACTERISTICS: (25°C)
(Common Base, Ti = 30°C, f = 270 cpsVcs = -5v, IE = 1 ma)
Collector Voltage, Vcit -5.0 volts1.0 ma
Output Admittance (input open circuit ), hob 1.0 µmhosCurrent Amplification ( output short circuit), hrb -.95Input Impedance ( output short circuit), bib 32 ohmsVoltage Feedback Ratio (input open circuit), hrb 3 X 10-4Collector Cutoff Current, Ico 10 µaOutput Capacitance, Cob 40 µµfFrequency Cutoff, fob 0.6 mc
Common Emitter, (Veu = -Iv, In = 1 ma)Base Current Gain, hr. 20
Emitter Current, IE
118
TRANSISTOR SPECIFICATIONS
The General Electric type 2N123 is a PNP alloy junctionhigh frequency switching transistor intended for military,industrial and data processing applications where high re-liability at the maximum ratings is of prime importance.
SPECIFICATIONS
2N123Outline Drawing No. 8
ABSOLUTE MAXIMUM RATINGS: (25°C)Collector to Emitter Voltage ( base open), VCEOCollector to Base Voltage (emitter open), VcaoEmitter to Base Voltage (collector open), VnaoCollector Current, IcPeak Collector Current (10 As max. ), Icm
-15 volts-20 volts-10 volts
-125 ma-500 maEmitter Current, IE
125 maCollector Dissipation*, PCAV 100 mwPeak Collector Dissipation (10 As max. )**, Pcm 500 mwTotal Transistor Dissipation***, PAV 150 mwStorage Temperature, TSTG -55 to 85 °CELECTRICAL CHARACTERISTICS: (25°C) DESIGN LIMITSSwitching Characteristics (Common Emitter) CENTER MIN. MAX.D.C. Base Current Gain (Yen - 1 v; Ic = 10 ma) liFn 50 30 150Saturation Voltage ( Is = .5 ma; Ic = 10 ma), Vcro .15 0.2 voltsPulse Response Time ( Ic = 10 ma )
Delay & Rise Time, to + tr .9 µsecStorage Time, t, .5 µsecFall Time, tt .5 µseeCutoff CharacteristicsCollector Cutoff Current (Ws = -20v), Ico 2 6 µaEmitter Cutoff Current (Vna = -10v ), Inc: 2 6 µaCollector to Emitter (Base open, re = -0.6 ma), Vcz 25 15 voltsHigh Frequency Characteristics (Common Bose)
(VCB = -5v; In = 1 ma)Alpha Cutoff Frequency, fan 8 5 mcCollector Capacitance (f = 1 mc), Cob 15 µµfVoltage Feedback Ratio (f = 1 mc), hrb 8 X 10"Base Spreading Resistance, en 80 ohmsLow Frequency Characteristics (Common Base)
(Vcs = -5v; IE = 1 ma; f = 270 cps)Input Impedance, hib 28 ohmsVoltage Feedback Ratio, hrb 8 X 10-3Current Amplification, hcb -.980 -.970Output Admittance, ho, .9 µmhos
Derate for increase in ambient temperature:*1.67 **8 ***2.5mw/°C, mw/°C, mw/°C
The General Electric types 2N135, 2N136 and2N137 are PNP alloy junction germanium tran-sistors intended for RF and IF service in broadcastreceivers. Special control of manufacturing proc-esses provides a narrow spread of characteristics,resulting in uniformly high power gain at radiofrequencies. These types are obsolete and avail-able for replacement only.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)Collector Voltage:
Common Base (emitter open), VowCommon Emitter ( RBE = 100 ohms) , VCERCommon Emitter (Ran = 1 megohm), VCER
Collector Current, IcEmitter Current, InCollector Dissipation, PCMStorage Temperature, TSIT.
ELECTRICAL CHARACTERISTICS: Design Center Values(Common Base, 25°C, VCB = 5v,'IE = 1 ma)
Voltage Feed back Ratio (input open circuit,f = 1 inC), 11..6
Output Capacitance (f = 1 mc), Cob
2N135, 2N136,2N137
Outline Drawing No. 8
2N135 2N136 2N137
-20 -20 -10 volts-20 -20 -10 volts-12 -12 - 6 volts-50 -50 -50 ma50 50 50 ma
100 100 100 mw85 85 85 °C
7 7 7 X10-314 14 14 AAf
119
TRANSISTOR SPECIFICATIONS
2N167Outline Drawing No. 3
The General Electric type 2N167 is an NPN high fre-
quency, high speed switching transistor intended for in-dustrial and military applications where reliability is of
prime importance.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)Collector to Emitter Voltage ( base open), VCEOCollector to Base Voltage ( emitter open), VcitoEmitter to Base Voltage ( collector open), VEBO
30 volts30 volts
5 volts
Collector Current, Ic75 ma
Emitter Current, Ix-75 ma
Collector Dissipation*, Pcm65 mw
Transistor Dissipation**, PM75 mw
Storage Temperature, Tsxci85 °C
ELECTRICAL CHARACTERISTICS: (25°C) DESIGN LIMITS
Switching Characteristics (Common Emitter) CENTER MIN. MAX.
D -C Base Current Gain (Vcm = 1 v; Ic = 8 ma), hFE 30 17
Saturation Voltage (Im = .8 ma; Ic = 8 ma), Vca 0.35 volts
Pulse Response Time (Ic = 8 ma )
Delay & Rise Time, td + tr.5 Asec
Storage Time, t,.3 µsec
Fall Time, tr.2 µsec
Cutoff CharacteristicsCollector Cutoff Current ( Wm = 15 v ), Ico .7 1.5 µa
Emitter Cutoff Current ( Vita = 5 v ), Imo .6 5 Aa
Collector to Emitter Voltage (Base open,Ic = 0.3 ma), Vca
30 volts
High Frequency Characteristics (Common Base)
(Vca = 5v; I E = I ma)Alpha Cutoff Frequency, fan
9.0 5.0 mc
Collector Capacity ( f = 1 mc), Cob 2.5 8 µµf
Voltage Feedback Ratio ( f = 1 mc), hrb 7.3 X 10-3
Low Frequency Characteristics (Common Base)(Vcx = 5v; IE = -I ma; f = 270 cps)
Input Impedance, hit,55 ohms
Voltage Feedback Ratio, hrb1.5 X 10-4
Base Current Amplification, lir b-.985 -.952
Output Admittance, hob.2 µmhos
*Derate 1.1 mw/°C increase in ambient temperature.**Derate 1.25 mw/°C increase in ambient temperature.
2N168AOutline Drawing No. 3
The 2N168A is a rate grown NPN germanium transistorintended for mixer/oscillator and IF amplifier applicationsin radio receivers. Special manufacturing techniques pro-vide a low value and a narrow spread in collector capacityso that neutralization in many circuits is not required. The
2N168A has a frequency cutoff control to provide proper operation as an oscillator or
autodyne mixer. For IF amplifier service the range in power gain in controlled to 3 db.
CONVERTER TRANSISTOR SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltageCollector to Emitter ( base open ), VCEO
15 volts
Collector to Base ( emitter open), Vcao15 volts
CurrentCollector, Ic
20 ma
PowerCollector Dissipation at 25°C*, Pent65 mw
Temperature RangeOperating and Storage, TA, TsTc
-55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
Converter Service
Maximum RatingsCollector Supply Voltage, Vcc
12 volts
MA
TRANSISTOR SPECIFICATIONS
Design CenterCharacteristicsInput Impedance (IE = 1 ma; VMS = 5v; f = 455 KC), Zi 400 ohmsOutput Impedance (lit = 1 ma; VCE = 5v; f = 455 KC), Z. 12 K ohmsVoltage Feedback Ratio (IE = 1 ma; Vce = 5v; f = 1 me), hrb 5 x 10-3Collector to Base Capacitance (Ix = 1 ma; VCB = 5v; f = 1 mc), Cob 2.4 AOFrequency Cutoff (IE = 1 ma; Vce = 5v), foe 8 meMin. Frequency Cutoff (lit = 1 ma; Vol = 5v), fob 5 mc minBase Current Gain ( Is = 20 µa; Von = lv), hire 40Minimum Base Current Gain, hFE 23Maximum Base Current Gain, hFE 135Conversion Gain, CG. 25 dbIF Amplifier PerformanceCollector Supply Voltage, Vcc 5 voltsCollector Current, Ic 1 maInput Frequency, f 455 KCAvailable Power Gain, Ge 39 dbMinimum Power Gain in typical IF circuit, G. 28 db minPower Gain Range of Variation in typical IF circuit, G. 3 dbCutoff CharacteristicsCollector Cutoff Current (Vol = 5v ), Ico .5 µaCollector Cutoff Current (Vca = 15v ), Ico 5 µa max
*Derate 1.1 mw/°C increase in ambient temperature over 25°C.
The 2N169A and 2N169 are rate grown NPNgermanium transistors intended for use as IFamplifiers in broadcast radio receivers. The col-lector capacity is controlled to a low value sothat neutralization in most circuits is not required.The power gain at 455 KC is maintained at a 3 db spread for the 2N169A. The 2N169Ais a special high voltage unit intended for second IF amplifier service where largevoltage signals are encountered. The 2N169 is also intended for low gain IF amplifierand power detector applications.
2N169A, 2N169
IF TRANSISTOR SPECIFICATIONS
Outline Drawing No. 3
ABSOLUTE MAXIMUM RATINGS: (25°C)Voltage
2N169A 2N169
Collector to Emitter (base open), VCE0 25 15 voltsCollector to Base ( emitter open), VCBO 25 15 voltsCurrentCollector, Ic 20 20 maPowerCollector Dissipation*, Pcm 65 65 mwTemperature RangeOperating and Storage, Tx, TSTC -55 to 85 -55 to 85 °CTYPICAL ELECTRICAL CHARACTERISTICS: 125°C)IF Amplifier ServiceMaximum RatingsCollector Supply Voltage, Vcc 12 12 voltsDesign Center Characteristics
(IE = -1 ma; VeE = 5v; f = 455 KC except as noted)Input Impedance, Zi 700 700 ohmsOutput Impedance, Z. 7 7 K ohmsVoltage Feedback Ratio (Vice = 5v; f = 1 mc), hrb 10 10 x10-8Collector to Base Capacitance (VCB = 5v; f =1 mc), Cob 2.4 2.4 µAdFrequency Cutoff (Yea = 5v), fob 9 9 mcBase Current Gain (Is = 20 µa; VCE = lv), hEE 72 72Minimum Base Current Gain, hee 36 36Maximum Base Current Gain, bee 220 220IF Amplifier PerformanceCollector Supply Voltage, Vcc 5 5 voltsCollector Current, Ic 1 1 maInput Frequency, f 455 455 KCAvailable Power Gain, G. 36 36 dbMinimum Power Gain in typical IF circuit, G. 24 24 db minPower Gain Range of Variation in typical IF circuit, Ge 3 3 dbCutoff CharacteristicsCollector Cutoff Current (Vat = 5v), Ico .5 .5 µaCollector Cutoff Current (We = 15v), Ico 5 5 µa max
*Derate 1.1 mw/°C increase in ambient temperature.
121
TRANSISTOR SPECIFICATIONS
2N170Outline Drawing No. 3
The 2N170 is a rate grown NPN germanium transistor in-tended for use in high frequency circuits by amateurs,hobbyists, and experimenters. The 2N170 can be used inany of the many published circuits where a low voltage,high frequency transistor is necessary such as for re-
generative receivers, high frequency oscillators, etc. If you desire to use the 2N170NPN transistor in a circuit showing a PNP type transistor, it is only necessary tochange the connections to the power supply.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltageCollector to Emitter, Vca
6 volts
CurrentCollector, Ic
20 ma
PowerCollector Dissipation*, Pem
25 mw
Temperature RangeOperating and Storage, TA, TSTG
-55 to 50 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
High Frequency Characteristics(In = 1 ma; Vex = 5v; f = 455 KC except as noted)
Input Impedance (Common Emitter), Zr800 ohms
Output Impedance (Common Emitter), Zo15 K ohms
Collector to Base Capacitance (f = 1 Mc), Cob 2.4 /4/if
Frequency Cutoff ( Vca = 5V), fob4 me
Power Gain (Common Emitter), Go22 db
Low Frequency Characteristics( la = 1 ma; VCE = 5v; f = 270 cps)
Input Impedance, hlb55 ohms
Voltage Feedback Ratio, hob4 X 10-*
Current Gain, ho,.95
Output Admittance, hob.5 X 10-6 iimhos
Common Emitter Base Current Gain, hoe20
Cutoff CharacteristicsCollector Cutoff Current (Vca = 5v), Ico
*Derate 1 mw/°C increase in ambient temperature.
2N186, 2N187,2N188
Outline Drawing No. 1
5 PA max
The 2N186, 2N187, and 2N188 are mediumpower PNP transistors, intended for use as audiooutput amplifiers in radio receivers and qualitysound systems. By unique process controls thecurrent gain is maintained at an essentially con-stant value for collector currents from 1 ma to200 ma. This linearity of current gain provides
low distortion in Class B circuits, and permits use of any two transistors from a par-ticular type without matching.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base ( emitter open), Vox.
-25 voltsCollector to Emitter ( Raa = 10K ohm), Vcaa
-25 voltsEmitter to Base ( collector open), VEBO
- 5 volts
Collector Current, Ic-200 ma
PowerCollector Dissipation*, Pcm
100 mw
TemperatureOperating Range, TA
-55 to 60 °CStorage Range, Taro
-55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: 125°C)
Class B Audio Amplifier Operation(Values for two transistors. Note that matchingis not required to hold distortion to less than5% for any two transistors from a type)
122
Maximum Class B Ratings (Common Emitter)
TRANSISTOR SPECIFICATIONS
2N186 2N)87 2N188Collector Supply Voltage, Vcc -12 -12 -12 voltsPower Output (Distortion less than 5%), P. 300 300 300 mwDesign Center CharacteristicsInput Impedance large signal base to base
(ATE = 100 ma), hie 1200 2000 2600 ohmsBase Current Gain ( VcE = -1 v; Ic = 100 ma ), Inn,: 24 36 54Collector Capacity (Von = -5 v; IE = 1 ma;f = 1 mc), Cob 40 40 40 µµfFrequency Cutoff (Von = -5 v; Ix = 1 ma), fan .8 1.0 1.2 mcClass B Circuit Performance (Common Emitter)Collector Voltage, Vcc -12 -12 -12 voltsMinimum Power Gain at 100 mw power output, G. 28 30 32 min dbCutoff CharacteristicsMaximum Collector Cutoff Current (Vce =-. -25 v), Ico 16 16 16 max µaMaximum Emitter Cutoff Current (VEB = -5 v), 1E0 10 10 10 max µa
*Derate 3 mw/°C increase in ambient temperature within range 25°C to 60°C.
The 2N186A, 2N187A, and 2N188A are mediumpower PNP transistors intended for use as audiooutput amplifiers in radio receivers and qualitysound systems. By unique process controls thecurrent gain is maintained at an essentially con-stant value for collector currents from 1 ma to Outline Drawing No. 1200 ma. This linearity of current gain provideslow distortion in both Class A and Class B circuits, and permits the use of any twotransistors from a particular type without matching in Class B Circuits.
2N186A, 2N187A2N188A
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base (emitter open), Vow) -25 voltsCollector to Emitter (Rion = 10K ohm), VCER -25 voltsEmitter to Base (collector open), VEBO - 5 voltsCollector Current, Ic -200 maPowerCollector Dissipation*, Pesi 200 mwTemperatureOperating Range, T.&
-55 to 75 °CStorage Range, TSTG-55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)Class B Audio Amplifier Operation 2N186A 2N187A 2N188A(Values for two transistors. Note that matching
is not required to hold distortion to less than5% for any two transistors from a type)
Maximum Class B Ratings (Common Emitter)Collector Supply Voltage, VccPower Output (Distortion less than 5%), P.Design Center CharacteristicsInput Impedance large signal base to base
(pIE = 100 ma), hieBase Current Gain (VcE = -1 v Ic = 100 ma), hFECollector Capacity (VcB = 5 v; Tin = 1 ma;f = 1 m.8, CobFrequency Cutoff (Vas= -5 v; Ix = 1 ma), fobClass B Circuit Performance (Common Emitter)Collector Voltage, VccMinimum Power Gain at 100 mw power output, G.Class A Audio Amplifier Operation (Common Emitter)
(Vcc = 12v; IE = 10 MO)Power Gain at 50 mw power output, G.Cutoff CharacteristicsMaximum Collector Cutoff Current ( Vert = -25 v ), IcoMaximum Emitter Cutoff Current (VEB = -5 v), Ino
.Derate 4 mw/°C increase in ambient temperature within range 25°C to 60°C.
-12 -12 -12 volts750 750 750 mw
1200 2000 2600 ohms24 36 54
40 40 40 µµf.8 1.0 1.2 mc
-12 -12 -12 volts28 30 32 min db
30 32 34 db
16 16 16 max µa10 10 10 max µa
123
TRANSISTOR SPECIFICATIONS
2N189, 2N190,2N191, 2N192
Outline Drawing No. 1
The 2N189, 2N190, 2N191, and 2N192 are alloyjunction PNP transistors intended for driverservice in transistorized audio amplifiers. By con-trol of transistor characteristics during manufac-ture, a specific power gain is provided for eachtype. Special processing techniques and the useof hermetic seals provides stability of these char-acteristics throughout life.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)
VoltageCollector to Emitter (REB = 10K ohm), VCER
-25 volts
Collector Current, Ic-50 ma
PowerCollector Dissipation (25°C)*, Pcm
75 mw
TemperatureOperating Range, TA
-55 to 60 °C
Storage Range, TSTG-55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
Audio Driver Class A Operation2N189 2N190 2N191 2N192
(Values for one transistor driving a transformercoupled output stage)
Maximum Class A Ratings (Common Emitter)
Collector Supply Voltage, Vcc-12 -12 -12 -12 volts
Design Center CharacteristicsInput Impedance base to emitter (Ix = 1 ma), hi. 1000 1400 1800 2200 ohms
Base Current Gain (Vcs = -5 v; IE = 1 ma), hr. 24 36 54 75
Collector Capacity (Ws = -5 v; Ix = 1 ma), Con 40 40 40 40 AO
Frequency Cutoff (Vcs = -5 v; Is = 1 ma), faro .8 1.0 1.2 1.5 meNoise Figure (Vcs = -5 v; Is = 1 ma;
f = 1 KC; BW = 1 cycle), NF 15 15 15 15 db
Audio Circuit Performance (Common Emitter)Collector Supply Voltage, Vcc
-12 -12 -12 -12 voltsEmitter Current, IE
1 1 1 1 ma
Minimum Power Gain at 1 mw power output, G. 37 39 41 43 min db
Small Signal Characteristics (Common Base)
Wen = -5v; 1E = 1 mo; f = 270 cps)Input Impedance, hero
29 29 29 29 ohms
Voltage Feedback Ratio, hrro4 4 4 4 X10-4
Current Amplification, Ian,-.96 -.973 -.98 -.987
Output Admittance, hos1.0 .8 .6 .5 Amhos
Cutoff CharacteristicsMaximum Collector Cutoff Current (Vcs = -25 v), Ico 16 16 16 16 max µa
.berate 2 mw/°C increase in ambient temperature within range 258C to 80°C.
2N241, 2N241A
Outline Drawing No. 1
The 2N241, and 2N241A are medium power PNPtransistors intended for use as audio outputamplifiers in radio receivers and quality soundsystems. By special process controls the currentgain is maintained at an essentially constant valuefor collector currents from 1 ma to 200 ma. Thislinearity of current gain insures low distortion in
both Class A and Class B circuits, and permits the use of any two transistors from
a particular type without matching in Class B Circuits.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)
Voltages2N241 2N241A
Collector to Base ( emitter open) VCR° -25 -25 volts
Collector to Emitter (REB = 10K ohm) VIER -25 -25 volts
Emitter to Base (collector open) VEBO - 5 - 5 volts
Collector CurrentIc -200 -200 ma
PowerCollector Dissipation Pct 100* 200** mw
TemperatureOperating Range TA -55 to 60 -55 to 75 °C
Storage Range TRW; -55 to 85 -55 to 85 °C
124
TRANSISTOR SPECIFICATIONS
TYPICAL ELECTRICAL CHARACTERISTICS: 125°C)Class B Audio Amplifier Operation
(Values for two transistors. Note that matchingis not required to hold distortion to less than5% for any two transistors from a type)
Maximum Class B Ratings (Common Emitter)2N241 2N241ACollector Supply Voltage Vcc -12 -12 voltsPower Output (Distortion less than 5%) P. 300 750 mwDesign Center Characteristics
Input Impedance large signal base to base(LIE = 100 ma) hi 4000 4000 ohmsBase Current Gain ( VcE = -1v; Ic = 100 ma) hEl 73 73Collector Capacity (Vca = -5v; Ix = 1 ma; f = 1 mc) Cob 40 40 µµfFrequency Cut off ( VcE = -5v; Ix = 1 ma) in, 1.3 1.3 mcClass B Circuit Performance (Common Emitter)
Collector Voltage Vcc -12 -12 voltsMinimum Power Gain at 100 mw power output G. 34 34 min dbClass A Audio Amplifier Operation (Common Emitter)(Vcc = -12v; 1E = 10 ma)
Power Gain at 50 mw power output G. 35 35 dbCutoff CharacteristicsMaximum Collector Cutoff Current (Vcis = -25v) Ico 16 16 max µaMaximum Emitter Cutoff Current (Vim = -5v) 1E0 10 10 max µa
.Derate 3 mw/°C increase in ambient temperature within range 25°C to 60°C.""Derate 4 mw/°C increase in ambient temperature within range 25°C to 75°C.
The 2N265 is an alloy junction PNP transistor intendedfor driver service in transistorized audio amplifiers. Bycontrol of transistor characteristics during manufacture, aspecific power gain is provided for each type. Specialprocessing techniques and the use of hermetic seals pro-vides stability of these characteristics throughout life.
2N265Outline Drawing No. 1
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: 125°C)VoltageCollector to Emitter (REB = 10K ohm), VCER -25 voltsCollector Current, Ic -50 maPowerCollector Dissipation (.25°C)*, Pca
75 mwTemperatureOperating Range, TA
-55 to 60 °CStorage Range, Tama-55 to 85 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)Audio Driver Class A Operation
(Values for one transistor driving a transformer coupled output stage)Maximum Class A Ratings (Common Emitter)Collector Supply Voltage, Vcc -12 voltsDesign Center CharacteristicsInput Impedance base to emitter (IE = 1 ma), hi. 4000 ohmsBase Current Gain (VcE = -5 v; IE = 1 ma), hf. 110Collector Capacity (Vas = -5 v; lx = 1 ma), Cob 40 AOFrequency Cutoff (Vca = -5 v; IE = 1 ma), Lb 1.5 mcNoise Figure (Vcri = -5 v; IE = I ma; f = 1 KC; BW = 1 cycle), NF 15 dbAudio Circuit Performance (Common Emitter)Collector Supply Voltage, Vcc -12 voltsEmitter Current, IE
1 maMinimum Power Gain at 1 mw power output, G.45 min db
Small Signal Characteristics (Common Base)(Vcs = -5v; is = 1 ma; f = 270 cps)
Input Impedance, hib29 ohmsVoltage Feedback Ratio, hrb
4 X 10-4Current Amplification, hro-.991Output Admittance, hob
.5 µmhosCutoff CharacteristicsMaximum Collector Cutoff Current 1 Vca = -25 v), Ico 16 max µa
*Derate 2 mw/°C increase in ambient temperature within range 25°C to 60°C.
125
TRANSISTOR SPECIFICATIONS
2N292, 2N293Outline Drawing No. 3
Types 2N292 and 2N293 are rate grown NPNgermanium transistors intended for amplifier ap-plications in radio receivers. Special manufactur-ing techniques provide a low value and a narrowspread in collector capacity so that neutralization
in many circuits is not required. The type 2N293 is intended for receiver circuitswhere high gain is needed. In IF amplifier service the range in power gain is controlledto 3 db.
IF TRANSISTOR SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C) 2N292 2N293VoltageCollector to Emitter (base open), VCEO 15 15 voltsCollector to Base ( emitter open), Vcao 15 15 volts
CurrentCollector, Ic 20 20 ma
PowerCollector Dissipation*, Pcm 65 65 mw
Temperature RangeOperating and Storage, TA, TsTo -55 to 85 -55 to 85 °C
ELECTRICAL CHARACTERISTICS: (25°C)IF Amplifier ServiceMwsimum RatingsCollector Supply Voltage, Vcc 12 12 volts
Design Center CharacteristicsInput Impedance ( IE = 1 ma; Vest = 5v; f = 455 KC ), Z; 350 350 ohmsOutput Impedance ( IE = 1 ma; Vex = 5v; f = 455 KC ), Z. 16 18 K ohmsVoltage Feedback Ratio ( IE = 1 ma; Vca = 5v; f = mc), ho, 10 5 X 10-sCollector to Base Capacitance (IE = 1 ma;
Vca = 5v; f = 1 mc), Cob 2.4 2.4 AOFrequency Cutoff (IE = 1 ma; Vca = 5v), fob 6 7 mcBase Current Gain ( Ir; = 20 /la; VCE = 1v), hFE 25 25Min. Base Current Gain, hrE 6 6Max. Base Current Gain, hEE 44 55
IF Amplifier PerformanceCollector Supply Voltage, Vcc 5 5 voltsCollector Current, Ic 1 1 maInput Frequency, f 455 455 KCAvailable Power Gain, G. 36 39 dbMin. Power Gain in Typical IF Test Circuit, G. 24 28 db minPower Gain Range of Variation in Typical IF Circuit 3 3 db
Cutoff CharacteristicsCollector Cutoff Current (Vca = 5v), Ico .5 .5 µaCollector Cutoff Current (Vca = 15v ), Ico 5 5 µa max
*Derate 1.1 mw/°C increase in ambient temperature over 25°C.**All values are typical unless indicated as a min or max.
2N319, 2N320,2N321
Outline Drawing No. 2
The 2N319, 2N320, and 2N321 are miniaturizedversions of the 2N186A series of G -E transistors.Like the prototype versions, the 2N319, 2N320,and 2N321 are medium power PNP transistorsintended for use as audio output amplifiers inradio receivers and quality sound systems. Byunique process controls the current gain is main-
tained at an essentially constant value for collector currents from 1 ma to 200 ma.This linearity of current gain provides low distortion in both Class A and Class B cir-cuits, and permits the use of any two transistors from a particular type without match-ing in Class B Circuits.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Emitter VCE -20 voltsCollector to Base Vca -30 voltsEmitter to Base VEB - 3 voltsCollector Current Ic -200 ma
19.11
TRANSISTOR SPECIFICATIONS
PowerCollector Dissipation PCMTemperatureOperating and Storage Range TA-TsiGTYPICAL ELECTRICAL CHARACTERISTICS: (25°C)D.C. CharacteristicsBase Current Gain ( Ic = -20 ma;
Von = -1v) hFEBase Current Gain ( Ic = -100 ma;VCE = -1v) hFECollector to Emitter Voltage (REB = 10K;Ic = .6 ma) VIERCollector Cutoff Current ( VEE2 -25v) IcoMaximum Collector Cutoff Current Ico( Wu = -25v)
Emitter Cutoff Current (VEE = 3v) IEoSmall Signal Characteristics (Common Base)
(Von = -5v; Is = 1 ma; f = 270 cps)Frequency Cutoff fanCollector Capacity ( f = 1 me) CobNoise Figure NFInput Impedance hibThermal CharacteristicsThermal ResistanceWithout Heat Sink (Junction to Air)With Clip On Heat Sink (Junction to Case)Performance Data (Common Emitter)Class A Power Gain ( Vcc -= -9v) G.Power Output P.Class B Power Gain (Vcc = -9v) G.Power Output P.
The 2N322, 2N323, 2N324 are alloy junctionPNP transistors intended for driver service inaudio amplifiers. They are miniaturized versionsof the 2N190 series of G.E. transistors. By con-trol of transistor characteristics during manu-facture, a specific power gain is provided foreach type. Special processing techniques and theuse of hermetic seals provides stability of these characteristics throughout life.
2N319
33
30
2N320
48
44
200 mw
-65 to 85 °C
2N321
80
70-20 -20 -20 volts8 8 8 µa16 16 16 µa
2 2 2 µa
2.0 2.5 3.1 mc25 25 25 !AO6 6 6 db30 30 30 ohms
.27 .27 .27 °C/mw.2 .2 .2 °C/mw
30 31 32 db50 50 50 mw27 29 31 db100 100 100 mw
2N322, 2N323,2N324
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Emitter VCECollector to Base VcBCollector Current IcPowerCollector Dissipation Pelf 140 mwTemperatureOperating and Storage Range TA-TSTG -65 to + 65 °C
Outline Drawing No. 2
-16 volts-16 volts
-100 ma
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)D.C. Characteristics 2N322 2N323 2N324Base Current Gain ( Ic = -20 ma; VCE= -1V ) hFE 48 80 95Collector to Emitter Voltage
( Rim = 10K Ic = -.6 ma) VIER 16 16 16 voltsCollector Cutoff Current ( VcE = -16v) Ico 10 10 10 itaMax. Collector Cutoff Current ( WE = -16v)Ico 16 16 16 µaSmall Signal CharacteristicsFrequency Cutoff (Ws = -5v; IE = 1 ma) fob 2.5 3.1 3.4 mcCollector Capacity (Von = -5v; In = I ma) Cob 25 25 25 µµfNoise Figure ( VcE = -5v; Its = 1 ma) NF 6 6 6 dbInput Impedance ( VcE =. -5v; Its = 1 ma) hi. 2200 2600 3300 ohmsCurrent Gain ( Vets = -5v; IE = 1 ma) hf. 50 70 84Thermal CharacteristicsThermal Resistance Junction to Air .27 .27 .27 °C/mwPerformance Data Common EmitterPower Gain Driver (Vcc = 9v) G. 39 41 43 dbPower Output P. 1 1 1 mw
127
TRANSISTOR SPECIFICATIONS
2N332Outline Drawing No. 4
The General Electric Type 2N332 is a silicon NPN triode
transistor intended for amplifier applications in the audio
and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All units
are subjected to a rigorous mechanical drop test to control mechanical reliability. This
transistor is hermetically sealed in a welded case. The case dimensions and lead con-
figuration conform to the JETEC TO -5 package and are suitable for insertion in
printed boards by automatic assembly equipment.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
VoltagesCollector to Base (Emitter Open) VCB0
45 volts
Emitter to Base (Collector Open) VElif1 volt
Collector Current Ic25 ma
PowerCollector Dissipation (25°C) Pc
150 mw
Collector Dissipation (100°C) Pc100 mw
Collector Dissipation (150°C) Pc50 mw
Temperatue RangeStorageOperating
ELECTRICAL CHARACTERISTICS: (25°C)
(Unless otherwise specified; Von = 5v;In = -I ma; f = I icc)
TSTGTA
-65 to 200 °C-55 to 175 °C
Small Signal CharacteristicsMIN. NOM. MAX.
Current Transfer Ratio hr. 9 15 20
Input Impedance bib 30 53 80 ohms
Reverse Voltage Transfer Ratio hrb .25 1.0 5.0 X 10-°
Output Admittance hob 0.0 .25 1.2 µmhos
Power Gain( VcE = 20v; IE = -2ma; f = lkc;Re = 1K ohms; RE = 20K ohms) G. 35 db
Noise FigureNF 28 db
High Frequency CharacteristicsFrequency Cutoff
(Von = 5v; Is = -lma) fob 15 me
Collector to Base Capacity(Von = 5v; Is; = -1ma; f = lmc) Cob
7 API
Power Gain (Common Emitter)(Von = 20v; Is = -2ma; f= 5mc) G. 17 db
D -C CharacteristicsCollector Breakdown Voltage
(law = 50µa; Is) = 0; TA = 25°C) BVcso 45 volts
Collector Cutoff Current(Von = 30v; Is = 0; TA = 25°C) km .02 2 µa
(Von = 5v; IE = 0; TA = 150°C) Icso50 µa
Collector Saturation Resistance(In = lma; Ic = 5ma) Rsc 80 200 ohms
Switching Characteristics
(hi = 0.4 ma; Ise = -0 4 ma;lc =_ 2.8 ma)
Delay Time td .75 µsec
Rise Time tr .5 µsec
Storage Time to .05 µsec
Fall Time tr .15 µsec
128
TRANSISTOR SPECIFICATIONS
The General Electric Type 2N333 is a silicon NPN triodetransistor intended for amplifier applications in the audioand radio frequency range and for general purpose switch-ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150hour 200°C cycled aging operation included in the manufacturing process. All unitsare subjected to a rigorous mechanical drop test to control mechanical reliability. Thistransistor is hermetically sealed in a welded case. The case dimensions and lead con-figuration conform to the JETEC TO -5 package and are suitable for insertion inprinted boards by automatic assembly equipment.
2N333
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base (Emitter Open)Emitter to Base ( Collector Open)
Collector Current
PowerCollector Dissipation (25°C )Collector Dissipation (100°C)Collector Dissipation (150°C)
Temperature RangeStorageOperating
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified; VCB = 5v;iE = -1 ma; f = lkc)
VCBOVEBO
Ic
PcPcPc
TSTGTA
Outline, Drawing No. 4
45 volts1 volt
25 ma
150 mw100 mw
50 mw
-65 to 200 °C-55 to 175 °C
Small Signal Characteristics MIN. NOM. MAX.Current Transfer Ratio hi. 18 30 41Input Impedance hi(' 30 53 80 ohmsReverse Voltage Transfer Ratio hrb .25 2.0 10.0 X 10-4Output Admittance hot 0.0 .2 1.2 /mhosPower Gain
(Von = 20v; In = -2ma; f = lkc;Ra M 1K ohms; RL = 20K ohms) G. 39 dbNoise Figure NF 25 db
High Frequency CharacteristicsFrequency Cutoff
(Von = 5V; IE = -lma) fab 17 IncCollector to Base Capacitylmc) Cob 7 AOPower Gain (Common Emitter)
(Von = 20v; In = -2ma; f= 5mc) G. 16 db
D -C Characteristics
Collector Breakdown Voltage(Imo = 50/1a; In = 0; TA = 25°C) BVcso 45 voltsCollector Cutoff Current(Van = 30v; IE = 0; TA = 25°C) Icao .02 2 An(Wit = 5v; In = 0; TA = 150°C) Imo 50 ILaCollector Saturation Resistance(In = lma; Ic = 5ma) Rsc 80 200 ohms
Switching Characteristics(In, = 0.4 ma; In, = -0 4 ma;Ic = 2.8 ma)
Delay Time td .7 itsecRise Time tr .4 AsecStorage Time t. .15 µsecFall Time tr .18 usec
129
TRANSISTOR SPECIFICATIONS
The General Electric Type 2N334 is a silicon NPN triode
2N334 I transistor intended for amplifier applications in the audio
Outline Drawing No. 4and radio frequency range and for general purpose switch-
ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All unitsare subjected to a rigorous mechanical drop test to control mechanical reliability. Thistransistor is hermetically sealed in a welded case. The case dimensions and lead con-figuration conform to the JETEC TO -5 package and are suitable for insertion inprinted boards by automatic assembly equipment.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base (Emitter Open) Vcno 45 volts
Emitter to Base (Collector Open) VE130 1 volt
Collector Current Ic 25 ma
PowerCollector Dissipation (25°C) Pc 150 mwCollector Dissipation (100°C) Pc 100 mwCollector Dissipation (150°C) Pc 50 mw
Temperature RangeStorage TSTG -65 to 200 °COperating TA -55 to 175 °C
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified; Vce = 5v;IE = -1 ma; f =. lIcc)
Small Signal Characteristics MIN. NOM. MAX.
Current Transfer Ratio hr. 18 39 90
Input Impedance !sib 30 53 80 ohms
Reverse Voltage Transfer Ratio hrb .5 3.5 10.0 x 10-4Output Admittance hob 0.0 .18 1.2 µmhos
Power Gain(Von = 20v; In = -2ma; f = lkc;Ito =- 1K ohms; RI. = 20K ohms) G. 40 db
Noise Figure NF 25 db
High Frequency CharacteristicsFrequency Cutoff
(Von = 5v; In = -lma) fan 8.0 20 me
Collector to Base Capacity(Vcn = 5v; In =--- -1ma; f = lmc) Cob 7 AiLf
Power Gain (Common Emitter)(Von = 20v; In = -2ma; f= 5mc) G. 15 db
D -C CharacteristicsCollector Breakdown Voltage
(MB° = 50µa; IE = 0; TA = 25°C) BVcso 45 volts
Collector Cutoff Current(Veil = 30v; In = 0; TA = 25°C) Icno .02 2 lia(Vcs = 5v; IE = 0; TA = 150°C) ICB0 50 tut
Collector Saturation Resistance(In = lma; Ic = 5ma) Rsc 80 200 ohms
Switching Characteristics= 0.4 ma; 1132 = -0 4 ma;
Ic = 2.8 ma)Delay Time to .65 µsec
Rise Time ir .4 µseeStorage Time t, .2 Asec
Fall Time if .18 usec
130
TRANSISTOR SPECIFICATIONS
The General Electric Type 2N335 is a silicon NPN triodetransistor intended for amplifier applications in the audioand radio frequency range and for general purpose switch-ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150hour 200°C cycled aging operation included in the manufacturing process. All unitsare subjected to a rigorous mechanical drop test to control mechanical reliability. Thistransistor is hermetically sealed in a welded case. The case dimensions and lead con-figuration conform to the JETEC TO -5 package and are suitable for insertion inprinted boards by automatic assembly equipment.
2N335
SPECIFICATIONS
Outline Drawing No. 4
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base ( Emitter Open) Veno
45 voltsEmitter to Base ( Collector Open) VEBO1 volt
Collector Current Ic25 ma
PowerCollector Dissipation ( 25°C ) Pc
150 mwCollector Dissipation (100°C) Pc100 mwCollector Dissipation (150°C) Pc
50 mwTemperature RangeStorage Ton; -65 to 200 °COperating
TA -55 to 175 °CELECTRICAL CHARACTERISTICS: (25°C)
(Unless otherwise specified; Wu = 5v;1E = -1 nia; f Ike)
Small Signal CharacteristicsMIN. NOM. MAX.Current Transfer Ratio ht. 37 60 90Input Impedance hlb 30 53 80 ohmsReverse Voltage' Transfer Ratio hrb .5 3.0 10.0 X 10-,Output Admittance
hob 0.0 .15 1.2 µmhosPower Gain( VcE = 20v; Is = -2ma; f = Ile;Ra = 1K ohms; RL = 20K ohms) Ge 42 dbNoise Figure NF 20 db
High Frequency CharacteristicsFrequency Cutoff
(Vca = 5v; IE = -lma) fob 22 meCollector to Base Capacity( Vca = 5v; IE = -lma; f = IMO Cob 7 ILOPower Gain (Common Emitter )( Volt = 20v; IE = -2ma; f= 5mc) Ge 14 db
D -C Characteristics
Collector Breakdown Voltage(Ica() = 50ga; IE = 0; TA = 25°C) BVcao 45 voltsCollector Cutoff Current( Veit = 30v; IE = 0; TA = 25°C) Icso .02 2 µa(VcB --_, 5v; IE = 0; TA = 150°C) Icao
50 I.LaCollector Saturation Resistance(la = lma; Ic = 5ma) Rsc 80 200 ohms
Switching Characteristics(Is, = 0.4 ma; Is2 = -0.4 ma;Ic = 2.8 ma )
Delay Time' td .65 µsecRise Time tr .35 µsecStorage Time t, .25 fAsecFall Time tr .19 µsec
131
TRANSISTOR SPECIFICATIONS
2N336Outline Drawing No. 4
The General Electric Type 2N336 is a silicon NPN triodetransistor intended for amplifier applications in the audioand radio frequency range and for general purpose switch-ing. It is a grown junction device with a diffused base.Electrical stability is insured by means of a minimum 150
hour 200°C cycled aging operation included in the manufacturing process. All unitsare subjected to a rigorous mechanical drop test to control mechanical reliability. Thistransistor is hermetically sealed in a welded case. The case dimensions and lead con-figuration conform to the JETEC TO -5 package and are suitable for insertion inprinted boards by automatic assembly equipment.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base (Emitter Open) VEBO 45 voltsEmitter to Base (Collector Open) VEBO 1 volt
Collector Current Ic 25 ma
PowerCollector Dissipation (-25°C) Pc 150 mwCollector Dissipation (100°C) Pc 100 mwCollector Dissipation (150°C) Pc 50 mw
Temperature RangeStorageOperating
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified; Von = Sv;In = -1 ma; f = 1 kc)
TSTOTA
-65 to 200 °C-55 to 175 °C
Small Signal Characteristicshr.hibhrbhob
GeNF
MIN.7630.5
0.0
NOM.
12053
4.0.13
4315
MAX.333
8010.01.2
ohmsX 10-4/mhos
dbdb
Current Transfer RatioInput ImpedanceReverse Voltage Transfer RatioOutput AdmittancePower Gain
(Vcs = 20v; In = -2ma; f = lkc;Ra = 1K ohms; RL = 20K ohms)
Noise Figure
High Frequency CharacteristicsFrequency Cutoff
(Vat = 5v; In = -1ma) fob 23 meCollector to Base Capacity
(Von = 5v; Is = -lma; f = line) Cob 7 /414f
Power Gain (Common Emitter)(Von = 20v; Is = -2ma; f= 5mc) G. 13 db
D -C CharacteristicsCollector Breakdown Voltage
(Icno = 50ga; Is = 0; TA = 25°C) BVcso 45 voltsCollector Cutoff Current
(Vat = 30v; Is = 0; TA = 25°C) ICES .02 2 /La(Vela = 5v; In = 0; TA = 150°C) Ica° 50 ila
Collector Saturation Resistance(In = lma; Ic = 5ma) Rsc 80 200 ohms
Switching Characteristics(In, = 0.4 ma; IB, = -0 4 ma;Ic = 2.8 ma)
Delay Time td .65 asecRise Time to .2 µsecStorage Time t. .5 AsecFall Time ti .2 asec
132
TRANSISTOR SPECIFICATIONS
The General Electric types 2N394, 2N395 arePNP alloy junction high frequency switchingtransistors intended for military, industrial, anddata processing applications where high reliabilityand extreme stability of characteristics are ofprime importance.
SPECIFICATIONS
2N394, 2N395Outline Drawing No. 2
ABSOLUTE MAXIMUM RATINGS: (25°C)
Voltages 2N394 2N395Collector to Emitter VCE -10 -15 voltsCollector to Base VCB -10 -15 voltsEmitter to Base VEB -10 -10 volts
Collector Current Jo -200 -200 ma
Power Dissipation PAV 150 150 mw
Peak Power Dissipation( 50 µsec. max. 20% duty cycle) PM 500 500 mw
Storage Temperature TSTG -65 to 100 -65 to 100 °C
ELECTRICAL CHARACTERISTICS: (25°C)
High Frequency Characteristics 2N394 2N395(Common Base) DESIGN DESIGNWes --Sy; IE = 1 ma) MIN. MAX. CENTER MIN. MAX. CENTER
Alpha Cutoff Frequency fob 4 5.5 5 7 mcCollector Capacity ( f = 1 mc) Cob 20 12 20 12 µµfVoltage Feedback Ratio(f = 1 mc) hrb 10 9 X 10-2Base Spreading Resistance eb 150 130 ohms
Cutoff CharacteristicsCollector Cutoff Current
( VCBO = -10v) Ico -6 µamps(Vcao = -15v) Ico -6 µampsEmitter Cutoff Current()luso = -5v) Is° -6 µamps(VEao = -10v) IEo -6 µampsPunch -through Voltage VPT -10 -15 volts
D -C CharacteristicsD -C Base Current Gain
( VcE = -1v; Ic = -10 ma) hFE 20 150 25 150(Vcs = -0.5v;Ic = -100 ma) hFE 20Saturation Voltage
( Is = -1 ma; Ic = -20 ma) VCE ( SAT) -0.1 -0.1 voltsPulse Response Time( Ic = -5 ma;Ia, = IN = 0.5 ma )
Delay and Rise Time to-I-tr 0.9 0.9 µsecStorage Time to 0.35 0.28 µsecFall Time tf 0.35 0.28 µsec
Thermal CharacteristicsDerate 2.5 mw/ °C increase in ambient temperature over 25°C.
133
TRANSISTOR SPECIFICATIONS
2N396, 2N397Outline Drawing No. 2
ABSOLUTE MAXIMUMVoltagesCollector to Emitter VcECollector to Base VonEmitter to Base VEB
Collector Current IcPower Dissipation PAY
Peak Power Dissipation( 50 µsec. max. 20% duty cycle) Px 500 500 mw
Storage Temperature TSTG -65 to 100 -65 to 100 °C
ELECTRICAL CHARACTERISTICS: (25°C)High Frequency Characteristics
(Common Base)DESIGN
MIN. MAX. CENTER(Vas = -5y; = 1 ma)
Alpha Cutoff Frequency fob 5.0 7Collector Capacity (f = 1 MC ) Cob 20 12Voltage Feedback Ratio
(f = 1 MC ) hrb 10Base Spreading Resistance 140
The General Electric types 2N396, 2N397 arePNP alloy junction high frequency switchingtransistors intended for military, industrial, anddata processing applications where high reliabilityand extreme stability of characteristics are ofprime importance.
Cutoff CharacteristicsCollector Cutoff Current
(Vow) = -10v )(Vceo = -20v)
Emitter Cutoff Current(Vrao = -I0v)
Punch -through Voltage
SPECIFICATIONSRATINGS: (25°C)
Ico'co1E0VPT -20
-6-6
D -C CharacteristicsD -C Base Current Cain
(VcE = -1v; Ic = -10 ma) hFE 30 150(VcE = -0.5v;Ic = -100 ma) hFE 20
(VcE = -0.35v;Ic = -200 ma) hFE
Saturation Voltage= -1 ma; Ic = -20 ma) VcE ( SAT )
Pulse Response Time(Ic = -5 ma;TB, = IBy = 0.5 ma )
Delay and Rise Time td-f-trStorage Time toFall Time tr
Thermal CharacteristicsDerate 2.5 mw/ °C increase in ambient temperature over 25°C.
2N450Outline Drawing No. 8
ABSOLUTE MAXIMUM RATVoltagesCollector to BaseCollector to EmitterEmitter to BaseCollector CurrentTemperatureStorageJunctionPowerTotal Transistor Dissipation
2N396 2N397
-20 -10 volts-20 -10 volts-10 -10 volts
-200 -250 ma150 150 mw
2N396 2N397DESIGN
MIN. MAX. CENTER8 10 me
20 12 µµf
-6
-6-10
30 150
20
11 x 10-3160 ohms
µampsµamps
µampsvolts
-0.2 -0.09 -0.085 volts
0.90.350.25
0.66 µsec0.35 iisec0.25 µsee
The General Electric Type 2N450 is a PNP alloy junctionhigh frequency switching transistor intended for military,industrial and data processing applications where highreliability at the maximum ratings is of prime importance.
SPECIFICATIONSINGS: (25°C)
VCBVcEVEB
Ic
TSTGTJ
PAY
-20 volts-12 volts-5 volts
-125 ma
-65 to 85 °C85 °C
150 mw
134
ELECTRICAL CHARACTERISTICS: (25°C)High Frequency Characteristics (Common Base)
TRANSISTOR SPECIFICATIONS
MIN. MAX.DESIGN
CENTER(Vas = -5v; 1E = 1 ma)Alpha Cutoff Frequency fob 5 MCCollector Capacity (f = 1 me) Cob 16 12 AOVoltage Feedback Ratio (f = 1 me) hrb
,../..- 13 10 X 10-8Cutoff CharacteristicsBreakdown Voltage Collector to Base to
Base Emitter Open(Ic = -100 µamps ) BVcEo -20 voltsBreakdown Voltage Collector toEmitter Base Open(Ic = -600 µamps ) BVcEo -12 voltsCollector Cutoff Current( VCBO = -6v) 'CB° -6 -2 µampsEmitter Cutoff Current(Vcao = -5v) limo -6 -2 µamps
D -C CharacteristicsD -C Base Current Gain
(VcE = -1v; Ic = -10 ma) him 30Saturation Voltage(IE = -5 ma; Ic = -10 ma) VCE ( SAT) -0.2 ,,,Its
The General Electric Type 2N451 is an NPN silicon powertransistor intended for general application at low tomedium -high frequencies where large amounts of powerare required at high operating temperatures. The high col-lector current rating in combination with the low saturationresistance and low thermal resistance of this device make it useful in a wide varietyof applications. A single Type 2N451 in a Class A circuit is capable of 25 watts outputat a mounting base temperature of +30°C. A pair of Type 2N451 units in Class Bwill deliver 50 watts output at mounting base temperatures up to +100°C. The highcut-off frequency of the Type 2N451 makes it useful in common -emitter amplifier circuitsat frequencies up to 500 kc or more. The Type 2N451 transistor is a diffused -junctiondevice manufactured by the General Electric vapor diffusion process. It is hermeticallysealed in a welded case which is designed for mounting on an external heat sink bymeans of a simple threaded stud. The type 2N451 transistor is designed to meet therequirements of MIL -T -19500A.
2N451
SPECIFICATIONS
Outline Drawing No. 6
ABSOLUTE MAXIMUM RATINGSTemperature RangeStorage TSTG -65 to + 150 °CJunction (Operating) Tr + 150 °CVoltagesCollector -Base Veil 65 voltsEmitter -Base VEB 10 voltsCollector -Emitter (REF, < 50 ohms) VCE 65 voltsCurrentsBase
0.5 ampsCollector5 ampsCollector DC Power Dissipation
25°C Mounting Base Temp.85 watts100°C Mounting Base Temp. 35 wattsELECTRICAL CHARACTERISTICS
D -C Characteristics(25°C Mtg. Base Temp. except where MIN. NOM. MAX.otherwise indicated)
Collector Reverse Current (VcE = + 65v) Ica() 20 ma(VcE = + 30v; RBE < 50 0;TA = -I- 125°C) Iona 20 maCollector Saturation Resistance
(Ic = 1 amp; Is = 0.3 amp.) Rim 2 4 ohmsForward Current Transfer Ratio(Ic = I amp; VCE = 10v) hFE 10Input Resistance(Ic = 1 amp; VCE = 10V) hIE 25 ohmsA -C Characteristics (Common Emitter)(VcE = 30v; Ic = I amp)
Forward Current Transfer Ratio(Ic = 0.5 amp rms; f = I ke) 14Input Resistance(Ic = 0.5 amp rms; f = 1 kc) 20 ohmsFrequency Cutoff (3db ) f.o 400 kc
Thermal CharacteristicsThermal resistance from collector junction
to mounting base 1.5 °C/watt
135
TRANSISTOR SPECIFICATIONS
2N452Outline Drawing No. 6
The General Electric Type 2N452 features very low col-lector saturation resistance and high current capability.These characteristics make this transistor particularly suit-able for high power amplifier and switching applications.The Type 2N452 transistor is a diffused -junction device
manufactured by the General Electric vapor diffusion process. It is hermetically sealedin a welded case which is designed for mounting on an external heat sink by meansof a simple threaded stud. The Type 2N452 transistor is designed to meet the require-ments of MIL -T -19500A.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGSTemperature RangeStorage TSTG -65 to + 150 °CJunction (Operating) Ts -I- 150 °C
VoltagesCollector -Base VCB
Emitter -Base VEBCollector -Emitter (RBE < 50 ohms) VCE
CurrentsBaseCollectorCollector DC Power Dissipation25°C Mounting Base Temp.
100°C Mounting Base Temp.ELECTRICAL CHARACTERISTICSD -C Characteristics
(25°C Mtg. Base Temp. except where MIN. NOM. MAX.otherwise indicated)
Collector Reverse Current ( Vca = 65v) kw) 50 ma(Vox = 65v; Ran 50 SZ;TA = 125°C) IcEB. 50 ma
Collector Saturation Resistance(Ic = 2 amp; 18 = 0.5 amp.) RSE 2.5 ohms
Forward Current Transfer Ratio(Ic = 2 amp; VCE = 20v) hFE 8
Input Resistance(Ic = 2 amp; VCE = 20v) hIE 15 ohms
Thermal CharacteristicsThermal resistance from collector junction
to mounting base
2N453Outline Drawing No. 6
65 volts10 volts65 volts
0.5 amps5 amps
85 watts35 watts
1.5 °C/watt
The General Electric Type 2N453 features a high forwardcurrent transfer ratio. This transistor is especially wellsuited as a series regulator element in d -c regulated powersupplies and generally as a high gain, medium poweramplifier at frequencies up to several hundred kc. The
Type 2N453 transistor is a diffused -junction device manufactured by the GeneralElectric vapor diffusion process. It is hermetically sealed in a welded case which isdesigned for mounting on an external heat sink by means of a simple threaded stud.The Type 2N453 transistor is designed to meet the requirements of MIL -T -19500A.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGSTemperature RangeStorage TSTG
Junction (Operating) T
VoltagesCollector -BaseEmitter -Base VEBCollector -Emitter (RBE < 50 ohms) VCS
CurrentsBase
-65 to -I- 150 °C+ 150 °C
30 volts10 volts30,volts
0.5 amps
136
TRANSISTOR SPECIFICATIONS
Collector (For good performance,maximum collector current should belimited to 2 amps.)
Collector DC Power Dissipation25°C Mounting Base Temp.
100°C Mounting Base Temp.
ELECTRICAL CHARACTERISTICSD -C Characteristics
5 amps
85 watts35 watts
(25°C Mtg. Base Temp. except whereMIN. NOM. MAX.otherwise indicated)
Collector Reverse Current (Vca = +30v) Icao 20 ma(Vcn = + 30v; Ran ...C. 50 0;TA = + 125°C) ICER 20 maCollector Saturation Resistance
(Ic = 1 amp; Ia = 0.3 amp.) RSE 6 ohmsForward Current Transfer Ratio(Ic = 1 amp; VCE = 20v) tarn 20Input Resistance(Ic = 1 amp; VCE = 20v) Jun 50 ohmsThermal Characteristics
Thermal resistance from collector junctionto mounting base
1.5 °C/watt
The General Electric Type 2N454 is an NPN silicon powertransistor intended for use as a general purpose, medium 2N454power amplifier at frequencies up to several hundred kc.The Type 2N454 transistor is a diffused -junction device Outline Drawing No. 6manufactured by the General Electric vapor diffusionprocess. It is hermetically sealed in a welded case which is designed for mountingon an external heat sink by means of a simple threaded stud. The Type 2N454 tran-sistor is designed to meet the requirements of MIL -T -19500A.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGSTemperature RangeStorage TSTG -65 to + 150 °CJunction ( Operating) Ts + 150 °CVoltagesCollector -Base Ves 65 voltsEmitter -Base VEB 10 voltsCollector -Emitter (Ran < 50 ohms) VCE 65 voltsCurrentsBase
0.5 ampsCollector (For good performance,maximum collector current should belimited to 2 amps.)
5 ampsCollector DC Power Dissipation25°C Mounting Base Temp.
85 watts100°C Mounting Base Temp.35 wattsELECTRICAL CHARACTERISTICS
D -C Characteristics(25°C Mtg. Base Temp. except where
MIN. NOM. MAX.otherwise indicated)Collector Reverse Current (Vert = + 65v) Ica° 20 ma(Von = + 30v; RBE 5 50 0;
TA = + 125°C) Iona 20 maCollector Saturation Resistance(Ic = 1 amp; In = 0.3 amp.) RSE 10 ohmsForward Current Transfer Ratio(Ic = 1 amp, Von = 20v) hEE 8Input Resistance(Ic = 1 amp, Von = 20v) hut 25 ohms
Thermal CharacteristicsThermal resistance from collector junctionto mounting base
1.5 °C/watt
137
TRANSISTOR SPECIFICATIONS
2N489 -2N494Outline Drawing No. 5
The General Electric Silicon Unijunction Tran-sistor is a hermetically sealed three terminal devicehaving a stable "N" type negative resistancecharactistic over a wide temperature range. Ahigh peak current rating makes this device useful
in medium power switching and oscillator applications, where it can serve the purpose
of two conventional silicon transistors. These transistors are hermetically sealed in awelded case. The case dimensions and lead configuration are suitable for insertion inprinted boards by automatic assembly equipment. The Silicon Unijunction Transistorconsists of an "N" type silicon bar mounted between two ohmic base contacts with a"P" type emitter near base -two. The device operates by conductivity modulation of
the silicon between the emitter and base -one when the emitter is forward biased. Inthe cutoff, or standby condition, the emitter and interbase power supplies establishpotentials between the base contacts, and at the emitter, such that the emitter is backbiased. If the emitter potential is increased sufficiently to overcome this bias, holes( minority carriers) are injected into the silicon bar. These holes are swept towards
base -one by the internal field in the bar. The increased charge concentration, due tothese holes, decreases the resistance and hence decreases the internal voltage drop
from the emitter to base -one. The emitter current then increases regeneratively untilit is limited by the emitter power supply. The effect of this conductivity modulationis also noticed as an effective modulation of the interbase current.
SPECIFICATIONSABSOLUTE MAXIMUM RATINGS: 125°C)RMS Power DissipationRMS Power Dissipation - Stabilized**RMS Emitter CurrentPeak Emitter Current*** ( TJ = 150°C)Emitter Reverse Voltage (Ta = 150°C)Operating Temperature RangeStorage Temperature RangeInterbase Voltage (Visa )
*Derate 2 mw/°C increase in ambient temperature.**Total power dissipation must be limited by external circuit.
***Capacitor discharge -10 pid or less.
250 mw*350 mw*
50 ma2 amps
60 volts-65 to 150 °C-65 to 200 °C
See Fig. A
Types 2N489 -2N494 are specified primarily in threeranges of stand-off and two ranges of interbase resistance.Each range of stand-off ratio has limits of ±10% fromthe center value and each range of interbase resistancehas limits of ±20% from the center value.
2N489MIN. NOM. MAX
2N490MIN. NOM. MAX.
2N489. 2N490 1
MAJOR ELECTRICAL CHARACTERISTICS:Interbase Resistance at 25°C Junction
Temperature Rs% 4.7 5.6 6.8 6.2 7.5 9.1 kilohms
Intrinsic Stand-off Ratio n .51 :56 .62 .51 .56 .62Modulated Interbase Current
(Ix = 50 ma; Vas =- 10v;TA = 25°C) Ian (MOD) 6.8 12 22 6.8 12 22 ma
Emitter Reverse Current(Vana = 60v; Ti = 25°C) Tao .07 1.0 .07 1.0 µa(Vsna = 60v; Ti = 150°C) Iao 28 100 28 100 µa
MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)Emitter Saturation Voltage
( IE = 50 ma; VBB = 10V;TA = 25°C) Va ( SAT) 1.5 2.2 3.5 1.5 2.4 3.6 volts
Peak Point Emitter Current( Vali = 25v; TA = 25°C) Ir 4 12 4 12 µa
Valley Voltage Vv 1.1 1.9 3.4 1.0 1.9 3.5 voltsValley Current Iv 12 19 35 11 19 31 maMaximum Frequency of Oscillation
(Ian = 4.5 ma; RelaxationOscillator) fmex 0.9 0.7 me
138
TRANSISTOR SPECIFICATIONS
2N491, 2N492
MAJOR ELECTRICAL CHARACTERISTICS:Interbase Resistance at 25°C Junction
Temperature ABB, 4.7 5.6 6.8 6.2 7.5 9.1 kilohmsIntrinsic Stand-off Ratio n .56 .62 .68 .56 .62 .68Modulated Interbase Current
(1E = 50 ma; Vim = 10v;TA = 25°C) 1132 (MOD) 6.8 12 22 6.8 12 22 ma
Emitter Reverse Current(VB2E = 60v; Ti = 25°C) IEo .07 1.0 .07 1.0 µa(VB2E = 60v; Ti = 150°C) IEo 28 100 28 100 µa
MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)Emitter Saturation Voltage
(Ix = 50 ma; Vim = 10v;TA = 25°C) VE (SAT) 1.7 2.6 3.8 1.8 2.8 4.0 volts
Peak Point Emitter Current(Vim = 25v; TA = 25°C) Ip 4 12 4 12 µa
Valley Voltage Vv 1.2 2.2 3.9 1.2 2.2 3.9 voltsValley Current Iv 13 20 37 12 20 38 maMaximum Frequency of Oscillation
(1E2= 4.5 ma; RelaxationOscillator) fmAx 0.8 0.7 me
I 2N493. 2N494 I
MAJOR ELECTRICAL CHARACTERISTICS:Interbase Resistance at 25°C Junction
Temperature RD% 4.7 5.6 6.8 6.2 7.5 9.1 kilohmsIntrinsic Stand-off Ratio n .62 .68 .75 .62 .68 .75Modulated Interbase Current
(Ix = 50 ma; VBB = 10V;TA = 25°C) 1E2 (MOD) 6.8 12 22 6.8 12 22 ma
Emitter Reverse Current(VB2E = 60v; Tr = 25°C) IEo .07 1.0 .07 1.0 µa(VB2E = 60v; Tr = 150°C) No 28 100 28 100 ga
MINOR ELECTRICAL CHARACTERISTICS: (Typical Values)Emitter Saturation Voltage
(Ix = 50 ma; VBB = 10v;TA = 25°C) VE ( SAT) 2.0 3.0 4.5 2.1 3.2 4.6 voltsPeak Point Emitter Current
(Vim = 25v; TA = 25°C) Ip 4 12 4 12 EaValley Voltage Vv 1.4 2.5 4.4 1.4 2.5 4.3 voltsValley Current Iv 14 24 40 12 21 35 maMaximum Frequency of Oscillation
(I% = 4.5 ma; RelaxationOscillator) fmAx 0.7 0.65 me
2N491 2N492MIN. NOM. MAX. MIN. NOM. MAX.
2N493 2N494MIN. NOM. MAX. MIN. NOM. MAX.
INTERBASE RESISTANCE (25°C) - MOMS12 I I 10 9 8 7 6 5 4 3 2
RDAS EMITTER POWER DISSIPATION 20 MW
110.120°
130°
140°
150°
30°
MAXIMUM AMBIENT TEMPERATURE - °C
010 20 30 40 50 60MAXIMUM ALLOWABLE INTERBASE VOLTAGE - (VBB)MAX - VOLTS
FIGURE A
139
70
TRANSISTOR SPECIFICATIONS
2N508Outline Drawing No. 2
The 2N508 is an alloy junction PNP transistor intendedfor driver service in audio amplifiers. It is a miniaturizedversion of the 2N265 G.E. transistor. By control of transistorcharacteristics during manufacture, a specific power gainis provided for each type. Special processing techniques
and the use of hermetic seals provides stability of these characteristics throughout life.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Emitter VexCollector to Base Vcu
Collector Current
PowerCollector Dissipation
TemperatureOperating and Storage Range
-16 volts-16 volts
Ic -100 ma
Peat 140 mw
TA-Tsro -65 to + 65 °C
TYPICAL ELECTRICAL CHARACTERISTICS: (25°C)
D.C. CharacteristicsBase Current Gain ( le = -20 ma; VCE = -1V ) hFE 125Collector to Emitter Voltage
(Rua = 10K; Ic = -.6 ma) Vcr.a -16 volts
Collector Cutoff Current (Wu = -16v) leo 10 µaMax. Collector Cutoff Current (Vex = -16v)Ico 16 /ha
Small Signal CharacteristicsFrequency Cutoff (Von = -5v; a = 1 ma) GI, 3.5 meCollector Capacity ( Vex = -5v; IE = 1 ma )Cox 24 Atid
Noise Figure ( Vex = -5v; IE = 1 ma) NF 6 dbInput Impedance (VcE = -5v; IE = 1 ma) hi. 3 K ohmsCurrent Gain ( WE = -5v; IE = 1 ma) lue 112
Thermal CharacteristicsThermal Resistance Junction to Air .25 °C/mw
Performance Data Common EmitterPower Gain Driver ( Vcc = 9v) G. 45 db
Power Output Po 1 now
140
TRANSISTOR SPECIFICATIONS
The General Electric Type 2N518 is a germanium PNPalloy junction high frequency switching transistor intendedfor military, industrial and data processing applicationswhere high reliability at the maximum ratings is of primeimportance.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base YeaCollector to Emitter VonEmitter to Base
VEB
Collector Current Ic
TemperatureStorage
TSTGJunction TJ
PowerTotal Transistor Dissipation
PAV
2N518Outline Drawing No. 8
-45 volts-12 volts-30 volts
-125 ma
-65 to 85 °C85 °C
150 mw
ELECTRICAL CHARACTERISTICS: (25°C)High Frequency Characteristics (Common Bose) DESIGN(Veit = -5v; IE = 1 ma) MIN. MAX. CENTERAlpha Cutoff Frequency fob 10 mcCollector Capacity ( f = 1 mc) Cob 16 12 AOVoltage Feedback Ratio ( f = 1 mc) hrb 13 10 X 10°
Cutoff Characteristics
Breakdown Voltage Collector to BaseEmitter Open ( Ic = -100 µamps ) BVcso -45 voltsBreakdown Voltage Emitter to BaseCollector Open (IE = -100 µamps) BVEso -30 voltsBreakdown Voltage Collector to EmitterBase Open ( Ic = -600 µamps ) BVcso -12 voltsCollector Cutoff Current ( Vcso = -12v) low) -6 µampsEmitter Cutoff Current ( VEso = -12v) TES) -6 µamps
D -C Characteristics
D -C Base Current Gain(Ws = -1v; In = -10 ma) hrnSaturation Voltage( IB = -.25 ma; Ic = -10 ma) VCE ( SAT )Pulse Response Time( Ic = - 10 ma; Is, = = - .5 ma)
Delay and Rise Time tdStorage TimeisFall Time tr
Thermal Characteristics
Derate 2.5 mw/°C increase in ambient temperature over 25°C.
60
-0.150 volts
0.8 µsec0.9 µsec0.5 µsec
141
TRANSISTOR SPECIFICATIONS
2N524,2N525
The General Electric types 2N524 and 2N525
are germanium PNP alloy junction transistors par-ticularly recommended for low to medium poweramplifier and switching application in the fre-
Outline Drawing No. 2 quency range from audio to 100 KC. This series
of transistors is intended for military, industrial and data processing applications wherehigh reliability and extreme stability of characteristics are of prime importance. The
2N524 and 2N525 are equivalent to the 2N44 and 2N43 respectively and may be
directly substituted in most applications.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
VoltagesCollector to Base Vcso -45 voltsCollector to Emitter VCER
-30 volts
Emitter to Base Vaso -15 volts
Collector Current Icsi -500 ma
TemperaturesStorage TSTG
Operating Ti
PowerTotal Transistor Dissipation PAW
ELECTRICAL CHARACTERISTICS: (25°C)
Small Signal Characteristics(Unless otherwise specified Ve = -5Vcommon base; Is = -1 ma; f = 270 cps)
-65 to 100 *C85 °C
225 mw
Output Admittance
2N524MIN. NOM. MAX.
2N525MIN. NOM. MAX.
(Input AC Open Circuited) hob .10 .65 1.3 .1 .6 1.2 µmhos
Input Impedance(Output AC ShortCircuited) hib 26 31 36 26 31 35 ohms
Reverse Voltage Transfer Ratio(Input AC Open Circuited). hrb 1 4.0 10 1 5.0 11 X 10-4
Forward Current Transfer Ratio(Common Emitter; OutputAC Short Circuited) hie 16 30 41 30 44 64
Frequency Cutoff fob .8 2.0 5.0 1 2.5 5.5 mc
Output Capacity ( f = 1 mc;Input AC open circuited) Cob 18 25 40 18 25 40 AO
Noise Figure ( f =- 1 Ice;BW = 1 cycle) NF 1 6 15 1 6 15 db
D -C CharacteristicsForward Current Gain
(Common Emitter, Ic/IB)(VcE = -1v; Ic = -20 ma) hEE 19 35 42 34 52 65
(VcE = -1v; Ic = -100 ma) hFE 13 31 30 45
Base Input Voltage,Common Emitter(Vcs = -1v; Ic = -20 ma) VBE -.220 -.255 -.320 -.200 -.243 -.300
Collector Cutoff Current(Vmso = -30v) leo -5 -10 -5 -10 µa.
Emitter Cutoff Current(VEso = -15v) Iso -4 -10 -4 -10 µa
Collector to Emitter Voltage(RBE = 10K ohms;It = -.6 ma) VCEB -30 -30 volts
Punch -through Voltage VI'T -30 -30 volts
Thermal Resistance (k)Junction Temperature Rise/
Total Transistor Dissipation:Free Air .27 .27 °C/mwInfinite Heat Sink .11 .11 °C/mwClip -on Heat Sink in
Free Air .20 .20 °C/mw
142
TRANSISTOR SPECIFICATIONSThe General Electric types 2N526 and 2N527are germanium PNP alloy junction transistorsparticularly recommended for low to medium 2N526,2N527power amplifier and switching application in thefrequency range from audio to 100 KC. This series Outline Drawing No. 2of transistors is intended for military, industrial and data processing applications wherehigh reliability and extreme stability of characteristics are of prime importance.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base \TORO
-45 voltsCollector to Emitter *WEB-30 voltsEmitter to Base Vnno-15 volts
Collector Current Icac-500 ma
TemperaturesStorageOperating TSTO
TT
PowerTotal Transistor Dissipation PAV
ELECTRICAL CHARACTERISTICS: (25°C)
Small Signal Characteristics
(Unless otherwise specified Vc = -5Vcommon base; IE = -1 ma; f = 270 cps)
Output Admittance(Input AC Open Circuited)
Input Impedance(Output AC ShortCircuited)
Reverse Voltage Transfer Ratio(Input AC Open Circuited)
Forward Current Transfer Ratio( Common Emitter; OutputAC Short Circuited)
Frequency CutoffOutput Capacity (f = 1 mc;
Input AC open circuited)Noise Figure (f = 1 kc;
BW = 1 cycle)
D -C Characteristics
Forward Current Gain(Common Emitter, Ic/In )(Vcz = -1v; 1c = -20 ma)(VCE = -1v; To = -100 ma)
Base Input Voltage,Common Emitter(VcE = -1v; Ic =- -20 ma)
Collector Cutoff Current(Vcso = -30v)
Emitter Cutoff CurrentVBBO = -15v)
Collector to Emitter Voltage(Rms = 10K ohms;Ic = -.6 ma)
Punch -through Voltage
Thermal Resistance (k)Junction Temperature Rise/
Total Transistor Dissipation:Free AirInfinite Heat SinkClip -on Heat Sink in
Free Air
-65 to 100 °C85 °C
2N526 2N527MIN. NOM. MAX. MIN. NOM. MAX.
hob .1 .42
h I b 26 30
hro 1 6.5
hfe 44 64Lo 1.3 3.0
Cob 18 25NF 1 6
hFE 53 73hFE 47 66
VBE -.190 -.230Ico -5lEo -4WEB -30VI'T -30
225 mw
1.0 .1 .37 .9 µmhos
33 26 29 31 ohms12 1 8.0 14 X 10-4
88 60 81 1206.5 1.5 3.3 7 mc40 18 25 40 µµf15 1 6 15 db
90 72 91 12165 86
-.280 -.180 -.216 -.260-10 -5 -10 lha
-10 -4 -10 Pa
-30 volts-30 volts
.27 .27 °C/mw.11 .11 °C/mw
.20 .20 °C/mw
143
TRANSISTOR SPECIFICATIONS
2N634Outline Drawing No. 2
The General Electric type 2N634 is an NPN germaniumalloy triode transistor designed for high speed switchingapplications.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to BaseEmitter to BaseCollector to Emitter
Currents
CollectorBaseEmitter
Vcs 20 voltsVEB 15 voltsVCE 20 volts
Ic 300 maIB 50 maIE 300 ma
TemperatureStorage TSTO -65 to 85 °COperating Junction TA 85 °C
Power
Dissipation PM 150 mw
ELECTRICAL CHARACTERISTICS: (25°C)
Collector VoltageMIN. NOM. MAX.
( Ic = 15 µamp; IE = 0) VCBO 20 voltsEmitter Voltage
(IE = 10 µamp; Ic = 0) VEBO 15 voltsCollector to Emitter Voltage
( Ic = 600 µamp; R = 10 K) VCER 20 voltsCollector Cutoff Current
( Vcs = 5v; In = 0) Ica() 5 µampsPunch Through Voltage VeT 20 voltsD -C Current Gain
(Ic = 200 ma; VCE = 0.75v) finn 15Alpha Cutoff Frequency
( Vcs = 5v; In = -1 ma) fan 5 8 me
Thermal CharacteristicDerate 2.5 mw/°C increase in ambient temperature over 25°C.
2N635Outline Drawing No. 2
The General Electric type 2N635 is an NPN germaniumalloy triode transistor designed for high speed switchingapplications.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to BaseEmitter to BaseCollector to Emitter
Currents
CollectorBaseEmitter
Vcn 20 voltsVEB 15 voltsVCE 20 volts
Ic 300 maIB .50 maIn 300 ma
TemperatureStorage TSTG -65 to 85 °COperating Junction TA 85 °C
Power
Dissipation PM 150 mw
144
TRANSISTOR SPECIFICATIONS
ELECTRICAL CHARACTERISTICS: (25°C)Collector Voltage MIN. NOM. MAX.( Ic = 15 µamp; IE = 0) Vcso 20 voltsEmitter Voltage
( IE = 10 µamp; Ic = 0) VEBO 15 voltsCollector to Emitter Voltage( Ic = 600 µamp; R = 10 K) VIER 20 voltsCollector Cutoff Current(VCB = 5v; IE = 0) Ica° 5 µampsPunch Through Voltage VPT 20 voltsD -C Current Gain( Ic = 200 ma; VCE = 0.75v) hru 25Alpha Cutoff Frequency(VCB = 5v; IE = --I ma) fall 10 12 me
Thermal CharacteristicDerate 2.5 mw/°C increase in ambient temperature over 25°C.
The General Electric type 2N636 is an NPN germaniumalloy triode transistor designed for high speed switchingapplications.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)VoltagesCollector to Base VCBEmitter to Base VEBCollector to Emitter VCE
Currents
2N636Outline Drawing No. 2
20 volts15 volts20 volts
Collector Ic 300 maBase Is 50 maEmitter IE 300 ma
TemperatureStorage Tsra -65 to 85 °COperating Junction TA 85 °C
Power
Dissipation Pm 150 mw
ELECTRICAL CHARACTERISTICS; (25°C)MIN. NOM. MAX.Collector Voltage
(Ic = 15 µamp; IE = 0) VCBO 20 voltsEmitter Voltage( IE = 10 µamp; Ic = 0) VEBO 15 voltsCollector to Emitter Voltage( Ic = 600 µamp; R = 10 K) VCER 15 voltsCollector Cutoff Current(Vca = 5v; IE = 0) ICB0 5 µampsPunch Through Voltage VPT 15 voltsD -C Current Gain(Ic = 200 ma; Vca = 0.75v) huu 35Alpha Cutoff Frequency(Von = 5v; IE = -1 ma) ht, 15 17 me
Thermal CharacteristicDerate 2.5 mw/°C increase in ambient temperature over 25°C.
145
r
TRANSISTOR SPECIFICATIONS
3N36Outline Drawing No. 7
The General Electric Type 3N36 is a germanium meltbackNPN transistor designed for high frequency use as anamplifier, oscillator or mixer. It is recommended for use inthe frequency range from 30mc to 100mc. The 3N36 isexcellent for wide band video amplifiers from low frequency
to 10mc. All units are subjected to a rigorous mechanical drop test to control mechani-cal reliability. These transistors are hermetically sealed in welded cases. The casedimensions conform to the JETEC TO -12 package and are suitable for insertion inprinted boards by automatic assembly equipment.
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS: (25°C)
VoltagesCollector to Base 1 or Base 2 Ven 7 voltsEmitter to Base 1 or Base 2 VEB 2 voltsCollector to Emitter Yea 6 volts
CurrentsCollector Ic 20 maEmitter IE -20 maBase 2 Is: 2 ma
TemperatureStorage TsTo -85 to +85 °COperating Junction Ta +85 °C
PowerTotal Transistor Dissipation Pm 30 mw
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified Wu, = + 5v;Is = -1.5 ma; Va2si = -2v; f = 60 mc)
DESIGN
Small Signal High Frequency Parameters MIN. CENTER MAX.
Output Capacity Cob 2 3 µµtNoise Figure ( Common Base) NF 11 db
Base Spreading Resistance r'b 50 ohms
Common Emitter "h" ParametersInput Impedance h i . 100 - j27 ohms
Reverse Voltage Transfer Ratio hr. .022 Z 47°Current Transfer Ratio ht. 2.2 i -81°Output Admittance hoe 8 + j8.8 X 10-4 mhosCommon Base Cutoff Frequency fob 50 mcCommon Emitter Power Gain G. 10 11.5 db
D -C CharacteristicsVoltage Collector to Emitter
( ABE = 10K;VB2E = -2v; Ic = 25 µamp ) Teen
Collector Cutoff Current ( \resin, = 7v) IcoCross Base Resistance RBI%
5
2.4K
volts3 10 µamps4K 10K ohms
Thermal CharacteristicDerate .5mw/°C increase in ambient temperature over 25°C.
148
TRANSISTOR SPECIFICATIONS
The General Electric Type 3N37 is a germanium meltbackNPN transistor designed for high frequency use as anamplifier, oscillator or mixer. It is recommended for use inthe frequency range of 100mc to 200mc. The 3N37 is excel-lent for wide band video amplifiers from low frequency to10mc. All units are subjected to a rigorous mechanical drop test to control mechanicalreliability. These transistors are hermetically sealed in welded cases. The case dimen-sions conform to the JETEC TO -12 package and are suitable for insertion in printedboards by automatic assembly equipment.
3N37
SPECIFICATIONS
Outline Drawing No. 7
ABSOLUTE MAXIMUM RATINGS: (25°C)
VoltagesCollector to Base 1 or Base 2 VCB 7 voltsEmitter to Base 1 or Base 2 VEB 2 voltsCollector to Emitter Vice 6 volts
CurrentsCollector Ic 20 maEmitter In -20 maBase 2 Iri, 2 ma
TemperatureStorage TsTo -65 to +85 °COperating Junction Tr +85 °C
PowerTotal Transistor Dissipation Psi 30 mw
ELECTRICAL CHARACTERISTICS: (25°C)(Unless otherwise specified Vca1 = + 5v;lu = -1.5 ma; Vii2B1 = -2v; f = 150 me)
DESIGNSmall Signal High Frequency Parameters MIN. CENTER MAX.Output Capacity Cob 1.5 3 AONoise Figure ( Common Base) NF 11 dbBase Spreading Resistance eb 50 ohms
Common Emitter "h" ParametersInput ImpedanceReverse Voltage Transfer RatioCurrent Transfer RatioOutput AdmittanceCommon Base Cutoff FrequencyCommon Emitter Power Gain
D -C Characteristics
Voltage Collector to Emitter(gen = 10K;VB.,E = -2v; Ic = 25 /ramp )
Collector Cutoff Current (Vcir1ri2 = 7v )Cross Base Resistance
hi. 80 - (10 ohms.018 Z 84°hi, 1.1 Z -100°
h.. 5.5 + j12.514 X 10-4 mhosfab 90 meG. 7 9 db
VCERICORB,R,
5
2.5K
volts3 10 /ramps4K 10K ohms
Thermal Characteristic
Derate .5mw/°C increase in ambient temperature over 25°C.
147
TRANSISTOR SPECIFICATIONS
MEASURMENTS65 - BOR EQUIV.
MEASUREMENTS65 - BOR EQUIV.
TYPICAL IE I. F AMPL.
AUTOMATIC 725(EXO -3926)
Icq = .6ma
I 2K I500 aAUTOMATIC 725
(EXO - 3926)
L -68 Kri_ 560.n.
+ 9V
6 mf d/ 12V
TYPICAL 2ND I. E AMPL.
AUTOMATIC 725(EXO -3926)
F------1
12K I
2.7 K
EXO 3015OR
AUTOMATIC 726- - -
Icq= !ma
+9V
A.V.C.
500a
148
TRANSISTOR SPECIFICATIONS
a Va.%
516. GEN.
500
TYPICAL IF TEST CIRCUIT
AUTOMATIC725
I2.5K I
±
12
3
±1% ±1%
AUTOMATIC725
111
C
1
12
5g,7'470
,,,T . T
;5rAP-C4N,0<11+20%,/ SI It
NOTE *I MAKE ALLOWANCE OF 4db IN MEASUREMENT
5000±I%
FOR TRANSFORMER AND CIRCUIT LOSSES. VC
00021%
NOTE *2 WHEN APPLYING 244 MILLIVOLTS AT 455KC/S (NOMODULATION) AT INPUT (JI) AND WHEN TRANSISTORGAIN IS 30db, OUTPUT VOLTAGE WILL BE 077 VOLTS.THIS COINCIDES WITH THE Odb POINT ON THE .IVSCALE OF THE H. P VTVM GAIN CAN THUS BEMEASURED DIRECTLY IN db'S.
HP 400DOR EQUIV.
O ET5.5 VOLTS
OB
0-500µa (Ri 30041VOLTMETER READING 20 VOLTS FULL SCALE
AMMETER READING 2Ma FULL SCALE
TYPICAL AUTODYNE CONVERTER
AUTOMATIC 725AC = 190.6
470
ANTENNA - DELTA COIL *I - 105A OR EQUIVALENTOSCILLATOR COIL - E. STANWYCK CO. #1129(MODIFIED) OR EQUIVALENTCAPACITOR - RADIO CONDENSER #242 OR EQUIVALENTI. F TRANSFORMER - AUTOMATIC 725(EXO-3926) OR EQUIVALENT
149
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190
2N35
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5025
850
40.8
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169A
2N36
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4540
2N19
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3036
2N19
0
2N38
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CB
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-850
1532
2N18
9
2N38
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PC
BS
AF
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0-8
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322N
189
2N41
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RC
A50
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-15
5040
402N
190
2N43
PNP
GE
AF
124
0-3
0-3
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053
1.3
4040
2N43
2N43
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PG
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F1
155
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340
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2N44
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2N44
2N45
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2N46
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see
2N47
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Phil
AF
50-3
5-2
065
388
402N
190
25V
2N48
PNP
Phil
AF
50-3
5-2
065
328
402N
189
25V
2N49
PNP
Phil
AF
50-3
5-2
065
388
402N
190
25V
2N50
PtC
le50
-15
-150
2a3
20
2N51
PtC
leSw
100
-50
-850
20
2N52
PtC
leR
F12
0-5
0-8
5020
2N53
PtC
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F10
0-5
0-8
502a
520
2N54
PNP
WA
F20
0-4
5-1
060
32.5
402N
190
25V
2N55
PNP
WA
F20
0-4
5-1
060
20.5
392N
190
25V
2N56
PNP
WA
F20
0-4
5-1
060
12.5
382N
189
25V
2N57
PNP
WPw
r20
W-6
0-.
8A60
145W
2N59
PNP
WA
F O
ut18
0-2
0-2
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9030
3030
02N
241A
or
2N32
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2N60
2N61
2N62
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85 8528 26
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319
2N63
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107
2N64
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Ray
AF
100
-15
-10
8545
841
402N
191
2N65
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Ray
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-12
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4240
2N19
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2360
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2N71
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-250
60.2
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400
2N72
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73PN
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GE
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-10
6020
138
2N19
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2N77
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RC
AA
F35
-25
-15
5055
.744
502N
191
2N78
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GE
RF
365
1520
8570
928
2N78
2N79
PNP
RC
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F35
-30
-50
46.7
4450
2N19
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2N80
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CB
SA
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2N19
22N
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2N18
92N
82PN
PC
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2N94
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7530
338
c 2N
169A
(an
d2N
94A
NPN
Syl
RF
Sw30
2050
7540
638
1 2N
123
PNP)
2N95
NPN
Syl
Pwr
2.5W
/4W
251.
5A70
40A
2360
05W
2N96
PNP
RC
AO
bsol
ete
50-3
0*-2
055
35.5
2N19
0 or
2N
322
2N97
NPN
GP
IF50
3010
7513
120
2N16
915
V2N
97A
NPN
GP
IF50
4010
8513
120
2N16
9A 2
5V
2N98
NPN
GP
IF50
4010
7538
2.5
222N
169A
25V
2N98
AN
PNG
PIF
5040
1085
382.
522
2N16
9A 2
5V2N
99N
PNG
PIF
5040
1075
383.
522
2N16
9A 2
5V
2N10
0N
PNG
PIF
2525
550
100
523
2N17
06V
2N10
1PN
PSy
lPw
r1W
-25
-1.5
A70
2360
02N
102
NPN
Syl
Pwr
1W25
1.5A
7023
600
5W2N
103
NPN
GP
Gen
l IF
5035
1075
5.7
515
2N17
06V
2N10
4PN
PR
CA
AF
70-3
0-5
070
44.7
412N
190
25V
2N10
5PN
PR
CA
AF
35-2
5-1
550
55.7
542
2N19
12N
106
PNP
Ray
AF
100
-6-1
085
45.8
3640
2N18
92N
107
PNP
GE
AF
150
-6-1
060
201
382N
107
2N10
8PN
PC
BS
AF
Out
50-2
0-1
535
2N10
9PN
PR
CA
AF
Out
50-1
2-3
550
7033
7515
02N
188
-2N
192
2N11
0Pt
WE
Sw18
0-5
0*-5
085
325.
02N
111
PNP
Ray
IF15
0-1
5-2
0085
403
302N
135
2N11
1APN
PR
ayIF
150
-15
-200
8540
333
2N13
52N
112
PNP
Ray
RF
150
-15
-200
8540
532
2N13
6 -2
N13
5
JET
EC
Dw
g.Pc
mw
MA
X. R
AT
ING
SI
T P
-1...
.1-
VA
. -a/
La
Po m
w -
Cla
ssN
o.T
ype
Mfr
.U
seN
o.@
25°
CB
V(:
Ic m
aT
i°C
h f
efa
bM
CG
e db
AB
Clo
sest
GE
2N11
2A2N
113
2N11
4
PNP
PNP
PNP
Ray
Ray
Ray
IF RF
RF
Sw
150
100
100
-15 -6 -6
-200 -5 -5
85 85 85
40 45 65
510 20
35 332N
136
2N13
72N
137
or 2
N12
3
2N11
72N
118
2N11
9
NPN
NPN
NPN
TI
TI
TI
Si (
=90
3)Si
( =
904)
SiA
F
150
150
150
45*
45*
45*
25 25 25
175
175
175
12 24 .98a
4 5 6
2N33
22N
333
2N33
5
2N12
32N
124
2N12
5
PNP
NPN
NPN
GE
TI
TI
RF
SwR
F Sw
RF
Sw
810
0 50 50
-20 10 10
-125
8 8
85 75 75
50 18 32
8 3 5
2N12
32N
168
2N16
7
2N12
62N
127
NPN
NPN
TI
TI
RF
SwR
F Sw
50 5010 10
8 875 75
60 130
5 52N
167
2N16
72N
128
PNP
Phil
SB O
sc30
-4.5
-585
3560
2N12
92N
130
2N13
1
PNP
PNP
PNP
Phil
Ray
Ray
SB O
scA
FA
F
30 84 84
-4.5
-22
-15
-5 -10
-10
85 85 85
20 22,
45
4039 41
2N18
6 or
2N
319
2N18
7 or
2N
319
2N13
2PN
PR
ayA
F84
-12
-10
8590
422N
241
or 2
N32
12N
133
PNP
Ray
AF
84-1
5-1
085
2536
2N18
62N
135
PNP
GE
IF8
100
-12
-50
8520
4.5
292N
135
2N13
6PN
PG
ER
F8
100
-12
-50
8540
6.5
312N
136
2N13
7PN
PG
ER
F8
100
-6-5
085
6010
332N
137
2N13
8PN
PR
ayA
F O
ut50
-12
-20
4014
030
502N
192
2N13
8A2N
139
PNP
PNP
Ray
RC
AA
F O
utIF
80 35-4
5-1
6-1
00 -15
85 7010 48
4.7
29 2925
100
2N18
7 25
V2N
136
-2N
135
2N14
0PN
PR
CA
Osc
35-1
6-1
570
457
282N
136
-2N
137
2N14
1PN
PSy
lPw
r.
1.5W
/4W
-30
-.8A
6540
.426
600
5W2N
142
NPN
Syl
Pwr
1.5W
/4W
30.8
A65
40.4
2660
05W
2N14
3PN
PSy
lPw
r1W
/4W
-30
-.8A
6540
.426
600
5W
2N14
4N
PNSy
lPw
r1W
/4W
30.8
6540
.426
600
5W2N
145
NPN
TI
IF65
205
7533
max
2N16
9 or
2N
292
2N14
6N
PNT
IIF
6520
575
36 m
ax2N
169
or 2
N29
2
2N14
7N
PNT
IO
sc65
205
7539
max
2N16
8A o
r 2N
293
2N14
8N
PNT
Ito
IF
6516
575
35 m
ax2N
169
or 2
N29
22N
148A
NPN
TI
lo I
F65
325
7535
max
2N16
9A
2N14
9N
PNT
Ilo
IF
6516
575
38 m
ax2N
169
or 2
N29
22N
149A
NPN
TI
lo I
F65
325
7538
max
2N16
9A2N
150
NPN
TI
lo I
F65
165
7541
max
2N16
9 or
2N
292
2N15
0AN
PNT
Ilo
IF
6532
575
41 m
ax2N
169A
2N15
5PN
PC
BS
Pwr
8.5W
-30
-3A
8548
.18
332W
9W2N
156
PNP
CB
SPw
r8.
5W-3
0-3
A85
40.1
836
2W9W
.
2N15
8PN
PC
BS
Pwr
8.5W
-60
-3A
8540
.18
402W
17W
2N15
8APN
PC
BS
Pwr
8.5W
-60
-3A
8541
.18
2N15
9Pt
Spra
gue
Sw80
-50
-10
2
JET
EC
No.
Typ
eM
fr.
Use
Dw
g.N
o.Pc
mw
@ 2
5°C
MA
R. K
AIIN
U)
BV
calo
ma
TI°
Chi
e
14 14 28
fats
me
Ii r
u-A
L A
LUL3
G. d
bP.
mw
- C
lass
AB
Clo
sest
GE
2N16
02N
160A
2N16
1
NPN
NPN
NPN
GP
GP
GP
Si I
FSi
IF
Si R
F
150
150
150
40 40 40
25 25 25
150
150
150
4 4 5
34 34 37
2N33
22N
332
2N33
32N
161A
NPN
GP
Si R
F15
040
2515
028
537
2N33
32N
162
NPN
GP
Si R
F15
040
2515
038
838
2N33
52N
162A
NPN
GP
Si R
F15
040
2515
038
838
2N33
52N
163
NPN
GP
Si R
F15
040
2515
050
640
2N33
52N
163A
NPN
GP
Si R
F15
040
25 1
5050
640
2N33
52N
164A
NPN
GE
Obs
olet
e65
1520
8540
839
max
2N16
8A2N
165
NPN
GE
Obs
olet
e65
1520
8572
536
max
2N16
92N
166
NPN
GE
Obs
olet
e25
620
5032
524
2N17
02N
167
NPN
GE
Sw3
7530
7585
309
2NI6
72N
168
NPN
GE
Obs
olet
e55
1520
7520
639
max
use
2N29
32N
168A
.N
PNG
EO
sc3
6515
2085
408
39 m
ax2N
168A
2N16
9N
PNG
EIF
365
1520
8572
935
max
2N16
92N
169A
NPN
GE
IF3
6525
2085
729
35 m
ax2N
169A
2N17
0N
PNG
ER
F3
556
2050
204
272N
170
2N17
2N
PNT
IIF
6516
575
282N
168A
2N17
3PN
PD
lePw
r40
W-6
0-7
A90
100
.68
20W
2N17
4PN
PD
lePw
r40
W-8
0-7
A90
45.2
2080
W2N
175
PNP
RC
AA
F20
-10
-250
65.8
432N
192
2N17
6PN
PM
otor
Pwr
-12
-600
8025
3W2N
178
PNP
Mot
orPw
rlO
W-1
2-6
0080
3029
3W2N
179
PNP
Mot
orPw
r-2
0-6
088
3230
02N
180
PNP
CB
SA
F O
ut15
0-3
0-2
575
60.7
373W
300
2N18
82N
18]
PNP
CB
SA
F O
ut25
0-3
0-3
875
60.7
3411
060
02N
188A
25V
2N18
2N
PNC
BS
IF10
025
1075
253.
52N
167
2N18
3N
PNC
BS
Sw10
025
1075
407.
52N
167
2N18
4N
PNC
BS
Sw10
025
1075
6012
2N16
72N
185
PNP
TI
AF
150
-20
-150
5055
40.5
225
02N
188A
2N18
6PN
PG
EA
F O
ut1
100
-25
-200
8524
.828
300
2N18
62N
186A
PNP
GE
AF
Out
120
0-2
5-2
0085
24.8
3075
02N
186A
2N18
7PN
PG
EA
F O
ut1
100
-25
-200
8536
130
300
2N18
72N
187A
PNP
GE
AF
Out
120
0-2
5-2
0085
361
3075
02N
187A
2N18
8PN
PG
EA
F O
ut1
100
-25
-200
8554
1.2
3230
02N
188
2N18
8APN
PG
EA
F O
ut1
200
-25
-200
8554
1.2
3275
02N
188A
2N18
9PN
PG
EA
F1
75-2
5-5
085
24.8
371
2N18
92N
190
PNP
GE
AF
175
-25
-50
8536
139
12N
190
2N19
1PN
PG
EA
F1
75-2
5-5
085
541.
241
12N
191
2N19
2PN
PG
EA
F1
75-2
5-5
085
751.
543
12N
192
2N19
3N
PNSy
lO
sc50
1575
63
2N16
72N
194
NPN
Syl
Osc
5015
5075
7.5
3.5
152N
169
JET
EC
No.
Typ
eM
fr.
Use
Dw
g.N
o.P
c m
w@
25T
MA
X. R
AT
ING
S
BV
cxIc
ma
TIT
hfe
4710
010
0
TY
PIC
AL
fat,
MC
VA
LUE
S
Go
dbP
r, m
w -
Cla
ssA
BC
lose
st G
E
2N20
62N
207
2N20
7A
PNP
PNP
PNP
RC
APh
ilPh
il
AF
AF
AF
75 50 50
-30
-12
-12
-50
-20
-20
85 65 65
.8 2 2
462N
191
2N24
1
2N20
7BPN
PPh
ilA
F50
-12
-20
6510
02
2N24
12N
211
NPN
Syl
Osc
5010
5075
303.
52N
293
2N21
2N
PNSy
lO
sc50
1050
7515
622
2N29
3
2N21
3N
PNSy
lA
F50
2510
075
150
422N
169A
2N21
4N
PNSy
lA
F O
ut12
525
7570
70.8
2920
02N
188
(PN
P)2N
215
PNP
RC
AA
F50
-30
-50
7044
.741
2N19
1
2N21
6N
PNSy
lIF
5015
5075
153
262N
169
2N21
7PN
PR
CA
AF
50-2
5-7
050
7033
160
2N19
22N
218
PNP
RC
AIF
35-1
6-1
570
484.
730
2N13
5
2N21
9.PN
PR
CA
Osc
80-1
6-1
571
7510
272N
136
2N22
0PN
PR
CA
AF
50-1
0-2
7165
.843
2N19
22N
223
PNP
Phil
AF
100
-18
-150
6595
.637
12N
192
2N22
4PN
PPh
ilA
F O
ut15
0-2
5-1
5075
75.5
3630
02N
241A
2N22
5PN
PPh
ilA
F O
ut15
0-2
5-1
5075
75.5
3630
02N
241A
2N22
6PN
PPh
ilA
F O
ut10
0-2
5-1
5065
55.4
3030
02N
188A
2N22
7PN
PPh
ilA
F O
ut10
0-2
5-1
5065
55.4
3030
02N
188A
2N22
8N
PNSy
lA
F O
ut50
2575
70.8
2610
02N
169
2N22
9N
PNSy
lA
F50
1240
7525
1.6
2N16
9
2N23
0PN
PM
all
Pwr
15W
-30
-2A
8583
.014
(fi
)2N
233
NPN
Syl
AF
5010
5075
4.5
2N23
4PN
PB
endi
xPw
r25
W-3
0-3
A90
252
2N23
4APN
PB
endi
xPw
r25
W-3
0-3
A90
252
2N23
5PN
PB
endi
xPw
r25
W-4
0-3
A90
332W
2N23
5APN
PB
endi
xPw
r25
W-4
0-3
A90
332W
2N23
6PN
PB
endi
xPw
r25
W-4
0-3
A95
354
2N23
6APN
PB
endi
xPw
r25
W-4
0-3
A95
354
2N23
7PN
PM
arA
F15
0-4
5-2
055
701
442N
192
25V
2N23
8PN
PT
IA
F50
-20
6042
2N19
12N
240
PNP
Phil
SB S
w10
-6-1
516
2N24
1PN
PG
EA
F O
ut1
100
-25
-200
8573
1.3
3530
02N
241
2N24
1APN
PG
EA
F O
ut1
200
-25
-200
8573
1.3
3575
02N
2414
2N24
2PN
PSy
lPw
r-4
5-2
A10
040
5 K
c (r
i)30
2.5W
2N24
3N
PNT
ISi
AF
750
60*
6015
0.9
4a30
2N24
4N
PNT
ISi
AF
750
60*
6015
0.9
7a30
2N24
7PN
PR
CA
Dri
ft R
F35
-35
-10
8560
30(3
7(4
) 1.
5Mc)
2N24
8PN
PT
IR
F30
-25
-585
2050
12
2N24
9PN
PT
IA
F O
ut35
0-2
5-2
0060
4531
5050
02N
188A
2N25
0PN
PT
IPw
r12
W-3
0-2
A80
506
Kc
346W
2N25
1PN
PT
IPw
r12
W-6
0-2
A80
506
Kc
346W
JET
EC
Dw
g.Pc
mw
MA
A. K
A I
I NU
JI T
rit,..
Al.
VA
LIJL
]
P, m
w -
Cla
ssN
o.T
ype
Mfr
.U
seN
o.@
25*
C13
VcE
Ic m
a'W
Chr
efo
b m
eG
o db
AB
Clo
sest
GE
2N25
3N
PNT
IIF
6512
575
302N
293
2N25
4N
PNT
IIF
6520
575
342N
293
2N25
5PN
PC
BS
Pwr
1.5W
/6.2
5W-1
5-3
A85
40.2
231W
5W2N
256
PNP
CB
SPw
r1.
5W/6
.25W
-30
-3A
8540
.226
2W10
W2N
257
PNP
Cle
Pwr
2W/2
5W-2
085
507
Kc
(d)
301W
2N26
0PN
PC
leSi
200
-10
-50
150
161.
838
2N26
0APN
PC
leSi
200
-30
-50
150
161.
838
2N26
1PN
PC
leSi
200
-75
-50
150
101.
836
2N26
2PN
PC
leSi
RF
200
-10
-50
150
206
402N
262A
PNP
Cle
Si R
F20
0-3
0-5
015
020
640
2N26
5PN
PG
EA
F1
75-2
5-5
085
110
1.5
452N
265
2N26
7PN
PR
CA
RF
Dri
ftSa
me
as 2
N24
7 ex
cept
for
flex
. lea
ds2N
268
PNP
Cle
Pwr
2W/2
5W-3
07
6 K
c (f
t)28
2N26
8A.
PNP
CIe
Pwr
2W/1
0W-6
090
202N
269
PNP
RC
ASw
35-2
0-1
0070
354
2N12
32N
270
PNP
RC
AA
F O
ut15
0-2
5-1
5050
7032
500
2N32
0
2N27
4PN
PR
CA
RF
Dri
ft35
-40*
-10
8560
3045
2N27
7PN
PD
lco
Pwr
55W
-40
-12A
9560
.534
16W
30W
2N27
8PN
PD
lco
Pwr
55W
-50
-12A
9560
.534
16W
30W
2N27
9PN
PA
mA
F12
5-2
0-1
075
30.3
2N18
7
2N28
0PN
PA
mA
F12
5-2
0-1
075
52.3
2N18
82N
281
PNP
Am
Al'
-16
-50
7570
.35
3438
2N24
1
2N28
2PN
PA
mA
F16
7-1
6-5
075
70.3
523
390
2N24
1(m
atch
ed p
r)2N
283
PNP
Am
Sw12
5-2
0-1
075
402N
188
2N28
4PN
PA
mSw
125
-32
-125
7545
.35
min
2N18
8
2N28
4APN
PA
mSw
125
-60
-125
7545
.35
min
2N29
0PN
PD
lco
Pwr
55W
-70
-12A
9550
.425
20W
85W
2N29
1PN
PT
IA
F18
0-2
5-2
0085
4533
5050
02N
188A
2N29
2N
PNG
EIF
365
1520
8525
635
max
2N29
22N
293
NPN
GE
RF
365
1520
8525
739
max
2N29
3
2N29
7PN
PC
lePw
r15
W-6
0-5
A85
356
Kc
2N30
1PN
PR
CA
Pwr
12W
-40
-2A
8570
302.
7W2N
301A
.PN
PR
CA
Pwr
12W
-60
-2A
8570
302.
7W2N
302
2N30
3PN
PPN
PR
ayR
ayO
bsol
ete
Obs
olet
e15
015
0-1
0-3
0-2
00-2
0085 85
45 757
142N
186A
2N18
6A2N
306
NPN
Syl
AF
5012
7530
.75
2N29
2
2N30
7PN
PSy
lA
F O
ut-3
5-1
A75
254
2N30
7A.
PNP
Syl
Pwr
17W
-35
-2A
.75
203.
5 K
c27
2N30
8PN
PT
IIF
30-2
0-5
5541
2N30
9PN
PT
IIF
30-2
0-5
5543
2N31
0PN
PT
IIF
Al'
30-3
0-5
5537
JET
EC
No.
Typ
eM
fr.
Dw
g.U
seN
o.Pc
mw
@ 2
5°C
MA
X. R
AT
ING
S
BV
csIc
ma
TeC 85 85 85
his
50 50 25
TY
PIC
AL
fan
MC
YA
LU
LS
Ge
dbPo
mw
-A
Cla
ss BC
lose
st G
E
2N31
12N
312
2N31
3
PNP
NPN
NPN
Mot
orM
otor
GE
Sw Sw Obs
olet
e
75 75 65
-15 15 15
205
36 m
ax
2N12
32N
167
2N29
2
2N31
4N
PNG
EO
bsol
ete
6515
2085
258
39 m
ax2N
293
2N31
5PN
PG
TSw
100
-15
-200
8520
5
2N31
6PN
PG
TSw
100
-10
-200
8530
12
2N31
7PN
PG
TSw
100
-6-2
0085
3020
2N31
8PN
PG
TPh
oto
50-1
2-2
010
0.7
5
2N31
9PN
PG
EA
F O
ut2
240
-20
-200
8533
230
750
2N18
7A
2N32
0PN
PG
EA
F O
ut2
240
-20
-200
8548
2.5
3275
02N
188A
2N32
1PN
PG
EA
F O
ut2
240
-20
-200
8548
335
750
2N24
1A
2N32
2PN
PG
EA
F2
140
-16
-100
8570
239
2N19
0
2N32
3PN
PG
EA
F2
140
-16
-100
8590
2.5
412N
191
2N32
4PN
PG
EA
F2
140
-16
-100
8580
343
2N19
2
2N32
5PN
PSy
lPw
r12
W-3
5-2
A85
40.2
2N32
6N
PNSy
lPw
r7W
352A
8540
.2
2N32
7PN
PR
aySi
AF
335
-50
-100
160
14.2
32
2N32
8PN
PR
ayA
F33
5-3
5-1
0016
024
.35
34
2N32
9PN
PR
ayA
F33
5-3
0-1
0016
050
.536
2N33
0PN
PR
ayA
F33
5-4
5-5
016
030
.25
34
2N33
1PN
PR
CA
AF
200
-30*
-10
8548
.744
.52N
188A
2N33
2N
PNT
I -G
ESi
AF
415
045
*25
200
1530
352N
332
2N33
3N
PNT
I -G
ESi
AF
415
045
*25
200
3533
392N
333
2N33
4N
PNT
I -G
ESi
AF
415
045
*25
175
.975
a8
min
2N33
4
2N33
5N
PNT
I -G
ESi
AF
415
045
*25
200
5038
422N
335
2N33
6N
PNT
I -G
ESi
AF
415
045
*25
175
.99
a7
2N33
6
2N34
4PN
PPh
ilR
F (=
SB10
1)20
-5-5
8522
50
2N34
5PN
PPh
ilR
F (=
SB10
2)20
-5-5
8560
50
2N34
6PN
PPh
ilR
F (=
SB10
3)20
-5-5
8515
75
2N35
0PN
PM
otor
Pwr
10W
-40*
-3A
9030
5 K
c m
in31
8W
2N35
1PN
PM
otor
Pwr
10W
-40*
-3A
9045
5 K
r m
in33
8W
2N35
2PN
PPh
ilPw
r25
W-4
0-2
A10
065
16 K
r36
2.5W
lOW
2N35
3PN
PPh
ilPw
r30
W-4
0-2
A10
090
16 K
c36
5WlO
W
2N35
4PN
PPh
ilSi
Osc
150
-25
-50
140
1815
fr.
.2N
355
PNP
Phil
Si S
w15
0-1
0-5
014
018
25 I
mes
2N35
6N
PNG
TSw
100
1850
085
303
2N35
7N
PNG
TSw
100
1550
085
306
2N63
4
2N35
8N
PNG
TSw
100
1250
085
309
2N63
5
2N37
6PN
PM
otor
Pwr
lOW
-40*
-3A
9060
5 K
r m
in35
8W
2N37
8PN
PT
SSw
15W
-20
-3A
8535
7 K
c (3
)
2N37
9PN
PT
SSw
15W
-40
-3A
8530
7 K
c (d
)
2N38
0PN
PT
SSw
15W
-30
-3A
8560
7 K
r (3
)
JET
EC
No.
Typ
eM
fr.
Use
Dw
g.N
o.Pc
mw
@ 2
5°C
MA
X. R
AT
ING
S
BV
ccIc
ma
Tr°
Clir
e - 50 75 100
TY
PIC
AL
fah
me
VA
LUE
S
Ge
dbP.
mw
- C
lass
AB
_- 50
050
050
0
Clo
sest
GE
2N38
12N
382
2N38
3
- PNP
PNP
PNP
TS
TS
TS
AF
Out
AF
Out
AF
Out
200
200
200
-25
-25
-25
-200
-200
-200
85 85 85
1.2
1.5
1.8
25 33 31
2N32
02N
321
2N32
I2N
384
PNP
RC
AR
F D
rift
120
-30
-10
85.9
84 a
100
342N
386
PNP
Phil
Pwr
.12
.5W
-60
-3A
100
207
He
2N38
7PN
PPh
ilPw
r12
.5W
-80
-3A
100
206
He
2N39
3PN
PPh
ilSw
50-6
-50
8515
560
fm
ax2N
394
PNP
GE
Sw2
150
-10
-200
100
150
5.5
2N39
42N
395
PNP
GE
Sw2
150
-15
-200
100
150
72N
395
2N39
6PN
PG
ESw
215
0-1
0-2
0010
015
07
2N39
62N
397
PNP
GE
Sw2
150
-10
-250
100
150
102N
397
2N39
8PN
PR
CA
Sw2
50-1
05-1
0085
602N
399
PNP
Ben
dix
Pwr
25W
-40
-3A
9033
2N40
1PN
PB
endi
xPw
r25
W-4
0-3
A90
302N
402
PNP
WA
F18
0-2
0-1
5085
.96
a60
0 H
e37
2N18
8A2N
403
PNP
WA
F O
ut18
0-2
0-2
0085
.97
a.85
0 K
c32
302N
187A
2N40
4PN
PR
CA
Sw12
0-2
4-1
0085
122N
396
2N40
5PN
PR
CA
AF
150
-18
-35
8535
650
He
432N
188A
2N40
6PN
PR
CA
AF
150
-18
-35
8535
650
Kc
432N
188A
2N40
7PN
PR
CA
AF
Out
150
-18
-70
8565
3316
02N
241A
.2N
408
PNP
RC
AA
F O
ut15
0-1
8-7
085
6533
160
2N24
1A2N
409
PNP
RC
AIF
80-1
3-1
585
456.
838
.82N
135
2N41
0PN
PR
CA
IF80
-13
-15
8545
6.8
38.8
2N13
52N
411
PNP
RC
AR
F80
-13
-15
8575
102N
137
2N41
2PN
PR
CA
RF
80-1
3-1
585
7510
2N13
72N
413
PNP
Ray
RF
150
-18
-200
8530
2.5
102N
135
2N41
3APN
PR
ayIF
150
-15
-200
8530
2.5
332N
135
2N41
4PN
PR
ayR
F15
0-1
5-2
0085
607
162N
136
2N41
4APN
PR
ayIF
150
-15
-200
8560
735
2N13
62N
415
PNP
Ray
RF
150
-10
-200
8580
1030
2N13
72N
415A
PNP
Ray
IF15
0-1
0-2
0085
8010
302N
137
2N41
6PN
PR
ayR
F15
0-1
2-2
0085
8010
202N
137
2N41
7PN
PR
ayR
F15
0-1
0-2
0085
140
2027
2N42
2PN
PR
ayA
F15
0-2
0-1
00.
8550
.838
2N18
8A(2
N32
0)
2N42
5PN
PR
aySw
150
20-4
0085
154
2N39
42N
426
PNP
Ray
Sw15
0-1
8-4
0085
186
2N39
52N
427
PNP
Ray
Sw15
0-1
5-4
0085
2011
2N39
62N
428
PNP
Ray
Sw15
0-1
2-4
0085
3017
2N39
72N
438
NPN
CB
SSw
100
30*
8525
2.5
mm
2N43
9N
PNC
BS
Sw10
030
*85
355
min
2N63
42N
440
NPN
CB
SSw
100
30*
8565
10 m
in2N
635
2N44
4N
PNG
TSw
100
1585
15.5
min
JET
EC
No.
Typ
eM
fr.
Use
Dw
g.N
o.
MA
IL. K
A I
I N
UJ
Pc m
w@
25*
CB
VcE
Ic m
aT
r°C
mm
ri,,
Fo. [
aevc
a P. m
w -
Cla
ssPM
,he
me
G. d
bA
BC
lose
st G
E
2N44
5N
PNG
TSw
100
1285
352
min
2N44
6N
PNG
TSw
100
1085
605
min
2N63
4
2N44
7N
PNG
TSw
100
685
125
9 m
in2N
635
2N45
0PN
PG
ESw
815
0-1
2-1
2585
60 m
in11
2N45
0
2N45
1N
PNG
ESi
Pwr
685
W65
5A15
016
400
Kc
42N
451
2N45
2N
PNG
ESi
Pwr
685
W65
5A.
150
1240
0 K
c2.
52N
452
2N45
3N
PNG
ESi
Pwr
685
W65
2A15
030
400
Ka
62N
453
2N45
4N
PNG
ESi
Pwr
685
W65
2A15
015
400
Ka
102N
454
2N46
0PN
PT
SA
F20
0-4
5*-4
0010
0.9
6a1.
22N
319
2N46
1PN
PT
SA
F20
0-4
5*-4
0010
0.9
8a1.
22N
320
2N46
2PN
PPh
ilSw
150
-40*
-200
7545
.5 m
in2N
188A
2N46
4PN
PR
ayA
F15
0-4
0-1
0085
26.7
40
2N46
5PN
PR
ayA
F15
0-3
0-1
0085
45.8
422N
188A
(2N
320)
2N46
6PN
PR
ayA
F15
0-2
0-1
0085
901
442N
241A
(2N
321)
2N46
7PN
PR
ayA
F15
0-1
5-1
0.0
8518
01.
245
2N48
9G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
489
2N49
0G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
490
2N49
1G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
491
2N49
2G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
492
2N49
3G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
493
2N49
4G
ESi
Uni
5SE
E G
-E
TR
AN
SIST
OR
SPE
CIF
ICA
TIO
NS
SEC
TIO
N2N
494
2N49
5PN
PPh
ilSi
OSC
150
-25
-50
140
1815
fM
a%
2N49
6PN
PPh
ilSi
OSC
150
-10
-50
140
1825
rm
..:
2N50
8PN
PG
EA
F2
140
-16
-100
8512
53.
545
2N50
8
2N51
8PN
PG
ESw
815
0-1
2-1
2585
60 m
in11
2N51
8
2N51
9PN
PG
TSw
100
-15
8525
.5 m
in2N
186
2N52
0PN
PG
TSw
100
-12
8540
3 m
in
2N52
1PN
PG
TSw
100
-10
8570
8 m
in2N
397
2N52
2PN
PG
TSw
100
-885
120
15 m
in
2N52
3PN
PG
TSw
100
-685
200
21 m
in
2N52
4PN
PG
EA
F2
225
-30
-500
100
302
2N52
4
2N52
5PN
PG
EA
l'2
225
-30
-500
100
442.
52N
525
2N52
6PN
PG
EA
F2
225
-30
-500
100
643.
02N
526
2N52
7PN
PG
EA
F2
225
-30
-500
100
813.
32N
527
2N52
9N
PN-
GT
AF
100
1585
172.
5
PNP
2N53
0N
PN-
GT
PNP
2N53
1N
PN-
GT
PNP
AF
AF
100
100
15 15
8522
3.0
8527
3.5
JET
EC
Dw
g.Pc
mw
MA
X. R
AT
ING
SI T
rIC
.AL.
VA
LLIC
P. m
w -
Cla
ssN
o.T
ype
Mfr
.U
seN
o.@
25°
CB
VcE
Ic m
aT
J°C
hrfo
b m
eG
db
AB
Clo
sest
GE
2N53
2N
PN-
GT
AF
100
1585
324.
0PN
P2N
533
NPN
-G
TA
F10
015
8537
4.5
PNP
2N53
8PN
PM
-H
Pwr
10W
-80*
-20
958
Kc
2N53
8APN
PM
-H
.Pw
r10
W-8
0*-2
095
8 K
c2N
539
PNP
M -
HPw
rlO
W-8
0*-2
095
7 K
c2N
539A
PNP
M -
HPw
r10
W-8
0*-2
095
7 K
c2N
540
PNP
M -
HPw
r10
W-8
0*-2
095
6 K
c2N
540A
PNP
M -
HPw
rlO
W-8
0*-2
095
6 K
a2N
544
PNP
RC
AR
F80
-18*
-10
8560
3030
.12N
554
PNP
Mot
orPw
rlO
W-4
0*-3
A90
308
Kc
342N
555
PNP
Mot
orPw
rlO
W-4
0*-3
A90
308
Kc
342N
574
PNP
M -
HPw
r10
0W-6
0*-1
5A95
6 K
c2N
574A
PNP
M-1
1Pw
r10
0W-8
0*-1
5A95
6 K
c2N
575
PNP
M -
HPw
r10
0W-6
0*-1
5A95
5 K
c2N
575A
PNP
M -
HPw
r10
0W-8
0*-1
5A95
5 K
c2N
577
PNP
Mu
Phot
o25
-25
-10
552N
578
PNP
RC
ASw
120
-14
-400
8515
52N
395
2N57
9PN
PR
CA
Sw12
0-1
4-4
0085
308
2N39
62N
580
PNP
RC
ASw
120
-14
-400
8545
152N
397
2N58
1PN
PR
CA
Sw80
-15
-100
8530
82N
396
2N58
2PN
PR
CA
Sw12
0-1
4-1
0085
6018
2N58
3PN
PR
CA
Sw80
-15
-100
8530
82N
584
PNP
RC
ASw
120
-14
-100
8560
182N
585
NPN
RC
ASw
120
2420
085
405
2N63
4N
PNG
ESw
215
020
300
8515
82N
634
2N63
5N
PNG
ESw
215
020
300
8525
122N
635
2N63
6N
PNG
ESw
215
020
300
8535
172N
636
3N21
PtSy
lSw
100
-60
503N
22N
PNW
ER
F15
*85
96o
243N
23N
PNG
P50
305
1012
3N23
AN
PNG
P50
305
2014
3N23
BN
PNG
P50
305
3515
3N23
CN
PNG
P50
305
5017
3N29
NPN
GE
Obs
olet
e50
620
8510
040
103N
30N
PNG
EO
bsol
ete
506
2085
100
8010
3N31
NPN
GE
Obs
olet
e50
620
8510
020
103N
36N
PNG
ER
F7
306
2085
.2.2
L-8
1°50
min
11.5
3N36
3N37
NPN
GE
RF
730
620
851.
1Z-1
00°
90 m
in9
3N37
NO
TE
: Clo
sest
GE
type
sar
e gi
ven
only
as
a ge
nera
l gui
de a
ndar
e ba
sed
on a
vaila
ble
publ
ishe
d el
ectr
ical
spe
cifi
catio
ns.
How
ever
, Gen
eral
Ele
ctri
c C
ompa
ny m
akes
. no
repr
esen
tatio
n as
to th
eac
cura
cy a
ndco
mpl
eten
ess
of s
uch
info
rmat
ion.
Sinc
e m
anuf
actu
ring
tech
niqu
esar
e no
t ide
ntic
al, t
he G
ener
alE
lect
ric
Com
pany
mak
esno
cla
im, n
or d
oes
it w
arra
nt, t
hat i
tstr
ansi
stor
s ar
e ex
act e
quiv
alen
tsor
rep
lace
men
ts f
or th
e ty
pes
refe
rred
to.
EX
PLA
NA
TIO
N O
F S
YM
BO
LS
TY
PE
S A
ND
US
ES
:
Si-S
ilico
n H
igh
Tem
pera
ture
Tra
nsis
tors
( a
ll ot
hers
ger
man
ium
)Pt
-Poi
nt c
onta
ct ty
pes
AF-
Aud
io F
requ
ency
Am
plif
ier-
Dri
ver
AF
Out
-Hig
h cu
rren
t AF
Out
put
Pwr-
Pow
er o
utpu
t 1 w
att o
r m
ore
RF-
Rad
io F
requ
ency
Am
plif
ier
Osc
-Hig
h ga
in H
igh
freq
uenc
y R
F os
cilla
tor
IF-I
nter
med
iate
Fre
quen
cy A
mpl
ifie
rlo
IF-
Low
IF
( 26
2 K
c) A
mpl
ifie
rSw
-Hig
h cu
rren
t Hig
h fr
eque
ncy
switc
hA
F Sw
-Low
fre
quen
cy s
witc
h
RA
TIN
GS
:Pc
=M
axim
um c
olle
ctor
dis
sipa
tion
at 2
5°C
(76
°F)
ambi
ent r
oom
tem
pera
ture
. Sec
onda
ry d
esig
natio
ns a
re r
atin
gs w
ith c
onne
c-tio
n to
an
appr
opri
ate
heat
sin
k.B
VcE
=M
inim
um c
olle
ctor
-to
-em
itter
bre
akdo
wn
volta
ge. G
E tr
an-
sist
ors
mea
sure
d w
ith B
ase
-to
-em
itter
res
ista
nce
as f
ollo
ws:
10K
for
AF
and
AF
Out
PN
P1
Meg
for
RF,
IF,
and
Osc
PN
PO
pen
circ
uit f
or N
PN*U
nder
BV
cE=
Min
imum
col
lect
or -
to -
base
bre
akdo
wn
volta
ge (
for
grou
nded
bas
e ap
plic
atio
ns).
Ic=
Max
imum
col
lect
or c
urre
nt. (
Neg
ativ
e fo
r PN
P, P
ositi
ve f
orN
PN. )
T.T
=M
axim
um c
entig
rade
junc
tion
tem
pera
ture
. Pc
mus
t be
dera
ted
linea
rily
to 0
mw
dis
sipa
tion
at th
is te
mpe
ratu
re.
14.=
Smal
l sig
nal b
ase
to c
olle
ctor
cur
rent
-ga
in, o
r B
eta
( ex
cept
whe
re e
mitt
er to
col
lect
or g
ain,
alp
ha a
, is
give
n).
f.b=
Alp
ha c
ut -
off
-fre
quen
cy. F
requ
ency
at w
hich
the
emitt
er to
colle
ctor
cur
rent
gai
n, o
r al
pha,
is d
own
to 1
V 2
or
.707
of
itslo
w f
requ
ency
aud
io v
alue
. For
som
e po
wer
tran
sist
ors,
the
Bet
a or
bas
e -t
o -c
olle
ctor
curr
ent -
gain
cut
off-
freq
uenc
yis
give
n as
not
ed.
Ge=
Gro
unde
d-em
itter
Pow
er G
ain.
AF,
AF
Out
, and
Pw
r G
ain
mea
sure
d at
1 K
c.R
F, I
F, a
nd O
sc G
ains
at 4
55 K
c.(S
w G
ain
is d
epen
dent
on
circ
uit a
nd w
ave
-sha
pe. )
( A
ll m
easu
red
at ty
pica
l pow
er o
utpu
t lev
el f
or g
iven
tran
.si
stni
type
.)P0
=M
axim
um P
ower
Out
put a
t 5%
har
mon
ic d
isto
rtio
n, in
mw
exce
pt w
here
not
ed a
s w
atts
. Cla
ss A
sin
gle
-end
ed,
Cla
ss B
Push
Pul
l.
MA
NU
FA
CT
UR
ER
S:
Am
-Am
pere
xB
endi
x-B
endi
x A
viat
ion
Cor
p.C
BS-
CB
S-H
ytro
n.C
le-C
levi
te T
rans
isto
r Pr
oduc
ts.
Dlc
-Del
co R
adio
Div
., G
ener
al M
otor
s C
orp.
GE
-Gen
eral
Ele
ctri
c C
ompa
ny.
GP-
Ger
man
ium
Pro
duct
s C
orp.
Mal
l-P.
R. M
allo
ry a
nd C
ompa
ny, I
nc.
Mar
-Mar
velc
o, N
atio
nal A
ircr
aft C
orp.
M-H
-Min
neap
olis
-Hon
eyw
ell R
egul
ator
Co.
Mot
or-M
otor
ola,
Inc
.M
u-M
ulla
rd L
td.
Phil-
Philc
o.R
ay-R
ayth
eon
Man
ufac
turi
ng C
ompa
ny.
RC
A-R
CA
.Sp
ragu
e-Sp
ragu
e E
lect
roni
cs C
ompa
ny.
Syl-
Sylv
ania
Ele
ctri
c Pr
oduc
ts C
ompa
ny.
TI-
Tex
as I
nstr
umen
ts, I
nc.
TS-
Tun
g-So
l.W
-Wes
tingh
ouse
Ele
ctri
c -C
orp.
WE
-Wes
tern
Ele
ctri
c C
ompa
ny.
OUTLINE DRAWINGS
TRANSISTOR SPECIFICATIONS
4_ .240MAX
1.50MIN
4- .185 4-.025 4.
.345
.322DIA
.020 MAX(GLASS EXTENSION))EXTENSION))1
.370"MAX
.335"
COLLECTOR 1.460MAX
BASE DIA=IEMITTER
DIMENSIONS WITHINJETEC OUTLINE JETEC BASE
TO -5 E3-44.___ .235" 150"
MAX MIN
--1 0323 LEADS.017ti0o02 DIA.
(NOTE)
COLLECTOR
EMITTER
BASE
LINE SPECIFIED LEAD DIAMETERAPPLIES TO THE ZONE BETWEEN .050 AND.250 FROM THE BASE SEAT. A MAXIMUMDIAMETER OF.021 IS HELD BETWEEN .250AND 1.5. THE LEAD DIAMETER IS NOTCONTROLLED OUTSIDE OF THESE ZONES.
.250MAX.
.320 MAX.
1.5"
111[1.-BASE LEAD DIA.=.01.7..+.002"EMITTER-. -001"01 COLLECTOR
.192
NN
.200±.010
90..03
2.MOUNTING POSITION- ANY3. WEIGHT .05 OZ.4.BASE CONNECTED TO TRANSISTOR SHELLS.DIMENSIONS IN INCHES
--.530 MAX
.036 MAX.
.03
0
161
TRANSISTOR SPECIFICATIONS
DIMENSIONS WITHINJETEC OUTLINE
TO -5JETEC BASE
E3-44N OTE I: This zone is controlled for auto-matic handling. The variation in actual
diameter within this zone shall not exceed
.010.
N OTE 2: Measured from max. diameter ofthe actual device.
N OTE 3: The specified lead diameter ap-plies in the zone between .050 and .250from the base seat. Between .250 and 1.5maximum of .021 diameter is held. Outsideof these zones the lead diameter is notcontrolled.
450.029 ( NOTE 2)
DIMENSIONS WITHINJETEC OUTLINE....T0-5JETEC BASE E3-53N OTE I: This zone is controlled for auto-
matic handling. The variation in actual
diameter within this zone shall not exceed
.010.
N OTE 2: Measured from max. diameter ofthe actual device.
NOTE 3: The specified lead diameter ap-plies in the zone between .050 and .250from the base seat. Between .250 and 1.5maximum of .021 diameter is held. Outsideof these zones the lead diameter is notcontrolled.
E
LEAD I
EMITTER...EBASE ONE.. B1BASE TWO..132
82LEAD 4
81LEAD 2
TINNED LEADS.017 +.0001.-02(NOTE 3)
.370 MAX.360 MIN.335 MAX.325 MIN
.150MIN .260MAX(NOTE1).250M I N
O
k200±.010-1
.031t003
.370MAX
.360 MINL .335 MAX
.325 MIN
U
El
900
900
1.5 MIN
3 LEADS017-1-'002- .001(NOTE 3)
PIN I - EMITTERPIN 2 BASE
PIN 3 COLLECTOR
1-7200 ±.010-11
1
t I.150MIN .260MAX(NOTE!) .250M IN
1
1.5 MIN
45°031±.003
.029 (NOTE 2)
162
TRANSISTOR SPECIFICATIONS
.995 MAX.
.370MAX.
.395NOM
1.040
+.004-.002
DIA.
10-32THD
CLASS 2FIT
.100 NOM 3)03)0
300NOM
.100 NOM (2)0-.300NOM
(I)
.380MAX.
.100NOM
.160MAX.
14-.030 MAX.
.960MAXDIA.
.625NOMDIA.
.125
.200NOM
PIN I - EMITTERPIN 2 BASE
PIN 3 COLLECTOR (INTERNALLYCONNECTED TO CASE)WEIGHT:40 OZ.
MAX. ALLOWABLE TORQUE ON STUD- 15 IN. LBS
163
TRANSISTOR SPECIFICATIONS
.260 MAX .150 MIN.250 MIN (NOTE I )
.5 MIN
4 LEADS017 +.00201A
' -.001(NOTE 3)
90*
450±3*
7 ±.0310
.135,,MAX."
ORIENTATIONRANDOM
.345
.322
h335 MAX.325 M 1 N
.370MAX
.360 MIN
.029 M IN(NOTE 2)
900
1200± 010" L.-
,,T1Z
4-D25
C=1COLLECTOR
BASEI=C=7
EMITTER
.020 MAX. t4-(GLASS EXTENSION
I.460MAX.DIA,
DIMENSIONS WITHINJETEC OUTLINE
TO-I2JETEC BASE
E4-54NOTE 1: This zone is controlled for auto-matic handling. The variation in actual
diameter within this zone shall not exceed
.010.
NOTE 2: Measured from max. diameter of
the actual device.
NOTE 3: The specified lead diameter ap-plies in the zone between .050 and .250from the base seat. Between .250 and .5maximum of .021 diameter is held. Outsideof these zones the lead diameter is notcontrolled.
CUT TO 0.200° FOR USE IN SOCKETS.LEADS TINNED DIA. .018MOUNTING POSITION - ANYWEIGHT: .05 OZ.BASE CONNECTED TO TRANSISTOR SHELL.DIMENSIONS IN INCHES.
.106086
.151
.137
.055
.041
164
CIRCUIT DIAGRAM INDEX
AMPLIFIERS: Page
Audio, Five Transistor 29
Audio, Loudspeaker 27
Audio, Simple 26
Audio, Single Stage 18
Direct Coupled "Battery Saver" 26
Phono, Three Transistor 27
Phono, Four Transistor 28
Power, Six -Watt 34
Power, Ten -Watt 36
AUTODYNE CONVERTER 38
FLIP-FLOPS:Five Hundred KC Counter Shift Register 81
Non -Saturated 80
Saturated 77, 78
LOGIC CIRCUITS:Basic Circuits . 93, 94, 95
DCTL 69
MULTIVIBRATORS:Hybrid 62
Unijunction Transistor 61
OSCILLATORS:Basic Relaxation 59
Code Practice 26
PREAMPLIFIERS:Hybrid Phono-Tape 32
NPN for Magnetic Pickups 36
Phono-Tape 30
Preamplifier and Driver 37
Continued - following page
165
POWER SUPPLIES: Page
Class A Transistor Amplifier 106, 107Dual Six -Watt Amplifier 108Dual Ten -Watt Amplifier 109Five -Watt Amplifier 108General Purpose Transistor 105Preamplifier 105
RADIOS:Direct Coupled Vest Pocket 44Five Transistor Superheterodyne 51Four Transistor Superheterodyne 47, 48Four Transistor, Nine Volt, Reflex 50Four Transistor, Six Volt, Reflex 49Simple Receiver 44Six Transistor, One -Watt 55Six Transistor, Six Volt 53Six Transistor, Superheterodyne 54Six Transistor, Three Volt 52Three Transistor Reflex 45, 46Two Transistor 44
SAWTOOTH GENERATOR, LINEAR 60
STEREOPHONIC TAPE SYSTEM,BLOCK DIAGRAM 35
TEST CIRCUITS:Intrinsic Stand-off Ratio ( n ) 58Peak Point Emitter Current (IP) 58Typical Autodyne Converter 149Typical IF 149Typical First IF Amplifier 148Typical Second IF Amplifier 148
TIME DELAY CIRCUIT WITH RELAY 62
TRIGGERING CIRCUITS:Base Triggering 88Base Triggering with Hybrid Gate 89Collector Triggering 88Collector Triggering with Diode 89Collector Triggering with Trigger Amplifier 89Emitter Triggering 88Using Trigger Power to Increase Switching Speeds 90
166
NOTES ON THE CIRCUIT DIAGRAMS
TRANSFORMERS
The audio transformers used in these diagrams werewound on laminations of 1%" by 1%" and a 1/2" stocksize, and having an electrical efficiency of about 80%.Smaller or less efficient transformers will degrade theelectrical fidelity of the circuits.
OSCILLATOR COIL
Ed Stanwyck Coil Company #1265Onondaga Electronic Laboratories #A-10047 or equivalent
VARIABLE CONDENSER
Radio Condenser Company Model 242Onondaga Electronic Laboratories #A-10053 or equivalent
FERRITE ROD ANTENNA
Onondaga Electronic Laboratories #A-10067 or equivalent
If you are unable to obtain these components from eitheryour local or a national electronic parts distributor, wesuggest you contact:
Onondaga Electronic Laboratories112 Dewitt StreetSyracuse 3, N. Y.
167
READING LIST
The following list of semiconductorreferences gives texts of both elemen-tary (E) and advanced (A) character.Obviously, the list is not inclusive, butit will guide the reader to otherreferences.Garner, L., Transistor CircuitHandbook (E)
(Coyne)Hunter, L. P., Handbook of Semi-conductor Electronics (A)
(McGraw-Hill)Kiver, M. S., Transistors in Radioand Television (E)
(McGraw-Hill)Krugman, L., Fundamentals ofTransistors (E)
(Rider)Lo, A. W., Endres, R.O., Zawels, J.,Waldhauer, F. D., Cheng, C. C.,Transistor Electronics (A)
(Prentice -Hall)Shockley, W., Electrons and Holes inSemiconductors (A)
(Van Nostrand)Shea, R. F., et al., Principles ofTransistor Circuits (A)
(Wiley)Shea, R. F., Transistor AudioAmplifiers (A)
(Wiley)Shea, R. F., Transistor CircuitEngineering (A).
(Wiley)Spenke, E., et al., ElectronicSemiconductors (A)
(McGraw-Hill)Turner, R. P., Transistors - Theoryand Practice (E)
(Gernsback)
168
SEMICONDUCTOR PRODUCTS DEPARTMENT
GENERAL, d ELECTRICELECTRONICS PARK SYRACUSE 1, N. Y.(In Canada, Canadian, General Electric Conipahy, Ltd., Toronto, 04';Ohtside the U.S.A., and Canada,Asy: Internationml General Electric Com-pany, Inc., Electronics GIN., 150 East 42nd ViNew York, N.Y., U.S.A ) '
