COURSE SYLLABUS - hcmut.edu.vn

COURSE SYLLABUS Electronics Circuits Lab(ECE442)

Final score = 50%in-Lab+50%Final Exam Week 1: Course introduction

Introduction about Electronics Circuits Lab. Introduction how to use Instruments in Lab. Introduction how to create an complete circuit. Before class each student need to download the Lab Procedure and user

manual of instrument in Lab from the website. After class each group of students need to make a brief report of user

manual of all measurement electronics instrument of Labs. Week 2: Lab1 + Lab2

Create simple circuits using breadboard and measure voltage and current an element or a branch of circuit.

Networks Solving and Equivalent Circuit. Before class each student need to review the background knowledge of Lab,

read carefully the Experimental Procedure of Lab, and do the Preliminary Work of Lab1 + Lab2.

After class each student need to make a report of Experimental Procedure Lab1+Lab2.

Week 3: Lab3 Transient Response. Before class each student need to review the background knowledge of Lab,

read carefully the Experimental Procedure of Lab, and do the Preliminary Work of Lab3.

After class each student need to make a report of Experimental Procedure Lab3.

Week 4: Lab4 Rectifier, Regulator, and Power Supply Circuits. Before class each student need to review the background knowledge of Lab,



Week 5: Lab5 MOS Field-Effect Transistor and Amplifier Circuits using MOSFET.

Before class each student need to review the background knowledge of Lab, read carefully the Experimental Procedure of Lab, and do the Preliminary Work of Lab5.

After class each group of students need to make a report of Experimental Procedure Lab5.

Week 6: Lab6 MOSFET Inverter Circuits. Before class each student need to review the background knowledge of Lab,


After class each student need to make a report of Experimental Procedure Lab6

Week 7: Lab7 Bipolar Junction Transistors and Amplifier Circuits using BJT . Before class each student need to review the background knowledge of Lab,


This week students will working with making Common Emitter Amplifier Circuits

After class students do not have to make reports. Week 8: Lab7

Bipolar Junction Transistors and Amplifier Circuits using BJT . This week students will working with Common Base Amplifier Circuit and

Common Collector Amplifier Circuit. After class each group of students need to make a complete report of

Experimental Procedure Lab7. Week 9: Lab8

Operational Amplifiers(Op-Amp).

Before class each student need to review the background knowledge of Lab, read carefully the Experimental Procedure of Lab, and do the Preliminary Work of Lab8.


Week 10: Final Exam Preliminary Work requirement : Each student have to do the Preliminary Work of Labs before go the class. Preliminary Work must be hand-writing on A4 paper and submit to the teacher before

doing the Labs.

Report Requirement : Reports of Labs are made by individual or team, it is up to the teacher and written

carefully in Electronics Circuits Lab Syllabus. Report must be hand-writing on A4 paper and submit to the teacher in next week. All the Graphs or Charts of the reports must be draw using Microsoft Excel or equivalent

program and printed on A4 paper. Students have to attach the graphs or charts to the report.(Maximum number of charts or graphs in an A4-paper is 4)

Addition point : During the process of working in Labs each group of students will be considered and plus or subtract points.

University of Technology

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1 Laboratory Introduction I INTRODUCTION 1 Objectives: The objective of this experiment is:

- To learn how to make basic electrical measurements of current, voltage, and resistance using multimeters (FLUKE).

- To study the relationship of Ohm's Law. - To learn the various methods of calculating power. - To learn and apply Kirchhoff's Current Law (KCL). - To learn and apply Kirchhoff's Voltage Law (KVL). - To obtain further practice in electrical measurements. - To become more familiar with both series and parallel circuits. - To learn how to determine "equivalent resistance" for both series and parallel circuits. - To learn how to use "voltage division" and "current division." - To become more familiar with applications of Ohm's Law and Kirchhoff's Laws.

2 Equipment : - DC power supply - KL 200 Linear circuit lab 3 Prerequisites: II BACKGROUND

1. BASIC QUANTIES

Voltage (symbol V) is the measure of electrical potential difference. It is measured in units of Volts, abbreviated V. The example below shows several ways that voltages are specified.

Voltage is always measured between two points. One point is taken as the reference. We can explicitly state this using subscripts. Vab is the voltage at node a with respect to b. The choice of reference node, a or b, determines the polarity (sign) of the voltage. Thus the order of the subscripts determines the sign of the voltage. Vab = −Vba. Many circuits have a common node to which all voltages are referenced. The common node is often connected to ground at some point. If a common node is defined as in node d of this example, it is implied that Va is the same as Vad. As simple as this is, referencing a voltage measurement incorrectly is a typical mistake in the laboratory.

A voltage source has its polarity marked, so a positive value of V means that the + terminal is at a positive voltage with respect to its other terminal. If however the voltage of the source is specified as negative, then the + terminal will be at a negative voltage with respect to its other terminal.


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The voltage drop across a resistor is given by Ohm’s law. Its sign depends on the direction of the current. In this example positive current through R1 is defined as flowing c → d, thus Vcd = iR1. If the direction of actual current in the problem is opposite to the direction defined in the problem, this fact is reflected in the sign of the value of i. What matters is not that we initially chose the correct polarities and directions, but that we initially chose consistent polarities and directions. Thus a positive value of i makes Vcd positive, a negative value of i makes Vcd negative.

Kirchhoff’s voltage law (KVL). The algebraic sum of voltages around a closed path is zero, or: v1 + v2 + v3 + ... + vn = 0. As you make a summation of voltages, it is suggested that you proceed around the closed path in a clockwise direction. If you encounter a positive (+) sign as you first enter the circuit element, then add the value of that. Conversely, if you first encounter a negative sign as you enter the circuit element, then subtract the value of that voltage.

Use KVL to find V in the above example. KVL says that

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0

21

iRiRV

VVVV addccbba

In this case we don’t have enough information to completely solve the problem. If we also know that Vc = 4 V and Va = −3 V, what is V?

Discussion: In the above example, how much current flows to ground?

Current (symbol I) is the rate of flow of charge. It is measured in units of Amperes (usually called Amps) and abbreviated A. 1 Ampere = 1 Coulomb/second. Electrical current flows from positive to negative potential to (+ → −). Because electrons have a negative charge, electrons flow opposite to the flow of electrical current. The arrows define the direction of electrical current, the direction that hypothetical positive charges would flow, not the direction electrons flow! Two terms are used the describe the direction current flows into a terminal.

Source: current flows out of the terminal. Sink: current flows into the terminal.

Kirchhoff’s current law (KCL). The sum of all currents flowing into a node is zero. Note that the direction of the current arrow defines the direction of positive value for the variable.

1

0

V6

iRVV

VV

VV

V

VVV

cdc

ddd

ada

cb

baab


3

Thus for a positive value of i5, curent flows into the node, in the direction of its arrow. For a negative value of i5, current flows out of the node, opposite its arrow.

node into flowing currents

0 ni 04321 iiii 08765 iiii

KCL Example

8

7

6

5

A 5

A 3

A 10

i

i

i

i

Power (symbol P) is the rate that energy is deposited in a circuit element; it is measured in

Watts, abbreviated W. IVP

Resistance (symbol R) is the resistance to the flow of current. More specifically the resistance of a circuit element is the ratio of the voltage to the current. Resistance is measures in units of ohms, abbreviated Ω (the upper case Greek letter omega). The relationship between the current and the voltage is given by ohms law. 1 Ω = 1 V/A.

Ohm’s law is the fundamental relationship between current and voltage.

iRV Conductance (symbol G) is the reciprocal of resistance. It is measured in units of siemans, abbreviated S. 1 S = 1 A/V. Older literature used the unit mho for conductivity (1 mho= 1 S); mho is ohm spelled backwards and the abbreviation is the upside-down omega!

2.THE RESISTOR The resistor is the most ubiquitous circuit element. Simply put, it resists the flow of current. In practical terms, the ratio of voltage across the resistor and the current through it is defined by its resistance. Ohm’s law states that a graph of current versus voltage for a resistor will be a straight line with a slope of 1/R.

VR

I

1


4

Resistors come in many shapes and sizes, but in this class we will use small carbon film resistors. Some points to note about carbon film resistors are as follows:

a. The value of resistance is indicated by color coded bands around the body of the resistor. Color Code cards will be furnished in the lab.

b. The power rating of the resistor is determined by its physical size while the resistance value is determined by its internal composition. A resistor which has a larger physical size has a larger surface area to transfer heat to the surrounding air and therefore can dissipate a larger power without over heating. Most of the resistors used in our lab experiments will be 1/2w or 1/4w resistors.

c. Typical standard resistor values are 1.0, 1.2, 1.5, 1.8, 2.2, 2.7, 3.3, 3.9, 4.7, 5.6, 6.8, 7.5, 8.2, and 9.1 multiplied by a power of 10.

Resistors in parallel: The equivalent resistance of resistors in parallel is the reciprocal of the sum of the reciprocals of the resistance of all of the parallel resistors.

All parallel circuit elements have the same voltage across them.

Resistances in parallel: nEQ RRRRR

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321

Conductances in parallel: nEQ GGGGG 321

Resistors in series: The equivalent resistance of resistors in series is the sum of the resistance of all of the resistors.

All series circuit elements have the same current through them.

Resistances in series: nEQ RRRRR 321


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Conductances in series: nEQ GGGGG

11111

321

Potentiometer (AKA pot) The potentiometer is a resistor with a third contact (arrow), which is internally connected to a wiper (sliding contact) that slides along the resistance material. The wiper position is controlled by a knob that adjusts the wiper position from one end of the resistor to the other. The wiper contact effectively divides the resistor into two resistors. For the purpose of analyzing a circuit containing a potentiometer, we include each of these resistors with the constraint that their series resistance is constant. We include the adjustability in the parameter x, which divides R into two resistors of values xR and (1−x)R.

Variable resistor application: If a simple variable resistor (two terminals) is desired, the wiper is connected to one of the end terminals, shorting one of the ‘resistors’. Adjustability is commonly designated in schematic symbols by a angle arrow placed through the symbol.

Power in Resistors: The fundamental definition of power, IVP , can be expanded because current and voltage are related by the resistance. Therefore we can eliminate either current or voltage from the equation.

R

ERIIVP

22

It is important to note that the power will be zero for any value of I if V = 0 and for any value of V if I = 0. These two cases correspond to R = 0, a short circuit, and the second to R → ∞, an open circuit.

3. IDEAL CONDUCTOR

Ideal conductors have zero resistance. The components of the circuit schematic are connected by ideal conductors. These are simply the lines used to connect the schematic symbols. Once we are used to the idea we take this for granted.

If we are constructing a circuit model of a real circuit and need to take the resistance of the real wires into account, we do this by adding a resistor.

4. METERS


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Meters are used to make measurements of the various physical variables in an electrical circuit. These meters may be designed to measure only one variable such as a voltmeter or an ammeter. Other meters called multimeters are designed to measure several variables, typically voltage, current and resistance. These multimeters have the capability of measuring a wide range of values for each of these variables. Some multimeter operate on battery power and are therefore easily portable, but need battery replacement. Others operate on a.c. power.

The read-out, or display, of value being measured on the multimeter may be of the digital type or the analog type. The digital type displays the measurement in an easy to read form. The analog type has a pointer which moves in front of a marked scale and must be read by visually interpolating between the scale markings.

The ideal voltmeter measures voltage and has infinite resistance. No current flows through an ideal voltmeter. Voltages have a sign. The sign of the voltage you read will depend on which terminal is connected to the reference point. In the symbol below we define the + terminal so that the voltage reading is positive if the + terminal is more positive with respect to the “common” terminal.

The ideal current meter (ammeter) measures current and has zero resistance. There is no voltage drop across an ideal ammeter. Currents have a sign. The sign of the current you read will depend whether the + terminal sources or sinks the current. In the symbol below we define the + terminal so that the current reading is positive if current flows into the + terminal. Thus if we connect the + terminal of the ammeter to a positive voltage (through a resistor please!) the current will read positive.

What about the ohmmeter? Yes we will use the ohmmeter in lab to measure resistance, but it is actually a combination of a voltage source and ammeter or a current source and voltmeter. Ohms law is then used to calculate the resistance. The ohmmeter is not a fundamental construct.


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5. IDEAL SOURCES

Voltage Source The ideal voltage source maintains a constant voltage across its terminals. It can source or sink any current to the circuit to make this true. It is a hypothetical construct. However the value of current cannot be infinite.

One circuit that does not make sense for an ideal voltage source is the short circuit. The voltage across a short circuit is zero. This second constraint means that the only valid value for the short circuited ideal voltage source is Vs = 0. The open circuit is OK.

Current Source The ideal current source maintains a constant current flowing through its terminals. It can generate any voltage necessary to make this true. It is a hypothetical construct. However the value of voltage cannot be infinite. Positive current is defined in the direction of the arrow. If Is is negative, this means that the current is flowing in the direction opposite to the arrow in the symbol.


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One circuit that does not make sense for the ideal current source is the open circuit. No current can flow in an open circuit. This second constraint means that the only valid value for the open circuited ideal current source is Is = 0. The short circuit is OK.

III PRELIMINARY WORK

1. All circuit problems can be solved using KVL, KCL, and Ohm’s Law. This is true regardless of the complexity of the circuit. Very powerful techniques such as mesh analysis can be used to efficiently handle the mathematical problem. However this does not give us a feeling for what is really happening in the circuit. The trick to understanding an electronic circuit is to learn how to break it down into blocks and to understand what these blocks do. Two basic constructs that are found over and over again in circuits are the voltage divider and the current divider. Although they may at first seem trivial and of limited use, these constructs are the basis of filters and amplifiers. More on this later in the course, or simply look ahead in the book!

The Voltage Divider The most common construct you will find in electronics is the voltage divider. It has a voltage input Vin and a voltage output, Vout. The assumption made for the voltage divider is that no current is drawn by Vout. Although in practice zero current is not possible, the result is valid as long as Iout << Iin.

Show that 21

2

RR

R

V

V

in

out


9

The Current Divider Another common construct you will find in electronics is the current divider. It has a current input Iin and a current output, Iout. The assumption made for the current divider is that no voltage is dropped across the load, that is Rload = 0. Although in practice this is not possible, the result is valid as long as Rload << R1.

Show that 21

2

1

21

RR

R

R

RR

I

I

in

out

2. Using methods presented in BACKGROUND plus the attached reference example,

calculate the theoretical values of currents and voltages using the measured values of resistances and Vs for Circuit 3 ,Circuit 4, . Make a table to compare measured values with theoretical values and include the % difference for each voltage and current. Apply KVL to each loop and KCL to each node. How closely do the voltages and currents add up to the values predicted? IV EXPERIMENTAL PROCEDURE

1. Note the color code on each resistor and determine its nominal value from the color code cards provided. The first two color bands give the two significant digits for the value. the next band tells how many zeros to put after the first two digits. The fourth band tells the tolerance specification for the resistor value. No fourth band = 20%. Silver = 10%. Gold = 5%. The color code cards show a third significant figure band, but this is only used for precision resistors with a tolerance of 1% or less. We will not normally use precision resistors in this laboratory, but sometimes you may find a few in the resistor drawers. You will recognize them by the fact that they have a total of five bands.


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2. Measure and record the actual value for each resistor. The meter range should be set so that you obtain the most accurate possible value. There should be at least three significant figures in each measurement. Make a tabulation showing the marked or nominal value, the measured value, and the % difference ( 100[measured - nominal]/nominal). Are they within the specified resistor tolerance?

3. Set the DMM (Fluke 45) to D.C. voltage. Turn on the D.C. power supply and adjust

the power supply to its lowest value. Then measure and record the power supply output voltage. Then adjust the power supply for its maximum output value. Measure and record this value. What is the range of output voltage for each of the power supply outputs? Note the output of D.C power supply is actually controlled by two controls. Experiment with changes in both controls and their effects. The meter built into the power supply can be used to read magnitude of output voltage. Check to see how close it comes to agreeing with the DMM.

4. Mount the 560 Ohm resistor on the circuit bread board so that the wires from each end of the resistor are not put in holes which are connected. Then connect the power supply output to the two ends of the resistor using jumper wires. Your circuit should look like the schematic diagram shown below.

Breadboard Layout

The breadboards have a set of holes spaced 0.1 inches apart and arranged in a pattern similar to that shown above. At the top and bottom edge of the board are two horizontal lines with


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several groups of five holes in each line. All the holes in each of these lines are electrically connected together as shown by the red and blue lines. In the center section of the board are two sets of vertical lines with five holes in each line. There is a 0.3 inch space between the top and bottom set to match the standard spacing of pins on integrated circuit (IC) chips. All the holes in each group of five are connected as shown by the black lines. There is no connection across the central channel. the holes will accept the solid wire leads of most electronic components. The picture above shows a 2.2 k resistor with its leads inserted into the middle holes of two different lines of five holes. To connect the DC power supply to the resistor, the common lead from the power supply must be inserted into one of the other four holes of the line at one end of the resistor and the +V lead must be inserted into one of the holes of the line at the other end of the resistor.

The common lead of the meter voltmeter should go to the common side of the resistor. The Volt lead of the meter should go to the other side of the resistor to measure the voltage across the resistor.

5. In the circuit above, adjust the voltage source, V, to approximately 4.3 V D.C., using the DMM to measure voltage. You should have at least three significant figures in your measurements.

6. Next break the circuit and insert the DMM to measure and record the current

through the series circuit above right. Keep the setting of the voltage the same as in 6. (Be sure to check the DMM for proper selection of ranges, variable, and position of the leads). Do you have three significant figures in your measurement?

The mA meter should be connected between the +V side of the power supply and the side of the resistor where the power supply lead was previously connected. The meter and its leads


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act as the connection from the power supply and the resistor so that all the current flowing through the resister must flow through the meter to get to the resistor. This allows the meter to measure the same current that is flowing through the resistor. To get the proper sign for the current into the positive terminal of the resistor, the positive terminal of the power supply must be connected to the mA terminal of the meter and the com terminal must be connected to the resistor.

7. Repeat the procedure in 6 and 7 above with each of the other two resistors. Check Ohm's Law, by comparing your measured values of voltage (V) to the product of your measured resistance (R), measured current (I).

8. Repeat the procedure in 6, 7, and 8 above for V = 10 V D.C. and V = 15 V D.C.

9. Using Ohm's Law, calculate current (I) with a constant voltage of 10 V D.C. for each of the three nominal resistances (1.0 K, 2.2 K, 4.7 K). Does the current decrease linearly with resistance? Make a graph of current (y axis) versus resistance (x axis) to show your calculated and your measured results.

10. Using the experimental measurements, calculate the power dissipated in each of the three resistors at each of the three voltages using all three methods, P=IV, P=I2R, and P=V2/R. Make a graph of power (y axis) versus resistance (x axis) using your calculated results from step 9 above. Does the power decrease linearly with resistance?

11. Using the adjustable D.C. power supply and circuit bread board, connect the resistors into a two node circuit as shown below. Note that all four circuit elements are connected between those two nodes, and the source voltage Vs is across each of the three resistors. Let R1 = 8.2 k, R2 = 15 k, and R3 = 39 k.

Circuit 1


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12. Measure all four currents, (Is, I1, I2, and I3), in your actual circuit with Vs = 16 V D.C. Record the actual measured value of the voltage difference between the two nodes. Use your measured current values to determine if KCL is verified . Also use Ohm's Law and nominal resistance values to calculate I1, I2, and I3 and then use KCL to calculate Is. Repeat the calculations using the measured resistance values. Make a chart to compare measured current values with the two sets of calculated values. Include the % differences in this chart. Are the differences found using the nominal values for calculations within the tolerance limits of the resistors?

13. Using the adjustable D.C. power supply and the circuit bread board, connect the resistors into a circuit as shown below. Note that the three resistors are in series so that the same current (Is) flows thru each resistor.

Let R1 = 1.5 k, R2 = 820 , and R3 = 2.2 k

Circuit 2

14. Set the power supply to Vs = 20 V D.C. measure the all four voltages in your actual circuit. Also measure Is. Use your measured voltage values to determine if KVL is verified. Also use measured value of Is, measured values of resistance, and Ohm's Law to calculate V1, V2, and V3. Make a chart to compare these calculated voltage values with the measured voltage values.

15. Using the adjustable D.C. power supply and circuit bread board, connect the resistors into a circuit conforming to Circuit 3 below. (Be sure to use the color code card to determine that you are using the correct resistors in each position). Make sure you record the actual value of each resistor used along with the position in which it was used.


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Circuit 3

R1 = 1.2 k, R2 = 3.3k, R3 = 3.3 k, R4 = 2.7 k, R5 = 5.6 k, R6 = 4.7 k

15. Measure the resistance between points A and B. Compare this value with the theory result . Then use this equivalent resistance RAB to verify the voltage divider law.

16. Measure and record all the currents and voltages in Circuit 3 setting Vs close to 15 V DC. Measure and record I4 , I5 , & I6 twice. Compare these values with the theory results. Which current range gave the most accurate values for I4 , I5 , & I6 in circuit 3?

17. Dismantle Circuit 3 and connect Circuit 4 as shown below.

Circuit 4

R1 = 1.2 k, R2 = 5.6 k, R3 = 3.3 k, R4 = 4.7 k, R5 = 2.7 k, R6 = 1.2 k

18. Measure all the currents and voltages in Circuit 4 setting Vs close to 20 V D.C. Apply KVL to each loop and KCL to each node. How closely do the voltages and currents add up to the values predicted? Verify the current divider law.

V Reference Example


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Example of solving for circuit variables by reducing the circuit to a series of simpler circuits by using series and parallel equivalents.

The first step is to combine R5 and R6 into the series equivalent R56 = R5 + R6 = 5 k.

V5 and V6 are no longer in the circuit, but V4 and the other voltages are unchanged. Next we combine R4 and R56 to give the parallel Equivalent R456 = R4*R56/(R4 + R56) = 2.5 k.

The remaining voltages are still unchanged. Next we combine the two series resistors R3 and R456 to get R3456=R3+R456=4 k.

Now V3 and V4 are no longer in the circuit, but V1 and V2 are still unchanged. Finally we combine R2 in parallel with R3456 giving R23456 = R2*R3456/(R2 + R3456) = 2 k.


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V2 and V1 are still unchanged and we can find both of them by voltage division. V1 = Vs*R1/(R1 + R23456) and V2=Vs*R23456/(R1+R23456). This gives V1=3.333V and V2=6.667V. At this point we can calculate the current through R1. I1 = Is = I23456 =V1/R1 = V2/R23456 = Vs/(R1 + R23456) = 3.333mA. or we can calculate I1=Is=I23456= Vs/(R1+R23456) and then calculate V1=I1*R1 and V2=I1*R23456 or V2=Vs-V1.

We now move back to the previous equivalent circuit where we can calculate the current through R2. I2 = V2/R2=1.667mA from Ohm's law or I2=I1*R3456/(R2+R3456) using current division. The current through R3456 is I3=V2/R3456=1.667mA by Ohm's Law or I3=I1*R2/(R2+R3456) by current division.

Moving back to the next previous equivalent, We can calculate V3 and V4. V3=V2*R3/(R3+R456)=2.500V and V4=V2*R456/(R3+R456)=4.1667V, or V3=I3*R3 and V4=I3*R456.

Now moving back again to the next previous equivalent circuit, we can calculate the current through R4 and the current through R5 and R6. I4=V4/R4=0.8333mA=I3*R56/(R4+R56). I5=I3*R4/(R4+R56)=V4/R56


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Moving back to the original circuit we can now calculate V5 and V6. V5=I5*R5 and V6=I5*R6, or V5=V4*R5/(R5+R6)=1.6667V and V6=V4*R6/(R5+R6)=2.500V.

This gives us all the currents and voltages in the circuit without having to solve a set of simultaneous equations.

V REFERENCES

1. http://www.mems.eee.metu.edu.tr/courses/ee313/

2. http://ecow.engr.wisc.edu/cgi-bin/get/ece/370/allie/

3. http://engr.atu.edu/Circuits%20Lab.htm

4. https://secure.hosting.vt.edu/www.ece.vt.edu/ece2274/

5. Microelectronic Circuit, 5th edition 2004 , Sedra and Smith, Oxford University Press

6. KL-200 Linear Circuit Lab,

7. Other electric and electronic courses.


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LAB 2: NETWORK SOLVING AND EQUIVALENT CIRCUIT

PART 2 I INTRODUCTION 1 Objectives The objective of this experiment is:

- To study the characteristic of a linear circuit. - To apply the superposition principle to a linear circuit.

2 Equipment : 3 Prerequisites: II BACKGROUND

B Superposition: Analyzing circuits with multiple sources. Caveat: Superposition only works for linear circuits. Circuits with R, L, C. The current or voltage at any point in a circuit containing multiple sources (current and/or voltage) is the superposition (sum) of the currents or voltages imposed separately by each source. Procedure for analyzing a circuit using superposition.

Turn on the sources one at a time.

For each source that is “off”, replace it with its characteristic resistance. (Ideal voltage sources R=0, a short circuit. Ideal current sources R=∞, an open circuit.)

Analyze for the desired quantity due to each source.

The full solution for all sources active is the sum of the contributions due to each source individually.

Carefully observe the signs of the individual voltages and currents. The polarity of the voltages and the direction of the currents may not be the same for all sources.

Example: Find the Thevenin equivalent voltage, VTH and the source resistance RS of the following network as seen at the terminals. Because VTH is the open circuit voltage, we simply need the voltage at the terminals, V, which is the same as the voltage across R3.


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Because the network has 3 internal sources we will use superposition to solve the problem. Superposition says that V is the sum of the voltages contributed from each of the 3 sources. V = V1 + V2 + V3. We will determine the voltage contribution from each voltage separately by turning on only one source at a time. Sources that are “off” are replaced with their characteristic resistance.

Find VTH and RS using superposition.

Solving for V1 due to IS1.

The terminal voltage is the voltage drop across R3. We also note that R1 and R2+R3 form a current divider. To find V1 we need i3 which we can find from the current divider equation.

321

3113

321

11331

321

11

321

113331

RRR

RRiR

RRR

RiRiV

RRR

Ri

RRR

RiiRiV

SS

SS

321

3111 RRR

RRiV S

Solving for V2 due to IS2.


3

We see that circuit reduces to almost the same problem as for IS1, except that the direction of the current is opposite. We have chosen to keep the same direction of i3 to remind us that we need a negative sign. The lower terminal will obviously be more positive that the upper terminal. We must be very careful of the signs!

321

3123

321

12332

321

12

321

123332

RRR

RRiR

RRR

RiRiV

RRR

Ri

RRR

RiiRiV

SS

SS

321

3122 RRR

RRiV S

Solving for V3 due to VS3.

Again, the terminal voltage is the voltage drop across R3. However we also recognize that R1+R2 and R3 form a voltage divider. To find V3 we simply use the voltage divider equation.

321

33

321

333

RRR

RV

RRR

RVV SS

321

333

RRR

RVV S

The VTH of this network as seen at the terminals is the sum of each of these component voltages. Be careful of the signs!!


4

3211321

3

321

33

321

312

321

311

321

SSSSSS

TH

ViiRRRR

R

RRR

RV

RRR

RRi

RRR

RRi

VVVV

3211321

3SSSTH ViiR

RRR

RV

To solve for the source resistance, RS, we simply turn off ALL of the sources and solve for the equivalent resistance of the resulting resistor network.

321

321

321

321321 RRR

RRR

RRR

RRRRRRRS

321

321

RRR

RRRRS

III PRELIMINARY WORK IV EXPERIMENTAL PROCEDURE

1. Measure the resistor values and construct the circuit shown in Figure 1.


5

Fig. 5 - R1 = 2.2 k, R2 = 1.8 k, R3 = 3.3 k

2. Set the three outputs of the power supply to provide +10, +5, and -10 volts. Then measure and record the actual values of each supply output with the DMM.

3. With V2 = 0 (jumper wire connected from node 2 to ground--instead of a power supply terminal), use V1 = +10 volts and measure V3'. Then repeat for V1 = +5 volts, and V1 = -10 volts.

4. With V1 = 0 (jumper wire connected from node 1 to ground--instead of a power supply terminal), use V2 = +10 volts and measure V3". The repeat for V2 = +5 volts, and V2 = -10 volts.

5. With V1 = +10 volts, measure V3 for each of these values of V2: +10 volts (you will have to use a second jumper wire to get the voltage at both terminals), +5 volts, and -10 volts.

6. Repeat 5 for V1 = +5 volts.

7. Repeat 5 for V1 = -10 volts.

IV CALCULATIONS, COMPARISONS & GRAPHS:

1. Calculate the theoretical value of V3' using the measured resistor values with V2 = 0 and for V1 = +15 volts, +6 volts, and -10 volts. Then plot V3' versus V1. On the same graph plot the experimental or measured values of V3' versus V1. Plot the experimental data points with a small symbol (, x, or 0) at each point. Do not connect


6

these experimental data points with lines. Plot the theoretical points with no symbols connected by a line. Use a spreadsheet to plot the graph.

2. Calculate the theoretical value of V3" using the measured resistor values with V1 = 0, and for V2 = +10 volts, +5 volts, and -10 volts. Then plot V3" versus V2 similar to plot under 1 above, but on separate graph. Also show experimental or measured values.

3. From 1 and 2 above, make a statement about linearity. Are V3' and V3" linear functions of V1 and V2 respectively?

4. Calculate all the values of V3 for all combinations of voltages used using the measured values of the source voltages and resistors. (you may use superposition for this) and list in the attached form.

5. Calculate V3 = (V3' + V3") from the measured values of V3' and V3" and list the results on the attached format.

6. Calculate and fill in the % difference tables

7. Using calculated data from 1 and 2 above, calculate V3 for the circumstances of V1 and V2 having the same voltages of + 10 volts, +5 volts, and - 10 volts. Then make the following comparisons:

Theoretical V3 Measured V3

V1 = V2 = 10 V

V1 = V2 = 5 V

V1 = V2 = -10 V

V REFERENCES








7



1

LAB 3: TRANSIENT RESPONSE I INTRODUCTION 1 Objectives The objective of this experiment is:

- To study the transient response in storing an electrical charge on a capacitor in a RC circuit.

- Also to study the transient decay of an initial charge on a capacitor through a resistor. - To understand the time constant in a RC circuit and how it can be changed.

2 Equipment : 3 Prerequisites: II BACKGROUND Capacitors Capacitors store electrical energy (electric charge on metal plates). The current through a capacitor is proportional to the rate of change of the voltage across the capacitor. Schematic symbol(s)

Capacitance is the proportionality between charge and potential (voltage).

V

QCCVQ ;

Capacitance is also the dynamic relationship between the current flowing through the capacitor (rate of change of charge) and the rate of change of the voltage.

p

t

ttiC

Vt Vt

VCi

0

d)(1

)0()( ;d

d

Recall that: t

Qi

d

d

Units: The unit of capacitance is the farad.

VAs1V

C 1F 1 (A farad is a coulomb per volt and an ampere-second per volt.)

Practical information: Capacitance. The farad is a large unit. Typical capacitance values are measured in microfarads (μF = 10−6 F), nanofarads (nF = 10−9 F), and picofarads (pF = 10−12 F). Voltage (working voltage) Capacitors are rated for the maximum working voltage. Voltages higher than this may damage the capacitor irreversibly.


2

Polarization. Some types of capacitors are polarized. The capacitor needs to be connected to the circuit in the correct polarity. Reversing the polarity can damage the capacitor. Often the capacitance is dramatically different if the polarity is incorrect; some even look more like resistors! Types of dielectric. The type of dielectric (insulator) between the plates determines the detailed electrical characteristics of the capacitor, such as leakage, physical size, and high frequency performance. In this class we will not be concerned with these details. It is however necessary to understand that these details are responsible for the wide variety of shapes, sizes, colors, and types of capacitors. Capacitors in parallel: The equivalent capacitance of capacitors in parallel is the sum of the capacitances of all of the capacitors.

Capacitors in parallel: nEQ CCCCC 321 Discussion: What quantity is the same for a circuit with capacitors in parallel? Capacitors in series: The equivalent capacitance of capacitors in series is the reciprocal of the sum of the reciprocals of the capacitances of all of the series capacitors.

Capacitors in series: nEQ CCCCC

11111

321

Discussion: What quantity is the same for a circuit with capacitors in series? Inductors Inductors store magnetic energy (magnetic field of a coil). The voltage across an inductor is proportional to the rate of change of the current through the inductor. Schematic symbol(s)

Inductance is the proportionality between the voltage across an inductor and the rate of change of the current through it.

t

ttVL

it it

iLV

0

d)(1

)0()( ;d

d

The unit of inductance is the henry.


3

AVs 1H 1

(A henry is a volt-second per ampere.)

Practical information: Inductance. Typical inductance values are measured in henries (H), millihenries (mH = 10−3 H) and microhenries (μH = 10−6 H). Series resistance. The ideal inductor has zero resistance, however real inductors are made from many turns of wire. The resistance of the wire is often significant and can be included in the circuit model as a resistor in series with the inductor. Core materials. The inductance of a coil can be greatly increased by placing a magnetic material inside the coil. The type of magnetic material inside the coil determines the detailed electrical characteristics of the inductor, such as eddy current losses and high frequency performance. In this class we will not be concerned with these details. It is however necessary to understand that these details are responsible for the wide variety of types of inductors.

Inductors in parallel: The equivalent inductance of inductors in parallel is the reciprocal of the sum of the reciprocals of the inductances of all of the parallel inductors.

Inductors in parallel: nEQ LLLLL

11111

321

Discussion: What quantity is the same for a circuit with inductors in parallel?

Inductors in series: The equivalent inductance of inductors in series is the sum of the inductances of all of the inductors.

Inductors in series: nEQ LLLLL 321 Discussion: What quantity is the same for a circuit with inductors in parallel?


4

Summary: Resistors, Capacitors, and Inductors

Summary resistors capacitors inductors

series 21 RRREQ 21

111

CCCEQ

21 LLLEQ

parallel 21

111

RRREQ

21 CCCEQ 21

111

LLLEQ

stored energy 0 C

QCVWE

2

212

21

221 LiWM

DC steady state iRV 0i

no current through C0V

no voltage drop across L

transient iRV

tiC

V

t

VCi

d1

d

d

tVL

i

t

iLV

d1

d

d

time constant RC R

L

continuous

variable V i

First-Order Transient Response in RC and in RL Circuits. These two circuits illustrate the basic first-order RC and RL circuits.

RC Circuit

Before the switch is closed. VC = 0 and i = 0. Because capacitors can store electrical energy, the capacitor could have an initial voltage that is not zero. Clearly no current can flow before the switch is closed. From KVL we note that the voltage across the switch is V.

The initial state (immediately after the switch is closed). A current will begin to flow to charge C. At the instant after the switch is closed, (t = 0+) VC=0 so all of the voltage drop appears across R. Thus the initial charging current is i = V/R. (To determine the initial state, C is modeled as a voltage source.)


5

The final state (DC steady state). After the switch has been closed for a long time, the capacitor is completely charged (VC = V) and the current has decayed to zero (i = 0). In this limit C is modeled as an open circuit.

The continuous variable. Capacitors store energy. Because the stored energy cannot be changed instantaneously, change requires time. For capacitors, VC is the circuit variable directly related to the stored electrical energy. This means that the voltage across the capacitor the instant before the switch is closed and the instant after the switch is closed are the same, VC(t=0−) = VC(t=0+).

The transient response. The transient response is the description of how the system evolves from the initial to the final state. We can write a differential equation from KVL, substituting, and then differentiating and dividing by R. The system evolves from the initial to the final state with a

characteristic time constant RC .

RCt

CR

eitiit

iRC

VtiC

iRVVV

/)0()( ;0d

d

d1

;

RL Circuit

Before the switch is closed. VL = 0 and i = 0. Although inductors can store magnetic energy, this requires a flow of current through the inductor. Clearly no current is flowing before the switch is closed. From KVL we note that the voltage across the switch is V.

The initial state (immediately after the switch is closed). The current will begin to change, however the inductor opposes the change in current. At the instant after the switch is closed, (t = 0+) the current must still be zero, i = 0 so all of the voltage drop appears across L. Thus the initial VL = V (To determine the initial state, L is modeled as a current source.)

The final state (DC steady state). After the switch has been closed for a long time, VL has decayed to zero (VL = 0) and the current is constant (i = V/R). In this limit L is modeled as a short circuit.

The continuous variable. Inductors store energy. Because the stored energy cannot be changed instantaneously, change requires time. For inductors, iL is the circuit variable directly related to the stored magnetic energy. This means that the current through the inductor the instant before the switch is closed and the instant after the switch is closed are the same, iL(t=0−) = iL(t=0+).


6

The transient response. The transient response is the description of how the system evolves from the initial to the final state. We can write a differential equation from KVL, substituting, and then rearranging and dividing by R. The system evolves from the initial to the final state with a

characteristic time constant RL / .

LtR

LR

eiitiR

Vi

t

i

R

L

Vt

iLiRVVV

/)()()( ;d

dd

d ;

Simple method for first-order transients in RC and RL circuits. Most RC and RL circuits you will encounter are simple first order systems. This means that they have only one C or one L, or that they can be reduced to a circuit that does. The solution will have the following form.

/ )()0()()( texxxtx Our task is to identify the required parameters. All first order circuits can be characterized by three quantities:

1) The time constant τ. The characteristic time in which the system evolves.

2) The initial state x(0). The state of the system the instant after the transient.

3) The final state x(∞). The state that the system is evolving to and would eventually reach if not disturbed.

Step 1. Determine the time constant. For the conditions immediately after the transient, write the equivalent circuit in the following form. The procedure is identical to determining the Thevenin and Norton equivalent circuits. Only the source resistance REQ is necessary to

determine the time constant. The time constant is then EQEQCR or EQEQ RL /

Step 2. Find the initial state. We start with the quantities known to be continuous across the transient (from t = 0− to t = 0+, for example). For capacitors VC is continuous and for inductors iL is continuous. Analysis at the instant that the transient begins is carried out by replacing C with a voltage source with VC and replacing L with a current source with iL. NOTE: This analysis is only valid for the instant of the transient!


7

Step 3. Find the final state. This is the state of the system long after the transient has died away. Analysis of the final state is carried out by replacing the Cs with open circuits and Ls with short circuits.

Step 4. Substitute into the values into the equation. / )()0()()( texxxtx This is the full solution that describes how VC and iL evolve after the transient.

inEXAMPLE: The step response of an RC circuit can be analyzed using the following circuit.

Immediately after the switch closes, , the current in the circuit will be as follows:

0( )t t

s RCV

i t I e eR

The charging current in RC circuit is showed in figure 1


8

Figure 1: Normalized current = i(t)/Io ,versus Normalized time = t/RC.

Note that the time constant (t = J = RC) occurs at 36.8% of Io or 0.368 Vs/R.

The voltage across the capacitor :

( ) (1 )t

RCC SV t V e

The charging current in RC circuit is demonstrated in figure 2

Figure 2: Plotting normalized voltage ( Vc /VS ) versus normalized time ( t/RC ) Note that the time constant ( t = J = RC) occurs at 0.632 Vs.


9

III PRELIMINARY WORK

1. Refer to BACKGROUND for how to calculate time constant . Calculate for a series RC circuit having C = 0.01 µF and R = 100 k k to gain a perspective of how long the transients will take. IV EXPERIMENTAL PROCEDURE In this lab you will use the function generator and the oscilloscope to measure the transient voltages in a series RC network. If we connected the RC network to a DC supply, such as a battery, a transient current will flow as the capacitor charged. This current dies off exponentially with the time constant RC. In this lab we will observe these transients by applying a DC voltage that periodically changes polarity. The charging transients can then be observed each time the polarity flips. This lab is more formal than you previous labs. It requires some writing, data analysis, graphing, and linear regression. When you to answer the questions in the lab, short answers are not sufficient.

Construct a series RC circuit as shown above using a 100 K resistor and a 0.01 μF capacitor. Now measure the resistor using your DMM and record it in your notebook. After we measure the RC time constant of your circuit we will be able to calculate the actual capacitance.

1. Function generator set up: Connect the function generator to your circuit as shown above. Use a BNC Tee to also connect the function generator to channel 2 of your scope. Set the function generator to output a 100 Hz square wave with a 2 Vp-p amplitude and zero DC offset.

2. Oscilloscope probes. Obtain a scope probe and connect it to channel 1. If you are

unfamiliar with scope probes, your instructor will help you. Scope probes come in two common flavors, 1X and 10X. The 10X probe divides the voltage by a factor of ten. The 1X probe does not change the voltage. Some of the probes in the lab have a switch to change flavors. Check to see if yours has a switch. Test your probe by touching it to the test port of the scope. This is a small gold plated contact near the focus controls of your scope. The test port has a 1 kHz 0.5 Vp-p voltage for testing your probe.


10

3. Scope set up. Set up the scope so you can see the traces of both channels. Connect the probe to A and the ground to C. Verify that this voltage is and should be the same as observed in channel 2. Disconnect the probe ground from C. Does it make a difference? Why/Why not?

4. Set up and plan your measurements. We want to measure the voltage across the

resistor Vr and across the capacitor Vc. Before we take detailed measurements, let’s first survey the situation to plan how this is to be done. Connect the probe to B to measure the voltage across the resistor. However if we connect the probe to A, we only measure the total voltage across R and C. Connecting the probe ground to B removes R from the network. Come up with a simple method to measure Vc and verify that it works. If you are unsure, ask your instructor before proceeding. (Hint: recall the grounding issues .)

5. Make the measurements Vr and Vc. Set up the trace Vr on the scope so that you can

observe one complete charging event. It is best not to use the first event in the trace because you cannot be certain that you have the beginning of the event. Read as many voltage-time points from the transients as you can. I’d suggest reading at least 2 points per major division. Record these points in your notebook. You will analyze them later. Be sure to also record the V/div and s/div you will need to convert these to voltage and time. Now using the same scope set up, measure the Vc. Record the voltage at the SAME time points you used for the resistor.

6. Data work up. Use excel or another plotting program. Your graphs must have their

axes labeled and properly scaled in the appropriate units. - Plot Vr vs time - Plot Vc vs time. - Plot (Vr+Vc) vs time. Do the voltages sum to the total voltage applied across the series

network? Should they? Why? - Plot log(Vr) vs time. Fit the good part of your data to a straight line. We know that

Vr(t) = Vr(0)exp(–t/RC). In your lab report, start with this equation to show that the slope of the line should be –1/RC. From linear regression of your line, what is the RC time constant of your circuit? (with correct units!)

- You measured R with your DMM. Calculate C from you measurement of the RC time constant.

7. Repeat items 4 and 5 with R = 68 k. Plotting the collected data corresponding with R = 68 k in the same graph in item 6. In your lab report be sure to include all of the schematics, derivations of the equations, all of the calculations, and plots. Use significant figures for error propagation. Explicitly answer all the questions posed in the lab.


11

Sample table: Create a table like this in your lab notebook.

time VR VC

measurement Div scale

(time/div)time (s) div

scale (V/div) volts div

scale (V/div) volts

OPTIONAL (PART 3)

8. Construct the following circuit using the values of C = 330 µF and R = 120 k. You will use a jumper wire for the switch to connect the resistor either to the voltage source or to the reference node (ground). Be sure to connect the negative side of the electrolytic capacitor to ground. The capacitor will either have a ,+, on one end and a ,-, on the other, or it will have a thick arrow with a ,-, inside it pointing to the negative end of the capacitor.

9. Set VS at 15 volts. Leave the jumper wire in the discharge position until the voltage across the capacitor stabilizes at 0 volts. (Note that if the capacitor has been charged before, a wire temporarily shorting out the capacitor will speed up this process).

10. Then put the jumper wire in the charge position and record Vc every 5 seconds up to 30 seconds then every 10 seconds from 30 seconds to 2 minutes. Then leave the switch in up


12

position until the voltage Vc stabilizes at the maximum value (when the third digit is no longer changing over 30 second period) and record that value.

Note: One person will need to call off time and the other person read the meter and write down voltage. You may need to do this more than once until you establish a good procedure for taking data.

11. Next put the jumper wire in the discharge position and record the capacitor voltage Vc at the same time intervals as in item 4.

12. Repeat items 4 and 5 with R = 68 k.

13. Calculate the time constant for each circuit using the results of the previous calculation and the measured capacitor value.

14. Plot a graph of the charging curve for each of the two resistance values, VC (y axis) versus time (x axis). Draw in a dotted line to the graph at a point 63.2% of Thévenin Equivalent value of VS. What is the time in seconds which corresponds to this voltage on each curve. Make the graph as large as possible to enable more accurate readings of the two experimental values of the time constant. How does this time compare with your calculations of the time constants? Why might this time be slightly different from your calculation?

15. Plot a graph of the discharge curve for each of the two resistance values, VC (y axis) versus time (x axis). Draw in a dotted line to the graph at a point 36.8% of the initial value of VC. What is the time in seconds which corresponds to this voltage on each curve? How does this time compare with your calculations of the time constants?

Your discharge graph should look something like this.


13

16. What happened to the response time and the time constant with the smaller resistance?

V CONCLUSIONS:

Based on what you've learned.

VI REFERENCES









1

LAB 4: RECTIFIER, REGULATOR AND POWER SUPPLY CIRCUITS

I INTRODUCTION 1 Objectives The objective of this experiment is:

- To become familiar with the principles of the operation of DC regulated power supplies.

- To investigate the qualities of each DC regulated power supply. 2 Equipment : 3 Prerequisites: II BACKGROUND In most of the countries electrical power is transmitted as a sinusoidal AC voltage. However, electronic circuits usually need a DC power supply to bias the transistors and integrated circuits. Therefore, an electronic system requires a “power supply” circuit to convert AC power to DC power. In a typical electronic power supply, the AC signal is distorted to create a signal that contains a DC component and several AC components. A steady state DC voltage can be obtained by rectifying the AC voltage, filtering it to a DC level and finally regulating it with a regulator circuit. Figure 2 shows the block diagram of a typical electronic power supply.


2

In Viet Nam, the rms value of the AC voltage is 220 V and the frequency is 50 Hz. For most of the power supply designs, we need to decrease the amplitude of this AC voltage before applying it to the rectifier circuit. This can be done by using a transformer as shown in Figure 2. Transformers:

Transformer is an electrical device consisting of a magnetic core and one or more windings, used to change the voltage of an AC circuit from one value to another.

If the transformer is ideal:

12

VV

N

(1)

2 1i Ni (2) Rectifiers:

The conversion from AC to DC is performed by altering the sinusoidal waveform of the input signal to produce an output with a nonzero DC voltage. The average of DC value of a periodic waveform is defined as

0

1( )

T

avgf f t dtT

(3)

where T is the period of f(t). Obviously, a perfectly sinusoidal signal has zero average or DC value. In order to obtain a

DC signal from an AC voltage source, we can pass the input signal through a nonlinear circuit, and alter the symmetry of the waveform. We know that diodes are nonlinear circuit elements and they can be used for this purpose. An example of a diode rectifier circuit known as the “half-wave rectifier” is shown in Figure 3.


3

In order to understand how this circuit operates let’s assume that the diode is ideal with a zero turn-on voltage. It will conduct when V2 is greater than zero and during this time Vout = V2. When V2 is smaller than zero the diode turns OFF and Vout = 0 V. The average or DC value of Vout can be calculated by using equation 3 to be:

mDC

VV

(4) The half-wave rectifier is simple to construct; however, it is inefficient since it produces a

small DC voltage when compared with the AC signal amplitude (Vm). The following figure shows a more efficient rectifier known as the “full-wave rectifier”.


4

The circuit includes two half-wave rectifiers operating on alternating halves of the sine- wave circle. When D1 is ON, D2 is OFF and vice versa. You can use Eq 3, to calculate the DC value of Vout but there is a simpler way. It is obvious that the area under the full- wave rectified signal is twice that of the half-wave rectified one. Therefore, the DC value of the full-wave rectified signal will be twice that of the half-wave rectified waveform or

2 mDC

VV

(5) This form of the full-wave rectifier was used extensively in the early days of electronics when the semiconductor components (e.g. diodes) were expensive. With the rapid developments in the electronics technology, the manufacturing cost of the semiconductor circuit elements has decreased significantly and the following form of the full-wave rectifier known as the “bridge-type full-wave rectifier” has become more popular than that employing a center-tapped transformer.

This circuit employs for diodes but it needs much smaller transformer than that needed for

a center-tapped design (a transformer is much more expensive than a semiconductor diode). When V2 is positive D1 and D2 are ON (D3, D4 are OFF). The equivalent circuit is:


5

When V2 is negative D3 and D4 turn ON and D1, D2 go OFF. The equivalent circuit is:

The resulting current flow through the load is still positive. As a result Vout is a full-wave

rectified sine-wave. Note that the negative polarity side of the load resistor is not connected to the ground of the transformer.

The half-wave and full-wave rectified signals obtained by rectification may be suitable for supplying DC power to certain systems such as DC motors. However, in electronic circuits where a pure DC component is required, filtering is necessary to make the output voltage more like that from an actual DC source. A capacitor connected across the output terminals of the rectifier circuit is one of the most popular filters. Since it is easier to analyze, let’s make a half-wave rectifier first and connect a capacitor across its output terminals.


6

Let’s temporarily remove RL (first case) and assume that V2 is a sine wave and the capacitor is initially discharged. For t>0, as V2 starts to increase, the diode turns ON, the capacitor starts charging and VC=Vout follows V2. This will go on until V2 reaches its first peak. At this moment, V2 starts to decrease and the diode becomes reverse biased and turns OFF. Since RL is removed in this case, the capacitor will be connected to an open circuit (assuming that the reverse saturation current of the diode is negligible) and VC stays constant at Vm. Obviously, the diode will never turn ON again, since V2 will never exceed Vm again. Beyond the first half circle of V2 during which the initial charging the diode takes place, output is a constant DC voltage. Now, let’s connect the load resistor RL as shown in Figure 8. The resistor is in parallel with the capacitor and it will discharge the capacitor when the diode is OFF. Therefore, a variation (ripple) in the output voltage, Vr is seen (second case). Obviously, to keep the ripple small, the time constant τ =RLC must be large compared with the period of the input signal. In the time interval form t1 to t2 the capacitor discharges exponentially towards zero with the voltage

/( ) ( ) tC out mV t V t V e (6)

using the point t=t1 as the zero time reference point for the start of the decay. When V2

reaches VC at t=t2, the diode turns back ON and the capacitor is recharged. In a good power supply the ripple voltage Vr is small. Therefore, the diode conducts for only a


7

very small portion of the entire circle and we can assume that the capacitor discharging time is nearly equal to T. Then,

/tm r mV V V e (7)

Moreover, since the time constant τ is much greater than the period of the sine wave, T, we can use the approximation

1xe x (8) and we obtain

mr m

L

V TTV V

R C

(9) In case we can not represent the load as a simple resistor RL, we can use the current drawn by the load. If the load current is IL,

Lr

I TV

C

(10) The following figure shows the related circuit for a full-wave rectifier. For a full-wave rectifier T is replaced by T/2 in the equations given above.

It can be shown that the peak diode current can be much larger than the average diode current. Therefore, you have to ensure that this quantity does not exceed the diode’s maximum current-handling capability. The AC content of the output signal relative to the DC content, defined as ripple factor, shows the efficiency of the filter circuit,


8

( )

rms value of the AC component of signalripple factor

average DC value of signal

Or

[ ( ) / ] 100%r DCr V rms V (11) If we assume that the output voltage waveform of a full-wave rectifier with a capacitor filter can be represented in a piecewise linear form, the DC output voltage can be approximated as

2r

DC m

VV V

(12)

2 2L L

DC m m

I T IV V V

C fC

(13) where f is the fundamental power line frequency. Assuming the ripple waveform is triangular; its rms value can be found as

( )2 3

rr

VV rms

(14) RC Filter:

Using an additional RC filter section, it is possible to reduce the amount of ripple while reducing the DC output voltage. Figure 10 shows the schematic of the additional RC filter.

The analysis of the RC filter can be done by using superposition. The voltage across C1

can be considered as a DC voltage, VDC, plus the ripple voltage, Vr (rms). The voltage across C2 is composed of V’DC and V’r (rms) as shown in Figure 11.


9

' L DCDC

L

R VV

R R

(15) The DC voltage across C1 is attenuated by a resistor divider network of R and RL. Now, let’s calculate the ripple voltage across C2. The AC impedance of C2 is

2

1CX

C

(16)

If RL>XC then RL//XC ≅ XC and

'

2 2( ) ( )

( )C

r r

C

XV rms V rms

R X

(17) If the value of the resistor R is chosen large enough, the following simplification can be made

' ( ) ( )Cr r

XV rms V rms

R

(18) Therefore, the ripple voltage of the RC filter will be smaller than that of a capacitor filter

by the factor XC/R. Regulators:

One of the most important quantities defining a power supply performance is the ripple factor. As the current drawn by the load increases, the ripple at the output also increases, and the DC voltage at the supply output will be approximately equal to Vm-Vr/2. If we want to prevent the output voltage from varying when the load is changed, we need to include a circuitry called “regulator” in our design. Two important specifications for a power supply are the “load regulation” and “line regulation”. Load regulation is the ability of a power supply to resist variations in the output voltage when the load is changed.


10

(no load) (full load)load regulation 100%

(no load)DC DC

DC

V V

V

(19) Line regulation is defined as the percentage variation in the output voltage for a given variation in the input voltage. In some locations the AC line voltage may vary significantly (by tens of volts), and a good power supply must resist these variations by keeping the DC output voltage steady.

full load

charge in load voltageline regulation 100%

charge in input voltage

(20) Obviously, the regulation of an ideal power supply is 0 %. In a non-ideal power supply, we can reduce the ripple voltage by using a larger capacitor. This will also improve the load regulation. However, when we increase the value of the capacitor, we increase both the physical volume of the capacitor and the cost. Also, an increase in the capacitor value will result in an increase in the diode’s peak current calling for more powerful and probably more expensive diodes. Another way to improve the load regulation of the power supply is to keep the capacitor small and add a regulator circuit. Simple Zener Diode Regulators:

The I-V characteristic of a zener diode is given in Figure 12.


11

Zener diodes are normally reverse biased so that they maintain a constant voltage across their terminals over a specified range of current. As long as the circuit load line intersects the diode curve in the zener region, the voltage across the diode will be approximately constant. When used as a regulator, the zener diode maintains a DC output voltage that is essentially constant even though the load current may vary. Figure 2.13 shows a simple zener diode regulator.

If Vin is smaller than the breakdown voltage of the zener diode (Vz), the zener will behave as a reverse biased diode. In this mode, the zener will not regulate the output voltage. Therefore, Vin must be larger than Vz and the magnitude of the current through the zener diode must be larger than Izmin. If these conditions are satisfied, the voltage across the zener diode will be approximately constant at Vz. However, remember that Vin

must not be too large not to dissipate excessive power on the diode. This configuration is known as the zener shunt regulator. Let’s assume that R1=35 Ω, RL=50 Ω, Vz=5 V, Izmin=10 mA and maximum allowed zener power dissipation is 1 W for the circuit in Figure 2.13. Let’s find the allowed range of input voltages for which the circuit will work probably. We will neglect rz. To find the lower limit for Vin, note that when the diode is just on the verge of


12

zener breakdown, Iz will be equal to Izmin=10 mA. IL will be 100 mA (IL=VZ/RL and Vz=5 V), so Iin will be 110 mA. Therefore, the minimum value for Vin should be 8.85 V (Vin=VZ+R1.Iin). The maximum allowed value of Vin can be determined by finding out when the diode has the largest allowed value of current in it. Since the maximum allowed power dissipation is 1 W, Izmax is 200 mA (Pzmax=Vz.Izmax). In this case, the current through the 35 Ω resistor will be 300 mA and Vin=15.5 V.

Therefore, this circuit will produce a constant 5 V output even if the input voltage is varied between 8.5 V and 15.5 V. Improved Regulators:

The zener regulator circuit introduced in the preceding section is a low cost regulator circuit that can be used if the regulation requirements are not strict. However, it has some major disadvantages. First of all, its load and line regulation may be quite large. Secondly, a powerful (high wattage) zener diode is required since the entire current flows through the zener diode when the load is disconnected. This requirement can be eliminated by using the following circuit which is called “series-pass regulator”.

The regulator is similar to the simple zener diode regulator; however, it includes a transistor connected between the load and the zener.

out Z BEV V V (21)

1L

Z R B R

II I I I

The purpose of introducing a transistor in the circuit is to reduce the effective load current drawn from the zener portion of the circuit by a factor of (β+1). This reduces the power requirements for the zener diode. By adding feedback to the regulator its load and line regulation can be improved. The block diagram of a regulated DC supply with feedback is shown in Figure 15.


13

The output voltage is measured and compared to a reference voltage. The comparator then drives the control element to modify the output voltage if necessary. 1) Measurement Section: The simplest form of measuring circuit is a simple voltage divider as shown in Figure 16. Adjustable measuring circuit is used for a variable voltage supply. In writing the expression for Vk, it has been assumed that the comparator part does not load the measurement part.

2) Reference Section: A zener diode is commonly used as a reference element as shown in Figure 17. The current across the zener diode must be constant.


14

3) Comparison Section: The comparison element can be a simple transistor circuit as shown in Figure 18. The circuit compares the zener diode voltage, VZ, appearing at the emitter to the measurement circuit voltage, Vk, appearing at the base. If the output voltage is less than the desired value, a current that is smaller than the quiescent current will flow to the control element. The control element is designed in a way that this will lead to an increase at the output voltage.

4) Control Section: The control element is driven by the comparator to compensate for any changes in the output voltage. There are two types of comparators: series and shunt. The series control requires that the load current must be conducted by the emitter of the transistor. The shunt controller requires that the transistor withstand the full output voltage. Therefore, series controller is used in low current, high voltage applications and the shunt controller is used in high current, low voltage applications. Control section is shown in Figure 19.


15

A practical regulator circuit is shown in Figure 20.

A fraction of the output voltage is compared with the reference voltage VZ. The difference is amplified by Q2. R1 provides the base current for Q1 and R2 biases the zener diode at the proper point of the zener diode at he proper point of the zener region.

Now, let’s see what happens when the load resistance is suddenly decreased. Under normal operating conditions Q2 is in the active mode and Ic2=IR1-IB1. If RL is decreased, Vout will tend to decrease n Ic2 and an increase in IB1 which in turn, leads to an increase in IL compensating for the reduction in RL and restoring Vout. Integrated Circuit Voltage Regulators

Integrated circuit (IC) regulators have some advantages over discrete element regulators. IC regulators offer fixed output voltage with very low load regulation (load currents can vary from milliamperes to amperes), internal overload thermal protection and short circuit protection. The voltage regulators are classified as positive regulators, negative regulators and adjustable output regulators. A three terminal IC voltage regulator providing a positive regulated voltage over a range

of load currents is shown in Figure 21. 78XX series positive voltage regulators and 79XX series negative voltage regulators can be given as examples of IC regulators. 78XX series can provide fixed voltage from 5 V to 24 V. The LM317 is another example with output voltage regulated at any setting over the range 1.2-37V. The real ICs have different


16

packages configuration depend on its applications. In this lab, we will use the IC which had TO-220 power package.

Figure 22: The IC LM7805 with the TO-220 power package

III PRELIMINARY WORK 1) Read the BACKGROUND section.

2) Consider the circuit in Figure PW-1

a) Determine the required transformer turns ratio N. b) Close K1,K2 : assume that the diode has 0.65 (V)V and the ripple at the output is desired to be less than 2.8 % of the output voltage. Choose a suitable value for the capacitor. (formulas in page 7,8) c) Close K2, open K1 : compute the ripple voltage at the output and ripple factor. d) Close K1, open K2 : guess the waveform of the output voltage.


17

3) Design a 5.1 V regulated power supply by using the general form shown in Figure PW-2 the capacitor is large enough and you may neglect ripple. You may also neglect rz for parts b) and c).

a) Select the zener breakdown voltage for the diode. b) Assume that Izmin=5mA for the zener. You need a regulated output voltage for RL≥530 Ω. Select a suitable value for R. What is the main disadvantage of using a very small R? c) Use your answer to part b) and select a power rating (allowed power dissipation) for zener diode so that the diode will be under full-load and no-load conditions. d) Determine the load regulation of your design for RL between 530 Ω and ∞ for rz=50 Ω

4) Use the zener diode of problem 3 to design a 4.4 V regulated supply which has the general form shown in Figure PW-3.

a) Select a suitable value for R to obtain a regulated output voltage for RL≥530 Ω. b) Use your answer to part a) and select a power rating (allowed power dissipation) for the zener diode so that the diode will be OK under full-load and no- load conditions. c) Determine the load regulation of your design for RL between 530 Ω and ∞ for rz=50 Ω. d) What are the advantages of this circuit when compared with that of problem 3?

IV. EXPERIMENT PROCEDURE


18

1) Set up the circuit shown in Figure EP-1.

Get Vin from the transformer. Observe the input signal on the scope. Adjust the potentiometer to 0 Ω.

a) Close the switch S2 (S1 open) and observe the half-wave rectified signal at the output. b) Close the switch S1 (S2 open) and observe the voltage across the capacitor by using the oscilloscope. c) Close S2 (S1 is already closed) and observe the output voltage. d) Measure the DC voltage at the output by using a DC voltmeter and record it. e) Determine the ripple voltage, Vr, record it and compare the measure value with that calculated in PRELIMINARY WORK (2). Write your comment. f) Change the load resistance with the potentiometer and observe the change in the ripple voltage.


Get Vin from the transformer.

a) Observe the full-wave rectified signal at the output with S1 open and S2 closed. b) Close S1 (S2 is already closed) and observe the output signal. c) Using a DC voltmeter measure the DC voltage at the output and record it.


19

d) Measure the ripple voltage using the oscilloscope and record it. Compare this result with part 1).


Repeat parts c-f of (2) and compare the results with those of (2).

4) Set up the zener regulator circuit that you have designed in problem 3 of the preliminary work (Figure PW-2) with C=100 µF and RL =560 Ω. The input to the full-wave rectifier will be supplied by the transformer.

a) Observe the voltage across the load and record it. Is the voltage perfectly regulated? Write your comment. b) Replace with a 10K potentiometer, change the load resistance and observe the output voltage. Record the potentiometer position at which the regulation is lost. Is there agreement between the measurement and your calculation in problem 3 of the preliminary work?

c) Disconnect the potentiometer, measure the output voltage and calculate the load regulation. Is there any discrepancy between the results of the preliminary work and the experiment? Write your comment.

5) Set up the circuit that you have designed in problem 4 of the preliminary work with C=100 µF and RL =560 Ω. Repeat the steps given in (4). Write your comments.

6) Set up the circuit in Figure 21 of the background section with C=1 µF (Connect the input port of the circuit to the output of a full-wave rectifier with a capacitor filter as shown in Figure EP-4). Calculate the load regulation of the circuit (RL =220 Ω at full load) and compare the regulation of the circuit with those of (4) and (5).


20

V REFERENCES








UNIVERSITY OF TECHNOLOGY DIVISION OF BASIC ELECTRICAL & ELECTRONIC ENGINEERING

1

Lab 5: MOS Field-Effect Transistors and Amplifiers

I. INTRODUCTION

1. OBJECTIVES - To conduct a DC analysis and compare the theoretical values with the values after the

implementation of the circuit.

- To examine the performance of the Common Source and Common Drain MOSFET

Single stage amplifier.

2. EQUIPMENT

3. PREREQUISITES

II. BACKGROUND

1. Read Chapter 4 of “Microelectronic Circuit” by Sedra/Smit, 5th edition.

III. PRELIMINARY WORK

1. MOSFET CURRENT SOURCE

Design a current mirror based on the circuit in Figure 7-1 that will supply 0.5mA to a load

using the "nominal" specification sheet values of Vt = 1.5 V and K = 0.5 mA/V2 for each

MOSFET. The transistors are assumed to be matched. Neglect channel-length modulation.

Determine any limitations on the load (represented as a resistor in series with a 10 V DC

source). Discuss the reason for any limitations.


2

-10V

10V

RREF

IREF

0

ID1

ID2

Q1 Q2

Rload

10V

Figure 7.1: Current-source using current mirror

2. COMMON SOURCE (CS) AMPLIFIER

A. DC Analysis

For the circuit shown in figure 7.2, assume current source I = 0.5mA. Perform the DC

analysis for this circuit. Note that the specification values of Vt = 1.5 V and K = 0.5 mA/V2 will be unchanged through PRELIMINARY WORK section.

B. AC Analysis

From the DC parameters of figure 7.2, use a small signal model to analyze the circuit and calculate the input resistance inR , the output resistance Rout, the voltage gain Av and power

gain AP. For this analysis ignore bypass and coupling capacitors. Also ignore the load resistor. And assume that current source is ideal. What is the role of gate resistors?


3

10V

10K

10K

22uF

100uF56K

22uF

10K

Vin

Vout

Vd

Vs

Vg

-10V

-10VI

Rin

Rout

Vsig Vx

Figure 7.2: Common-source amplifier

3. COMMON SOURCE (CS) AMPLIFIER WITH SOURCE RESISTANCE

A. DC Analysis

For the circuit shown in figure 7.3, assume current source I = 0.5mA. Perform the DC

analysis for this circuit. Compare the values with the DC analysis in Common-source amplifier.

B. AC Analysis


gain AP. For this analysis ignore bypass and coupling capacitors. Also ignore the load resistor. And assume that current source is ideal. Compare the results with the Common-source amplifier. Are they different? Write your comment. What is the role of gate and source resistors?


4

10V

10K

10K

22uF

100uF56K

22uF

10K

Vin

Vout

Vd

Vs

Vg

-10V

-10V

I

2.2K

Rin

Rout

VsigVx

Figure 7.3: Common-source amplifier with Source resistance

4. COMMON DRAIN (CD) AMPLIFIER OR SOURCE FOLLOWER AMPLIFIER

A. DC Analysis

For the circuit shown in figure 7.4, assume current source I = 0.5mA. Compute the DC

drain current, the voltages at the drain, gate and source of the transistor. Compare the values with the DC analysis in Common-source amplifier.

B. AC Analysis


gain AP. For this analysis ignore bypass and coupling capacitors. Also ignore the load resistor. And assume that current source is ideal. Compare the results with the Common-source amplifier. Write your comment. What is the main application of this circuit? Why did we call “Source follower”?


5

Figure 7.4: Common-drain amplifier or source follower amplifier

IV. EXPERIMENTAL PROCEDURE

In this experiment we will construct the Common Source and Common Drain amplifier

circuits with HEF4007UB MOSFET

The pin diagram for HEF4007UB MOSFET is given below.

Figure E.1: Pin diagram of HEF4007UB


6

A. MOSFET CURRENT SOURCE

1- Construct the circuit shown in the figure 7.1.

2- Adjust the potentiometer such that 0.5mA can be supply to the load.

3- Use the DMM to measure the value of potentiometer. Compute Vt and K. Compare the

results with chosen values in PRELIMINARY WORK. Are they different? Write your

comment.

B. COMMON SOURCE (CS) AMPLIFIER

DC Analysis

1- Construct the circuit shown in the figure 7.2. Note that we use the current source

design in section A for biasing the amplifier circuit.

2- Use the DMM to measure all the DC values in the table below. Compute Vt and K.

Compare the computed values with section A. Are they different? Can you explain it?

DSV GSV DV GV SV DI SI GI

AC ANALYSIS

1- Apply a sinusoidal signal to the input of the amplifier. Adjust the signal frequency to

make sure that the amplifier is operating in its mid-band region. Adjust the input

signal level to produce an undistorted sinusoidal waveform at the output. Use the oscilloscope to record the following waveform of sigV , xV and outV .

2- Measure the voltage gain sigv

out

VA

V , the input resistance inR , the output resistance outR

and the power gain pA of the amplifier at mid-band frequency. Compare your

measurements with theoretical values. Write your comment.

C. COMMON SOURCE (CS) AMPLIFIER WITH SOURCE RESISTANCE

DC Analysis



7



Compare the computed values with section A, B. Are they different? Can you explain

it?


AC ANALYSIS





out

VA



measurements with theoretical values, with the Common-source amplifier. Write your

comment.

D. COMMON DRAIN (CD) AMPLIFIER OR SOURCE FOLLOWER AMPLIFIER

DC ANALYSIS




Compare the computed values with section A, B, C. Are they different? Can you

explain it?


AC ANALYSIS


8





out

VA



measurements with theoretical values, with the Common-source amplifier. Write your

comment.

V. QUESTIONS AND DISCUSSION

1- Explain how the current source stabilizes the Q point. 2- What happen if we use a large gate resistance? Does the input resistance depend on

the gate resistance? How can we increase the input resistance for these amplifiers? In modern IC how can they solve these issues? Write your comment.

3- Using your DC measurement in EXPERIMENTAL PROCEDURE, calculate the power dissipation in the BJT.

LAB 6 : MOSFET Inverter Circuits

I. INTRODUCTION 1. Objectives

- Construct NMOS and CMOS inverter circuits. - Measure the Voltage Transfer Characteristics (VTC) of inverter circuits. - Determine the power dissipation for each inverter type. - Determine the typical propagation delay.

2. Equipment 3. Background

A simple logic inverter can be built using an N-channel MOSFET and a drain resistor as shown in Fig. 2. An alternative configuration using a P-channel MOSFET and a drain resistor is shown in Fig. 4. These inverter configurations serve as a useful introduction to transistors as digital devices, but they are no longer used in practical logic circuits. Active MOS transistors are used in place of the resistors due to their smaller size and lower power dissipation. Thus, modern logic circuits are made up entirely of transistors. Transistor-only logic circuits can be designed using only N-channel MOSFETs, in which case the circuits are called NMOS circuits. Alternatively they can be designed using both N-channel and P-channel MOSFETs, in which case they are called complimentary MOS or CMOS circuits. While the NMOS circuits are faster than the CMOS circuits, the CMOS circuits use less power and as a result have become more common.

a. NMOS ( OR PMOS)

The key to NMOS circuit designs is the diode-connected NMOS transistor. In the case of the NMOS logic inverter in Fig. 1, the transistor plays the same role as the pull-up resistor (RD) in the inverter circuit of Fig. 2. By connecting the MOSFET’s gate to its drain (VGS = VDS), as done in Figs. 1 and 3, the MOSFET transistor operates in its saturation region since DS GS tV V V unless it goes into cutoff. The N channel MOSFET connected this way, supplies a constant current to the other transistors in the logic circuit, which serve as voltage controlled switches that directs the flow of current. If a digital high is present on the gate, current flows through the device. When a digital low is present on the gate, current cannot flow through the device and must flow elsewhere. If current is “sinked” to ground through a transistor, the output of the logic circuit is low. If current does not reach ground, it must flow out of the logic circuit, thus providing a logic high output. Examples of other MOS logic circuits are shown in Figs. 3 and 4.

Vin

Vout

VDD

S

D

D

S G

G

Vin

VDD

Vout +

-

+

-

RD

S

DG

Figure 1. NMOS Logic Inverter Circuit Figure 2. NMOS Logic Inverter Circuit with a

pull-up resister

Vin1 Vout

VDD

Vin2

S

D G

S

D

G S

D

G

VinVout

VDD

+

-

+

- RD

D

SG

Figure 3. NMOS Logic Gate Circuit Figure 4. PMOS Logic Circuit with a pull-down

resister

b. CMOS Complementary MOS circuits use both N-channel and P-channel MOSFETs. In the case of the CMOS logic inverter in Fig. 5, the P-channel MOSFET plays the same role as the pull up resistor (RD) in the inverter circuit in Fig. 2. Note that when the input is low (0V) the N-channel MOSFET is off and the P-channel MOSFET is on (note its VGS = -VDD) . Thus, the output is high. When the input is high (Vin=VDD) the P-channel MOSFET is off (its VGS = 0V) and the N-channel MOSFET is on. Thus, the output is low.

Vin Vout

VDD

S

D G

D

S G

Vin1

Vout

VDD

Vin2

S

D G S

D G

D

S G D

S G

Figure 5. CMOS Logic Inverter Circuit Figure 6. CMOS Logic Gate Circuit

II. PRELIMINARY WORK 1. Read Chapter 10 and sections 4.10, of “Microelectronic Circuit” by Sedra/Smit, 5th edition.

2. Consider the following NMOS inverter circuit, where 2

0.5 , 1.5 t

mAK V V

V

for the NMOS transistor.

Figure 7. NMOS inverter circuit schematic. Sketch the expected voltage transfer characteristic by calculating the output voltage (Vo) for Vin= 0, 1, 2, 3, 4, and 5 V. 3. Consider the circuit in Figure 7 and think about the rise and fall times of this inverter circuit when a square wave signal is applied at the input. Try to answer the following questions qualitatively by explaining your reasoning. i) Do you think that the rise time of the circuit depends on the magnitude of the supply voltage, VDD? ii) Does the rise time depend on the values of the drain resistor and the capacitance at the output? iii) Does the rise time increase or decrease, if a resistor is connected in parallel to the capacitance at the output? iv) What are the parameters likely to determine the fall time?

4. Simulate the following circuit on SPICE with 2

0.1 mA

KV

and 2

1 mA

KV

for the

MOSFET. Set 1.2 tV V . To observe the transfer characteristics use DC Sweep option

of SPICE. From Simulation ProfileAnalysis Tab select DC Sweep from Analysis

type. In the menu select VIN (5V DC supply at the input.) as Voltage Source. Set Start value: 0V, End value: 5V, Increment: 0.05V. Place Voltage marker at VOUT. For each K value, determine VOH, VOL, VIL, VIH and noise margins (use the Probe cursor on the toolbars ). Bring the print out of DC Sweep output for each K and also the schematic. Comment on the dependence of the inverter performance on K. Note: Due to the order you place the components in SPICE, voltage sources labels can differ from the below figure. Please be sure that you apply the DC Sweep analysis with correct voltage source.

Figure 8. Schematic diagram of the NMOS inverter for using in SPICE. 5. Use SPICE to simulate the circuit in Fig. 9( the parameters are tha same as section 4 ). Use a 1kHz, 0V to 5V pulse with 1s rise and fall times. Plot the input voltage and the output voltage. Also plot the current from the VDD source. Determine the peak (instantaneous) output power during the input pulse transitions (switching events).

Figure 9. Schematic diagram of the NMOS inverter for using in SPICE.

6. Simulate the following CMOS circuit on SPICE with 2

0.1 n p

mAK K

V and

2 1 n p

mAK K

V for the MOSFET, 5DDV V . Set 1.2 and 1.2 tp tnV V V V . To

observe the transfer characteristics use DC Sweep option of SPICE. From Simulation ProfileAnalysis Tab select DC Sweep from Analysis type. In the menu select VIN (5V DC supply at the input.) as Voltage Source. Set Start value: 0V, End value: 5V, Increment: 0.05V. Place Voltage marker at VOUT. For each K value, determine VOH, VOL, VIL, VIH and noise margins (use the Probe cursor on the toolbars ). Bring the print out of DC Sweep output for each K and also the schematic. Comment on the dependence of the inverter performance on K. Note: Due to the order you place the components in SPICE, voltage sources labels can differ from the below figure. Please be sure that you apply the DC Sweep analysis with correct voltage source.

VinVout

VDD

S

DG

D

SG

Figure 9. Schematic diagram of the CMOS inverter for using in SPICE.

7. Use SPICE to simulate the circuit in Fig. 10( the parameters are tha same as section 6 ). Use a 1kHz, 0V to 5V pulse with 1s rise and fall times. Plot the input voltage and the output voltage. Also plot the current from the VDD source. Zoom in on the current plot around a switching event and determine the peak current during a switching event.

VinVout

VDD

S

DG

D

SG

Figure 10. Schematic diagram of the CMOS inverter for using in SPICE.

III. EXPERIMENT

In this experiment we will characterize the inverter circuits constructed with the n and p channel MOSFETs in the HEF 4007 UB MOS array chip. The chip includes 3 n-channel and 3 p-channel enhancement mode MOSFETs as shown in Figure 11. The K and Vt

values for the n-channel and p-channel MOSFETs are measured to be approximately 0.5 mA/V2 and 1.5 V, respectively under zero substrate reverse bias. For the following experiments always tie pin 14 to +5 V and pin 7 to ground.

Figure 11. Pin diagram for HEF4007 UB MOS array chip.

The connections built into the soderless breadboard include horizontal power busses and vertical signal busses as shown in Figure 12

Figure 12: Solderless breadboard. Note that the upper and lower vertical busses are independent and the left and right vertical busses are as well. Hence, you must insert the IC so that it straddles the centerline of the breadboard in the vertical dimension and if you need power and/or ground to be available along the entire horizontal bus you must insert a jumper to connect the left and right sides. You should connect the power supplies and insert the IC to be tested as shown in Figure 13.

Figure 13: Proper IC placement and power connection.

1. NMOS INVERTER

a) NMOS Inverter Voltage Transfer Characteristics Construct the circuit shown in Figure 14 using the first nMOSFET in IC ( you can use other nMOSFET). Before connecting the output of the function generator to pin 6 of the IC, you should adjust the waveform, amplitude, and DC offset of the generator to obtain the waveform shown in Figure 15. DO NOT exceed 5 volts. The frequency, while not critical, should be set to approximately 500 Hz.

Figure 14: Setup for determination of NMOS Inverter transfer characteristics.

Figure 15: Function generator output waveform.

Once the function generator is correctly adjusted, connect its output to both pin 6 of the IC and to CH1 of the scope. Connect the output on pin 8 of the IC to the CH2 input of the scope. Set the Volts/Div of CH 1 and CH 2 to 1V/div. Choose X-Y mode of the scope.

- Determine the value of the threshold voltage for VGS from the circuit’s transfer characteristic.

- Record the circuit’s transfer characteristic and indicate the point on your plot that you used to determine the threshold value of VGS.

- Based on the TC curve determine good values for VOH, VOL , VIH, and VIL. Explain your reasoning. Compare this result with section 4 in Preliminry Lab

b) Supply current for NMOS Inverter circuit

Use the circuit above, record a voltage( voltage between two ends of resistors ) proportional to the VDD (VDD = 5V ) supply current.

- Draw Vin versus ID. - Determine the current’s maximum and minimum values? - When does the inverter draw the most power? Determine this consumtion power. - When does the inverter draw the least power? Determine this consumtion power.

c) Observe junction capacitance effects:

Use the circuit above, replace the triangle wave by a 0 to 5 volt square wave. - Record the output voltage for input square waves at 1kHz and 10kHz input

voltages. - Explain the results. Provide reasons for differences at the 2 frequencies.

d) Propagation Delay

Wire up two CMOS inverter stage in series as in figure 16. Show that the input square wave is inverted twice. Display the two traces on the scope and measure the time delay—the two “ Low to High” edges might have to obviously separates traces. If the time delay is not enough for a direct observation , add more inverter stages and try again.

Figure 16: Setup for determination of propagation delay of the NMOS Inverter. 2. CMOS INVETER

a) CMOS Inverter Voltage Transfer Characteristics Construct the circuit shown in Figure 17 using the first nMOS and the first pMOS in IC ( you can use other nMOS and pMOS). Before connecting the output of the function generator to pin 6 of the IC, you should adjust the waveform, amplitude, and DC offset of the generator to obtain the waveform shown in Figure 15. DO NOT exceed 5 volts. The frequency, while not critical, should be set to approximately 500 Hz.

Figure 16: Setup for determination of CMOS Inverter transfer characteristics.

Once the function generator is correctly adjusted, connect its output to both pin

6 of the IC and to CH1 of the scope. Connect the output on pin 8 of the IC to the CH2 input of the scope. Set the Volts/Div of CH 1 and CH 2 to 1V/div. Choose X-Y mode of the scope.

- Record the circuit’s transfer characteristic and indicate on your plot where VGS of the n-channel MOSFET is equal to its threshold voltage and where VGS of the p-channel MOSFET is equal to its threshold voltage.

- Based on the transfer characteristic curve determine good values for VOH, VOL , VIH, and VIL. Explain your reasoning. Compare this result with section 6 in Preliminry Lab. Explain why results differ from previous inverter circuits?

b) Supply current for CMOS Inverter circuit

For the CMOS circuit in Fig. 16 put a 10 resistor from the source of the lower NMOS transistor and ground to measure the VDD supply current. Record a voltage( voltage between two ends of resistors ) proportional to the VDD (VDD = 5V ) supply current.

- Draw Vin versus ID. - Determine the current’s maximum and minimum values? - When does the inverter draw the most power? Determine this consumtion power. - When does the inverter draw the least power? Determine this consumtion power.

Input a 1 MHz square wave, 0V to 5V. Record the supply current waveform for one

cycle (1s). Next expand your waveform around a single switching event where the output goes high and record the waveform. What is the peak current? Next expand your waveform around a single switching event where the output goes low. What is the peak current now? What advantage is apparent for CMOS logic circuits?

c) Observe effect of decoupling capacitor Input a 100kHz square wave, 0V to 5V, into the CMOS inverter circuit in Fig. 16. Record Vout and Vin to demonstrate your circuit inverts the input. Especially note Vout at the edges of the transitions from high to low and low to high. Expand your scope trace around these transitions. Next, place a capacitor (on the order of 0.1µF) from the 5V VDD to ground close on your circuit board. A capacitor used this way is called a decoupling capacitor. Note that the capacitors used in your amplifiers were called coupling capacitors not decoupling capacitors. They are different and serve a different function. In an ideal circuit with an ideal DC source, decoupling capacitors would have no effect.

- Explain why Vout changes in this circuit as a result of the capacitor. - Repeat with a capacitor on the order of 10µF. Describe the differences between

the effects of the smaller and the larger capacitors.

d) Measure propagation delay: Measure the rise time, the fall time and the delay time (average between turn on and turn off delays) as defined in Fig. 17 for the CMOS inverter with the decoupling capacitor in your circuit (any value). You will have to trigger on the positive edge and then the negative edge of the input voltage and display both Vout and Vin simultaneously. Expand the waveforms using the horizontal time per division adjust. (Discussion: What would be the highest frequency to clock your circuit at? Explain.)

t

Vout

Vin

t

tdelay tdelay

trise tfall

50%

50% 50%

50%

90%

10%

90%

10%

turn off

turn on

Fig. 17. Definitions of delay, rise, and fall time


1

LAB 7: BIPOLAR JUNCTION TRANSISTORS AND AMPLIFIERS

I. INTRODUCTION

1. OBJECTIVES - To conduct a DC analysis and compare the theoretical values with the values after the

implementation of the circuit.

- To examine the performance of the Common Emitter, Common Base and Common

Collector BJT Single stage amplifier.

2. EQUIPMENT

3. PREREQUISITES

II. BACKGROUND

1. Read Chapter 6 and of “Microelectronic Circuit” by Sedra/Smit, 5th edition.


1. COMMON EMITTER (CE) AMPLIFIER

A. DC Analysis

For the circuit shown in figure 6.1. Assume 0.7BEV V . What value of R2 is necessary to

set 6.5CV V . Choose a suitable resistor for R2 and then perform the DC analysis for this

circuit base on the chosen value.

B. AC Analysis

a) Common-emitter amplifier without decoupling capacitor

Assume 130 , 99.0 and mVVT 25 for the circuit shown in figure 6.1. Use a

small signal model to analyze the circuit and calculate the input resistance inR , the output

resistance Rout, the voltage gain Av and power gain AP. For this analysis ignore bypass and coupling capacitors. Also ignore the load resistor. What is the role of biasing resistors?

Compute the lower cutoff frequency fL and the upper cutoff frequency Hf . Assume that

190Tf MHz and 22C pF .


2

Figure 6.1: Common-emitter amplifier without decoupling capacitor

b) Common-emitter amplifier with decoupling capacitor Assume 130 , 99.0 and mVVT 25 for the circuit shown in figure 6.2. Use a



Assume the lower cutoff frequency fL= 150Hz, calculate the necessary value Ce to meet this condition. If we choose 100eC F , what value of the upper cutoff frequency Hf will

be. Assume that 190Tf MHz and 22C pF .Compare the calculated results with section a)

Figure 6.2: Common-emitter amplifier with decoupling capacitor


3

2. COMMON BASE (CB) AMPLIFIER

A. DC Analysis

For the circuit shown in figure 6.3. ssume 0.7BEV V . What value of R2 is necessary to

set 6.5CV V . Choose a suitable resistor for R2 and then perform the DC analysis for this

circuit base on the chosen value. Compare the values with the DC analysis in Common-emitter amplifier

B. AC Analysis




Figure 6.3: Common-base amplifier

3. COMMON COLLECTOR (CC) AMPLIFIER OR EMITTER FOLLOWER AMPLIFIER

A. DC Analysis


4

For the circuit shown in figure 6.4. Assume 0.7BEV V . Use the calculated value R2 in

common-emitter amplifier circuit, compute the DC collector current, the voltages at the collector, base and emitter of the transistor . Compare the values with the DC analysis in Common-emitter amplifier.

B. AC Analysis




Figure 6.4: Common-collector amplifier or emitter follower amplifier

4. INPUT AND OUTPUT IMPEDANCE

In this lab we will use a method of measuring the input impedance inZ of a circuit.

This impedance will be purely resistive because the circuit will have no significant capacitance or impedance. The scheme is to connect a large input resistor AR in series with

the circuit’s input, and measure the resulting decrease in the circuit’s output. You can think of

AR and the circuit’s input impedance as being like two resistors in series, i.e., a voltage

divider. See the diagram below; the circuit, which has a gain VA , is shown as a box with an

input and an output.

(a) Derive a formula for inZ as a function of AR , oscV , outV and the gain VA


5

(b)Write a simplified version of this formula valid for 1VA

(c) Write an even more simplified version valid if 1VA and 2osc

out

VV .

IV. EXPERIMENTAL PROCEDURE

In this experiment we will construct the Common Emitter, Common Base and Common

Collector amplifier circuits with D468 BJT

The maximum rating and diagram for D468 BJT is given below.

Maximum Ratings of D468 Bipolar Transistor

VCE(V) IC(A) max./typical PD(mW) Freq.(MHz)

20 1 300/160 900 200


6

The picture below shows the appearance of either the BJT that you will find in the lab. The

pins are described in the table below.

Figure E.1: Diagram of D468 BJT

A. COMMON EMITTER (CE) AMPLIFIER

DC Analysis

1- From Preliminary work, Select the closest standard values for the R2 resistors, and

then construct the circuit shown in the figure 6.5. 2- Use the DMM to measure all the DC values in the table below. Compute and verify

all the previous values.

CEV BEV BV CI EI BI

Pin No. D468

BJT

1 Emitter

2 Collector

3 Base


7

Figure 6.5: Common-emitter amplifier for DC analysis

AC ANALYSIS

a) Common-emitter amplifier without decoupling capacitor




signal level to produce an undistorted sinusoidal waveform at the output. Use the oscilloscope to record the following waveform of sV , xV and outV .

3- Measure the voltage gain sv

out

VA



measurements with theoretical values.

4- Display sV on CH1 and outV on CH2, then change the frequency (if needed) and

measure the peak-to-peak value of the maximum output voltage that is out MID BANDV V .

Now decrease the frequency more and observe the peak-peak values of the output

signal outV , when 2

MID BANDout

VV record the frequency of the input signal. This is the

frequency at the lower 3dB point. Compare your measurements with theoretical values. (Attention : Keep the peak-to-peak value of sV constant as changing the

frequency).


8


measure the peak-to-peak value of the maximum output voltage that is out MID BANDV V .

Now increase the frequency till the output peak-peak equal to 2

MID BANDV . Determine

this frequency at the upper 3dB point. Determine the bandwidth. Compare your

measurements with theoretical values. (Attention : Keep the peak-to-peak value of

sV constant as changing the input frequency).

b) Common-emitter amplifier with decoupling capacitor




signal level to produce an undistorted sinusoidal waveform at the output. Use the oscilloscope to record the following waveform of sV , xV and outV .


out

VA



measurements with theoretical values. Compare your results with the case without

decoupling capacitor. Write your comment.


measure the peak-to-peak value of the maximum output voltage that is

out MID BANDV V . Now decrease the frequency more and observe the peak-peak values

of the output signal outV , when 2

MID BANDout

VV record the frequency of the input

signal. This is the frequency at the lower 3dB point. Compare your measurements with

theoretical values. Compare your results with the case without decoupling capacitor. Write your comment. (Attention : Keep the peak-to-peak value of sV constant as

changing the frequency).


measure the peak-to-peak value of the maximum output voltage that is

out MID BANDV V . Now increase the frequency till the output peak-peak equal to

2MID BANDV . Determine this frequency at the upper 3dB point. Determine the


9

bandwidth. Compare your measurements with theoretical values. Compare your results

with the case without decoupling capacitor. Write your comment. (Attention : Keep the peak-to-peak value of sV constant as changing the input frequency).

B. COMMON BASE (CB) AMPLIFIER

DC Analysis

1- From Preliminary work, Select the closest standard values for the R2 resistors, and

then construct the circuit shown in the figure 6.3. 2- Use the DMM to measure all the DC values in the table below. Compute and verify


CEV BEV BV CI EI BI

AC ANALYSIS




signal level to produce an undistorted sinusoidal waveform at the output. Use the oscilloscope to record the following waveform of sV and outV .


out

VA



measurements with theoretical values. Compare your results with the Common-emitter

amplifier . Write your comment.

C. COMMON COLLECTOR (CC) AMPLIFIER OR EMITTER FOLLOWER AMPLIFIER

DC ANALYSIS

1- From Preliminary work, construct the circuit shown in the figure 6.4. 2- Use the DMM to measure all the DC values in the table below. Compute and verify



10

CEV BEV BV CI EI BI

AC ANALYSIS




signal level to produce an undistorted sinusoidal waveform at the output. Use the oscilloscope to record the following waveform of sV and outV .


out

VA



measurements with theoretical values. Compare your results with the Common-emitter

amplifier . Write your comment.

V. QUESTIONS AND DISCUSSION

1- Explain how the emitter resistance RE stabilizes the Q point. 2- Using your DC measurement in EXPERIMENTAL PROCEDURE , calculate the

power dissipation in the BJT. 3- Compare the voltage gain obtained for the circuit in figure 6.1 and 6.2(with and

without 100F capacitor). Discuss the influence of the bypass capacitor on these values.

4- If the small-signal model for BJT has been covered by your professor then using theoretical analysis, show that the presence of bypass capacitor in Fig 6.2 significantly enhances the gain in the mid-band region..

5- Compare the bandwidth obtained for the circuit in figure 6.1 and 6.2 (with and without 100F capacitor). Discuss the influence of the bypass capacitor on these values. Can you explain the sizable difference in the bandwidth?

VI. APPENDIX

1. Measurement of input resistance

Figure VI.1 shows an arrangement for measuring the input resistance of the amplifier circuit.

Set the potentiometer to zero ohm and select an input signal frequency which falls within the mid-band region to drive a small-signal into the input of the amplifier circuit. Adjust the input level such that an undistorted signal is produced at its output. Use the


11

oscilloscope to monitor the input and output signal waveforms of the amplifier simultaneously. Measure the peak voltage of the output waveform.

For the given input voltage and frequency setting, adjust the potentiometer until the output peak voltage drops to half its original value.

The input resistance of the circuit is given by the resistance of the potentiometer.

Figure VI.1

2. Measurement of output resistance

Figure VI.2 shows the arrangement for measuring the output resistance of the amplifier circuit.

Be sure to disconnect the load resistance from the output of the amplifier circuit as shown in Figure VI.2(a). With the output open-circuited, select an input signal frequency which falls within the mid-band region to drive a small signal into the input of the amplifier circuit. Adjust the input level such that an undistorted signal is produced at its output. Use the oscilloscope to monitor the input and output signal waveforms of the amplifier simultaneously. Measure the peak voltage of the output waveform.

For the given input voltage and frequency setting, connect a potentiometer across the output terminals as shown in Figure VI.2(b). Adjust the potentiometer until the output peak voltage drops to half its original value.

The output resistance of the amplifier circuit is given by the resistance of the potentiometer.


12

3. Measurement of 3-dB frequency

Select an input signal frequency which falls within the mid-band region to drive a small-signal into the input of the amplifier circuit. Adjust the input level such that an undistorted signal is produced at its output. Use the oscilloscope to monitor the input and output signal waveforms of the amplifier simultaneously. Measure the peak voltage Vp of the output waveform. Without making any further adjustment to the input signal level, vary the signal frequency until the output peak voltage drops to 0.707Vp. Measure the corresponding signal frequency using the oscilloscope. This is the 3-dB frequency.


1

LAB 8: OPERATIONAL AMPLIFIERS

I. INTRODUCTION

1. OBJECTIVES - Introduce you to the operational amplifier, or op amp, an important building block

used in many electronic circuits.

- Learn characteristics of operational amplifiers and their use in simple

configurations.

-

2. EQUIPMENT

3. PREREQUISITES

II. BACKGROUND

1. Read Chapter 2 and of “Microelectronic Circuit” by Sedra/Smit, 5th edition. 2. Read additional handout “Theory of opamps”.


1) Derive the gain (Vo/Vi) expression in terms of R1 and R2 for the following amplifiers

a) Noninverting amplifier

Noninverting Amplifier


2

b) Inverting amplifier

Fig 2: Inverting Amplifier 2) What is the gain of this circuit?

3) Determine how Vout relates to VA and VB.


3

4) EXPERIMENTAL PROCEDURE

In this experiment you will use the LM741 integrated circuit (IC) OP AMP universally

accepted as the standard general purpose OP AMP.

The 741 OP AMP package pin connections are

illustrated at left. The table below lists the values of

various parameters that govern the operation of a 741 OP

AMP.

741 OP AMP PARAMETERS

Parameters Minimum Typical Maximum

AVOL Open loop voltage gain

50,000 200,000

Vio Input offset voltage 1 mV 6 mV

IB Input bias current 80 nA 500 nA

Iio Input offset current 20 nA 200 nA

Ro Output resistance 75

CMR (dB) Common mode rejection

70 dB 90 dB

Ri Input resistance 300 k 2 M

Using the circuit breadboard, setup the following circuit. Be sure to measure and record ALL of your resistors (except the pot) and power supplies!


4

5.6 k

2.2 k

10 k pot

2.2 k

The 10 k pot (potentiometer) between pins 1 and 5 is used to zero the output (Vout) when there is zero input (Vin). This is called an offset null adjustment and must be made in order to ensure that the curve of Vout vs. Vin goes through the origin (see figure below). The 10 k pot is located at the bottom-center of your kit. Connect pins 1 and 5 of the Op Amp to the holes on opposite ends of the pot. Connect the –15V to the center holes of the pot. You should note this general setup of the potentiometer for future reference.

withoutoffsetnulled

offsetnulled

- Before proceeding further, connect Vin to ground (zero input) and adjust the 10 k pot

until Vout reads zero.

5) Noninverting Amplifier (a) DC measurements:

(1) Build up the noninverting amplifier as shown in Fig 1. Use the DC power supply for Vin, and measure both input and output using oscilloscope. R1 is 1,2 k and R2 is 6k. Change Vin to verify the proper amplification range of DC inputs.

(2) Fix the DC input 4 V, measure the amplifier gain (Vout/Vin) for R2= 1.2 k, 2.4 k, 3.6


5

kΩ (turn R2 ) and compare with the calculated gain. (You need to take out the pot from the circuit to measure its value.)

(b) AC measurement: (1) Now, set the input signal to a 1 kHz, 2 VPP, 0 VDC offset (on the function generator

display) Sine wave from the function generator. Use a 10kΩ potentiometer as R2. Adjust R2 to see the gain change. Can you get a gain less than unity by turning R2? Why?

(2) Turn the potentiometer R2 until the gain is 6 and then adjust the Vpp and DC offset to the input signal. Observe the input and output waveforms as you vary the DC offset for large Vpp. Draw the input and output for a case that gives clipping, label all the axes and indicate the amplitude, and DC offset value.

Figure 1: Noninverting Amplifier

6) Inverting Amplifier Using the another op-amp, build the inverting amplifier as shown in Fig 2. R1 is 2.2k and R2 is the 10k pot. While you are building a circuit, it is safer for the circuits if you turn the DC power supply OUTPUT OFF. Let the input signal be a 1 kHz, 2.5VPP sine wave, 0 VDC offset, turn R2 to max. What’s happening to the output signal as you change R2? Adjust the input offset to make the output more complete. Now adjust the potentiometer and observe the resulting change in the amplitude and offset of the output. Adjust these two parameters until the gain is at its maximum and there’s no clipping. What range of output voltage do you have in this circuit? Verify the correct amplification (range of the output signal) of both AC and DC signals. What is the phase difference between Vout and Vin and where is it from?


6

Fig 2 Inverting Amplifier 7) Cascaded connection Now we will study a cascade connection of two amplifiers. Connect the output of the inverting amp to act as the input voltage for the non-inverting amp. Use R1= 1,2K , R2 = 5.6K in the inverting circuit and R1’=2,2k R2’=3,9k in the noninverting circuit. The input signal should be a 1 kHz, 2VPP (on the function generator display) sine wave and you have to pick the correct offset for the circuit to amplify linearly. Adjust the input signal to make sure there is no clipping in the circuit. Measure the gain of each stage separately and then the overall gain of this cascaded circuit.

Fig 3 Cascade amplifier structure

8) Addition with an OP AMP Construct the summing amplifier shown in fig. 3, using resistor values Rf = 5,6

k, R1 = 1,2 k and R2 = 2,2 k.


7

Apply a sinusoidal signal of about 0.5 V amplitude (from the function generator) to each input separately with the other grounded and measure the sign and magnitude of the amplification factor.

Then connect the same signal to both inputs and measure the output

magnitude. Compare with predicted values (do they agree within errors?). Apply a sinusoidal signal to both inputs; vary the amplitude of the input signal

from 0V to 3V (in 200mV steps) and measure the gain (i.e. ratio of amplitude of the output signal and amplitude of input signal). Plot it as a function of the nominal output signal amplitude (i.e. the output signal amplitude expected from the formula given in fig.3). Estimate uncertainties on measured and expected signal size and gain. Describe your observations, and try to explain what you observe.

Fig. 3: Summing amplifier

UNIVERSITY OF TECHNOLOGY Operational Amplifier

1

0BTheory: Op-Amps 1B1. Objective 9BThe purpose of these experiments is to introduce the most important of all analog building blocks, the operational amplifier (“op-amp” for short). This handout gives an introduction to these amplifiers and a smattering of the various configurations that they can be used in. Apart from their most common use as amplifiers (both inverting and non-inverting), they also find applications as buffers (load isolators), adders, subtractors, integrators, logarithmic amplifiers, impedance converters, filters (low-pass, high-pass, band-pass, band-reject or notch), and differential amplifiers. So let’s get set for a fun-filled adventure with op-amps! 10B2. Introduction: Amplifier Circuit An amplifier has an input port and an output port. (A port consists of two terminals, one of which is usually connected to the ground node.) In a linear amplifier, the output signal = A input signal, where A is the amplification factor or “gain.” Depending on the nature of the input and output signals, we can have four types of amplifier gain: voltage gain (voltage out / voltage in), current gain (current out / current in), transresistance (voltage out / current in) and transconductance (current out / voltage in). Since most op-amps are used as voltage-to-voltage amplifiers, we will limit the discussion here to this type of amplifier. The circuit model of an amplifier is shown in Figure 1 (center dashed box, with an input port and an output port). The input port plays a passive role, producing no voltage of its own, and is modeled by a resistive element Ri called the input resistance. The output port is modeled by a dependent voltage source AVi in series with the output resistance Ro, where Vi is the potential difference between the input port terminals. Figure 1 shows a complete amplifier circuit, which consists of an input voltage source Vs in series with the source resistance Rs, and an output “load” resistance RL. From this figure, it can be seen that we have voltage-divider circuits at both the input port and the output port of the amplifier. This requires us to re-calculate Vi and Vo whenever a different source and/or load is used:

sis

ii V

RR

RV

(1)

iLo

Lo AV

RR

RV

(2)

RS

VS

Vi

Ri AVi

Ro

Vo

RL

SOURCE AMPLIFIER LOAD

+

_

+

_

INP

UT

PO

RT O

UTP

UT P

OR

T

Figure 1: Circuit model of an amplifier circuit.


2

2B3. The Operational Amplifier: Ideal Op-Amp Model The amplifier model shown in Figure 1 is redrawn in Figure 2 showing the standard op-amp notation. An op-amp is a “differential-to-single-ended” amplifier, i.e., it amplifies the voltage difference Vp – Vn = Vi at the input port and produces a voltage Vo at the output port that is referenced to the ground node of the circuit in which the op-amp is used.

Vi

Ri

AVi

Ro

Vo

+

_

+

_

+

_

Vp

Vn

ip

in

+

_

Vi

AViVo

+

_

+

_

+

_

Vp

Vn

+

_

Figure 2: Standard op-amp Figure 3: Ideal op-amp The ideal op-amp model was derived to simplify circuit analysis and it is commonly used by engineers for first-order approximate calculations. The ideal model makes three simplifying assumptions: Gain is infinite: A = (3) Input resistance is infinite: Ri = (4) Output resistance is zero: Ro= 0 (5)

Applying these assumptions to the standard op-amp model results in the ideal op-amp model shown in Figure 3. Because Ri = and the voltage difference Vp – Vn = Vi at the input port is finite, the input currents are zero for an ideal op-amp: in = ip = 0 (6) Hence there is no loading effect at the input port of an ideal op-amp: si VV (7)

In addition, because Ro = 0, there is no loading effect at the output port of an ideal op-amp: Vo = A Vi (8) Finally, because A = and Vo must be finite, Vi = Vp – Vn = 0, or

Vp = Vn (9) Note: Although Equations 3-5 constitute the ideal op-amp assumptions, Equations 6 and 9 are used most often in solving op-amp circuits.


3

Vin R2

R1

Vout

+

_

Vp

Vn

I

Vin

Vout

+

_

Vp

Vn

Vin

R2

R1

Vout

+

_

Vn

Vp

I

Figure 4a: Non-inverting amplifier

Figure 5a: Voltage follower Figure 6a: Inverting amplifier

Vin

Vout

A>=1

Vin

Vout

A=1

Vin

Vout

A<0

Figure 4b: Voltage transfer curve of non-inverting amplifier

Figure 5b: Voltage transfer curve of voltage follower

Figure 6b: Voltage transfer curve of inverting amplifier

Vin

Vout

A>=1

-Vpower

+Vpower

Vin

Vout

A=1

-Vpower

+Vpower

Vin

Vout

A<0

-Vpower

+Vpower

Figure 4c: Realistic transfer curve of non-inverting amplifier

Figure 5c: Realistic transfer curve of voltage follower

Figure 6c: Realistic transfer curve of inverting amplifier

3B4. Non-Inverting Amplifier An ideal op-amp by itself is not a very useful device, since any finite non-zero input signal would result in infinite output. (For a real op-amp, the range of the output signal amplitudes is limited by the positive and negative power-supply voltages – referred to as “the rails”.) However, by connecting external components to the ideal op-amp, we can construct useful amplifier circuits. Figure 4a shows a basic op-amp circuit, the non-inverting amplifier. The triangular block symbol is used to represent an ideal op-amp. The input terminal marked with a “+” (corresponding to Vp) is called the


4

non-inverting input; the input terminal marked with a “–” (corresponding to Vn) is called the inverting input. To understand how the non-inverting amplifier circuit works, we need to derive a relationship between the input voltage Vin and the output voltage Vout. For an ideal op-amp, there is no loading effect at the input, so Vp = Vi (10)

Since the current flowing into the inverting input of an ideal op-amp is zero, the current flowing through R1 is equal to the current flowing through R2 (by Kirchhoff’s Current Law -- which states that the algebraic sum of currents flowing into a node is zero -- to the inverting input node). We can therefore apply the voltage-divider formula find Vn:

outn VRR

RV

21

1 (11)

From Equation 9, we know that Vin = Vp = Vn, so

inout VR

RV

1

21 (12)

The voltage transfer curve (Vout vs. Vin) for a non-inverting amplifier is shown in Figure 4b. Notice that the gain (Vout / Vin) is always greater than or equal to one. The special op-amp circuit configuration shown in Figure 5a has a gain of unity, and is called a “voltage follower.” This can be derived from the non-inverting amplifier by letting R1 = and R2 = 0 in Equation 12. The voltage transfer curve is shown in Figure 5b. A frequently asked question is why the voltage follower is useful, since it just copies input signal to the output. The reason is that it isolates the signal source and the load. We know that a signal source usually has an internal series resistance (Rs in Figure 1, for example). When it is directly connected to a load, especially a heavy (high conductance) load, the output voltage across the load will degrade (according to the voltage-divider formula). With a voltage-follower circuit placed between the source and the load, the signal source sees a light (low conductance) load -- the input resistance of the op-amp. At the same time, the load is driven by a powerful driving source -- the output of the op-amp. 4B5. Inverting Amplifier Figure 6a shows another useful basic op-amp circuit, the inverting amplifier. It is similar to the non-inverting circuit shown in Figure 4a except that the input signal is applied to the inverting terminal via R1 and the non-inverting terminal is grounded. Let’s derive a relationship between the input voltage Vin and the output voltage Vout. First, since Vn = Vp and Vp is grounded, Vn = 0. Since the current flowing into the inverting input of an ideal op-amp is zero, the current flowing through R1 must be equal in magnitude and opposite in direction to the current flowing through R2 (by Kirchhoff’s Current Law):

21 R

VV

R

VV noutnin

(13)


5

Since Vn = 0, we have:

inout VR

RV

1

2 (14)

The gain of inverting amplifier is always negative, as shown in Figure 6b. 5B6. Operation Circuit Figure 7 shows an operation circuit, which combines the non-inverting and inverting amplifier. Let’s derive the relationship between the input voltages and the output voltage Vout. We can start with the non-inverting input node. Applying Kirchhoff’s Current Law, we obtain:

B

p

B

pB

B

pB

B

pB

R

V

R

VV

R

VV

R

VV

3

3

2

2

1

1 (15)

Applying Kirchhoff’s Current Law to the inverting input node, we obtain:

A

outn

A

nA

A

nA

A

nA

R

VV

R

VV

R

VV

R

VV

3

3

2

2

1

1 (16)

Since Vn = Vp (from Equation 9), we can combine Equations 15 and 16 to get

AA

A

A

A

A

AB

B

B

B

B

B

B

A

Aout R

R

V

R

V

R

VR

R

V

R

V

R

V

R

RV

3

3

2

2

1

1

3

3

2

2

1

1 (17)

where

321

11111

AAAA

A

RRRR

R

and

321

11111

BBBB

B

RRRR

R

Thus, this circuit adds VB1, VB2 and VB3 and subtracts VA1, VA2 and VA3. Different coefficients can be applied to the input signals by adjusting the resistors. If all the resistors have the same value, then 321321 AAABBBout VVVVVVV (18)


6

VA3

RA

RA3

Vout

+

_

Vn

Vp

VA2RA2

VA1RA1

VB3RB3

VB2RB2

VB1RB1

RB

11BFigure 7: Operation circuit

7. 6BIntegrator By adding a capacitor in parallel with the feedback resistor R2 in an inverting amplifier as shown in Figure 8, the op-amp can be used to perform integration. An ideal or lossless integrator (R2 = ) performs the

computation

dtVCR

V inout1

1. Thus, a square-wave input would cause a triangle-wave output. However,

in a real circuit (R2 < ) there is some decay in the system state at a rate proportional to the state itself. This leads to exponential decay with a time constant of = R2C.

V in

R 2

R 1

V out

+

_

V n

V p

C

12BFigure 8: Integrator 8. 14BDifferentiator By adding a capacitor in series with the input resistor R1 in an inverting amplifier, the op-amp can be used to perform differentiation. An ideal differentiator (R1 = 0) has no memory and performs the computation

dt

dVCRV in

out 2 . Thus a triangle-wave input would cause a square-wave output. However, a real circuit

(R1 > 0) will have some memory of the system state (like an lossy integrator) with exponential decay of time constant = R1C. 9. 15BDifferential Amplifier Figure 9 shows the differential amplifier circuit. As the name suggests, this op-amp configuration amplifies the difference of two input signals.


7

1

2)(R

RVVVout (20)

If the two input signals are the same, the output should be zero, ideally. To quantify the quality of the amplifier, the term Common Mode Rejection Ratio (CMRR) is defined. It is the ratio of the output voltage corresponding to the difference of the two input signals to the output voltage corresponding to “common part” of the two signals. A good op-amp has a high CMRR.

+10V

-10V

Vout

R2

R1

R1

R2

V+

V-

Figure 9: Differential amplifier 10. 7BFrequency Response of Op-Amp The “frequency response” of any circuit is the magnitude of the gain in decibels (dB) as a function of the frequency of the input signal. The decibel is a common unit of measurement for the relative loudness of a sound or, in electronics, for the relative magnitude of two power levels. The expression for such a ratio of power is Power level in dB = 10log10(P1/P2) (A decibel is one-tenth of a "Bel", a seldom-used unit named for Alexander Graham Bell, inventor of the telephone.) The voltage or current gain of an amplifier expressed in dB is 20 log10|G|, where G = Vout/Vin for voltage gain or Iout/Iin for current gain.. The frequency response of an op-amp has a low-pass characteristic (passing low-frequency signals, attenuating high-frequency signals), Figure 10.

Gain (log scale)

Freq (Hz)

-3 dB point

B

G

Figure 10: Frequency response of op-amp.

16BThe bandwidth is the frequency at which the power of the output signal is reduced to half that of the maximum output power. This occurs when the power gain G drops by 3 dB. In Figure 10, the bandwidth is B Hz. For all op-amps, the Gain*Bandwidth product is a constant. Hence, if the gain of an op-amp is decreased, its operational bandwidth increases proportionally. This is an important trade-off consideration


8

in op-amp circuit design. In Sections 3 through 8 above, we assumed that the op-amp has infinite bandwidth. 8B10. More on Op-Amps All of the above op-amp configurations have one thing in common: there exists a path from the output of the op-amp back to its inverting input. When the output is not “railed” to a supply voltage, negative feedback ensures that the op-amp operates in the linear region (as opposed to the saturation region, where the output voltage is “saturated” at one of the supply voltages). Amplification, addition/subtraction, and integration/differentiation are all linear operations. Note that both AC signals and DC offsets are included in these operations, unless we add a capacitor in series with the input signal(s) to block the DC component.

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