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CS 2630 Computer Organization Meeting 6: Stored programs Brandon Myers University of Iowa

CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

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Page 1: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

CS2630ComputerOrganization

Meeting6:StoredprogramsBrandonMyers

UniversityofIowa

Page 2: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

PeerinstructionWhatvalueisstoredin$t0whentheprogramfinishes?

(numericresponse)

Page 3: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Wherewearegoing

Instructionsetarchitecture(e.g.,MIPS)

Compiler

Memorysystem I/OsystemProcessor

Datapath &Control

Digitallogic

translatingsourcecode(CorJava)ProgramstoassemblylanguageAndlinkingyourcodetoLibrarycode

HowthesoftwaretalksTothehardware

HowaprocessorrunsMIPSPrograms!

Howswitches(1or0)canbeusedtobuildInterestingfunctions:fromintegerarithmetictoprogrammablecomputers

Page 4: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Wherewearegoing

Instructionmemory

Executionengine

Datamemory

Learnwhatgetsstoredinhere

Page 5: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Storinganinstructionasbits• eachMIPSinstructionsis32bits,storedin“instructionmemory”

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

lw $s3, 0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

address contents meaning

Page 6: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

StoringaninstructionasbitseachMIPSinstructionsis32bits,storedin“instructionmemory”

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

lw $s3, 0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

address contents meaning

Page 7: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

R-type

opcode=0forR-typeandfunct isthis

Page 8: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

R-type

Example:

opcode=0forR-typeandfunct isthis

3stepstotranslatefromhumancodetomachinecode

Page 9: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

R-type

Example:

opcode=0forR-typeandfunct isthis

0x00 8 9 13 0 0x20

step1:fillinthefields

Page 10: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

R-typeExample:

0x00 8 9 13 0 0x20

step2:writeasa32-bitbinarynumber

000000 01000 01001 01101 00000 100000

Page 11: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

R-typeExample:

0x00 8 9 13 0 0x20

step3:typicallywritethecodeashex,sotranslatetohexadecimalbyturningeach4bitsintoadigit

000000 01000 01001 01101 00000 100000

0x01096820

Page 12: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

I-type

0x09 10 14 -1

001001 01010 01110 11111 11111 1111110x254EFFFF MIPSgreensheet,P&H

Example:

Page 13: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

PeerinstructionGivethe32-bitrepresentationofthisinstruction

a) 0x00231025b) 0x014B4825c) 0x00430825d) 0x00611025e) 0x01695025

Page 14: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Whattodonext• reminder:HW2/Quiz2dueThursday

• NexthomeworkoutTh orFri

Page 15: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

• QUESTIONSFORNEXTTIME• whatiftoobigfor16bits?• willthefunct everbebiggerthan6bits?

Page 16: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

http://qz.com/726338/the-code-that-took-america-to-the-moon-was-just-published-to-github-and-its-like-a-1960s-time-capsule/

lotsmoreinfo:http://tcf.pages.tcnj.edu/files/2013/12/Apollo-Guidance-Computer-2009.pdf

Page 17: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

CS2630ComputerOrganization

Meeting7:StoredprogramsII:programexecution,immediates,addresses

BrandonMyersUniversityofIowa

Page 18: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Wherewearegoing

Instructionsetarchitecture(e.g.,MIPS)

Compiler

Memorysystem I/OsystemProcessor

Datapath &Control

Digitallogic

translatingsourcecode(CorJava)ProgramstoassemblylanguageAndlinkingyourcodetoLibrarycode

HowthesoftwaretalksTothehardware

HowaprocessorrunsMIPSPrograms!

Howswitches(1or0)canbeusedtobuildInterestingfunctions:fromintegerarithmetictoprogrammablecomputers

Page 19: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Representationsofaprogram

Compiler

int x = arr[1];arr[2] = x + 10;

lw $t0, 4($r0)addi $t0, $t0, 10sw $t0, 8($r0)

Assembler

100011100000100000000000000001000010000100001000000000000000101010101110000010000000000000001000

Highlevellanguageprogram(humanreadable)

assemblyprogramastext(CS2630studentreadable)

assemblyprogramasbinary(machinereadable)

Page 20: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Registernames->numbers

RegisterNumber ConventionalName Usage$0 $zero hard-wiredto0$1 $at reservedforassembler

$2- $3 $v0,$v1 returnvaluesfromfunctions

$4- $7 $a0- $a3 arguments$8- $15 $t0- $t7 temporary registers$16- $23 $s0- $s7 savedregisters

$24- $25 $t8- $t9 temporary registers

$26- $27 $k0- $k1 reservedforOS$28 $gp globalpointer$29 $sp stackPointer$30 $fp framePointer$31 $ra returnAddress

thistableintheMIPSreferencesheetsays,e.g.,thatregister$t8 isrepresentedby5-bitnumber24

Page 21: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Moreinstructionsopcode

opcodefunct

Page 22: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Branches:relativeaddressing

example

Page 23: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

address contents meaning

PC 0x0000

Page 24: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Analogy:choose-your-own-adventurenovel• onmostpages:youcontinuereadingbyturningthepage(asinanormalbook)• onsomepages:youaregiventhechoicetojumptoadifferentpage

Page 25: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

address contents meaning

PC 0x0000

Page 26: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0004

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 27: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0008

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 28: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x000C

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 29: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0010

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 30: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0014

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 31: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0018

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

Page 32: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Instructionexecution

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

address contents meaning

PC 0x0018

loop: lw $s3,0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

0xfff9 = -7

0x0018 + 4 + (-7 * 4) = 0x0000

branchesuse“relativeaddressing”

Page 33: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Peerinstruction

Whatistheimmediateforthebeq instruction?

a)3b)12c)8d)2e)-3

Page 34: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Jumps:absoluteaddressing

example

example

Page 35: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Peerinstruction

Whatisthemaximumdistanceyoucanjumpusingasingle j?

a) 25instructionsb) 26instructionsc) 224 instructionsd) 225 instructionse) 226 instructionsf) 230 instructions

Page 36: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Theplotthickens

SomeMIPSinstructionsyoucanwritecannotbetranslatedtoa32-bitnumber

somereasonswhy1) constantsaretoobig2) relativeaddressesaretoobig3) absoluteaddressesareoutsidetherangeofajump4) convenienceinstructionsthathavenoopcode

SpoilerAlert!

Page 37: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

StoringaninstructionasbitseachMIPSinstructionsis32bits,storedin“instructionmemory”

8e 13 00 00

8e 14 00 04

02 74 90 20

ae 12 00 08

22 10 00 04

22 31 ff ff

1e 20 ff f9

000000040008000C001000140018

lw $s3, 0($s0)

lw $s4, 4($s0)

add $s2, $s3, $s4

sw $s2, 8($s0)

addi $s0, $s0, 4

addi $s1, $s1, -1

bgtz $s1, loop

address contents meaning

Page 38: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

PseudoinstructionsNotalltheMIPSinstructionsare“real”(i.e.,understoodbytheprocessor)TAL – thetrueassemblylanguage;MIPSprocessorsknowalloftheseinstructionsMAL – slightlymoreconvenientlanguage;eachMALinstructionisusuallytranslatedto1-3TALinstructionsbytheassembler

Page 39: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Pseudoinstructions(MAL)

lui $t2, 0x0012ori $t3, $t3, 0x3456addu $t1, $t2, $t3

assemblertranslatesitto

Example:howmanybitsarerequiredfortheimmediateinthisinstruction?addiu $t1, $t2, 0x123456

lui =“loadupperimmediate”

Page 40: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Morepseudoinstructions(MAL)• otherI-typeinstructionswithtoo-largeimmediate• move $rd, $rs• li $rd,[32-bitimmediate]• la $rd,[32-bitimmediate]• branchinstructionswith<,>,<=,>=• reallyuseslt (setiflessthan),followedbybeq to0or1

• Foryoutotry:usetheseinstructionsinaMIPSprogram,thenseewhatMARStranslatesthemto

Page 41: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Peerinstruction• Putthefollowinginto• (A)onlyinMAL• (B)TAL

Page 42: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Whattodonow• DYBtonight• HW2/Quiz2dueThursday• HW3advancedMIPS/MIPStranslationassignedlaterthisweek(useMARSagain)

Page 43: CS 2630 Computer Organizationhomepage.cs.uiowa.edu/~bdmyers/cs2630_sp17/public/lectures/lecture-006... · Where we are going Instruction set architecture (e.g., MIPS) Compiler Memory

Acknowledgements• Snipsofgreensheetfromhttp://www-inst.eecs.berkeley.edu/~cs61c/resources/MIPS_help.html