2
Y 14, (a) Explairi instruction levql Parallel Processing. State the challenges of parallel Processing (16) (b) Or. Explain the terms:. (i) Multicore Processor. (ii) Hardware Multithreading. (16) (i) Explain. mapping functions in cache memory to determinq how memory blocks are placed in Cache- Gtl Explain in detail about the Bus Arbitratiorl techniques in DMA. (8)  Or (r) Draw different memoiy address layouts and brief about the technique used. to increase the.average rate of fetching words from , the main memorJa. (ii) Explain in detail about any two Standard Input and Output Interfaces required to connect the I/O device to the Bus. (8) 97046 ro. (a/ (b)  /  v \<  Y cseitquestions.blogspot.in

CS6303 COMPUTER ARCHITECTURE NOV/DEC 2014 AU QUESTION PAPER

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Y

14,

(a)

Explairi instruction

levql Parallel

Processing.

State the

challenges of

parallel

Processing

(16)

(b)

Or.

Explain the terms:.

(i)

Multicore

Processor.

(ii)

Hardware

Multithreading.

(16)

(i)

Explain. mapping

functions

in

cache memory

to

determinq how

memory blocks are

placed

in

Cache-

Gtl

Explain

in

detail about the

Bus Arbitratiorl

techniques

in

DMA.

(8)

 Or

(r)

Draw different

memoiy address

layouts

and brief

about

the

technique

used.

to increase

the.average

rate

of fetching words

from

,

the main

memorJa.

(ii)

Explain

in

detail

about any

two Standard Input and Output

Interfaces

required to connect

the I/O

device

to the Bus.

(8)

97046

ro.

(a/

(b)

 /

 v

\<

Y

cseitquestions.blogspot.in