CSCI2510 Computer Organization Lecture 09: Virtual Memorymcyang/csci2510/2019F/Lec09 Virtual Memory.pdf · CSCI2510 Lec09: Virtual Memory 27 data transfer • Goal: Transfer blocks

CSCI2510 Computer Organization

Lecture 09: Virtual Memory

Ming-Chang YANG

[email protected]

Reading: Chap. 8.8

mailto:[email protected]

Recall: Memory Hierarchy

CSCI2510 Lec09: Virtual Memory 2

• Register: SRAM

• L1, L2 cache: SRAM

• Main memory: SDRAM

• Secondary storage:

Hard disks or NVM

Processor

Recall: Instructions & Program

• A computer is governed by instructions.

– To perform a given task, a program consisting of a list of

machine instructions is stored in the memory.

• Data to be used as operands are also stored in the memory.

– Individual instructions are brought from the memory into the

processor, which executes the specified operations.

CSCI2510 Lec09: Virtual Memory 3Question: What if the memory space is NOT large enough?

Outline

• Why Virtual Memory?

• MMU: Virtual-to-Physical Address Translation

– Page Table

– Translation Lookaside Buffer (TLB)

– Page Fault


Why Virtual Memory?

• Physical memory may not be as large as the

“possible space” that can be addressed by a CPU.

– E.g., a processor can address 4 GB with 32-bit address, but

the space of installed main memory may only be 1GB.

• What if we want to concurrently run many programs

in which the required memory capacity is larger than

the installed memory capacity?

– A running program is called a process (controlled by OS).CSCI2510 Lec09: Virtual Memory 5

CPU Cache4GB

1GB

Memory Disk

Programs

A

ABC

B

C?

An Intuitive Solution: Virtual Memory

• What can we do?

– Move some memory “parts” to a special space of disk (e.g.,

500MB), then we have 500MB of “free” memory for use.

– What if later on, those instructions/data in the saved 500MB

part of memory are needed again?

– We need to “free” some other memory parts in order to

move the instructions/data back from the disk …


CPU Cache4GB

1GB

Memory Disk

ProgramsA

ABC

B

C?

Virtual

Memory

Basic Concept of Virtual Memory (1/2)

• Virtual Memory:

– Store some parts of processes into

the secondary storage, when there

is insufficient physical memory.

– Load them back into suitable main

memory locations as needed.

Virtually increase the main

memory space!

• This is done automatically by

the operating system (OS).

• Application program does not

need to know the existence of

virtual memory.


Processor

Cache

Main Memory

Secondary Storage

MMUData

DataPhysical

Address

Physical

Address

Virtual

Address

DMA Transfer

Basic Concept of Virtual Memory (2/2)


8

swap

• When virtual memory is used:

processor uses virtual addresses.

– If a virtual address refers to a

physical memory space: Access the

memory content directly.

– Otherwise: Bring the content from

storage to memory for accessing.

• Swap in & swap out

– Cache will be checked first based

on the physical address.

• Memory Management Unit

– A hardware component to translate

virtual addresses to physical

addresses.

Processor

Cache

Main Memory

Secondary Storage

MMUData

DataPhysical

Address

Physical

Address

Virtual

Address

DMA Transferout

in

MMU

• Let each process have its own

virtual address space.

– The virtual address space of each

process is often set as the maximal

addressing space (e.g. 4GB).

• Each process is divided into

fixed-sized pages.

– The page size is ranging from

2KB to 16KB in practice.

• Too small? Too much time will be

spent getting pages from disk.

• Too big? A large portion of the page

may not be used.

• A main memory area that can

hold one page is a page frame.


Virtual-to-Physical Address Translation

page

frame

page

e.g., 1GB

0

4GB

(32-bit)

0

4GB

(32-bit)

virtual

address

physical

address

e.g., 1TB

…

……

MMU

virtual address space

of process A

virtual address space

of process B

swapped-in page (in memory)

swapped-out page (NOT in memory)

unused page

Physical

Memory

(RAM)

Backing

Store

(HDD)

Outline



– Page Table


– Page Fault


Page Table

• Page Table: Maintain the virtual-to-physical address

translation information for each page.

– Each process has its own table (virtual address space).

– Page table is stored in the main memory.

– Starting address of the page table is stored in a page table

base register (PTBR) inside the processor.

• How to index an entry of the page table in memory?

– Processor uses virtual addresses.

• MS (high order) Bits: The virtual page number.

• LS (low order) Bits: The offset to specify the location of a particular

byte (or word) within a page.

– Page Table Walk: Virtual page number + PTBR


Page Table Walk


Page frame

number in

the memory

Virtual address from processor

Offset

Offset

Virtual page numberPage table address

Page Table Base Register (PTBR)

(inside the processor)

Control

bits

Physical address in main memory

PAGE TABLE

Page frame

+Offset specifies

the location of a

word within a page.

Starting

address of

the page

table

(in the main

memory) Page table

is stored in

the main

memory.

Control bits describe the

status of the page

(e.g., valid bit: whether

the page is in memory)

Each process has its own page table.

Example of Page Table Walk

CSCI2510 Lec09: Virtual Memory 13Each process has its own page table.

Page Table of Process A

Virtual Address Space

of Process A

Physical Memory

(Page Frames)

Virtual address (from processor)

OffsetVirtual page number

Page table address

Page table base register

+

Virtual

Page

Number

Offset specifies the

location of a word

within a page

(i.e., NOT involving

page table walk).

0

1

2

3

4

5

6

7

0

1

2

3

Valid Bit Frame #

0 1 2

1 0 -

2 0

3 1 0

4 1 1

5 0 -

6 0 -

7 0 -

Class Exercise 9.1

• Please draw the page tables for processes A and B:

CSCI2510 Lec07: Cache in Action 14

Student ID:

Name:

Date:

Virtual Address Space of Process A

Physical Memory

(Page Frames)

0 1 2 3 4 5 6 7

Virtual Address Space of Process B0 1 2 3 4 5 6 7

0 1 2 3 4 5 6 7

Something about Page Table

• The page table is used for every read/write access.

• The page table is large and stored in main memory.

• But main memory is slow (compared with cache) …


Processor

Cache

Main Memory

MMUData

DataPhysical

Address

Physical

Address

Virtual

Address

Page frame

number in

the memory


Offset

Offset

Virtual page numberPage table address

Control

bits


PAGE TABLE

Page frame

+

Outline



– Page Table


– Page Fault


How to Speed Up? Cache of PTEs

• Translation Lookaside Buffer

(TLB): A cache of the page table

entries (PTEs) in the MMU.

– Associative or set-associative

schemes are normally used.

– Processor must keep TLB and page

table information consistent.

• With TLB, we do not have to look

up the page table for every

memory accesses!


Processor

Cache

Main Memory

Secondary Storage

MMUData

DataPhysical

Address

Physical

Address

Virtual

Address

DMA Transfer

TLB

Page Table

Translation Lookaside Buffer (TLB)

• Given a virtual

address, MMU first

looks up TLB.

• If available (hit):

– Using the cached

PTE in TLB.

• Otherwise (miss):

– Obtaining PTE from

the page table.

• Which is stored in

the main memory.

– Updating TLB.


No

Yes

Hit

Miss


TLB

OffsetVirtual page num.

Virtual pagenumber

Page frameIn memory

Ctrlbits

Offset


Page frame

=?

Compare

in parallel!

Example of TLB


virtual

address

(small cache in MMU)

(stored in main memory)

page frame

?

MMU

Physical

Address

Virtual

Address

TLB


Question: What if the requested page is not in memory?

disk (VM)

Class Exercise 9.2

• Please elaborate the difference

between TLB and cache.


Processor

Cache

Main Memory

Secondary Storage

MMUData

DataPhysical

Address

Physical

Address

Virtual

Address

DMA Transfer

TLB

Page Table

Outline



– Page Table


– Page Fault


Page Fault (1/2)

• Page Fault: If the

requested page is

not in memory.

– How to know?

Checking the control

bits in the page table

entry (PTE).

– MMU generates a

page fault.

– The process is

suspended.

– The control gives to

the operating system

(OS).CSCI2510 Lec09: Virtual Memory 24

No

Yes

Hit

Miss


TLB


Virtual pagenumber

Page frameIn memory

Ctrlbits

Offset


Page frame

=? X

Page Fault (2/2)

• OS must swap the

requested page from

disk into memory.

– Page swapping may

take a long time.

• OS may schedule another

process to run.

• Direct memory access

(DMA) can help.

• OS must resume the

suspended process

when the page is ready.

– It re-executes the

suspended instruction.CSCI2510 Lec09: Virtual Memory 25

No

Yes

Hit

Miss


TLB


Virtual pagenumber

Page frameIn memory

Ctrlbits

Offset


Page frame

=? 1 Page frame

Steps in Handling a Page Fault


Process

A

1

2

3

Time-consuming

page swapping!

page

faultTLB

miss


Direct Memory Access (DMA)


data transfer

• Goal: Transfer blocks of data

directly between the main

memory and I/O devices.

• DMA is a special control unit

to manage such transfers.

– Without involving CPU.

– Under the control of OS.

• DMA Operations:

– Processor initiates a transfer.

– DMA proceeds the operation.

– When finished, DMA informs

the CPU by raising an interrupt.

Putting All Pieces Together


TLB

Lookup

Page Table

Walk

Update

TLBPage Fault

(OS loads page)

Virtual Address

hitmiss

Physical

Address

The page is in memory?

no yes

Restart instruction


V Tag Frame #

1

0

0

1

TLB

V Frame #

1

1

0

1

1

0

0

1

Page Table

Main Memory

Disk

DMA

Class Exercise 9.3


TLB

Lookup

Page Table

Walk

Page Fault(OS loads page)

Virtual Address

miss

The page is in memory?

no

Restart instruction

• Specify one page that

may cause the above

situation.


V Tag Frame #

1

0

0

1

TLB

V Frame #

1

1

0

1

1

0

0

1

Page Table

Main Memory

Disk

DMA

Summary



– Page Table


– Page Fault


Documents

CSCI2510 Computer Organization Lecture 09: Virtual Memorymcyang/csci2510/2019F/Lec09 Virtual Memory.pdf · CSCI2510 Lec09: Virtual Memory 27 data transfer • Goal: Transfer blocks