CSE 241

Computer Organization

Lecture # 9

Ch. 4 Computer Arithmetic

Dr. Tamer Samy GaafarDept. of Computer & Systems Engineering

Outline

• Integer Representation—Sign-Magnitude, Two’s Complement

• Integer Arithmetic—Negation, Addition, Subtraction—Multiplication, Division

• Floating-Point Representation• Floating-Point Arithmetic

Arithmetic & Logic Unit (ALU)

• Does the calculations.

• Everything else in the computer is there

to service this unit.

• Handles integers.

• Handles real (floating point) numbers.

ALU Inputs and Outputs

DataData ResultsResults

e.g., overflow flag

e.g., overflow flag

Operation & data in/out

Operation & data in/out

Registers Registers

Control unit Flags

Integer Representation

• General-case number: –548.923• Only have 0 & 1 to represent everything.

— No minus sign.— No period (radix point).

• Positive integer numbers are stored in binary.— An 8-bit word can represent the numbers:— e.g., 41=00101001

• Signed integer numbers— Sign-Magnitude— Two’s complement

0 - 255

Sign-Magnitude vs. 2’s Complement

Decimal Representation

Sign-Magnitude Representation

2’s Complement

Representation+8+7+6+5+4+3+2+1+0-0-1-2-3-4-5-6-7-8

--01110110010101000011001000010000

1001101010111100110111101111--

1000

--01110110010101000011001000010000

1111

1010

110111001011

1110

10011000

--

-(A)10 24 – A-(A)10 24-1 + A

Sign-Magnitude Representation

• Left most bit is sign bit.—0 means positive.—1 means negative.

• Example:+18 = 00010010–18 = 10010010

• Problems— Need to consider both sign and

magnitude in arithmetic.— Two representations of zero (+0 and –

0) more difficult to test for 0. one wasted bit combination!

Two’s Complement Representation

• Like sign-magnitude representation, leftmost bit is used as a sign bit.

• Differs from sign-magnitude representation in how the remaining bits are interpreted.

• Positive number: convert to binary• Negative number: 2’s complement• e.g., 8-bit 2’s complement representation

+3 = 00000011+2 = 00000010+1 = 00000001+0 = 00000000

–1 = 11111111–2 = 11111110–3 = 11111101

n-bit Two’s Complement Representation• Length of number (in bits) is first specified.

• Assume n-bit numbers.

• We have 2n different combinations of size n bits we

can represent 2n different numbers.

• Assign the value 0 to the combination 00…0.

• We have 2n–1 different combinations left.

• Assign the values 1, 2, …, 2n–1–1 to 1, 2, .., 2n–1–1.

• Assign the values –2n–1, –2n–1+1, …, –1 to 2n–1, 2n–

1+1, …, 2n–1

• Getting the 2’s comp. of A is equivalent to 2n – A

• –2n – 1 ≤ A ≤ 2n – 1 – 1

Characteristics of 2’s Comp. Rep. & Arithmetic

1’s complement

Consider n-bit 2’s complement representation

Equivalent to: 2n – A

Benefits

• One representation of zero.• Arithmetic works easily (see later).• Negating is fairly easy

— 3 = 00000011— Boolean (one’s) complement gives

11111100— Add 1 to LSB 11111101— This is equivalent to 28 – 3 = 253 =

11111101 2’s complement of 3

Conversion between 2’s Comp. & Decimal

Value Box

0

+8

• Result obtained using value box is correct because: Sign bit is 1 Number = -(2’s comp. of 10000011) = -(28 - 10000011) = -125

Conversion Between Lengths

• Positive numbers pack with leading zeros +18 = 00010010 +18 = 00000000 00010010

• Negative numbers pack with leading ones -18 = 10010010 -18 = 11111111 10010010

• i.e. pack with MSB (sign bit) Sign extension

Addition and Subtraction

• Addition Normal binary addition. Monitor sign bit for overflow.

• Subtraction Take two’s complement of subtrahend and add to minuend A – B = A + (–B)

• So we only need addition and complement circuits.

Addition of Numbers in 2’s Comp. Rep.

4-

bit 2

’s c

omp.

rep

.4-bit 2’s comp. representation

Binary Addition/Subtraction Logic Circuit.

• Addition Add/sub control = 0.• Subtraction Add/sub control = 1

At the stage i:

Input:xi is ith bit of xyi is ith bit of y

ci is carry-in from stage i-1

Output:si is the sum

ci+1 carry-out to stage i+1

1-Bit Addition (Full Adder)

Full Adder (FA): Symbol for the complete circuit for a single stage of addition.

Addition Logic for a Single Stage

Sum Carry

An n-bit Ripple-Carry Adder

• Cascade n full adder (FA) blocks to form a n-bit adder.

• Carries propagate or ripple through this cascade n-bit ripple carry adder.

• Carry-in c0 into the LSB position provides a convenient way to perform subtraction.

Cascade of k n-bit Adders

• k n-bit numbers can be added by cascading k n-bit adders.

• Each n-bit adder forms a block, so this is cascading of blocks.

• Carries ripple or propagate through blocks Blocked Ripple Carry Adder.