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DAT2343
Comparison of The LMC and General Computer
Models
© Alan T. Pinck / Algonquin College; 2003
Storage Encoding
LMC
Decimal (10 code levels for smallest storage signal)
General Computer
Binary (2 code levels for smallest storage signal
Storage Units
LMC3 decimal digits = LMC wordno provision for positive or negative signno provision for character encoding (no LMC “byte”)
General Computertypically 32-bit (varies) = GC wordsingle bit commonly used as a sign indicatorcharacter encoding: typically 8 bit = GC byte (ASCII/EBCDIC)
Mailboxes / Memory
LMC
one LMC word (single elements never span multiple mailboxes)
only RAM type of memory
General Computer
byte (several sequential byte locations may be combined to form a larger unit
both RAM and ROM types of memory
Mailbox/Memory Addressing
LMC100 addresses starting at 0absolute addressing
direct addressing only
General Computer(typically) millions of addresses starting at 0usually some form of base plus offset addressboth direct and indirect (indexed) addressing
Addressing Modes
LMC
direct (actual address is part of instruction)
absolute (actual, unmodified address)
General Computer
may be direct or the address may be supplied within a register (indirect)
often a direct offset added to an indirect base required to get absolute address
System Start/Reset
LMCresets counter to 00
starts the LM instruction cycle from a possible SLEEP state
General Computerresets instruction pointer to some fixed address (may or may not be address 0)starts processor instruction cycle from possibly HALT state
Instruction Cycle
LMCread and remembers instruction at counter
increment counter by 1
lookup and perform operation based on instruction just read repeat
General Computercopies instruction at instruction pointer (possibly multiple bytes) into instruction registerincrement instruction pointer by length of instructionselect operation circuit using op field of instruction repeat
Instruction Cycle SequencingLMC
LM remembers and performs activities in required sequence
General Computer
Instruction Format
LMC
first digit : op code
second & third digits:one of direct address op code extension ignored
General Computer
first byte (or bit field): op code
subsequent bytes/bit fields:may be multiple of register ID address immediate value
Operation Lookup/Selection
LMC
LM compares op code of instruction remembered to table of operations on wall.
General Computer
op code bit pattern from instruction register is feed through a selector circuit to activate appropriate operation circuit
Calculator / Registers
LMC
single calculator / value
combined with value from mailbox: only ADD and SUBT
I/O (port) source/destination
General Computer
multiple registers / values (typically 4 to 16)
combined with value from another register or from memory: ADD, SUBT, MULT, DIV and others
I/O port source/destination
Indicators / Flags
LMC
indicators on calculator Positive (or Zero) Zero Negative
only modified by arithmetic operations
General Computer
one set of flags for all registers(typically) Zero Carry Sign Overflow
only modified by certain operations
Input and Output
LMCone input and one output port
no status or control IO ports available
all IO through calculator
General Computermultiple input and output ports, identified by a port addresstypically status and IO ports associated with device data portIO through one particular register
“Standard” Operations Missing from the LMC
“Advanced” arithmetic (multiplication, division, etc.)
Shift, Rotate, and Boolean operations
Subroutine Call and Return (except in limited form in “son of LMC”
Conditional Jumps (conditional skips required instead)
End of Lecture