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TO-220FP
12
3
AM15572v1_no_tab
D(2)
G(1)
S(3)
FeaturesOrder code VDS RDS(on) max. ID
STF16N90K5 900 V 330 mΩ 15 A
• Industry’s lowest RDS(on) x area• Industry’s best FoM (figure of merit)• Ultra-low gate charge• 100% avalanche tested• Zener-protected
Applications• Switching applications
DescriptionThis very high voltage N-channel Power MOSFET is designed using MDmesh K5technology based on an innovative proprietary vertical structure. The result is adramatic reduction in on-resistance and ultra-low gate charge for applicationsrequiring superior power density and high efficiency.
Product status link
STF16N90K5
Product summary
Order code STF16N90K5
Marking 16N90K5
Package TO-220FP
Packing Tube
N-channel 900 V, 280 mΩ typ., 15 A MDmesh K5 Power MOSFET in a TO-220FP package
STF16N90K5
Datasheet
DS13052 - Rev 1 - August 2019For further information contact your local STMicroelectronics sales office.
www.st.com
1 Electrical ratings
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
VGS Gate-source voltage ±30 V
ID Drain current (continuous) at TC = 25 °C 15 A
ID Drain current (continuous) at TC = 100 °C 9 A
IDM (1) Drain current (pulsed) 60 A
PTOT Total power dissipation at TC = 25 °C 30 W
VISOInsulation withstand voltage (RMS) from all three leads to external heat sink
(t = 1 s; TC = 25 °C)2.5 kV
dv/dt (2) Peak diode recovery voltage slope 4.5V/ns
dv/dt (3) MOSFET dv/dt ruggedness 50
TJ Operating junction temperature range-55 to 150 °C
Tstg Storage temperature range
1. Pulse width limited by safe operating area.2. ISD ≤ 15 A, di/dt ≤ 100 A/μs; VDS (peak) ≤ V(BR)DSS, VDD= 450 V.
3. VDS ≤ 720 V.
Table 2. Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 4.1 °C/W
Rthj-amb Thermal resistance junction-amb 62.5 °C/W
Table 3. Avalanche characteristics
Symbol Parameter Value Unit
IAR Avalanche current, repetitive or not repetitive (pulse width limited by TJ max) 5 A
EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 380 mJ
STF16N90K5Electrical ratings
DS13052 - Rev 1 page 2/12
2 Electrical characteristics
TC = 25 °C unless otherwise specified
Table 4. On/off state
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)DSSDrain-source breakdownvoltage VGS = 0 V, ID = 1 mA 900 V
IDSSZero gate voltage draincurrent
VGS = 0 V, VDS = 900 V 1 µA
VGS = 0 V, VDS = 900 V
TC = 125 °C (1)50 µA
IGSSGate body leakagecurrent VDS = 0 V, VGS = ±20 V ±10 µA
VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 3 4 5 V
RDS(on)Static drain-sourceon-resistance VGS = 10 V, ID = 7.5 A 280 330 mΩ
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance
VDS = 100 V, f = 1 MHz,VGS = 0 V
- 1027 - pF
Coss Output capacitance - 106 - pF
CrssReverse transfercapacitance - 1.6 - pF
Co(er) (1)Equivalent capacitance
energy related VGS = 0 V,
VDS = 0 to 720 V
- 51 - pF
Co(tr) (2)Equivalent capacitance
time related141 - pF
Rg Intrinsic gate resistance f = 1 MHz, ID = 0 A 1 4.9 9 Ω
Qg Total gate charge VDD = 720 V, ID = 15 A
VGS = 0 to 10 V
(see Figure 14. Test circuit forgate charge behavior )
- 29.7 - nC
Qgs Gate-source charge - 7.3 - nC
Qgd Gate-drain charge - 17.7 - nC
1. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
2. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
STF16N90K5Electrical characteristics
DS13052 - Rev 1 page 3/12
Table 6. Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD= 450 V, ID = 7.5 A,
RG = 4.7 Ω, VGS = 10 V(see Figure 13. Test circuit forresistive load switching times andFigure 18. Switching timewaveform)
- 28.8 - ns
tr Rise time - 36 - ns
td(off) Turn-off delay time - 46 - ns
tf Fall time - 9.8 - ns
Table 7. Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD Source-drain current - 15 A
ISDM (1) Source-drain current(pulsed) - 60 A
VSD (2) Forward on voltage ISD = 15 A, VGS = 0 V - 1.5 V
trr Reverse recovery time ISD = 15 A, di/dt = 100 A/µs,
VDD = 60 V(see Figure 15. Test circuit forinductive load switching anddiode recovery times)
- 458 ns
Qrr Reverse recovery charge - 8.13 µC
IRRM Reverse recovery current - 35.5 A
trr Reverse recovery time ISD = 15 A, di/dt = 100 A/µs,
VDD = 60 V,
Tj = 150 °C(see Figure 15. Test circuit forinductive load switching anddiode recovery times)
- 546 ns
Qrr Reverse recovery charge - 9.2 µC
IRRM Reverse recovery current - 33.7 A
1. Pulse width limited by safe operating area2. Pulsed: pulse duration = 300 µs, duty cycle 1.5%
Table 8. Gate-source Zener diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
V(BR)GSOGate-source breakdownvoltage IGS= ±1 mA, ID= 0 A 30 - - V
The built-in back-to-back Zener diodes are specifically designed to enhance the ESD performance of the device.The Zener voltage facilitates efficient and cost-effective device integrity protection,thus eliminating the need foradditional external componentry.
STF16N90K5Electrical characteristics
DS13052 - Rev 1 page 4/12
2.1 Electrical characteristics (curves)
Figure 1. Safe operating area
GADG300720190845SOA
10 1
10 0
10 -1
10 -2
10 -1 10 0 10 1 10 2 10 3
ID (A)
VDS (V)
tp = 100µs
tp = 10µs
tp = 1µs
tp = 1ms
Opera
tion i
n this
area
is lim
ited b
y RDS(
on)
IDM
TC = 25 °CTJ ≤ 150°CSingle pulse
V(BR)DSS
RDS(on) max.
tp = 10ms
Figure 2. Maximum transient thermal impedance
GADG300720190845ZTH
10 0
10 -1
10 -2
10 -3
10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 tp (s)
ton
T
duty = ton / TRthJ-C = 4.1 °C/W
Single pulse
duty=0.5
0.20.1
0.05
0.30.4
ZthJ-C(°C/W)
Figure 3. Typical output characteristicsGIPG231020180825OCH
35
30
25
20
15
10
5
00 4 8 12 16
ID (A)
VDS (V)
VGS =7V
VGS =10V
VGS =8V
VGS =9V
VGS =6V
Figure 4. Typical transfer characteristics
GIPG231020180826TCH
35
30
25
20
15
10
5
04 5 6 7 8 9
ID (A)
VGS (V)
VDS = 15 V
Figure 5. Normalized breakdown voltage vs temperature
GIPG221020181225BDV
1.10
1.05
1.00
0.95
0.90
0.85-75 -25 25 75 125
V(BR)DSS (norm.)
ID = 1 mA
TJ (°C)
Figure 6. Typical drain-source on-resistanceGADG310720191006RON
310
300
290
280
270
260
2500 2 4 6 8 10 12 14
RDS(on) (mΩ)
ID (A)
VGS = 10 V
STF16N90K5Electrical characteristics (curves)
DS13052 - Rev 1 page 5/12
Figure 7. Typical gate charge characteristics
GADG300720191127QVG
700
600
500
400
300
200
100
0
14
12
10
8
6
4
2
00 6 12 18 24 30 36
VDS (V)
VGS (V)
Qg (nC)
VDD = 720 V, ID = 15 A
Qgs Qgd
Qg
Figure 8. Typical capacitances vs voltage
GIPG231020180825CVR
10 3
10 2
10 1
10 0
10 -1 10 0 10 1 10 2
C (pF)
VDS (V)
CISS
COSS
CRSS
f = 1 MHz
Figure 9. Normalized gate threshold voltage vstemperature
GIPG221020181223VTH
1.1
1.0
0.9
0.8
0.7
0.6-75 -25 25 75 125
VGS(th) (norm.)
TJ (°C)
ID=250 μA
Figure 10. Normalized on-resistance vs temperature
GIPG221020181224RON
2.5
2.0
1.5
1.0
0.5
0.0-75 -25 25 75 125
RDS(on) (norm.)
VGS = 10 V
TJ (°C)
Figure 11. Maximum avalanche energy vs temperature
GIPG231020180827EAS
360
300
240
180
120
60
0-75 -25 25 75 125
EAS (mJ)
TJ (°C)
ID = 5 AVDD = 50 V
Single pulse
Figure 12. Typical source-drain diode forwardcharacteristics
GIPG231020180825SDF
1.0
0.9
0.8
0.7
0.6
0.5
0.42 4 6 8 10 12 14
VSD (V)
ISD (A)
TJ = -50 °C
TJ = 25 °C
TJ = 150 °C
STF16N90K5Electrical characteristics (curves)
DS13052 - Rev 1 page 6/12
3 Test circuits
Figure 13. Test circuit for resistive load switching times
AM01468v1
VD
RG
RL
D.U.T.
2200μF VDD
3.3μF+
pulse width
VGS
Figure 14. Test circuit for gate charge behavior
AM01469v10
47 kΩ
2.7 kΩ
1 kΩ
IG= CONST100 Ω D.U.T.
+pulse width
VGS
2200μF
VG
VDD
RL
Figure 15. Test circuit for inductive load switching anddiode recovery times
AM01470v1
AD
D.U.T.S
B
G
25 Ω
A A
B B
RG
GD
S
100 µH
µF3.3 1000
µF VDD
D.U.T.
+
_
+
fastdiode
Figure 16. Unclamped inductive load test circuit
AM01471v1
VD
ID
D.U.T.
L
VDD+
pulse width
Vi
3.3µF
2200µF
Figure 17. Unclamped inductive waveform
AM01472v1
V(BR)DSS
VDDVDD
VD
IDM
ID
Figure 18. Switching time waveform
AM01473v1
0
VGS 90%
VDS
90%
10%
90%
10%
10%
ton
td(on) tr
0
toff
td(off) tf
STF16N90K5Test circuits
DS13052 - Rev 1 page 7/12
4 Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,depending on their level of environmental compliance. ECOPACK specifications, grade definitions and productstatus are available at: www.st.com. ECOPACK is an ST trademark.
4.1 TO-220FP package information
Figure 19. TO-220FP package outline
7012510_Rev_13_B
STF16N90K5Package information
DS13052 - Rev 1 page 8/12
Table 9. TO-220FP package mechanical data
Dim.mm
Min. Typ. Max.
A 4.40 4.60
B 2.50 2.70
D 2.50 2.75
E 0.45 0.70
F 0.75 1.00
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.20
G1 2.40 2.70
H 10.00 10.40
L2 16.00
L3 28.60 30.60
L4 9.80 10.60
L5 2.90 3.60
L6 15.90 16.40
L7 9.00 9.30
Dia 3.00 3.20
STF16N90K5TO-220FP package information
DS13052 - Rev 1 page 9/12
Revision history
Table 10. Document revision history
Date Revision Changes
01-Aug-2019 1 First release.
STF16N90K5
DS13052 - Rev 1 page 10/12
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2
2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
4.1 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
STF16N90K5Contents
DS13052 - Rev 1 page 11/12
IMPORTANT NOTICE – PLEASE READ CAREFULLY
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2019 STMicroelectronics – All rights reserved
STF16N90K5
DS13052 - Rev 1 page 12/12
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