Highly Efficient and Compact DC-DC Converter for Ultra-Fast Charging of Electric Vehicles

D. Christen, S. Tschannen, J. Biela Laboratory for High Power Electronic Systems

ETH Zurich, Physikstrasse 3, CH-8092 Zurich, Switzerland Email: christen@hpe.ee.ethz.ch

„This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of ETH Zürich’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promo-tional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permission@ieee.org. By choosing to view this document you agree to all provisions of the copyright laws protecting it.”

Highly Efficient and Compact DC-DC Converter forUltra-Fast Charging of Electric Vehicles

D. Christen, S. Tschannen, J. BielaLaboratory for High Power Electronic Systems

ETH Zurich, Physikstrasse 3, CH-8092 Zurich, SwitzerlandEmail: christen@hpe.ee.ethz.ch

Abstract—The range of electric vehicles is still limited due tolong charging times. With fast charging stations that enable torecharge a vehicle battery in a few minutes, the range limitationcan be overcome in principle.

For such fast charging stations, compact and efficient DC-DCconverters with a high output power are required. Therefore, amulti-phase half-bridge DC-DC converter, which is part of anultra fast charging station capable of charging a vehicle batteryin less than 5 min, is presented in this paper. The ultra fastcharging station utilises an intermediate storage battery, in orderto avoid power pulsations at the grid and to provide additionalfunctionality as e.g. energy storage for renewables.

By splitting the intermediate storage battery, the voltageratings of the semiconductor devices used in the high powerDC-DC converter can be reduced, which increases the systemefficiency. For further increasing the efficiency, a triangularcurrent modulation (TCM) scheme is applied, which allows zerovoltage switching (ZVS) for all semiconductor devices. To achievea high power density as well as to implement ripple cancelationon the output current, several power electronic modules areparallel interleaved. A detailed analysis of the proposed systemand simulation results are provided in this paper. Based on theabove mentioned means the DC-DC converter achieves a systemefficiency above 99.5% over a wide operating range.

I. INTRODUCTION

During the last years the interest in electric vehicles (EV’s)grew strongly due to ecological aspects. However, the longcharging times, which usually exceed 30 minutes for a fullcharge, as well as the range limitation of EV’s due to theavailable battery technologies, are still challenging problems.

In order to overcome the charging and the range limitationproblem, the company Better Place [1] is proposing to quicklyexchange the vehicle battery in exchange stations. This re-quires to design all electric vehicles in a similar manner, sothat the battery could be automatically exchanged.Also in allvehicles the same or only a very limited number of differentbattery types can be installed in order to limit the numberof batteries, that must be on hand in the exchange stations.Furthermore, to avoid an accumulation of batteries, a systemfor distributing the batteries between the exchange stations isnecessary. In total more batteries are necessary since besidesthe batteries in the vehicles also batteries in the exchangestations, which are recharged during the vehicle batteries areused for driving, are necessary.

Another option to overcome the charging and range limi-tation, are ultra fast charging stations, which allow to refill

DC

DC

ElectricMotor

DC

DC

DC

AC

Battery

Electric Vehicle

Electro-chemical

Low Voltage AC GridVN,ll = 400V

AC

DC

DC

DC

AC

DC

PV-Array

DC

DC

Low Voltage DC-BusVDC = variable

VPV

Bidirectional isolated Input Stage

High Power DC-DC ConverterDC

DC

Fig. 1. Charging station concept with an AC-DC input stage, a variable DC-bus, intermediate battery storage and high power DC-DC converter (shown inred).

the batteries within a few minutes [2]. With this concept, thevehicle battery is designed only for a limited range of 150-200km, so that the volume and weight of the battery couldbe reduced and the driving range is extended by the shortrecharging process. Battery technologies based on lithium-titanate enable an ultra fast charging of up to 10C-12C aswell as high cycle numbers in the range of several thousand

TABLE ISPECIFICATIONS OF THE INVESTIGATED ULTRA FAST CHARGING STATION

FOR ELECTRIC VEHICLES [2].

Grid 3Φ 400Vrms

AC/DC Input StageBidirectionalIsolatedLow power (≈ 22kW)

Intermediate Battery Storage

Directly connected DC-busVariable DC-voltageDischarge current 3C-4CEnergy-capacitance ≈25 kWh

High Power DC-DCUnidirectionalNon-isolatedHigh power (≈ 220kW)

15th International Power Electronics and Motion Control Conference, EPE-PEMC 2012 ECCE Europe, Novi Sad, Serbia

978-1-4673-1972-0/12/$31.00 ©2012 IEEE LS5d.3-1

[3].In order to achieve such a short charging time, charger

concepts with a high output power are required. For example,for vehicle batteries with an energy content of 20kWh, acharger with an output power higher than 200kW is required inorder to achieve charging times significantly below 10 minutes.With this high output power, such chargers fall into categoryLevel III, which defines charging systems up to 240kW peakpower and which completes the low power Level I and IIcharging systems with a maximum power level of 14.4kW [4],[5] that are well suited for on-board and overnight charging.

In the literature, many concepts with a constant DC-bus aredescribed [4]–[7]. However, due to efficiency considerations ofthe complete charging system, a concept with a variable DC-bus and fewer power electronic converters is investigated in theproject as described in [2] and shown in Fig. 1 & Table I. Theshown system consists of a bidirectional isolated AC-DC inputstage, which allows to charge the stationary storage system aswell as to feed back energy to the grid, and a unidirectionalhigh power DC-DC converter system for ultra-fast chargingof EV’s. With the intermediate battery storage system, theenergy necessary for the ultra-fast charging is provided, sothat power pulsations of the grid are avoided. Furthermore,the intermediate storage battery can be used in the contextof smart grid applications (e.g. power shaping) as well as toconnect and buffer energy gained for example by PV elements.

Due to the higher energy capacity of the intermediatestorage battery compared to the vehicle battery, also the ultra-fast charging process of the vehicle battery does not exceeda maximum discharge current of 3C- 4C per cell of theintermediate storage battery. In this way, a long life time of thestationary battery could be achieved. The AC-DC input stageof the considered charging station consists of two converters, aT-type inverter and a DC-DC converter system, which providesisolation and can be used to balance the voltages of thestationary battery.

In this paper, the focus is on the high power DC-DCconverter (highlighted in red in Fig. 1) enabling ultra-fastcharging of EV’s. With this DC-DC converter the chargingtime of batteries with an energy capacity in the range of16kWh [8] could be reduced to 5 minutes.

Typically, the battery voltage of lithium ion cells variesstrongly with respect to the State of Charge (SoC). However,the voltage profile in the range of 10% up to 90% SoC, wherequick charging is performed, is relatively flat [9]. The car-battery voltage taken for the following considerations is in therange of 240 V up to 420 V with a nominal voltage of 330Vaccording to the battery pack voltage of the iMiEV [8] or theiON [10].

During charging the maximum output voltage ripple islimited to 5% of its nominal value, which avoids influenceof the ripple current on the battery life time [11]. Furtherspecifications for the converter topology are listed in Table II.

To fulfill the specifications mentioned above and simultane-ously achieve a high efficiency and a high power density, in

this paper a multi-phase interleaved half-bridge converter witha split input voltage, which is operated in TCM is presented.The derivation of the analytical models of voltage and currentof the proposed half-bridge converter are presented in SectionII. In Section III the implemented control algorithms areexplained. Section IV discusses the loss analysis and theefficiency of the converter system. Additionally, a comparisonof the proposed system to a standard buck-type solution isgiven.

II. CONVERTER TOPOLOGY

High-power charging is a challenging task due to highcurrents of several hundred amperes as well as a wide outputvoltage range. In order to simultaneously achieve a highefficiency and a high power density, non-isolated DC-DCconverters are the most suitable topologies, since the isolationto the grid is realised in the AC-DC stage (see Fig.1).

In [12], several bidirectional non-isolated converters arecompared, including cascaded buck-boost, half bridge, Cukand SEPIC converters. Due to the low number and size ofthe passive components and the low conduction losses in thesemiconductor devices, the half-bridge converter achieves thehighest efficiency of the evaluated topologies.

To reduce the size of the passive components [11], [13]–[15] propose multi-phase converter systems. By interleavingthe phase currents of the different modules, a smooth outputcurrent can be achieved. The total volume of the inductorsis reduced by a factor of 1/N and due to the small rippleof the output current the size of the input and output filteris minimised as well. Furthermore, a modular multi-phaseconverter system has also the advantage of achieving highefficiencies under part load conditions by adapting the numberof active phases (also called power shedding).

The efficiency can further be increased by reducing therequired blocking voltage of the semiconductor devices. Thereare several strategies to reduce the voltage stresses of thesemiconductor devices. Different kinds of three level convert-ers like the neutral point clamped and the flying capacitorconverter are presented in [16]–[18]. In [19] a novel strategyby introducing a splitting of the input voltages as for exampleshown in figure 2 is proposed. The reduced operating voltageenables to use MOSFETs with a lower blocking voltage. Thisresults in a reduction of the conduction and switching losses,so that the power density could be increased.

TABLE IISPECIFICATION FOR THE HIGH-POWER DC-DC CONVERTER

Nominal car battery voltage Vbat,nom 330 VOutput voltage range 240 V ... 420 VNominal output power Pout 220 kWDC-bus voltage v1 ≈420 VSplit DC-Voltage v1b ≈230 VOutput voltage ripple Δvout 5%

LS5d.3-2

+-

+-

+-

+-

S1

Lout

v1

v1b

+-

vbat

v1a

S2

LF,1

CF,1

CF,2

V

Charging

vbat

v1,min

v1b,max

v1b

v1

SoC10% 90%

Vehicle BatteryOperating Area

Discharging

a)

b)

Fig. 2. a) Multi-phase interleaved half-bridge converter with a split inputvoltage in order to reduce the required blocking voltage of the MOSFETs. b)Ranges of the vehicle and the intermediate storage battery required for theoperation of the DC-DC converter with split voltages.

Combining the different strategies results in the proposedmulti-phase interleaved half-bridge converter as presented inFig. 2a). In the following, the main operating principle isexplained.

A. Multi-phase interleaved half-bridge converter

Compared to the standard buck topology, the blockingvoltage of the switches of the converter system shown in Fig.2could be reduced due to the split voltage, and only depends onthe output voltage range. To guarantee full controllability ofthe converter structure, the battery voltage vbat always has tobe in a defined operating range, whose upper and lower limitsare defined by the input voltages v1 and v1b (cf. Fig. 2b). Themaximum tapped voltage v1b,max is restricted to be smallerthan the minimum battery voltage vbat,min. In addition, theinput voltage v1 always has to be higher than vbat,max. Inthe considered application, the duty cycle ratio of the buckconverter topology is fixed by the battery voltages with

D =vbat − v1b

v1a. (1)

As already mentioned, a TCM operating scheme as de-scribed in [20] is applied to achieve ZVS for the semiconductordevices. During the switching periods (t1... t2 & t4...t5) theresonant network, consisting of the parasitic switch capaci-tances CDS,i and the output inductor Lout,i, enables a nearlylossless charging/discharging of the capacitors. The currentand voltage transitions during one period as shown in Fig.3are explained in the following.

iL,i

Imax

Ir,min

Ioutn

t1 t2t0 t3 t4 t5 t6

Iout

vL,i

v1-vBat

v1b-vBat

t

tI0

Fig. 3. Current and voltage waveforms of the 3-phase interleaved half-bridgeconverter.

At t0 switch S1 is conducting, while S2 is in the blockingstate. Hence, the voltage across inductor Lout is positive andcurrent iL is increasing.

At t1 switch S1 is turned off. A resonant oscillation betweenthe output inductor Lout,i and the parasitic capacitances CDS,i

starts. When the voltage across S2 becomes zero and its bodydiode starts conducting S2 can be turned at zero voltage (ZVS)at t2.

Now a negative voltage is applied across the output inductorand iL decreases. Since the absolute value of the inductorcurrent has to exceed a certain limit, S2 remains turned onuntil this limit is reached at t4.

At t4 switch S2 is turned off and analogous to [t1 ... t2]an oscillation starts. At t5 the voltage across S1 becomes zeroand therefore, S1 can be turned on at zero voltage.

To ensure ZVS during the switching transitions a minimumcurrent amplitude is required for the resonant oscillations.Therefore, at t3 the current has to reverse its direction. Therequired current Ir,min can be determined with equation 2 anddepends on the blocking voltage v1a. The charge Qc requiredfor ZVS of the MOSFETs can be determined by integratingtheir nonlinear parasitic capacitance (Coss).

Ir,min =

√2 ·Qc

Lout· (2vbat − v1a) (2)

Since in all operating points soft switching should beachieved, the output current only can be controlled by adaptingthe switching frequency. Assuming a triangular current wave-form, the switching frequency for a certain output current ofa single module can be determined by equation 3 with Iout,iand Lout,i as output current and inductance of one module.The inversely proportional relation between output power and

LS5d.3-3

frequency is obvious.

fS =1

Lout,i·D · v1 − vbat

2 · (Iout,i + Ir,min)(3)

Pout =N

2· D

fs · Lout,i· (v1 − vbat) · vbat (4)

Applying the TCM to a single module causes a large outputcurrent ripple. By interleaving the modules in parallel andapplying a defined phase shift, the current ripple of the outputcurrent is significantly reduced. Due to the ripple reductionand the higher effective frequency, the volume of passivecomponents of the filter stages can be reduced. Figure 4 showsthe minimal achievable relative output current ripple for anideal interleaving of N modules, depending on the duty cycleD. By interleaving 11 modules for a duty cycle between 0.1and 0.9 a current ripple below 2% relative to the nominaloutput current of the converter system can be achieved.

III. CONTROL STRATEGY AND SIMULATION RESULTS

For controlling the output power/voltage of the converterin TCM operation, two degrees of freedom can be used: theswitching frequency fS and the duty cycle D.

For the different modules a master-slave relationship isimplemented as proposed in [21]. The switching frequencyfS and the duty cycle D are determined online by the mastermodule. To achieve a proper interleaving of the modules andavoid subharmonic oscillations, fS has to be the same for allmodules so that only D remains as control parameter. In thefollowing two possible control strategies are explained.

In a first approach, the output current of each module iscontrolled so that all modules have the same average current.The different modules are internally duty cycle controlledover ΔT . Since the steady state value of D is fixed by theinput and output voltage, by increasing the duty cycle, theaverage current will increase and vice versa (see Fig. 5). The

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.2 0.5 1.00.6 0.7 0.80.1 0.3 0.4 0.9

N=3

0.0

N=4

N=6

Duty Cycle

Rel

ativ

e C

urre

nt R

ippl

e

Fig. 4. Dependency of the output current ripple, relative to the current rippleof one module, on the duty cycle and the number of phases (N ) for the buckconverter operated with a TCM modulation scheme. (For resons of simplicityonly the cases N=2, 4 and 6 are shown).

iL,m

t

iL,S

iL

(D1>D)iL

(D2<D)iL

������

t

a)

b)

(Lm>LS)

Im,avg=Is,avg

Fig. 5. Current control for the interleaved buck-converter with synchro-nization via the turn-on instant. Figure a) describes the synchronization of amaster and a slave module on the on-instant, whereas LM > LS . In b) theinfluence of the duty-cycle variation on the average current is depicted.

synchronisation is on the turn-on instant of the master moduleas described in [21]. The slave modules are turned-on witha pre-controlled phase shift Φ. To prevent hard switching ofthe slaves, it has to be ensured that the master has the highestinductance, respectively carries the lowest current ripple. Thereason is that in all modules the average current is controlledto the same value and fS is dictated by the master, so thatslave modules with a lower ripple current/higher inductancevalue than the master module would not be able to reversethe inductor current to Ir,min. Hence the soft-switching at t4would be lost in such a module.

The value of the inductances, which is required for choosinga master module, can be determined by measurements inadvance, or by a initial parameter identification during start-upphase.

By changing the switching frequency, the average currentof the single modules as well as the average current of theconverter system can be adjusted. The main drawbacks ofthis control-strategy are the high number of current sensorsto control the average current of the modules as well as thenecessity of knowledge about the inductance values of all themodules for selecting an appropriate master module.

Therefore, a second control strategy is investigated, whereonly the master module current is controlled. The mastermodule determines the duty-cycle which is used as pre-controlvalue for the slave modules. The current in the slave modulesis only indirectly controlled. In each module, it is detected,when the current decreases below the required current limitIr,min for ZVS. When this happens, a detection pulse raises

LS5d.3-4

to high. To determine the phase-shift between the master andthe slave modules, the time between this detection pulses ismeasured. The phase-shift is adapted by controlling the duty-cycle (see Fig. 6).

To realise this control strategy only the current limit detec-tion has to be implemented for the slave modules and zerocurrent switching is achieved independently of the inductancevalues of the modules. However, homogenous current sharingbetween the modules is lost.

For validating also the two control strategies and for eval-uating the performance, a simulation of the 11 modules withslightly different inductance values (tolerance 10%) is setup in Gecko Circuits [22]. The results for the two controlstrategies are shown in Fig. 7 and in Fig. 8 where 11 modulesare interleaved for an average total output current of 660 A1.There, it could be seen that the relative ripple amplitude couldbe kept below 2% in both cases. The ripple at the switchingfrequency has an amplitude in the range of 3A and the peak-to-peak amplitude of the current is approximately 20A.

However, non-idealities like tolerances in the inductancevalues or delays in switching times result in a higher outputcurrent ripple than for an ideal system, so that filters atthe input and output are required, which also reduce thehigher harmonics of the current. There are different strategiesproposed in literature [13], [23] to reduce the current ripple ofN interleaved phases, where for an even number of modules

1The used values for the inductances are: L1 = 7.13μH , L2 = 6.86μH ,L3 = 6.20μH , L4 = 6.45μH , L5 = 6.93μH , L6 = 6.66μH , L7 =6.79μH , L8 = 6.50μH , L9 = 7.07μH , L10 = 6.11μH , L11 = 7.13μH

iL,m

Ir,min

t

DTP�

iL,S

t

Im,avg

iL,m

Ir,min

t

iL,S

Is,avg

��� ���s/2 ���s

(Lm>LS)

N�

a)

b)

Fig. 6. Current control for the interleaved buck-converter with indirect currentcontrol. Figure a) describes the synchronization of a master and a slave modulevia the on-instant (Note: LM > LS ). The average current of the slave moduleis slightly increased, due to the increased inductance LS . In b) the controlstrategy to adjust the phase is described. By increasing the duty cycle, fS ofthe slave is decreased and the according phase-shift Φ increases.

iout

-40

0

40

80

120

655

660

665

670

675

680

0100200300400500600700

Cur

rent

[A]

a)

b)

c)

Cur

rent

[A]

Cur

rent

[A]

iL1 iL2 iL3 iL4 iL5 iL6 iL7 iL8 iL9 iL10 iL11

iLi,avg

iout

Fig. 7. Simulation results for control method 1, where each module currentis controlled to the same average value. Since the average current is keptconstant, the minimal current varies due to different inductance values.

in a first step N −2 phases are sorted such that two phases ofsimilar amplitude are shifted by 180◦. After the first step forthe (N − 2) phases, a resultant vector remains. The angles ofthe remaining two vectors and the resulting vector are adjustedso, that the resulting vector is minimal. In case of an unevennumber of modules, the same procedure is adapted, but in thelast step four instead of three vectors are used to minimise theripple vector. There, the additional degree of freedom could beused to minimise not only the fundamental ripple harmonicsbut also higher order harmonics.

IV. LOSS ANALYSIS AND PROTOTYPE SYSTEM

In the following, the design of a prototype system ofthe considered DC-DC converter is presented and the lossdistribution is analysed for nominal voltages at the input andthe output. The design process is based on the assumption,

i=1,2,4,5,6,7,

9,10,11

iL1iL2 iL3 iL4 iL5 iL6 iL7 iL8 iL9 iL10 iL11

iL3,avgiL8,avgiLi,avg

iout

iout

-40

0

40

80

120

655

660

665

670

675

680

0100200300400500600700

Cur

rent

[A]

a)

b)

c)

Cur

rent

[A]

Cur

rent

[A]

Fig. 8. Simulation results for the second control strategy, which uses themaster module for determining the duty-cycle and in the slave modules thecurrent is controlled so that it always stops at Ir,min in reverse direction.With this control strategy ZVS operation is guaranteed for all submodules,but the average current values of the modules slightly differ in case of notequal inductance values. However, the slave modules do not require a currentmeasurement, but only a peak detection.

LS5d.3-5

TABLE IIICONVERTER LOSSES FOR THE NOMINAL OPERATING POINT

Converter SystemNumber of modules N 11Output Power Pout 220 kWMaximum output current Iout,max 660 ATotal power losses Pv,tot 891 WEstimated efficiency η 99.59%Inductor (per mod.)Copper losses PLCu

8.2 WCore losses PL,core 3.7 WSemiconductor (per mod.)Conduction losses PFET,cond 43.8 WSwitching losses PFET,s 13.2 WInput filter (total) Pfilt 14.3 WOutput capacitor (total) Pcout 0.1 WAux. & Ctrl. (per mod.) Paux,m 9 WAux. & Ctrl. (common) Paux,t 20 W

that the converter system must fit in a relatively flat 23inchrack and up to two height units can be consumed by the highpower DC-DC converter.

To determine the efficiency of the overall converter system,first the losses occurring in a single module are calculated.The single module basically consists of a half-bridge and theoutput inductor. The input- and output-filters are shared byall interleaved modules. Therefore, in the calculations, thelosses of the filters are distributed on the number of activesubmodules, which depends on the output power (cf. Fig. 10).

The losses in the half-bridge are mainly caused by the con-duction losses of the semiconductors and the gate-drive losses.Due to the reverse current Ir,min required for achieving ZVS(2), the conduction losses are increased. This has especiallyat low output power levels and in case of a large number ofparalleled MOSFETs a significant impact on the achievableefficiency. The rms currents for the upper and the lower switchcan be calculated by equations (5)-(7). The gate-drive lossesare estimated with the gate-source voltage and the requiredgate charge.

In addition to the conduction losses, relatively low switchinglosses are generated in the MOSFETs operating under zerovoltage conditions, which are determined based on measure-ment results.

In the prototype system shown in Fig. 9 two STY139N65M5MOSFETs [24] are paralleled.

IS1,rms=

√√√√(Ir,min

√Dk13

)2+

(IS1,max

√D(1−k1)

3

)2(5)

IS2,rms=

√√√√(Ir,min

√(1−D)k1

3

)2+

(IS2,max

√(1−D)(1−k1)

3

)2(6)

k1 =Ir,min

IS1,pp(7)

Besides the heat sink for the semiconductors, the outputinductor is one of the largest components of the convertersystem. The inductor losses can be divided in the core lossesand the copper losses. The core losses are determined with theimproved generalized Steinmetz equation (iGSE) presented in[28]. For the realisation of the windings, litz wire is used, sothat the increase of the AC resistance due to the proximityand the skin-effect [29] is limited. For the core of the 6.8μHoutput inductor five stacked E-cores with four turns are used(E40/16/12, N87, [25]).

The input filter is realised as a damped L-C-filter according

Auxillary & Control

Copper Power Planes

������ ����������5 x E40/16/12 EPCOS

MOSFET (2 parallel)STY139N65M5

��������

Low Power Fan

50 mm

40 mm

157 mm

v1bv1

54 mm

475 mm335 mm

Shared Input Filter

Converter Modules Output Capacitors

v1

v1b

vbat

Fig. 9. 3D CAD implementation of a single module of the high power DC-DC converter. Top, a single converter module consisting of the half-bridgeand the output inductor is shown. At the bottom, the overall converter systemwith its dimensions is depicted.

TABLE IVLIST OF COMPONENTS OF THE PROTOTYPE SYSTEM

Switching devices 2 parallel STY139N65M5Inductor core 6.8μH E40/16/12 [25]Filter inductor core 1

11×55μH AMCC-4 [26]

Input filter capacitor 11× 110μF B32778G411K [25]Output filter capacitor 100× 1μF CGA9P4X7T2W105K [27]

LS5d.3-6

0 50 100 150 200 25099

99.1

99.2

99.3

99.4

99.5

99.6

99.7

99.8

99.9

100

N=11

Pout [kW]

�����

����

����

�!"

.0

.0

Maximum Efficiency with optimal number of Modules#��$��������������������%'%%�*� �+��

N=1

N=3 N=6

Fig. 10. Efficiency of the overall converter system as function of the outputpower. Due to the different number of active phases a high efficiency over awide operating range is achieved.

to [30]. At the output, only a filter capacitor is required asthe current ripple is relatively small due to the interleaving ofthe converter modules. The losses for the filter inductor arecalculated with the same procedure as the losses of the outputinductor. To determine the losses in the filter capacitors theESR of the capacitors and the rms current are used.

The conduction losses of the wiring between the modulesand the connection to the vehicle as well as to the storagebattery are neglected in a first step.

The losses for the nominal operating point of the planedprototype system shown in Fig.9 at Pout =20 kW andfS =45 kHz are summarised in Tab.III. The overall convertersystem has a volume of about 8.6 lit . The switching frequencyvaries between 40 kHz at full load and 150 kHz at light loadto adjust the output current. The achievable efficiency for thedifferent numbers of active phases against the output power isplotted in Fig.10. A maximum efficiency over 99.6% can beachieved at an output power of 150 kW.

If the system is compared to a standard buck topology (seeFig.11), as for example presented in [13], [14], it is obviousthat the required blocking voltage of the semiconductors must

Sw2

Sw1

Lout

+- vBat, Car

v1 CF,1

LF,1

CF,2

+-

+-

Fig. 11. Standard buck topology (e.g. [14]) used for comparison of theproposed DC-DC converter.

be increased so that also the on resistance of the MOSFETsincreases.

In the following a comparison concerning the switching andinductor losses of these two solutions is performed. There, theinfluence on the input and output filter structures is neglected.The comparison is performed for one module at an outputpower of 20 kW and a switching frequency of 45 kHz. For bothtopologies, the same modulation scheme for soft switching isapplied.

In the described prototype system 650 V MOSFETs areused for the calculation, since these have the lowest on-resistance per TO247 housing for this application available onthe market. But due to the splitting of the input voltage, 400 VMOSFETs would meet the requirements. According to [31],the on-resistance of a MOSFET approximately scales withthe breakdown voltage (VBD) to the power of 1.3. Therefore,the on resistance of the MOSFETs, and also the conductionlosses, scale with a factor of approximately 2.2. In addition,the switching losses as well as the current ripple are increasedwith the standard buck converter due to the higher switchedvoltages.

At the considered operating point, the inductance value forthe buck converter without splitting has to be increased toLout,buck = 11.2μH . To compare the performance of thetwo inductances, an optimal design is calculated, whereas theaverage energy density of the inductors is kept constant. Thechosen material is N87 ferrite and the windings are realised inboth cases with litz wire (strand diameter dstrand =0.1 mm).For the proposed system the optimised inductor losses are10.0 W at a volume of 0.1 dm3, while for the standard systemlosses of 14.5 W occur at a volume of 16.5 dm3.

For the optimised design, the proposed system dissi-pates in total 608.2 W losses at the nominal operating point(Pout =220 kW). This is about half the losses of the standardsolution with 1163.5 W. In both cases the losses in the filtersare assumed to be identical. In addition to the lower losses, theproposed system enables a significant reduction of the inductorand the heat sink volume.

V. CONCLUSION

In this paper, a concept for high power DC-DC converterssuitable for ultra-fast charging stations for electric vehiclesis presented. The converter is based on a split DC inputvoltage and utilises a boundary operation mode to achieve softswitching as well as interleaving for reduction of the outputcurrent ripple. Besides the operating principle and the controlof the interleaving, also the design of a prototype system isdiscussed. For the prototype system a system efficiency above99.5% can be achieved over a wide operating range and therelative current ripple amplitude at the output is below 2%.Compared to a standard buck-converter, which has to switchthe full DC-link voltage, the losses can be reduced by morethan 40% if optimised MOSFETs are used for the presentedconcept.

LS5d.3-7

ACKNOWLEDGMENT

The authors would like to thank Swisselectric Research andthe Competence Center Energy and Mobility (CCEM) verymuch for their strong financial support of the research work.

REFERENCES

[1] Homepage of better place. [Online]. Available:http://www.betterplace.com/

[2] “UFCEV | EPFL.” [Online]. Available: http://ufcev.epfl.ch/[3] Homepage of toshiba. [Online]. Available: http://www.scib.jp/en/[4] G. Joos, M. de Freige, and M. Dubois, “Design and simulation of a fast

charging station for PHEV/EV batteries,” in Electric Power and EnergyConference (EPEC), IEEE, Aug. 2010, pp. 1 –5.

[5] S. Bai, D. Yu, and S. Lukic, “Optimum design of an EV/PHEV chargingstation with DC bus and storage system,” in Energy Conversion Congressand Exposition (ECCE), IEEE, Sept. 2010, pp. 1178 –1184.

[6] S. Bai and S. Lukic, “Design considerations for DC charging station forplug-in vehicles,” in Vehicle Power and Propulsion Conference (VPPC),IEEE, 2011, pp. 1 –6.

[7] Y. Du, X. Zhou, S. Bai, S. Lukic, and A. Huang, “Review of non-isolated bi-directional DC-DC converters for plug-in hybrid electricvehicle charge station application at municipal parking decks,” in 25th

IEEE Applied Power Electronics Conference and Exposition (APEC),2010, pp. 1145 –1151.

[8] M. Kamachi, H. Miyamoto, and Y. Sano, “Development of power man-agement system for electric vehicle ’’i-MiEV’’,” in Power ElectronicsConference (IPEC), International, 2010, pp. 2949–2955.

[9] A. Vezzini, “Lithiumionen-Batterien als speicher fur elektrofahrzeuge,”Bulletin SEV/AES, 2009.

[10] “Peugeot to offer iOn electric car in europeby end of 2010 | GreenCar.com.” [Online]. Avail-able: http://www.greencar.com/articles/peugeot-offer-ion-electric-car-europe-end-2010.php

[11] D. Aggeler, F. Canales, A. Coccia, N. Butcher, and O. Apeldoorn,“Ultra-fast DC-charge infrastructures for EV-mobility and future smartgrids,” in Innovative Smart Grid Technologies Conference Europe (ISGTEurope), IEEE, 2010, pp. 1 –8.

[12] R. M. Schupbach and J. C. Balda, “Comparing DC-DC converters forpower management in hybrid electric vehicles,” in IEEE InternationalElectric Machines and Drives Conference, IEMDC, vol. 3, 2003, pp.1369 –1374.

[13] O. Garcia, P. Zumel, A. De Castro, and A. Cobos, “Automotive DC-DCbidirectional converter made with many interleaved buck stages,” IEEETransactions on Power Electronics, vol. 21, no. 3, pp. 578 –586, 2006.

[14] B. Eckardt, A. Hofmann, S. Zeltner, and M. Maerz, “Automotivepowertrain DC/DC converter with 25kW/dm3 by using SiC diodes,”in 4th International Conference on Integrated Power Systems (CIPS),2006, pp. 1–6.

[15] J. Zhang, J. S. Lai, R. Y. Kim, and W. Yu, “High-power density designof a soft-switching high-power bidirectional DC–DC converter,” IEEETransactions on Power Electronics, vol. 22, no. 4, pp. 1145–1153, 2007.

[16] F. Zhang, L. Du, F. Z. Peng, and Z. Qian, “A new design method for highefficiency DC-DC converters with flying capacitor technology,” in 21st

IEEE Applied Power Electronics Conference and Exposition (APEC),2006.

[17] R. M. Cuzner, A. R. Bendre, P. J. Faill, and B. Semenov, “Implementa-tion of a Non-Isolated Three Level DC/DC Converter Suitable for HighPower Systems,” in 42nd IEEE Industry Applications Conference (IAS),2007, pp. 2001–2008.

[18] V. Yousefzadeh, E. Alarcon, and D. Maksimovic, “Three-level buckconverter for envelope tracking applications,” IEEE Transactions onPower Electronics, vol. 21, no. 2, pp. 549–552, 2006.

[19] G. Guidi, T. M. Undeland, and Y. Hori, “An optimized converterfor battery-supercapacitor interface,” in Power Electronics SpecialistsConference, PESC, IEEE, 2007, pp. 2976 –2981.

[20] J. Biela, D. Hassler, J. Miniboeck, and J. W. Kolar, “Optimal designof a 5kW/dm3 / 98.3% efficient TCM resonant transition single-phasePFC rectifier,” in Proc. Int. Power Electronics Conf. (IPEC), 2010, pp.1709–1716.

[21] L. Huber, B. T. Irving, and M. M. Jovanovic, “Open-loop controlmethods for interleaved DCM/CCM boundary boost PFC converters,”vol. 23, no. 4, 2008, pp. 1649 –1657.

[22] “Power electronics simulation - Gecko-Research.” [Online]. Available:http://www.gecko-research.com/

[23] S. Waffler, J. Biela, and J. W. Kolar, “Output ripple reduction ofan automotive multi-phase bi-directional DC-DC converter,” in IEEEEnergy Conversion Congress and Exposition (ECCE), 2009, pp. 2184–2190.

[24] “STMicroelectronics.” [Online]. Available: http://www.st.com/[25] “EPCOS.” [Online]. Available: http://www.epcos.com/[26] Micrometals - iron powder cores. [Online]. Available:

http://www.micrometals.com/[27] Product guide for mlcc. [Online]. Available:

www.tdk.com/pdf/mlcc product guide.pdf[28] K. Venkatachalam, C. R. Sullivan, T. Abdallah, and H. Tacca, “Accurate

prediction of ferrite core loss with nonsinusoidal waveforms using onlysteinmetz parameters,” in IEEE Computers in Power Electronics, 2002,pp. 36–41.

[29] J. Muhlethaler, J. W. Kolar, and A. Ecklebe, “Loss modeling of inductivecomponents employed in power electronic systems,” in InternationalConference on Power Electronics (ECCE Asia/ICPE), 2011, pp. 945–952.

[30] R. W. Erickson and D. Maksimovic, Fundamentals of power electronics.Springer, 2001.

[31] B. J. Baliga, Advanced Power Rectifier Concepts. Springer Verlag,2009.

LS5d.3-8