88
1 Chris Basso – APEC 2009 Dc-dc converters feedback and control presented by Christophe Basso Product Applications Engineering Director 2 Chris Basso – APEC 2009 Course agenda Feedback generalities Building an oscillator Poles and zeros Phase margin and quality coefficient Undershoot and crossover frequency Compensating the converter Current-mode converters Automated pole-zero placement Manual pole-zero placement Compensating with a TL431 Watch the optocoupler! Input filter A real case example Conclusion

Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

  • Upload
    others

  • View
    7

  • Download
    1

Embed Size (px)

Citation preview

Page 1: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

1

Chris Basso – APEC 2009

Dc-dc converters feedback and controlpresented by Christophe Basso

Product Applications Engineering Director

2 Chris Basso – APEC 2009

Course agendaFeedback generalitiesBuilding an oscillatorPoles and zerosPhase margin and quality coefficientUndershoot and crossover frequencyCompensating the converterCurrent-mode convertersAutomated pole-zero placementManual pole-zero placementCompensating with a TL431Watch the optocoupler!Input filterA real case exampleConclusion

Page 2: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

2

3 Chris Basso – APEC 2009

What do we expect from a dc-dc? A stable output voltage, whatever loading, input, temperature

and aging conditions.A fast reaction to a incoming perturbation such as a load

transient or an input voltage change.A quick settling time when starting-up or recovering from a

transient state.

A stable and noiseless dc source we can trust!

Input voltage

Output current

Ambient temperature

Vin

Iout

TA

dc-dc Output voltageVout

4 Chris Basso – APEC 2009

What is feedback? A target is assigned to one or several state-variables, e.g. Vout

= 12 V.A dedicated circuit monitors Vout deviations.If Vout deviates from its target, an error is created and fed-back

to the power stage for action.The action is a change in the control variable: duty ratio (VM),

peak current (CM) or switching frequency.

Input voltageVin

dc-dc Output voltageVout

controlaction

Compensating for the converter shortcomings!

Vout

Rth

Vth

Input voltageVin

Page 3: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

3

5 Chris Basso – APEC 2009

The feedback implementation Vout is permanently compared to a reference voltage Vref.The reference voltage Vref is precise and stable over temperature.The error, , is amplified and sent to the control input.The power stage reacts to reduce ε as much as it can.

ref outV Vε α= −

+-

+

-

Vin

Vout

Rupper

Rlower

Error amplifier - G

VrefModulator - GPWM

d

Power stage - H

Vp

α

+-

+

-

Vin

Vout

Rupper

Rlower

Error amplifier - G

VrefModulator - GPWM

d

Power stage - H

Vp

α

Controlvariable

6 Chris Basso – APEC 2009

( )( )

( )( ) ( )1

out

in

V s H sV s H s G s

=+

( )( )

( )( ) ( ) ( )

0lim

1inout inV s

H sV s V s

G s H s→

⎡ ⎤= ⎢ ⎥

+⎢ ⎥⎣ ⎦

Positive or negative feedback?

H(s)Vin(s) Vout(s)+

Do we want to build an oscillator?

To sustain self-oscillations, as Vin(s)goes to zero, quotient must go infinite

ε

Open-loop gain T(s)

G(s)

The « Plant »

( ) ( )1 0G s H s+ =( ) ( ) 1G s H s =

( ) ( ) 180G s H s∠ = − ° 1, 0j−

Nyquist

Page 4: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

4

7 Chris Basso – APEC 2009

A constant gain with a 180° rotationStarting the oscillator with a « crank », play with gain

4 1

R11k

C110n

2

R21k

C210n

3

R31k

C310n

SUM

2

K1 K2

6 5

X2SUM2K1 = 1K2 = 1

V1Tran Generators = PWL

Vout

7

R4Ri

E110k

R5Rf

parameters

Gfc=-29G=10^(-Gfc/20)Ri=100kRf=G*100k

1 V

0

8 Chris Basso – APEC 2009

A simple oscillatorCase n°1, at 0-dB gain crossover, phase ϕ is below -180°Oscillations are damped, system is asymptotically stable

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)pl

ot1

3

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

outin

deg

rees

Plo

t2

4

ϕ = -166°

|H| = 0 dB

10.0u 30.0u 50.0u 70.0u 90.0utime in seconds

-400m

-200m

0

200m

400m

vout

in v

olts

Plo

t1

1

Vout(t)

fc = 31 kHz

fc

32 µs

The oscillation frequency is the crossover frequency fcThe poles have an imaginary and a negative real part (LHPP)

Page 5: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

5

9 Chris Basso – APEC 2009

A simple oscillatorCase n°2, at 0-dB gain crossover, ϕ is beyond -180°Oscillations are not damped, system diverges

10.0u 30.0u 50.0u 70.0u 90.0utime in seconds

-800m

-400m

0

400m

800m

vout

in v

olts

plot

11

Vout(t)

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)pl

ot1

4

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

outin

deg

rees

plot

2

5

|H| = 0 dB

ϕ = -190°

fc

fc = 50 kHz 20 µs

The poles have an imaginary and a positive real part (RHPP)

10 Chris Basso – APEC 2009

A simple oscillatorCase n°3, at 0-dB gain crossover, ϕ is exactly -180°Oscillations are sustained, we have an oscillator!

-400m

-200m

200m

400m

vout

in v

olts

Plo

t1

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)pl

ot1

5

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

outi

n de

gree

spl

ot2

6

ϕ = -180°

|H| = 0 dB

10.0u 30.0u 50.0u 70.0u 90.0utime in seconds

-800m

-400m

0

400m

800m

vout

in v

olts

plot

1

1

Fosc = 39 kHz|T(39k)| = 0 dB

fcVout(t)

The poles are pure imaginary: no damping

25.6 µs

Page 6: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

6

11 Chris Basso – APEC 2009

Conditions for steady-state stability We do not want to create an oscillator!Conditions for non-permanent oscillations are:total phase rotation less than -360° at the crossover point

1 10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

26

25

Loop gain, |T(s)|

Loop phase, arg T(s)

Gain is 1at fc

ϕ = -112°

Total phase delay at fc:

-112° H(s) power stage-180° G(s) opamp

total = -292°

Stable!

ϕm = 68°

Bode plotH.W. Bode – 1905-1982

12 Chris Basso – APEC 2009

Crossoverfrequency fc|T(s)| = 0 dB

phasemargin

10 100 1k 10k 100k

-80.0

-40.0

0

40.0

80.0

vdbo

utin

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out

in d

egre

esP

lot1 2

1

0°0 dB

arg T(s)= -360°

The need for phase margin we need phasephase margin when |T(s)| = 0 dBwe need gaingain margin when arg T(s) = -360°

gainmargin

Phase margin:The margin before the loopphase rotation arg T(s)reaches -360° at |T(s)| = 0 dB

Gain margin:The margin before the loopgain |T(s)| reaches 0 dB at afreq. where arg T(s) = -360°

|T(s)|arg T(s)

Page 7: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

7

13 Chris Basso – APEC 2009

Poles, zeros and s-planeA plant loop gain is defined by:

( ) ( )( )

N sH s

D s=

solving for N(s) = 0, the roots are called the zeroszeros

solving for D(s) = 0, the roots are called the polespoles

( ) ( )( )5 301

s k s kH s

s k+ +

=+

numerator

denominator

1

2

1

5

30

1

z

z

p

s k

s k

s k

= −

= −

= −

1

2

1

5 796230 4.7721 1592

z

z

p

kf Hz

kf kHz

kf Hz

π

π

π

= =

= =

= =

Numerator roots

Denominator root

14 Chris Basso – APEC 2009

Poles, zeros and s-plane

1

1

2

3

4

0.8

2.5 2

2.5 2

z

p

p

p

s

s

s j

s j

= −

= −

= − +

= − −

The roots can either be real or imaginary:

( )( ) ( )2

40.8 2.5 4

sH ss s

+=

⎡ ⎤+ + +⎣ ⎦

±2j

Conjugatedroots

We can place these roots in the imaginary planeroot-locus analysis in the s-planetheir positions in the s-plane affect the time domain response

σ

Left Half-Plane(LHP)

Right Half-lane(RHP)

x

x

x

1ps

2ps

3ps

1zs

Imaginaryaxis

Realaxis

Unstable!

Page 8: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

8

15 Chris Basso – APEC 2009

Poles, zeros and s-plane

( ) ( )( )1 1 2

1 2H s

s s s s=

+ +

How the poles do influence the time domain response of the plant?assume an input-step response is wanted: multiply H(s) by 1/stake the inverse Laplace transformplot the response

( ) ( )( )2

1 2H s

s s=

+ +

1s

×

( )1 1 21 0.5 0.5t tH s e es

− − −= − +L

Take inverseLaplace transform

The roots are the exponentials exponents: -1 and -2If the denominator roots are negative, the signal is decayingdecayingIf the denominator roots are positive, the response divergesdiverges

11ps = −

22ps = −

16 Chris Basso – APEC 2009

Poles, zeros and s-plane

Vout

Response to a step

Q = -0.5

0

σx x

0x

0

x

x

σ

σ

Q ↓

Q ↑

Q = 0.5

Q < 0.5

Q > 0.5

VoutResponse to a step

VoutResponse to a step

1 V

1 V

VoutResponse to a step

1 V

110

x

xjω

σ

Q → ∞

VoutResponse to a step

110

x

x

σQ < -0.5

VoutResponse to a step

0 xx

-0.5 < Q < 0

LHP RHP

Q → −∞

Q → −∞

Vout

Response to a step

-0.5

1ps

1 2,p ps s

2ps

1ps

2ps

1ps

2ps

1ps

2ps

1ps 2ps

Page 9: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

9

17 Chris Basso – APEC 2009

Poles, zeros and s-planethe pole magnitude at the cutoff frequency is -3 dBIts asymptotic phase at f = ∞ is -90°The pole "lags" the phase

0

( ) 1 1( ) 1 1

out

in

V sV s sRC s ω

= =+ +

( ) ( )1

( )arg arg 1 arg 1 arctan 90( ) 2

out

in p

VV s

π⎛ ⎞∞ ∞= − + = − ∞ = − = − °⎜ ⎟⎜ ⎟∞ ⎝ ⎠

At f = ∞

the zero magnitude at the cuttoff frequency is +3 dBIts asymptotic phase at f = ∞ is +90°The zero "boosts" the phase

0

( ) 1( )

out

in

V s sV s ω

= +

( )1

( )arg arg 1 arctan 90( ) 2

out

in p

VV s

π⎛ ⎞∞ ∞= + = ∞ = + = °⎜ ⎟⎜ ⎟∞ ⎝ ⎠

At f = ∞

[ ]0

20 0 0

( ) 1 1( ) 21

out

in

VV

ωω ω ω

= =+

[ ]200 0

0

( ) 1 2( )

out

in

VV

ω ω ωω

= + =

18 Chris Basso – APEC 2009

Poles, zeros and s-planePoles and zeros can sometimes appear "at the origin"

( )0( )

( )out

in

sV sV s D s

ω=

( )( )arg arg arctan( ) 0 2

out zo

in

sV s sV s

π⎛ ⎞⎜ ⎟⎜ ⎟= = ∞ = +⎜ ⎟⎜ ⎟⎝ ⎠

For f > fzo

For f > fpo

( )

0

( )( )

out

in

N sV ssV sω

=

Zero for s = 0: zero at the origin

Pole for s = 0: pole at the origin

( ) ( )( )arg arg 1 arg arctan( ) 0 2

poout

in

ssV s

V sπ

⎛ ⎞⎜ ⎟⎜ ⎟= − = − ∞ = −⎜ ⎟⎜ ⎟⎝ ⎠

As f increases the gain increaseswith a +1 slope (+20 dB/decade)

As f increases the gain decreaseswith a -1 slope (-20 dB/decade)

A pole at the origin introduces a fixed phase rotation of -90°

Page 10: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

10

19 Chris Basso – APEC 2009

The Right Half-Plane ZeroIn a CCM boost, Iout is delivered during the off time: ( )1out d LI I I D= = −

Tsw

D0Tsw

Id(t)

t

IL(t)

inVL

Id0

Tsw

D1Tsw

Id(t)

t

IL(t)

d

IL1

inVL

Id1

IL0

If D brutally increases, D' reduces and Iout drops!What matters is the inductor current slew-rate ( )Ld V t

dt

20 Chris Basso – APEC 2009

The Right Half-Plane ZeroIf IL(t) can rapidly change, Iout increases when D goes up

100u 300u 500u 700u 900u

d(t) Vout(t)

IL(t)

Iout(t)

200 µs

d = 58.3%

d = 59%

Page 11: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

11

21 Chris Basso – APEC 2009

The Right Half-Plane ZeroIf IL(t) is limited because of a big L, Iout drops when D increases

2

100u 300u 500u 700u 900u

d(t)

d = 59%

d = 58.3%

Vout(t)

IL(t)

Iout(t)

10 µs

Vout drops!

Iout drops!

22 Chris Basso – APEC 2009

The Right Half-Plane ZeroSmall-signal equations can help us to formalize it

( )ˆ ˆˆ ˆ ˆ 1L

out outout L L L

IL D

I Ii i d i D dII D

⎛ ⎞∂ ∂⎛ ⎞= + = − −⎜ ⎟ ⎜ ⎟∂ ∂⎝ ⎠⎝ ⎠

( )1out LI I D= −

( )( )

2

2

0

1ˆ ' 1ˆ '

zout out

load

si s V D sL

ssL D Rd s

ω

ω

⎛ ⎞−⎜ ⎟⎜ ⎟⎛ ⎞ ⎝ ⎠= − =⎜ ⎟

⎝ ⎠0

'outV DL

ω =2

2'loadz

R DL

ω =

The negative signindicates a positive root!

( )( )

2

0

ˆ ' 1ˆ 'out

c sense load sense z

i s D sL sGv s R D R R ω

⎛ ⎞= − = −⎜ ⎟⎜ ⎟

⎝ ⎠2

2'loadz

R DL

ω =

Voltagemode

Currentmode

Voltage mode or current mode, the RHPZ remains the same

Page 12: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

12

23 Chris Basso – APEC 2009

The Right Half-Plane ZeroTo limit the effects of the RHPZ, limit the duty ratio slew-rateChose a cross over frequency equal to 20-30% of RHPZ position

A simple RHPZ can be easily simulated:

12

E110k

R110k

3

C110n SUM2

K1

K24

X1SUM2K1 = 1K2 = 1

1

0

1

( ) ( ) ( ) ( ) 11in in inR sV s V s V s V s

sCω

⎛ ⎞= − = −⎜ ⎟

⎝ ⎠

Vout(s)Vin(s)

24 Chris Basso – APEC 2009

The Right-Half-Plane-ZeroWith a RHPZ we have a boost in gain but a lag in phase!

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)P

lot1

1

1 10 100 1k 10k 100k 1Megfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out i

n de

gree

sP

lot2

2

|Vout(s)|

argVout(s)

-90°

+1

0

( ) 1 sG sω

= +

LHPZ

RHPZ

0

( ) 1 sG sω

= −

Page 13: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

13

25 Chris Basso – APEC 2009

The Right-Half-Plane-ZeroA RHPZ also exists in DCM boost, buck-boost converters…

Tsw

D1Tsw

Id(t)

tD2Tsw

D3Tsw

IL,peak(t)

When D1 increases, [D1,D2] stays constant but D3 shrinks

26 Chris Basso – APEC 2009

Tsw

D1Tsw

Id(t)

tD2Tsw

D3Tsw

IL,peak(t)

1d

The Right-Half-Plane-ZeroThe triangle is simply shifted to the right by 1d

The refueling time of the capacitor is delayed and a drop occurs

Page 14: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

14

27 Chris Basso – APEC 2009

The Right-Half-Plane-ZeroIf D increases, the diode current is delayed by

2.02m 2.04m 2.06m 2.09m 2.11mtime in seconds

180m

220m

260m

300m

340m

vdut

y in

vol

ts

-1.00

1.00

3.00

5.00

7.00

i(b2)

, i(b

2)#a

in a

mpe

res

Plo

t1

23

4

1.85m 1.99m 2.13m 2.27m 2.41mtime in seconds

6.65

6.75

6.85

6.95

7.05

vout

in v

olts

Plo

t3

1

2.02m 2.04m 2.06m 2.09m 2.11mti i d

6.65

6.75

6.85

6.95

7.05

vout

in v

olts

Plo

t2

1

D(t)Id(t)

Vout(t)

Vout(t)

1d

1d

28 Chris Basso – APEC 2009

The Right-Half-Plane-ZeroAveraged models can predict the DCM RHPZ

Vout

16

R11150

C51m

R10150m3

Vin10V

11

L175u

5

R150k

R310k

6

8

X2AMPSIMP

V22.5

Verr

1

LoL1kH

10

CoL1kF

V1xAC = 1

vout

vout

dac

PW

M s

witc

h V

Mp

X3PWMVML = 75uFs = 100k

15.0V

15.0V

10.0V

10.0V

2.50V

278mV278mV

0V

( )( )

( )( )( )( )

1

1

2

2

1 1ˆˆ 1 1

z zoutd

p p

s s s sv sH

d s s s s s

+ −=

+ +

1

1z

out ESR

sC R

=2 2

loadz

RsM L

=

1

2 1 11p

out ESR

MsM C R

−=

− 2

21 12p swMs F

D−⎛ ⎞= ⎜ ⎟

⎝ ⎠

2 12 1

outd

V MHD M

−=

Page 15: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

15

29 Chris Basso – APEC 2009

The Right-Half-Plane-ZeroAveraged models can predict the DCM RHPZ

1 10 100 1k 10k 100k 1Megfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out

in d

egre

espl

ot1

8

7

11.06zf kHz=

2141zf kHz=

14.2pf Hz=

28.75dH dB=

247.1pf kHz=

28.6 dB

-45°

fp1

4.2 Hz

fz1fp2

1 kHz 47 kHz

fz2

141 kHz

30 Chris Basso – APEC 2009

How much margin? The RLC filterlet us study an RLC low-pass filter, a 2nd order system

23

R1R

1

L1L

C1C

Vout

parameters

f0=235kL=10uC=1/(4*3.14159^2*f0^2*L)w0=(L*C)^-0.5Q=10R=1/(((C/(4*L))^0.5)*2*Q)

Vin

( ) 2

11

T sLCs RCs

=+ +

( ) 2 2

2 2

1 1

2 1 1r r r r

T ss s s s

ω ω ω ω

= =+ + + +

1r LC

ω =

4CRL

ζ =1

2Q

ζ=

zeta

Change Q and run the simulation

Page 16: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

16

31 Chris Basso – APEC 2009

The RLC response to an input stepchanging Q affects the transient response

5.00u 15.0u 25.0u 35.0u 45.0utime in seconds

200m

600m

1.00

1.40

1.80

vout

#6, v

out#

5, v

out#

4, v

out#

3, v

out i

n vo

ltsPl

ot1

7891011

Q = 0.1

Q = 0.5

Q = 0.707

Q = 1

Q = 5

Fast response and no overshoot!

Q < 0.5 over dampingQ = 0.5 critical dampingQ > 0.5 under damping

Overshoot = 65%

Asymptotically stable

32 Chris Basso – APEC 2009

The RLC response to an input stepQ affects the poles position

( ) ( )( )2

2

1

1r r

N sT s

s s D sQω ω

= =+ + Solve D(s) = 0 to obtain poles

2

2 1 0r r

s sQω ω

+ + = 2 roots, s1 and s2 = ( )21 1 42

r QQω

− ± −

Solve N(s) = 0 to obtain zeros

Q < 0.5, two real negatives rootsQ = 0.5, two real coincident negative rootsQ > 0.5, two complex rootsQ = ∞, two imaginary conjugate roots

σ

Low Q Low Q

Q = 0.5

High Q

High Q

LHP

Q = ∞

RHP

Page 17: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

17

33 Chris Basso – APEC 2009

Where is the analogy with T(s)?in the vicinity of the crossover point, T(s) combines:

one pole at the origin, ω0one high frequency pole, ω2

( )

0 2

1

1T s

s sω ω

=⎛ ⎞⎛ ⎞

+⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

gainphase

10 100 1k 10k 100k

-80.0

-40.0

0

40.0

80.0

vdbo

utin

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out

in d

egre

es

2

1

0°0 dB

-2

-1

34 Chris Basso – APEC 2009

Closed-loop gain study

10 100 1 .103 1 .10450

0

50

20 log T i ω⋅( )( )⋅

ω

2 π⋅

10 100 1 .103 1 .104180

135

90

arg T i ω⋅( )( )360

2 π⋅⋅

ω

2 π⋅

( )

0 2

1

1T s

s sω ω

=⎛ ⎞⎛ ⎞

+⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

2 2

20 2 0

1 1

1 1r r

s s s sQω ω ω ω ω

=+ + + +

fc

ϕ m

fc

( )( ) 2

0 2 0

11 1

T ss sT s

ω ω ω

=+ + +

0

2

Q ωω

=

Linking the open-loop phase margin to the closed-loop Q

0 2rω ω ω=

Closed loop

-106°

solve

-1

-2

0 300f Hz=

2 1000f Hz=

74°

Page 18: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

18

35 Chris Basso – APEC 2009

Closed-loop gain study( )( ) 2

2

11 1

r r

T ss sT s

Qω ω

=+ + +

1.7Q =

if we plot the closed-loop expression:ω2 > ω0, low Q, no peakingω2 < ω0, high Q, peaking

0 300f Hz=

10 100 1 .103 1 .10420

020 log

T i ω⋅( )

1 T i ω⋅( )+⎛⎜⎝

⎞⎠

ω

2 π⋅

10 100 1 .103 1 .104180

90

0

argT i ω⋅( )

1 T i ω⋅( )+⎛⎜⎝

⎞⎠

360

2 π⋅⋅

ω

2 π⋅

2 100f Hz=

10 100 1 .103 1 .10420

020 log

T i ω⋅( )

1 T i ω⋅( )+⎛⎜⎝

⎞⎠

ω

2 π⋅

10 100 1 .103 1 .104180

90

0

argT i ω⋅( )

1 T i ω⋅( )+⎛⎜⎝

⎞⎠

360

2 π⋅⋅

ω

2 π⋅

0.55Q =

0 300f Hz=

2 1000f Hz=

74mϕ = °

32mϕ = °

Open-loop phase

Closed-loop Q

36 Chris Basso – APEC 2009

Linking ϕm and Qan open-loop phase margin leads to a closed-loop quality coeff. Qwe have seen that Q affects the transient response (RLC filter)let us link the phase margin to the quality coefficient:

1. calculate the crossover frequency for which |T(s)| = 1

0 2

1 11c cj jω ω

ω ω

=⎛ ⎞⎛ ⎞

+⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

( )42 1 4 1

2c

Qωω

+ −=

2. substitute ωc into T(s), calculate its argument (phase margin)

arg T(s)@ fc =( )4

2arctan1 4 1Q

⎛ ⎞⎜ ⎟⎜ ⎟+ −⎜ ⎟⎝ ⎠

3. extract the quality coefficient Q: ( )( )

( )( )

24 1 tan costan sin

m m

m m

Qϕ ϕ

ϕ ϕ+

= =

Page 19: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

19

37 Chris Basso – APEC 2009

We can now plot Q versus ϕma Q factor of 0.5 (critical response) implies a ϕm of 76°a 45° ϕmcorresponds to a Q of 1.2: oscillatory response!

0 25 50 75 1000

2.5

5

7.5

10

1 tan φ( )2+( )14

tan φ( )

φ360

2 π⋅⋅

0.5

76°

Q

ϕm

38 Chris Basso – APEC 2009

Summary on the design criteria compensate the open-loop gain for a phase margin of 70°make sure the open-loop gain margin is better than 15 dBdo not accept a phase margin lower than 45° in worst case

300u 900u 1.50m 2.10m 2.70mtime in seconds

4.88

4.94

5.00

5.06

5.12

vout

2#a,

vou

t2, v

out2

#b,

vout

2#d

in v

olts

Plo

t2

2315

PM = 10°PM = 25°

PM = 45°PM = 76°

( ), ,out c outf C f I∆

( )f PM

Page 20: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

20

39 Chris Basso – APEC 2009

1 10 100 1k 10k 100k 1Megfrequency in hertz

-60.0

-40.0

-20.0

0

20.0

vdbo

ut in

db(

volts

)pl

ot1

2

A dc-dc conv. combines an inductor and a capacitorAs f is swept, different elements dominate Zout

Dc-dc output impedance

Zout (dBΩ)

f (Hz)

Rlf

LoutCout

Resr

4 1

Lout100u

2

Rlf10m

3

Resr1m

Cout1000uF

I1AC = 1

Vout

A buck equivalent circuit

f0

To avoid stability issues,fc >> f0

220

0

1 lf

lf

RZR Z

⎛ ⎞+ ⎜ ⎟⎝ ⎠

Crossover region

( ) 1||out out Lf esrout

Z sL r RsC

⎛ ⎞= + +⎜ ⎟

⎝ ⎠

40 Chris Basso – APEC 2009

Closing the loop…Any circuit can be represented by its Thévenin modelAt high frequency, Cout impedance dominatesOnce in closed-loop, Zout goes down as T(s) is high

Vth

Rth

Vout

Iout

,1

2out OLout

ZC fπ

=

Vout

H(s)

G(s)

d

,out OLZ

( ), ,1

1out CL out OLZ ZT s

=+

Page 21: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

21

41 Chris Basso – APEC 2009

Closing the loop…At the crossover frequency Zout,CL ≈ Zout,OL

1 10 100 1k 10k 100kfrequency in hertz

-100

-50.0

0

50.0

100

vdbo

ut#b

, vd

bout

, vdb

err

in d

b(vo

lts)

Plo

t1

2

35

|Zout,CL|

|Zout,OL|

|T(s)|fc

|Zout,CL|≈| Zout,OL|

Let’s assess« almost » :-)

42 Chris Basso – APEC 2009

Calculating the output impedanceclosed-loop output impedance is dominated by Cout

( ),1 1

2 1out CLc out

Zf C T sπ

≈+

we have calculated the crossover value, |T(s)| = 1

( )42 1 4 1

2c

Qωω

+ −=

substitue into 1/ (1+T(s)) and extract module

( ) 2

20 0

22 22

2 2 22 2

1 11

11 1

T s

ω ωω ωω ωω ω

=+ ⎛ ⎞

⎜ ⎟−⎜ ⎟+ +⎜ ⎟⎛ ⎞ ⎛ ⎞+⎜ ⎟ +⎜ ⎟ ⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠ ⎝ ⎠

Page 22: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

22

43 Chris Basso – APEC 2009

Calculating the output impedanceIntroduce the quality factor coefficient

( )

( ) ( )2 4

4 4 22

1 11 2 1 1 4

21 1 4 1 4 1

T s Q QQ

Q Q ω

=+ + − +

+ + + −

Now replace Q by its definition ( )( )

cossin

m

m

Qϕϕ

=

( )( ) ( ) ( )

( ) ( ) ( )2

2 22

1 11 1 cos1 2cos cos 1 1 cos

cos sinm

m m mm m

T s ϕϕ ϕ ϕ

ϕ ϕ

=+ ⎛ ⎞⎡ ⎤+

⎡ ⎤+ − + −⎜ ⎟⎢ ⎥ ⎣ ⎦⎜ ⎟⎣ ⎦⎝ ⎠

Simplify ( ) ( )1 1

1 2 2cos mT s ϕ

=+ −

0

2

Q ωω

=

44 Chris Basso – APEC 2009

An example with a buck

Let’s assume an output capacitor of 1 mFThe spec states a 80-mV undershoot for a 2-A stepHow to select the crossover frequency?

2out

outc out

IVf Cπ∆

∆ ≈2

outc

out out

IfV C π∆

≈∆

2 480 1 2cf kHz

m m π≈ =

× ×1@ 4 40

2 4 1outCZ kHz mk mπ

= = Ω× ×

Select a 1000-µF capacitor featuring less than 40-mΩ ESR

Page 23: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

23

45 Chris Basso – APEC 2009

Setting the right crossover frequency

Compensate the converter for a 4-kHz fc

10 100 1k 10k 100kfrequency in hertz

-80.0

-40.0

0

40.0

80.0

vdbe

rr in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

err

in d

egre

esP

lot1

4

3

4 kHz

ϕm = 70°

Compensated open-loop gainBuck operated in voltage-mode

gain

phase

fc

46 Chris Basso – APEC 2009

Measure the obtained undershoot

1.61m 2.42m 3.23m 4.05m 4.86mtime in seconds

4.92

4.94

4.96

4.98

5.00

vout

in v

olts

Plo

t1

5

70 mV

( )2 2co0

s4

m

m IVϕ

∆∆

−≈

240 701.14

V m mV∆ ≈ × =

Page 24: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

24

47 Chris Basso – APEC 2009

Is my capacitor a real capacitor?

A capacitor is made of parasitic elements

RESR

LESL

C

1 10 100 1k 10k 100k 1Meg 10Megfrequency in hertz

-10.0

10.0

30.0

50.0

70.0

vdb3

in d

b(vo

lts)

Plo

t1

1

RESRZ = -20 dBΩ@ 40.85 kHz

CZ = 24.03 dB Ω@ 100 Hz

LESLZ = - 4 dBΩ@ 1 MHz

1 10 100 1k 10k 100k 1Meg 10Megfrequency in hertz

-10.0

10.0

30.0

50.0

70.0

vdb3

in d

b(vo

lts)

Plo

t1

1

RESRZ = -20 dBΩ@ 40.85 kHz

CZ = 24.03 dB Ω@ 100 Hz

LESLZ = - 4 dBΩ@ 1 MHz

C = 100 µFRESR = 100 mΩLESL = 100 nH

48 Chris Basso – APEC 2009

How these elements affect the undershoot?

Rupper

Zf

Vin

Iout(t)IC(t)

Power stage

Cout

RESR

LESL

C

Vout(t)H(s)

Rupper

Zf

Vin

Iout(t)IC(t)

Power stage

Cout

RESR

LESL

C

Vout(t)H(s)

The output current slope affects the undershootIf slope is steep, stray elements dominate the answer

Page 25: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

25

49 Chris Basso – APEC 2009

How these elements affect the undershoot?

∆t

∆ISI

0 t

∆t

∆ISI

0 t

( )out ItI t I S tt

= ∆ =∆

Because of bandwidth limits, RESR and LESL play alone

C1100u

L1100n

Iout

R1100m

Vout

0

1 t

out ESR I ESL I IV R S t L S S t dtC

∆ = + + ⋅∫2

2I

out ESR I ESL IS tV R S t L S

C∆ = + +

50 Chris Basso – APEC 2009

The capacitor contribution is small…

-200m

-100m

0

100m

200m

esr i

n vo

ltspl

ot1

4.88

4.92

4.96

5.00

5.04

c in

vol

tspl

ot2

-480m

-240m

0

240m

480m

esl i

n vo

ltspl

ot3

1.92m 2.05m 2.18m 2.32m 2.45mti i d

4.60

4.80

5.00

5.20

5.40

vout

2 in

vol

tspl

ot4

VESR(t)

VC(t)

VESL(t)

Vout(t)

∆V = 505 mV

∆V = 100 mV

∆V = 100 mV

∆V = 606 mV

SI = 5 A/µs

Page 26: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

26

51 Chris Basso – APEC 2009

Compensating the converter

( )pk tε

( )ik t dtε ⋅∫

( )d

d tk

dtε

H(s) Vout(t)Vref(t)

+ +

( ) ( ) ( ) ( )p i d

d tv t k t k t dt k

dtε

ε ε= + ⋅ +∫

ε(t)

Fix the current error with a proportionalproportional term (P)The proportional gain gives fast reaction time but also overshoot Fix the long-term static error with an integralintegral term (I)The integral term cancels the static error but slows down the responseFix the immediate error by observing the slope with a derivativederivative term (D)The derivative term decreases overshoot but slows down the response

Power stageBuck, boost…

52 Chris Basso – APEC 2009

How do we stabilize the converter?1. Select the crossover frequency fc (assume 4 kHz)2. Provide a high dc gain for a low static error and good input rejection 3. Shoot for a 70° phase margin at fc4. Evaluate the needed phase boost at fc to meet (3)5. Shape the G(s) path to comply with 1, 2 and 3

( ) ( )( )

,, 1

sc OLsc CL

A sA s

T s=

+

|H(s)| @ fc

Arg H(s) @ fc

Open-loop Bode plot of the power stage, H(s)

Phase

Gain

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out in

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)Pl

ot1

1

Page 27: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

27

53 Chris Basso – APEC 2009

First, provide mid-band gain at crossover1. Adjust G(s) to boost the gain by +21 dB at crossover

|H(s)|= -21 dB

Arg H(s)= -175°

Phase

Gain

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out in

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)Pl

ot1

Tailor G(s) toexhibit a gainof +21 dB@ fc.

0 dB@fcPush thegain up.

4 kHz

54 Chris Basso – APEC 2009

Second, provide high gain in dc2. High dc gain lowers static error and brings good input rejection

Phase

Gain

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out in

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)Pl

ot1

-1

Highdc gain

Vin

Vout

1sRC

Pole at the origin !

Page 28: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

28

55 Chris Basso – APEC 2009

100m 1 10 100 1k 10k 100kfrequency in hertz

-360

-180

0

180

360

p in

unk

now

n

-60.0

-30.0

0

30.0

60.0

vdbo

ut in

db(

volts

)P

lot1

8

10

Second, provide high gain in dc2. An integrator provides a high dc gain but rotates by -270°

1 2

C1100n

4

R110k

E11k

V1AC = 1

Vout

60 dB

-20 dB per decadeslope -1

-180° by invertingop amp

-90° by poleat the origin

56 Chris Basso – APEC 2009

Second, provide high gain in dc2. An integrator provides a high dc gain but rotates by -270°

1 2

C1100n

4

R110k

E11k

V1AC = 1

Vout

( ) ( )( ) 1 1

1 1out

in

po

V sG s sV s sR C

ω

= = =

( )arg argpo

jG j ωωω⎛ ⎞

= − ⎜ ⎟⎜ ⎟⎝ ⎠

( )limarg lim arctan0 2po

sG s

ω

ωω π

→∞ →∞

⎛ ⎞⎜ ⎟⎜ ⎟= − = −⎜ ⎟⎜ ⎟⎝ ⎠

1 1

1po R C

ω =

Total phase lag brought by an origin pole is -3π/2 or -270°

All compensators (1, 2 or 3) feature an origin pole

Page 29: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

29

57 Chris Basso – APEC 2009

-160

-120

-80.0

-40.0

0

ph_v

out#

a in

deg

rees

Plo

t1

18

-360

-270

-180

-90.0

0

p in

unk

now

nP

lot3

11

10 100 1k 10k 100kfrequency in hertz

-360

-270

-180

-90.0

0

p in

unk

now

nP

lot2

1

Third, evaluate the phase boost at fc

arg H(s)

arg G(s)

arg T(s)

Phase boost at fc

arg H(s) at 4 kHz

ϕm

( )arg 270 360c mH f BOOST ϕ− °+ − = − °( )arg 90 70 175 90 155m cBOOST H fϕ= − − ° = °+ − = °

-175°

+155°

-115°

ϕm = 70°

arg H(s)

arg G(s)

+

58 Chris Basso – APEC 2009

How do we boost the phase at fc?The type 1 configurationNo phase boost, pure integral termPermanent phase lag of -270°Ok if argH(fc) < -45° for a ϕm of 45°

( ) ( )( ) 1 1

1 1out

in

po

V sG s sV s sR C

ω

= = =

1 1

1po R C

ω =

1 2

C110n

4

R110k

E110k

V1AC = 1

Vout

Type 1

po

c

fG

f= Select fpo to have

G at fc

1 pole at the origin

Page 30: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

30

59 Chris Basso – APEC 2009

10 100 1k 10k 100kfrequency in hertz

-60.0

-30.0

0

30.0

60.0

vdbo

ut in

db(

volts

)

-360

-180

0

180

360

p in

unk

now

npl

ot1

27

28

How do we boost the phase at fc?

1 2

C1355p

4

R110k

E110k

V1AC = 1

Vout

21 dB

fpo = 44.5 kHz

-270°

0 log 1log log

b a

b a po c

y y Gx x f f− −

= = −− −

44.5 11.14

po

c

fG

f= = =

Type 1

log G

log f

4 kHz

GainG(s)

PhaseArg G(s)

-1

Adjust fpo toget G at fc

fc

60 Chris Basso – APEC 2009

How do we boost the phase at fc?The type 2 configurationPhase boost up to 90°Ok if argH(fc) < -90°

( )( )

2 1

1 21 1 2 2

1 2

1

1

sR CG sC CsR C C sR

C C

+= −

⎛ ⎞⎡ ⎤+ +⎜ ⎟⎢ ⎥⎜ ⎟+⎣ ⎦⎝ ⎠

1 1

1po R C

ω =

Type 2

1 pole at the origin1 zero1 pole

12 2

1p R C

ω = 12 1

1z R C

ω =

If C2 << C1

1 2

C12nF

3

R110k

4

E110k

V1AC = 1

Vout

R2116k

C262pF

Page 31: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

31

61 Chris Basso – APEC 2009

Pole/zero placement and boost at fc

( ) 1

1

1

1

z

p

jG j

j

ωω

ωωω

⎛ ⎞+⎜ ⎟

⎝ ⎠=⎛ ⎞+⎜ ⎟⎜ ⎟

⎝ ⎠

Type 2

Phase boost appears between the zero and the pole

( ) 1

1

1arg arg

1

z

p

jG j boost

j

ωω

ωωω

⎛ ⎞+⎜ ⎟

⎝ ⎠= =⎛ ⎞+⎜ ⎟⎜ ⎟

⎝ ⎠

( )1 1

arg arctan arctanz p

f fG ff f

⎛ ⎞⎛ ⎞= − ⎜ ⎟⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

G a jb= +

arg arctan bGa

⎛ ⎞= ⎜ ⎟⎝ ⎠

Assume 1 zero placed at 705 Hz, 1 pole at 22 kHz and a 4-kHz crossover:

( ) 4 4arg 4 arctan arctan 80 10.3 70705 22

k kG kHzk

⎛ ⎞ ⎛ ⎞= − = − ≈ °⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

1 1z pf f f=Peaks to a max at

62 Chris Basso – APEC 2009

10 100 1k 10k 100kfrequency in hertz

-360

-180

0

180

360

p in

unk

now

n

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)pl

ot1

33

32

How do we boost the phase at fc?

Type 2

Phase boostat fc = 71°

Gain atfc = 21 dB

fz1 = 705 Hz fp1 = 22 kHz

1 2

C12nF

3

R110k

4

E110k

V1AC = 1

Vout

R2116k

C262pF

4 kHz

G100 Hz = 38 dBGainG(s)

PhaseArg G(s)

-270°

Page 32: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

32

63 Chris Basso – APEC 2009

How do we boost the phase at fc?The type 3 configurationPhase boost up to 180°Ok if argH(fc) < -180°

Type 3

1 pole at the origin2 zeros2 poles

If C2 << C1 and R3 << R11 2

C111nF

3R110k

4

E110k

V1AC = 1

Vout

R220k

C2350pF

5

R3321

C322nF

( )

( )( )3 1 32 1

3 31 21 1 2 2

1 2

11( )1

1

sC R RsR CG ssR CC CsR C C sR

C C

+ ++= −

+⎛ ⎞+ +⎜ ⎟+⎝ ⎠

12 1

1z R C

ω = 21 3

1z R C

ω =1 1

1po R C

ω =

13 3

1p R C

ω = 22 2

1p R C

ω =

64 Chris Basso – APEC 2009

Pole/zero placement and boost at fc

Type 3

Phase boost appears between the zero and the pole

( ) 1 2

1 2

1 1arg arg

1 1

z z

p p

j jG j boost

j j

ω ωω ω

ωω ωω ω

⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠= =⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠

( )1 2 1 2

arg arctan arctan arctan arctanz z p p

f f f fG ff f f f

⎛ ⎞ ⎛ ⎞⎛ ⎞ ⎛ ⎞= + − −⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎜ ⎟ ⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠ ⎝ ⎠ ⎝ ⎠

Assume 2 zeros placed at 500 Hz, 2 poles at 50 kHz and a 4-kHz crossover:

( ) 4 4arg 4 2arctan 2arctan 166 4.6 161500 50

k kG kHzk

⎛ ⎞ ⎛ ⎞= − = − ≈ °⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠

1 2

1 2

1 1( )

1 1

z z

p p

j jG j

j j

ω ωω ω

ωω ωω ω

⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠=⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠

Page 33: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

33

65 Chris Basso – APEC 2009

10 100 1k 10k 100kfrequency in hertz

-360

-180

0

180

360

p in

unk

now

n

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)Pl

ot1

1

3

How do we boost the phase at fc?

Type 3

Phase boostat fc = 158°

Gain atfc = 21 dB

fz1, fz2, = 500 Hz

fp1,fp2 = 50 kHz

1 2

C111nF

3R110k

4

E110k

V1AC = 1

Vout

R220k

C2350pF

5

R3321

C322nF

GainG(s)

PhaseArg G(s)

4 kHz

G100 Hz = 20 dB

-270°

66 Chris Basso – APEC 2009

Why Rlower never appears in the ac functions?Because of the virtual ground, Rlower disappears in ac!

1

4

2

X1AMPSIMP Vref

Rupper

Rlower

Rf

to thePWM Vout

Vin

1||

f fout ref in

upper lower upper

R RV V V

R R R⎛ ⎞

= + −⎜ ⎟⎜ ⎟⎝ ⎠

dc equation

ac equation

( )( )

fout

in upper

RV sV s R

= −

Does not playa role in ac!

≈ 0in ac

As long as a virtual ground exists, the division ratio plays no role!

Page 34: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

34

67 Chris Basso – APEC 2009

In absence of virtual ground, Rlower comes backIn an OTA-based circuit, there is no virtual groundRlower now affects G(s)

1

2

C1

R1

C2

3

G1gm

Rupper

Rlower

vin

Verr

lower

lower upper

RkR R

=+

inkV

68 Chris Basso – APEC 2009

Image ofVin

Can easilydetect OVP 1

C1

3

G1gm

Rupper

Rlower

vin

Verr

Boosting the phase at fc with OTAsThe type 1 configuration with an OTAOTA types are popular in PFC circuitsNo virtual grounds, the divider enters the picture!

Type 1 - OTA1 pole at the origin

( )1

1lower upper

lower

G s R Rs C

gmR

=+

1

1po

lower upper

lower

R RC

gmR

ω =+

po

c

fG

f= Select fpo to have

G at fc

Page 35: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

35

69 Chris Basso – APEC 2009

parameters

Vout=385VIb=250uVref=2.5

Rupper=(Vout-Vref)/IbRlower=2.5/Ib

fc=20Gfc=46

gm=200ufpo=G*fcRlowerOTA=Vref/IbRupperOTA=(Vout-Vref)/IbReq=(Rlower+Rupper)/(gm*Rlower)C1OTA=1/(2*pi*fpo*Req)

G=10^(-Gfc/20)pi=3.14159C1=1/(2*pi*fc*G*Rupper)

Boosting the phase at fc with OTAsThe calculation is simple:

Type 1 - OTA

1 2

C1C1

R1Rupper

R2Rlower

VinAC = 1

Vout1

E110k

6

C2C1OTA

4

R3RupperOTA

R4RlowerOTA

Vout2

Vin

Vin

G1Gm

70 Chris Basso – APEC 2009

Boosting the phase at fc with OTAs

Type 1 - OTA

-80.0

-60.0

-40.0

-20.0

0

910

1 2 5 10 20 50 100 200 500 1kfrequency in hertz

86.0

88.0

90.0

92.0

94.0

1112

-46 dB

|G(s)|

arg G(s)

Page 36: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

36

71 Chris Basso – APEC 2009

Boosting the phase at fc with OTAsThe type 2 configuration with an OTAType 2 improves transient response in BCM PFCsNo virtual grounds, the divider enters the picture!

Type 2 - OTA

1 pole at the origin1 zero1 pole

If C2 << C1

( ) ( )2 2 1

2 1 2 2

11

lower

lower upper

R gmR sR CG sR R sR C sR C

+≈

+ +

1

VinAC = 1

2

C1

R2

C2

3

G1gm

Rupper

Rlower

Vout

Mid-band gain

2 1

1po z R C

ω ω= =2 2

1p R C

ω =

72 Chris Basso – APEC 2009

3

V1AC = 1

1

C1C10

R1R20

C2C20

4

G1gm

R2Rupper

R3Rlower

V1

11 Vout2

12

R8R2

2

C7C1

C8C2

vin

R4Rupper

R5Rlower

vin

E11Meg

parameters

Rupper=3.6MegRlower=23kgm=200ufc=10Gfc=-15

G=10^(-Gfc/20)pi=3.14159

fp=100fz=1

a=sqrt((fc^2+fp^2)*(fc^2+fz^2))c=(fc^2+fz^2)

R2=(a/c)*Rupper*fc*G/fpC2=1/(2*pi*fp*R2)C1=1/(2*pi*fz*R2)

R20=G*(Rupper+Rlower)/(Rlower*gm)*(a/c)*fc/fpC10=1/(2*pi*fz*R20)C20=C10/(2*pi*fp*C10*R20-1)

Boosting the phase at fc with OTAs

Type 2 - OTA

Page 37: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

37

73 Chris Basso – APEC 2009

Boosting the phase at fc with OTAs

10m 100m 1 10 100 1k 10k 100kfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdb1

, vdb

out2

in d

b(vo

lts)

100

120

140

160

180

ph_v

1, p

h_vo

ut2

in d

egre

espl

ot1

54

5657

55

Gain

Phase

15 dB @ 10 Hz

Type 2 - OTA

Peak occurs at the geometric mean

1 100 10z pf f Hz= × =

74 Chris Basso – APEC 2009

Finally, we test the open-loop gain5. Given the necessary boost of 155°, we select a type-3 amplifier6. A SPICE simulation can give us the whole picture!

Vout

16

C51mF

R101m

11

Vin10

3

L1100u

5

Rupper10k

Rlower10k

6

1

X2AMPSIMP

V22.5

Verr

vout

7

rLf10m

GAIN

2

12

X1GAINK = 0.5

X3PWMVML = 100uFs = 100k

d

a c

PWM switch VM p

vout

8

R7R3

C3C3

13

R2R2

C1C1

C2C2

R111

LoL1kH

9

CoL1kF

VstimAC = 1

Type 3

Buck stage

1 pole at the origin2 zeros at 500 Hz2 poles at 50 kHz

Page 38: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

38

75 Chris Basso – APEC 2009

Finally, we test the open-loop gainAn ac simulation gives us the open-loop Bode plot

10 100 1k 10k 100kfrequency in hertz

-360

-180

0

180

360

p in

unk

now

n

-80.0

-40.0

0

40.0

80.0

vdbe

rr in

db(

volts

)pl

ot1

15

14

ϕm = 70°

fc = 4 kHz

GainT(s)

PhaseArg T(s)

76 Chris Basso – APEC 2009

What transient response?

1.00m 2.00m 3.00m 4.00m 5.00mtime in seconds

4.92

4.96

5.00

5.04

5.08

vout

#a, v

out,

vout

#b, v

out#

c in

vol

tsPl

ot1

20191718

fc = 4 kHz

1. Double zero 200 Hz, ϕm = 80°2. Double zero 500 Hz, ϕm = 70°3. Double zero 700 Hz, ϕm = 60°4. Double zero 800 Hz, ϕm = 50°

Almost unchanged

4

32

1

The crossover frequency is constant, but zeros position is changed

∆Iout = 2 A

Page 39: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

39

77 Chris Basso – APEC 2009

Zeros become poles??

compensator

converter

G(s) H(s)Vref(s) Vout(s)+

–k

compensator

converter

G(s) H(s)Vref(s) Vout(s)+

–k

T(s) is shaped by introducing zeros/poles in G(s)In closed-loop conditions, the zeros of G(s) become poles…

( ) ( ) ( )( ) 1 ( ) ( )

out

ref

V s kG s H sV s kG s H s

=+

( )( )( )

G

G

N sG sD s

= ( )( )( )

H

H

N sH sD s

=

( ) ( )( ) ( ) ( ) ( ) ( )

( ) ( )( ) ( ) ( ) ( ) ( )1( ) ( )

G H

out G H G H

G Href G H G H

G H

N s N skV s D s D s kN s N s

N s N sV s D s D s kN s N skD s D s

= =++

For k >> 1zeros of G(s) appearin denominator as poles

Pushing the zeros towards low frequency slows down the response!

78 Chris Basso – APEC 2009

If we roll-off the BW in the low frequencies?Could we avoid the resonance with a 10 Hz crossover point?

|H(s)| @ fc14 dB

Arg H(s) @ fc≈0°

Open-loop Bode plot of the power stage, H(s)

Phase

Gain

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

outin

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)Pl

ot1

1

We have almost no phase rotation at 10 Hz, a type 1 could do??

Page 40: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

40

79 Chris Basso – APEC 2009

If we roll-off the BW in the low frequencies?A simple SPICE ac simulation gives us the open-loop gain

An ac current source sweeps the output impedance

vout

16

C51m

R101m

11

Vin10

3

L1100u

5

Rupper10k

Rlower10k

6

X2AMPSIMP

V22.5

vout

7

rLf10m

GA

IN

2

8

X1GAINK = 0.5

vout

Vin

Verr

d

a c

PWM switch VM pX3PWMVML = 100uFs = 100k

C1C1

parameters

Vout=5VRupper=10kfc=10Gfc=14

G=10^(-Gfc/20)pi=3.14159

C1=1/(2*pi*fc*G*Rupper)fp0=1/(2*pi*C1*Rupper)

R111

LoL1kH

9

CoL1kF

VstimAC = 1

ac 1

-6 dBPWM gain

Vcp(t)

80 Chris Basso – APEC 2009

100m 1 10 101 1k 10kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

err

in d

egre

es

-40.0

-20.0

0

20.0

40.0

vdbe

rr in

db(

volts

)P

lot1

2930

The open-loop gain looks good…

|T(s)|

arg T(s)

The type 1 gives our 0 dB crossover frequency

ϕm = 90°

fc = 10 Hz

We have plenty of phase margin, a slow system, ok…

ϕm = 0°

f0

1

Rupper10k

Rlower10k

2

3

V22.5

vout

C18uF

-24 dB

Page 41: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

41

81 Chris Basso – APEC 2009

5.50m 16.5m 27.5m 38.5m 49.5mtime in seconds

4.00

4.40

4.80

5.20

5.60

v(7)

, vou

t in

volts

Plot

1

4748

Oh no, it is ringing!The load step reveals a ringing ac output

Vout(t)

∆Iout = 2 A

1/f0

Vcp(t)

Vcp(t) is first order

82 Chris Basso – APEC 2009

The RLC network rings alone…H1 is stable per Bode analysis, but H2 is out of the loop…

G(s)

Vout(s)

dcf < fc

acf >> fc

d(s)

Loose couplingin ac, no signaltransmission >> fc…

T(s)

Vin

“Fast Analytical Techniques for Electrical and Electronic Circuits”Vatché Vorpérian, Cambridge Press, 2002

The dc is fed back via the loop but not the ac…Oscillations are NOT due to the loop!

H1(s) H2(s)

Page 42: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

42

83 Chris Basso – APEC 2009

1 10 100 1k 10k 100k 1Megfrequency in hertz

-60.0

-40.0

-20.0

0

20.0

vdbo

ut2,

vdb

out#

a, v

dbou

t in

db(v

olts

)P

lot1

232425

There is no gain to compensate the peaking!No gain when the resonance occurs: the RLC network runs open loop

The system cannot reduce the Q at the resonant frequency

f0 of output filter

Zout,OL

Zout,CL Properly compensated, fc = 4 kHzZout,CL

Gain action

84 Chris Basso – APEC 2009

Open-loop Bode plot of the power stage, H(s)

Phase

Gain

10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

outin

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbo

utin

db(

volts

)P

lot1

1

The crossover must be above f0

fo = 450 Hz

> 3fo

There still must be gain at the resonance to damp the filterfc should be far from f0 to reduce phase stress at resonance

Place fc at least three times above resonance!

Page 43: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

43

85 Chris Basso – APEC 2009

CCM to DCM, the transfer function changes

-40.0

-20.0

0

20.0

40.0

vdbo

ut2#

a, v

dbou

t2 in

db(

volts

)Pl

ot1

811

1 10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

vpho

ut2,

ph_

vout

2 in

deg

rees

Plot

3

910

In DCM, the buck voltage-mode becomes a first order system

|H(s)|

arg H(s)

CCM

DCM

DCM

CCM

-2-1

86 Chris Basso – APEC 2009

-80.0

-40.0

0

40.0

80.0

vdbo

ut, v

dbou

t#a

in d

b(vo

lts)

Plo

t1

97

1 10 100 1k 10k 100k 1Megf i h t

-180

-90.0

0

90.0

180

ph_v

out,

ph_v

out#

a in

deg

rees

Plo

t2

108

CCM to DCM, the transfer function changesIn DCM, the compensated system becomes slower than in CCM

|T(s)|

arg T(s)

CCM

DCM

DCMCCM

fc

fc

ϕm45°

ϕm70°Potential

stabilityIssue.

Page 44: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

44

87 Chris Basso – APEC 2009

The DCM response is slower than in CCM

2.89m 8.68m 14.5m 20.3m 26.0mtime in seconds

4.990

4.994

4.998

5.002

5.006

vout

2#a,

vou

t2 in

vol

tsP

lot1

2425

A 100-Hz crossover in DCM versus a 4-kHz crossover in CCM

CCM

DCM

∆Iout = 100 mA

∆Vout = 10 mV

∆Vout = 3 mV

88 Chris Basso – APEC 2009

General methods for compensationFor a buck in CCM voltage-mode:

• Place a double zero at the LCout resonance• If the ESR zero fz is below fc, put a pole fp1=fz• If the ESR zero fz is above fc, put a pole fp1=Fsw/2• Put a second pole fp2 at fp2=Fsw/2

12

0 0

1( )( )

1

zout inc

err peak

sV s V KV s V s s

Q

ω

ω ω

⎛ ⎞+⎜ ⎟

⎝ ⎠=⎛ ⎞

+ + ⎜ ⎟⎝ ⎠

loadc

Lf load

RKr R

=+ 1

1z

Cfr Cω =

This zero is brought bythe output capacitor ESR

01

Cf

Lf

R rLC

R r

ω =++

1||Cf Lf loado

Lf load o

Q r r RZr R Z

=+

++

PWM gain

Type 3

Page 45: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

45

89 Chris Basso – APEC 2009

The buck in current-modeA CCM current-mode converter acts as a third order systemIt looks like a first order system at fc << Fsw/2No LC peaking anymore!But a subharmonic peaking at Fsw/2 now appears!

1 10 100 1k 10k 100k 1Megfreq enc in hert

-40.0

-20.0

0

20.0

40.0

vdbo

ut2

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

out2

in d

egre

esPl

ot1

32

Subharmonic peaking now!

Fsw/2

-1

-3

|H(s)|

Arg H(s)

90 Chris Basso – APEC 2009

CCM operation, current instabilitiesIL

tdTsw d’Tsw

Tsw

IL(0)

IL(Tsw)

S1S2

∆t

a b

∆IL(0) ∆ IL(Tsw) err

i

VR

∆ IL(Tsw)∆IL(0)

Ipeak

IL

tdTsw d’Tsw

Tsw

IL(0)

IL(Tsw)

S1S2

∆t

a b

∆IL(0) ∆ IL(Tsw) err

i

VR

∆ IL(Tsw)∆IL(0)

IL

tdTsw d’Tsw

Tsw

IL(0)

IL(Tsw)

S1S2

∆t

a b

∆IL(0) ∆ IL(Tsw) err

i

VR

∆ IL(Tsw)∆IL(0)

Ipeak

( ) (0)'

n

L sw LdI nT Id

⎛ ⎞∆ = ∆ −⎜ ⎟⎝ ⎠

1peakI a S t= + ∆

2peakb I S t= − ∆

1 2

peak peakI a I bS S− −

=

Solving∆t

1 2

( )(0) L swL I TIS S

∆∆=

2

1 'S dS d

=

Page 46: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

46

91 Chris Basso – APEC 2009

CCM operation, current instabilitiesclock

Ipeak

IL

Perturbation has gone…

IL(0)

∆IL(0)

t

clock

Ipeak

IL

Perturbation has gone…

IL(0)

∆IL(0)

t

IL(0)

clock

Ipeak

Duty clamp

IL

∆IL(0)

t

IL(0)

clock

Ipeak

Duty clamp

IL

∆IL(0)

t

clock

Ipeak

Duty clamp

IL

∆IL(0)

t

Duty-cycle < 50%

Duty-cycle > 50%

Asymptotically stable

Asymptotically unstable

( ) (0)'

n

L sw LdI nT Id

⎛ ⎞∆ = ∆ −⎜ ⎟⎝ ⎠

92 Chris Basso – APEC 2009

CCM operation, curing current instabilitiesIL

tdTsw d’Tsw

Tsw

IL(0)

IL(Tsw)

S1

S2

∆t

∆IL(0)

Sa

cb

IL(Tsw)

err

i

VR

IL

tdTsw d’Tsw

Tsw

IL(0)

IL(Tsw)

S1

S2

∆t

∆IL(0)

Sa

cb

IL(Tsw)

err

i

VR

( )2

2

1( ) (0) (0)'

na

nL sw L L

a

SSI nT I I aSd

d S

⎡ ⎤−⎢ ⎥⎢ ⎥∆ = ∆ − = ∆ −⎢ ⎥+⎢ ⎥⎣ ⎦

Must staybelow 1

2

2

11

0

a

a

SSSS

−<

+

250%aS S>Inject ramp compensation

Up tod = 100%

Page 47: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

47

93 Chris Basso – APEC 2009

A buck CCM in current-mode

Vout2

16

Cout1m

Resr1m

2 12

L1100u vout

3

R610m

5

9

RupperRupper

Rlower10k

14

V122.5

4

Verr

vout

C1C1

dc

X3AMPSIMPVHIGH = 3

7

parameters

Vout=5VRupper=10kfc=10Gfc=5.5

G=10^(-Gfc/20)pi=3.14159

C1=1/(2*pi*fc*G*Rupper)fp0=1/(2*pi*C1*Rupper)

X4GAINK = 0.3333

GAIN

LoL1kH

10

CoL1kF

V1AC = 1

Rload1

Vin10AC = 0

vc

a c

PWM switch CM p

duty-cycle

PWMCMX2L = 100uFs = 100kRi = 0.1Se = 2.5k

5.00V

5.00V

5.05V 5.05V

2.50V

2.50V

1.54V

0V

10.0V

505mV

512mV

1.54V RampCompensation Se

A SPICE model can predict subharmonic instabilities

94 Chris Basso – APEC 2009

Injecting ramp damps the double pole

1 10 100 1k 10k 100k 1Megf i h t

-120

-80.0

-40.0

0

40.0

vdbo

ut2#

4, v

dbou

t2#3

, vd

bout

2#2,

vdb

out2

#1,

vdbo

ut2

in d

b(vo

lts)

Plo

t1

13456

Too much ramp turns the converter into voltage-mode!

1 nc

e

SMS

= +

Mc=1Mc=1.5

Mc=2Mc=10

Mc=30

f0

( )( )

out

c

V sV s

Fsw/2

Voltage-moderesponse

Page 48: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

48

95 Chris Basso – APEC 2009

The right way to inject ramp compensationramp compensation

1

2

3

4 5

8

6

7

NCP1200

4

1

X1NCP1200

3

2

R118k

D11N4148

C11nF Rsense

RComp

R41k

1'compSR k

S M= ⋅

S = generated rampS’ = reflected sensed rampM = amount of ramp, 0.5-0.75

Lowimpedance

96 Chris Basso – APEC 2009

The open-loop impedance of a CM converterThe current-mode output impedance depends on the ramp level

1 10 100 1k 10k 100k 1Megfrequency in hertz

-45.0

-35.0

-25.0

-15.0

-5.00

vdbo

ut2,

vdb

out2

#c, v

dbou

t2#a

, vdb

out2

#b, v

dbou

t2#d

in d

b(vo

lts)

Plot

1

13109118

7Soff

30Soff

Soff

0

Voltage-modepeaking

( ) ||out load outZ s R C≈

1

ZoutCoutRload

Vout

dBΩ

f0

Page 49: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

49

97 Chris Basso – APEC 2009

The closed-loop output impedance of CM and VM

1 10 100 1k 10k 100k 1Megf i h t

-40.0

-20.0

0

20.0

40.0

vdbo

ut2,

vdb

out2

#a in

db(

volts

)P

lot1

53

Zout CM is naturally larger than Zout VM

Open-loop output impedances

≈ Cout

≈ rLf

≈ Rload

Current mode

Voltage mode

dBΩ

98 Chris Basso – APEC 2009

1 10 100 1k 10k 100k 1Megfrequency in hertz

-80.0

-40.0

0

40.0

80.0

vdbo

ut2#

a, v

dbou

t2 in

db(

volts

)P

lot1

14

17

The closed-loop output impedance of CM and VMIn closed-loop, Zout in VM is still smaller…

Closed-loop output impedances

Current mode

Voltage mode

fc

dBΩ

Page 50: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

50

99 Chris Basso – APEC 2009

-80.0

-40.0

0

40.0

80.0

vdbo

ut, v

dber

r in

db(

volts

)P

lot1

21

18

1 10 100 1k 10k 100k 1Megfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out,

ph_v

err

in d

egre

esP

lot2

22

24

The closed-loop output impedance of CM and VMThe dc gain in VM is smaller because of zeros

Open-loop gainsCurrent mode

Voltage modefc

|T(s)|

arg T(s)

Same shape inthe vicinity of fc

100 Chris Basso – APEC 2009

1.00m 3.00m 5.00m 7.00m 9.00mtime in seconds

4.92

4.96

5.00

5.04

5.08

vout

2, v

out2

#a in

vol

tsP

lot1

3129

With similar crossover frequency…The voltage mode is slightly slower than current-mode

Output response to a 2-A step

Current mode

Voltage mode

CCM operation

Page 51: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

51

101 Chris Basso – APEC 2009

-60.0

-30.0

0

30.0

60.0

vdbo

ut2#

a, v

dbou

t2 in

db(

volts

)Pl

ot1

1517

10 100 1k 10k 100k 1Megfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

out2

#a, p

h_vo

ut2

in d

egre

esPl

ot2

16

18

Transition from CCM to DCM in current-modeCurrent-mode remains a 1st order system in both cases

|H(s)|

arg H(s)

CCMDCM

DCM

CCM

-1

-1

102 Chris Basso – APEC 2009

-80.0

-40.0

0

40.0

80.0

vdbe

rr#a

, vd

berr

in d

b(vo

lts)

Plo

t1

1921

10 100 1k 10k 100k 1Megfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

err#

a, p

h_ve

rr in

deg

rees

Plo

t2

20

22

Transition from CCM to DCM in current-modeOnce compensated, fc still changes but ϕm is still ok

|T(s)|

arg T(s)

CCM

DCM

DCM

CCM

fc

fc

ϕm80°

ϕm60°

Page 52: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

52

103 Chris Basso – APEC 2009

The DCM response is not too much affected

500u 1.50m 2.50m 3.50m 4.50mtime in seconds

4.996

4.998

5.000

5.002

5.004

vout

2#b,

vou

t2 in

vol

tsP

lot1

2628

The step response is almost unchanged…

CCM

DCM

∆Iout = 100 mA

∆Vout = 4 mV

104 Chris Basso – APEC 2009

The k factor in an automated type 2Poles and zeros boost the phase at the crossover freq.How to place poles/zeros for a precise boost at fc?Use the k factor technique introduced by Dean Venable

( ) 0

0 0

0

1arg ( ) arg arctan arctan

1

c

z c cc

c z p

p

ff f fT f boost f f ff

⎛ ⎞+⎜ ⎟ ⎛ ⎞⎛ ⎞⎜ ⎟= = = − ⎜ ⎟⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎝ ⎠ ⎝ ⎠+⎜ ⎟

⎝ ⎠

From a 1 zero/ 1 pole compensation circuit, we have:

( ) 1arctan arctanboost kk

⎛ ⎞= − ⎜ ⎟⎝ ⎠

If we place one pole at kfc and one zero at fc/k, we have:

( ) 1arctan arctan 90xx

⎛ ⎞+ = °⎜ ⎟⎝ ⎠

tan 452

boostk ⎛ ⎞= +⎜ ⎟⎝ ⎠

Page 53: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

53

105 Chris Basso – APEC 2009

The k factor in an automated type 2Suppose we have the following specs:fc = 1 kHz, |H(1kHz)|= −10 dBArg H(1kHz) = -100°ϕm = 70°For a 80-° phase boost, select a type 2Calculate k

80tan 45 11.42

k ⎛ ⎞= + =⎜ ⎟⎝ ⎠

Place a zero at 1k/11.4 = 90 HzPlace a pole at 1k×11.4 = 11.4 kHzAdjust mid-gain to reach 10 dB@1 kHz

( )arg 90 70 100 90 80m cBOOST H fϕ= − − ° = °+ − = °

Type 2

106 Chris Basso – APEC 2009

The k factor in an automated type 2Calculate the elements for a type 2 amplifier

21 1 442

2 6.28 1 3.16 11.4 10c upper

C pFf GkR k kπ

= = =× × × ×

( ) ( )2 21 2 1 442 11.4 1 57C C k p nF= − = × − =

21

11.4 31.82 6.28 1 57c

kR kf C k nπ

= = = Ω× ×

10 202010 10 3.16cGf

G = = =

Type 2D. Venable, “The k-factor: a new mathematical tool for stability analysis and synthesis”, proceedings of Powercon 10, 1983, pp. 1-12

1 2

C1

Rupper10k

4 Vout

R2

C2

Rlower10k

Vout

6

Vref

Page 54: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

54

107 Chris Basso – APEC 2009

The k factor in an automated type 2

1 3

C1C1

4

R110k

2

E110k

V1AC = 1

Vout

R2R2

C2C2

parameters

Rupper=10kfc=1kpm=70Gfc=-10pfc=-100

G=10^(-Gfc/20)boost=pm-(pfc)-90pi=3.14159K=tan((boost/2+45)*pi/180)C2=1/(2*pi*fc*G*k*Rupper)C1=C2*(K^2-1)R2=k/(2*pi*fc*C1)

fp=1/(2*pi*R2*C2)fz=1/(2*pi*R2*C1)

Macros can be used to automate the calculation

*************************** DEFAULT PARAMETERS ***************************

***** mainckt

RUPPER = 1.000e+004FC = 1.000e+003PM = 7.000e+001GFC = -1.000e+001PFC = -1.000e+002G = 3.162e+000BOOST = 8.000e+001PI = 3.142e+000K = 1.143e+001C2 = 4.403e-010C1 = 5.709e-008R2 = 3.187e+004FP = 1.134e+004FZ = 8.749e+001Type 2

results

108 Chris Basso – APEC 2009

The k factor in an automated type 2

10 100 1k 10k 100kf i h t

-20.0

-10.0

0

10.0

20.0

vdbo

ut in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out i

n de

gree

sP

lot1

2

1

10 dB

80°

The numbers exactly match the predictions

|G(s)|

arg G(s)

Type 2

Page 55: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

55

109 Chris Basso – APEC 2009

The k factor in an automated type 2

-20.0

-10.0

0

10.0

20.0

135791113151719

10 100 1k 10k 100kfrequency in hertz

-90.0

0

90.0

180

270

2468101214161820

gain

phase

k = 1k = 2

k = 10

k = 10

k = 1

Boost = 90°

-20.0

-10.0

0

10.0

20.0

135791113151719

10 100 1k 10k 100kfrequency in hertz

-90.0

0

90.0

180

270

2468101214161820

gain

phase

k = 1k = 2

k = 10

k = 10

k = 1

Boost = 90°

Adjusting k modulates the resulting phase boost

Type 2

110 Chris Basso – APEC 2009

The k factor in an automated type 32 poles and 2 zeros give a higher boost at crossoverThese 2 poles and 2 zeros are coincidentHow to place them for a precise boost at fc?

( )

2

02

0 0

0

1arg ( ) arg 2arctan 2arctan

1

c

z c cc

z pc

p

ff f fT f boost

f fff

⎛ ⎞⎛ ⎞⎜ ⎟+⎜ ⎟⎜ ⎟ ⎛ ⎞⎛ ⎞⎝ ⎠= = = − ⎜ ⎟⎜ ⎟ ⎜ ⎟ ⎜ ⎟⎛ ⎞ ⎝ ⎠⎜ ⎟ ⎝ ⎠+⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟⎝ ⎠⎝ ⎠

From a 1 zero pair/ 1 pole pair compensation circuit, we have:

If we place two poles at and two zeros at ,we have:ck f cf k

( ) 12 arctan arctanboost kk

⎡ ⎤⎛ ⎞= −⎢ ⎥⎜ ⎟

⎝ ⎠⎣ ⎦

( ) ( ) ( )2 arctan arctan 90 4arctan 180boost k k k⎡ ⎤= + − = −⎣ ⎦

2

tan 454

boostk ⎡ ⎤⎛ ⎞= +⎜ ⎟⎢ ⎥⎝ ⎠⎣ ⎦

Page 56: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

56

111 Chris Basso – APEC 2009

The k factor in an automated type 3Suppose we have the following specs:fc = 1 kHz, |H(1kHz)|= −15 dBArg H(1kHz) = -140°ϕm = 70°For a 120-° phase boost, select a type 3Calculate k

Place a zero at 1k/3.7 = 268 HzPlace a pole at 1k×3.7 = 3.7 kHzAdjust mid-gain to reach 15 dB@1 kHz

( )arg 90 70 140 90 120m cBOOST H fϕ= − − ° = °+ − = °

Type 3

2120tan 45 13.9

4k ⎡ ⎤⎛ ⎞= + =⎜ ⎟⎢ ⎥⎝ ⎠⎣ ⎦

112 Chris Basso – APEC 2009

The k factor in an automated type 3Calculate the elements for a type 3 amplifier

15 202010 10 5.6cGf

G = = =Type 3

21

1 1 2.852 6.28 1 5.6 10c

C nFf GR k kπ

= = =× × ×

( ) ( )1 2 1 2.85 13.9 1 36.7C C k n nF= − = × − =

21

13.9 16.22 6.28 1 36.7c

kR kf C k nπ

= = = Ω× ×

13

10 7751 13.9 1

R kRk

= = = Ω− −

33

1 1 552 6.28 1 13.9 775c

C nFf k R kπ

= = =× × ×

1 2

C1

Rupper10k

4 Vout

R2

C2

Rlower10k

Vout

5

C3

R3

6

Vref

Page 57: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

57

113 Chris Basso – APEC 2009

The k factor in an automated type 3Macros can be used to automate the calculation

1 3

C1C1

4R1Rupper

2

E110k

V1AC = 1

Vout

R2R2

C2C2

5

C3C3

R3R3

parametersRupper=10kfc=1kpm=70Gfc=-15ps=-140

G=10^(-Gfc/20)boost=pm-(ps)-90pi=3.14159K=(tan((boost/4+45)*pi/180))^2C2=1/(2*pi*fc*G*Rupper)C1=C2*(K-1)R2=sqrt(k)/(2*pi*fc*C1)R3=Rupper/(k-1)C3=1/(2*pi*fc*sqrt(k)*R3)

fp1=1/(2*pi*R2*C2)fp2=1/(2*pi*R3*C3)fz1=1/(2*pi*R2*C1)fz2=1/(2*pi*Rupper*C3)

*************************** DEFAULT PARAMETERS ***************************

***** mainckt

RUPPER = 1.000e+004FC = 1.000e+003PM = 7.000e+001GFC = -1.500e+001PS = -1.400e+002G = 5.623e+000BOOST = 1.200e+002PI = 3.142e+000K = 1.393e+001C2 = 2.830e-009C1 = 3.659e-008R2 = 1.623e+004R3 = 7.735e+002C3 = 5.513e-008FP1 = 3.464e+003FP2 = 3.732e+003FZ1 = 2.680e+002FZ2 = 2.887e+002

results

114 Chris Basso – APEC 2009

10 100 1k 10k 100kf i h t

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out i

n de

gree

sPl

ot1

2

1

The k factor in an automated type 3

15 dB

120°

The numbers exactly match the predictions

|G(s)|

arg G(s)

Type 3

Page 58: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

58

115 Chris Basso – APEC 2009

The k factor in an automated type 3

-20.0

-10.0

0

10.0

20.0

135791113151719

412

10 100 1k 10k 100kfrequency in hertz

-90.0

0

90.0

180

270

1816141210862481620

gain

phase

k = 1k = 2

k = 20

k = 20

k = 1

k = 15

Boost = 125°

-20.0

-10.0

0

10.0

20.0

135791113151719

412

10 100 1k 10k 100kfrequency in hertz

-90.0

0

90.0

180

270

1816141210862481620

gain

phase

k = 1k = 2

k = 20

k = 20

k = 1

k = 15

Boost = 125°

Adjusting k modulates the resulting phase boost

Type 3

116 Chris Basso – APEC 2009

Is the k factor the panacea?The tool is a quick and easy means to stabilize the converterHowever, it solely focuses on the crossover frequencyWhat is happening before and beyond fc?The k factor technique is blind to these effects.In resonant systems, conditional stability can occur.

10 100 1k 10k 100kf i h t

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)

-360

-180

0

180

360

ph_v

err

in d

egre

espl

ot1

8

7

|T(s)|

arg T(s)

Isolated Ćuk converter

Page 59: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

59

117 Chris Basso – APEC 2009

The k factor can lead to conditional stabilityIn CCM voltage-mode, conditional stability occurs

-40.0

-20.0

0

20.0

40.0

vdbo

ut2

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

out2

in d

egre

esP

lot2

12

11

1 10 100 1k 10k 100kfrequency in hertz

-80.0

-40.0

0

40.0

80.0

vdbe

rr in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

err

in d

egre

esP

lot1

10

9

|H(s)|

arg H(s)

|T(s)|

arg T(s)

fc

Conditional stability

ϕm85°

fp1,2= 40 kHz

fz1,2= 2.3 kHz

f0=1.2 kHz

k factorgives

118 Chris Basso – APEC 2009

Manual pole/zero placement is a solutionAvoid coincident poles and zeros brought by k factorPlace them wherever you wish to shape G(s)

( )1 3 2 12

3 2 2

3 3

1 11 1( )

1 1 1

sR C sR CRG sR sR C

sR C

⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠≈+ ⎛ ⎞

+⎜ ⎟⎝ ⎠ 1 2

C1

Rupper10k

4 Vout

R2

C2

Rlower10k

Vout

5

C3

R3

6

Vref

Type 3

1 2

2

23

1

1 1( )

11

z z

p

p

s sR s sG f

sR sss

⎛ ⎞ ⎛ ⎞+ +⎜ ⎟ ⎜ ⎟⎝ ⎠ ⎝ ⎠≈⎛ ⎞ ⎛ ⎞

++⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎝ ⎠⎝ ⎠

( )( )( )( )

2 2 2 21 2 3

2 2 2 2 211 2

p c p c c

pz c z c

f f f f Gf RRff f f f

+ +=

+ +

22 1

12zf

R Cπ=

12 2

12pf

R Cπ=

23 3

12pf

R Cπ=

11 3

12zf

R Cπ=

Page 60: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

60

119 Chris Basso – APEC 2009

Manual pole/zero placement is a solution

Automated calculations help iterations!

Vout2

16

Cout220u

Resr70m

2 12

L175u

14

RupperRupper

RlowerRlower

9

4

X2AMPSIMP

V22.5

Verr

vout

vout

d

a c

PWM switch VM p

3

5

X1PWMVM2L = 75uFs = 100k

R6100m

13

R3R3

C3C3

15

R2R2

C1C1

C2C2

GAI

N

6

XPWMGAINK = 0.5

parameters

Rupper=10kRlower=Rupper

fc=10kGfc=-20

G=10^(-Gfc/20)pi=3.14159

fz1=1kfz2=1kfp1=26kfp2=26k

C3=1/(2*pi*fz1*Rupper)R3 =1/(2*pi*fp2*C3)

C1=1/(2*pi*fz2*R2)C2=1/(2*pi*(fp1)*R2)

a=fc^4+fc^2*fz1^2+fc^2*fz2^2+fz1^2*fz2^2c=fp2^2*fp1^2+fc^2*fp2^2+fc^2*fp1^2+fc^4

R2=sqrt(c/a)*G*fc*R3/fp1

fz1x=1/(2*pi*C1*R2)fz2x=1/(2*pi*C3*(Rupper+R3))fp1x=1/(2*pi*(C1*C2/(C1+C2))*R2)fp2x=1/(2*pi*C3*R3)

LoL1kH

7

CoL1kF

V1AC = 1

Rload2.5

Vin10AC = 0

120 Chris Basso – APEC 2009

Manual pole/zero placement is a solutionConditional stability is goneFine tuning is now possible

-40.0

-20.0

0

20.0

40.0

vdbo

ut2

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

out2

in d

egre

esP

lot2

12

11

1 10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

err

in d

egre

es

-80.0

-40.0

0

40.0

80.0

vdbe

rr#a

in d

b(vo

lts)

Plo

t1

13

14

|H(s)|

arg H(s)

|T(s)|

arg T(s)

fc

ϕm90°

f0=1.2 kHz

fp1,2= 26 kHz

fz1,2= 1 kHzzeros

Page 61: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

61

121 Chris Basso – APEC 2009

The zeros position affects the responseTransient response changes as one zero position moves

300u 900u 1.50m 2.10m 2.70mti i d

4.93

4.95

4.97

4.99

5.01

vout

2#2,

vou

t2#1

, vou

t2 in

vol

tspl

ot1

234

fz2 = 1 kHz

fz1 = 3 kHzϕm = 75°

fz1 = 1 kHzϕm = 85°

fz1 = 0.3 kHzϕm = 90°

122 Chris Basso – APEC 2009

The zeros position affects the response

faster

fasterfz2

slower

fz1

Phase margin

Settling timeOvershootFrequency

Splitting the zeros can fix DCM stability issue in buck VM

Page 62: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

62

123 Chris Basso – APEC 2009

1 10 100 1k 10k 100kfrequency in hertz

-180

-90.0

0

90.0

180

ph_v

err#

4, p

h_ve

rr in

deg

rees

-40.0

-20.0

0

20.0

40.0

vdbe

rr#4

, vd

berr

in d

b(vo

lts)

Plo

t1

1013

11

12

By decreasing fz1, DCM stability is improved

|T(s)|

arg T(s)

CCM

DCM

DCM

CCM

fc

fc

ϕm80°

ϕm90°

Conditional stability is gone in DCMCrossover frequency is improved in DCM

CCM/DCM voltage mode buck

124 Chris Basso – APEC 2009

Improving DCM stability slows down the buckfz1 moving low, it hampers the response time…

236u 707u 1.18m 1.65m 2.12mti i d

4.93

4.95

4.97

4.99

5.01

vout

2, v

out2

#a in

vol

tsP

lot1

21

Poles / zeros compensationfz1 = 300 Hz, fz2 = 1 kHzfp1,fp2 = 26 kHz

k factor compensationfz1, fz2 = 2.2 kHzfp1,fp2 = 40 kHz

Page 63: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

63

125 Chris Basso – APEC 2009

Type 2 and 3 with a TL431Litterature examples use op amps to close the loop.Reality differs as the TL431 is widely implemented.How to adapt type 2 and 3 to a TL431 circuit?Question: who hides behind the TL431 anyway?

2.5V

K

A

R

TL431A

K

A

R

RAK

A shunt regulator!

126 Chris Basso – APEC 2009

Feedback with a TL431

X1TL431A

RLED

Czero

Rupper

Rlower

L12.2u

D2MBR20100CT

C21mF

C3100uF

Rbias

Vout

fastlane

slowlane

FBRpullup

Vdd

FB signal

Gnd

FB

Rpulldown

FB signal

Gnd

Vcc

solution A

solution B

A TL431 implements a two-loop configuration

Page 64: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

64

127 Chris Basso – APEC 2009

Feedback with a TL431

Rpullup

CTR x I1Vdd

FB

Vz

Rdz

Vfz

RdLED

RLED

Vout

I1

zener

LED

Ic

When Czero is a short circuit, the slow lane is offThe TL431 turns into a static Zener diode

1( ) CTRFB pullupV s R I= − ⋅ ⋅

1( )out

LED

V sIR

=

( ) CTR( )

pullupFB

out LED

RV sV s R

= −

RLED

Vout

Rpullup

Vdd

I1Ic

FB

Vz

128 Chris Basso – APEC 2009

The TL431 and its equivalent schematic

GAIN SUM2

K1

K2

K1 = 1K2 = -1

FB

Czero

Rupper

Rlower

Vout

CTR*Rpullup/RLED

The fast lane presence adds a zero in the equation

1( ) ( ) ( ) CTRpullupFB out out

upper zero LED

RV s V s V s

sR C R⎛ ⎞

= +⎜ ⎟⎜ ⎟⎝ ⎠

1( ) 1 1 CTR CTR( )

pullup upper zero pullupFB

out upper zero LED upper zero LED

R sR C RV sV s sR C R sR C R

⎛ ⎞ ⎛ ⎞+= − + = −⎜ ⎟ ⎜ ⎟⎜ ⎟ ⎜ ⎟

⎝ ⎠ ⎝ ⎠

No high frequency pole?

Type 2

Page 65: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

65

129 Chris Basso – APEC 2009

Adding a pole for a type 2 circuitThe pole is a simple capacitor on the collector

Rpullup

Vdd FB

CpoleRpulldown

VddFB

Cpole

1( ) 1( ) CTR( ) 1

upper zero pullupFB

out upper zero pullup pole LED

sR C RV sG sV s sR C sR C R

⎛ ⎞⎛ ⎞+= = −⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟+⎝ ⎠⎝ ⎠

12po

upper zero

fR Cπ

= 12z

upper zero

fR Cπ

=1

2ppullup pole

fR Cπ

=CTRpullup

LED

RG

R=

Mid-band gain High frequency poleLow frequency zeroPole at the origin Type 2

Or on theemitter

Watch theopto parasitic

capacitor!

130 Chris Basso – APEC 2009

The type 2 final implementationThe LED resistor fixes the mid-band gain

3

Rupper

Rlower

2

X1TL431

1

RLED

Czero

Vout

U2B

U2A

Cpole

Rpullup

Vdd

Page 66: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

66

131 Chris Basso – APEC 2009

Comparing a type 2 op amp with a TL431

10 100 1k 10k 100kfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdbt

l431

, vdb

oute

q, v

dbop

amp

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

opam

p, p

h_vo

uteq

, ph_

vtl4

31 in

deg

rees

plot

1

123

4561 kHz crossoverGain = 20 dB

Phaseboost

gain

phase

10 100 1k 10k 100kfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdbt

l431

, vdb

oute

q, v

dbop

amp

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

opam

p, p

h_vo

uteq

, ph_

vtl4

31 in

deg

rees

plot

1

123

4561 kHz crossoverGain = 20 dB

Phaseboost

gain

phase

The ac plot shows no significant differences

Type 2

132 Chris Basso – APEC 2009

The TL431 type 2 is not a panacea!Because RLED must also ensures sufficient bias current:There is an upper resistor limitThe minimum mid-band gain you can obtain is clamped!Worst case is low Vout, e.g. 5 V

C2 C1

Rpullup R1

Rlower

RLED

Rbias

Vin

Vout

U1

U2

VDD

C2 C1

Rpullup R1

Rlower

RLED

Rbias

Vin

Vout

U1

U2

VDD

431,min,max min

,

,max

CTR

5 1 2.5 0.3 20 1.95 0.3

out f TLLED pullup

dd CE sat

LED

V V VR R

V V

R k k

− −≤

− −≤ × × ≤ Ω

0 min,max

,0

431,min

CTR

3.13 or 10

pullup

LED

dd CE sat

out f TL

RG

RV V

G dBV V V

−≥ ≥ ≈

− −

Cannot gobelow this!

2.5 V min

CzeroCpole

Page 67: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

67

133 Chris Basso – APEC 2009

A type 3 is also possibleThe type 3 is less flexible given the RLED role

3

Rupper

Rlower

2

U1TL431

1

RLED

Czero

Vout

6

U2B

U2A

Cpole

Rpullup

Vdd5

Rpz

Cpz

Type 3

134 Chris Basso – APEC 2009

If argH(s) @ fc is less than 45°…We can use a true type 1 without gain limitsNo phase boost!

,max5 1 2.5 0.3 20 1.9

5 0.3LEDR k k− −≤ × × ≤ Ω

20% margin,max 0.8 1.9 1.5LEDR k k= × Ω = Ω

1 1( )1

CTR

upper zero

upper LED pullup polezero

pullup

sR CG s R R sR Cs C

R

⎛ ⎞⎜ ⎟⎛ ⎞+⎜ ⎟= − ⎜ ⎟⎜ ⎟⎜ ⎟ +⎝ ⎠⎜ ⎟⎝ ⎠

coincident

po cf f G=

Origin pole1

CTR

poupper LED

zeropullup

R Rs C

R

ω =

CTR2pole

po LED

Cf Rπ

= pullupzero pole

upper

RC C

R=

Page 68: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

68

135 Chris Basso – APEC 2009

The type 3 with a TL431

( )( )

1

1 2

11( ) 1( ) CTR( ) 1 1

pz LED pzupper zero pullupFB

out upper zero pullup pole LEDpz pz

sC R RsR C RV sG sV s sR C sR C RsR C

⎡ ⎤+ +⎛ ⎞⎛ ⎞+ ⎣ ⎦= = −⎜ ⎟⎜ ⎟⎜ ⎟⎜ ⎟+ +⎝ ⎠⎝ ⎠

11

12z

upper zero

fR Cπ

= 11

2ppz pz

fR Cπ

=1

12po

upper zero

fR Cπ

=

( )21

2zLED pz pz

fR R Cπ

=+ 2

2

12p

pullup pole

fR Cπ

=CTRpullup

LED

RG

R=

Pole at the origin Two zeros Two polesMid-band gain

RLED affects the gain and the zero position

Type 3

136 Chris Basso – APEC 2009

The problem is the fast lane…The difference with the TL431 comes from the fast laneCan we get rid of it?

X1TL431A

RLED

Czero

Rupper

Rlower

L12.2u

D2MBR20100CT

C21mF

C3100uF

Rbias

Vout

slowlane

DzRbiasZ

X1TL431A

RLED

Czero

Rupper

Rlower

L12.2u

D2MBR20100CT

C21mF

C3100uF

Rbias

Vout

slowlane

Q22N3904

R51k

BAS16D3

C4100nF

C5100nF

D16.8 V

6 V

Rather costly solutions…

Page 69: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

69

137 Chris Basso – APEC 2009

Watch for the TL431 bias!A TL431 requires 1 mA minimum to operate within specsA TLV431, 100 µA only…

1414.214.414.614.8

1515.215.415.615.8

16

0 1 2 3 4 5 6Iout (A)

Vout

(V)

with bias

without bias

Changes in Zout implies a change in T(0)

138 Chris Basso – APEC 2009

How to provide more bias?Connect a resistor to Vout

Use the LED to form a constant current source

X1TL431A

RLED

Czero

Rupper

Rlower

L12.2u

D2MBR20100CT

C21mF

C3100uF

Rbias

Vout

IbILIbias

X1TL431A

RLED

Czero

Rupper

Rlower

L12.2u

C3100uF

Vout

R11kVf

1VR51k

IL 1 mA

IL + 1 mA

Vf LED ≈ 1 V

R1 on the right picture steals current away from the LEDSolution a Solution b

Page 70: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

70

139 Chris Basso – APEC 2009

The optocoupler is the traitor here!You need galvanic isolation between the prim. and the sec.An optocoupler transmits light only, no electrical link

Luigi Galvani, 1737-1798Italian physician and physicist

c

e k

aIc IF

Detector LED500 µm

Siliconedome

Clearance

Detector

LED Creepage path

CTR 100c

F

II

= ×

Current Transfer Ratio

140 Chris Basso – APEC 2009

The internal pole should be knownThe photons are collected by a collector-base area.This area offers a large parasitic capacitance.

Rpullup

Vdd

RLED

CTR C

Vdd

Rpullup RLED

Vout

VFB

( )( )

CTR 11

pullupFB

out LED pullup

RV sV s R sR C

= −+

If fp is above 5 times fc, its effect is negligibleIf fp is close to fc, phase margin degradation

Page 71: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

71

141 Chris Basso – APEC 2009

Assess the CTR variationsCTR changes with the operating current!Try to select collector bias currents around 2-5 mA

CTR between 0.63 and 1.25Normalized to 1 (0 dB)

0.63 gives –4 dB1.25 gives +2 dB

fc Watch out forcrossover frequency

changes and phase marginat CTR extremes!

SFH-615

142 Chris Basso – APEC 2009

Selecting the right optocouplerHigh temperature shortens the optocoupler lifetimeLow LED currents:expand lifetime

o CTR dispersion increasesLow CTR optocouplers have low internal capacitance Higher drive currents improve speed but:

o Shorten lifetimeo Degrade standby power

Understand the optocoupler impact on your design!

Page 72: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

72

143 Chris Basso – APEC 2009

Find the pole position on your optocouplerOnce your optocoupler is selected, characterize it:

2

1

Rpullup20k

Vdd5

3

X1SFH615A-4

4

Vbias

RbiasVFB

6

Vac

5

Cdc10uFIc

Rled20k

IF

Adjust Vbias to VFB = 2.5 V (or Vdd/2) then ac sweepObserve VFB with a scope or a network analyzer

Vin

144 Chris Basso – APEC 2009

Select the bias point as in your circuit

Pole at 10 kHz

Identify the pole position. Here it is located at 10 kHz

Vce = 1 V

Vce = 2.5 V

SFH615A-2Rpullup = 4.7 kΩ

Page 73: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

73

145 Chris Basso – APEC 2009

Changing the pullup affects the pole positionA low pullup resistor offers better bandwidth!

Rpullup = 1 kΩ Rpullup = 4.7 kΩ

Rpullup = 15 kΩ

30 kHz 10 kHz

4 kHz

Changing the bias point affects the CTR

( )( )

CTRpullupFB

out LED

RV sV s R

= −CTR

If Rpullup = RLED, then |G0| = 0 dB…?

SFH615A-2

146 Chris Basso – APEC 2009

To push the pole farther, use a cascodeThe cascode fixes the optocoupler collector potentialIt neutralizes the Miller capacitance of the optocoupler

-3 dB

fp = 4.5 kHz

fp = 23 kHz

With cascode

SFH615A-2

3

R320k

6

1

Q12N3904

Vdd

R520k

R620k

FB

Page 74: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

74

147 Chris Basso – APEC 2009

A simple optocoupler model

2

VILED

DLEDN = 1.8

A

KE

C

4

D2BV = 30N = 0.01

Vsat100m

F2CTRControlling Vsource = VILED

CpoleCpole

12pole

pullup opto

CR fπ

=

Read the pole position and the CTR valueAdjust the internal capacitor value to fix the pole

148 Chris Basso – APEC 2009

With the TL431, the situation is differentIn the TL431 application, the pole is inherently present

FBc

e

Rpullup

C

Vdd

VFB(s)

Vout(s)

optocoupler

Cpole

||p poleC C C=

Page 75: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

75

149 Chris Basso – APEC 2009

With the TL431, the situation is differentFirst case: the optocoupler pole is beyond G(s) poleCalculate Cp to combine with Cpole

fz fp

fopto

f

|G(s)| 12pole

opto pullup

Cf Rπ

=

From G(s) calculations C Cp = C - Cpole

fcFB

Rpullup

150 Chris Basso – APEC 2009

fz fp

fopto

f

|G(s)|

fc

fz fp

fopto

f

|G(s)|

fc

With the TL431, the situation is differentSecond case: the optocoupler pole is below G(s) poleThe optocoupler sets G(s) pole!

Reduce fc

Extract:|H(fc) |

Arg H(fc)

Calculatefzfp

fopto- fp > 100 Hz? CalculateCp

Page 76: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

76

151 Chris Basso – APEC 2009

Design example: a DCM flyback converterWe want to stabilize a 20-W DCM adapterVin = 85 to 265 V rms, Vout = 12 V/1.7 AFsw = 65 kHz, Rpullup = 20 kΩOptocoupler is SFH-615A, pole is at 6 kHzCross over target is 1 kHzSelected controller: NCP1216

1. Obtain a power stage open-loop Bode plot, H(s)2. Look for gain and phase values at cross over3. Compensate gain and build phase at cross over, G(s)4. Run a loop gain analysis to check for margins, T(s)5. Test transient responses in various conditions

152 Chris Basso – APEC 2009

Stabilizing a DCM flyback converterCapture a SPICE schematic with an averaged model

1

C53mF

R1020m

2Vin90AC = 0

3 4

X2xXFMRRATIO = -166m vout

vout

6DC

8

13

L1Lp

D1Ambr20200ctp

B1Voltage

V(errP)/3 > 1 ?1 : V(errP)/3

Rload7.2

vcac

PWM

sw

itch

CM

p

duty

-cyc

le

X9PWMCML = LpFs = 65kRi = 0.7Se = Se

12.0V

12.0V90.0V

-76.1V 12.6V

389mV

0V

839mV

Look for the bias points values: Vout = 12 V, ok

Coming from FB

Page 77: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

77

153 Chris Basso – APEC 2009

10 100 1k 10k 100kf i h t

-180

-90.0

0

90.0

180

ph_v

out i

n de

gree

s

-40.0

-20.0

0

20.0

40.0

vdbo

ut in

db(

volts

)P

lot1

2

4

Stabilizing a DCM flyback converter

Magnitude at 1 kHz-23 dB

Phase at 1 kHz-70 °

|H(s)|

argH(s)

154 Chris Basso – APEC 2009

Stabilizing a DCM flyback converterApply k factor or other method, get fz and fp

fz = 3.5 kHz fp = 4.5 kHz

1.3poleC nF=

3.8pC nF=

3.8 1.3 2.5C n n nF= − ≈

2.5nF

20 kΩ

k factorgave

install

FB

Vdd

VFB(s)

Vout(s)

38kΩ

10kΩ

2kΩ

10nF

Page 78: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

78

155 Chris Basso – APEC 2009

10 100 1k 10k 100k

-80.0

-40.0

0

40.0

80.0

vdbe

rr#1

in d

b(vo

lts)

-180

-90.0

0

90.0

180

ph_v

err

in d

egre

esP

lot1 2

3

Stabilizing a DCM flyback converter4

|T(s)|

argT(s)

Cross over1 kHz

PM at 1 kHz = 60°

156 Chris Basso – APEC 2009

Stabilizing a DCM flyback converterSweep ESR values and check margins again

3.00m 9.00m 15.0m 21.0m 27.0m

11.88

11.92

11.96

12.00

12.04

46

Lowline

Hiline

100mV

200 mA to 2 A in 1 A/µs

Vout(t)

Page 79: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

79

157 Chris Basso – APEC 2009

The need for an input filterThe dc-dc converter is supplied from a dc sourceA capacitor locally decouples the line. In theory:The capacitor supplies the ac currentThe source only sees a dc current

Idc

Iac

Idc + Iac

In reality, the capacitor is not perfect (limited cap., ESR and ESL)Some ac current manages to enter the sourceSource pollution, adjacent converters disturbance, radiated noise

Iac

158 Chris Basso – APEC 2009

The need for an input filter

Vin

L rLf

C Rload VoutSwitchModeConverter

A front-end filter has to be installedThe ac current will only flow in C as L opposes its circulationThe remaining ac current in the source must pass the specs!

Iin

Iout

Page 80: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

80

159 Chris Basso – APEC 2009

The need for an input filterOur dc-dc ensures Pout is constant regardless of VinIf Vin increases, Iin reduces to keep Vin

.Iin constantIf Vin decreases, Iin increases to keep Vin

.Iin constant

inin

in

VRI

= inin

in

PVI

= 2in load outP R I=

22in load out out

loadin in in in

dV R I Id RdI dI I I

⎛ ⎞= = − ⎜ ⎟

⎝ ⎠

Neg. sign!

4

BpowerCurrent60/(V(4)+1u)

V1100

.TF V(4) V1 ; transfer function analysis***** SMALL SIGNAL DC TRANSFER FUNCTION output_impedance_at_V(4) 0.000000e+000v1#Input_impedance -1.66667e+002Transfer_function 1.000000e+000

P = 60 WNeg. sign!

SPICE simulationconstant power sink

η = 100%

160 Chris Basso – APEC 2009

The need for an input filter

If these losses are compensated, the damping factor is zero

( ) 2

20 0

1

1T s

s sQω ω

=+ +

12

= If ohmic losses are gone, the damping factor is zero.

In a lossy RLC filter, the damping factor is:

( )( )

2 3 1 3 2 10

1 32L C R R R R R R

R Rζ ω

+ + +=

+ ( )1 2

31 2

R R C LRC R R

+= −

+= 0

Ohmic paths in the RLC filter are losses that damp the network

R3

R1 R2

L

C

Page 81: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

81

161 Chris Basso – APEC 2009

A tunnel-based oscillator?Loading an RLC filter with a negative impedance:You build a negative resistance oscillator!

( ) ( )1 2

31 2

100 500 1 100 1661 600

R R C L m m u uRC R R u m

+ × × += − = − = − Ω

+ ×

-600

-200

200

600

1.00k

-100

0

100

200

300

500u 1.50m 2.50m 3.50m 4.50m

20.0

60.0

100

140

180

R3 = – 150 Ω

R3 = – 166 Ω

R3 = – 175 Ω

-600

-200

200

600

1.00k

-100

0

100

200

300

500u 1.50m 2.50m 3.50m 4.50m

20.0

60.0

100

140

180

R3 = – 150 Ω

R3 = – 166 Ω

R3 = – 175 Ω

Diverging oscillationsζ < 0

Steady-state oscillationsζ = 0

Damped oscillationsζ > 0

162 Chris Basso – APEC 2009

Watch the output/input impedancesA possibility to look for oscillations is to ac sweep Zout of RLC

220 1

max1 0

1outZ RZR Z

⎛ ⎞= + ⎜ ⎟

⎝ ⎠

out inZ Z<<

To be safe

-50.0

-20.0

10.0

40.0

70.0

vdbo

ut#a

in d

b(vo

lts)

Plot

1

10m 100m 1 10 100 1k 10k 100k 1Meg 10Megfrequency in hertz

-50.0

-20.0

10.0

40.0

70.0

vdbo

utin

db(

volts

)Pl

ot2

R2 = 0ZoutFILTER max = 60 dBΩ

R2 = 500 mΩZ outFILTER max = 44.4 dBΩ

dBΩ

dBΩ

ζ < 0

= 0

10m 100m 1 10 100 1k 10k 100k 1Meg 10Megfrequency in hertz

-50.0

-20.0

10.0

40.0

70.0

vdbo

utin

db(

volts

)Pl

ot2

R2 = 0ZoutFILTER max = 60 dBΩ

R2 = 500 mΩZ outFILTER max = 44.4 dBΩ

dB

dB

< 0

ζ= 0

Rin = 166 Ω = 44.4 dBΩ

Rin = 166 Ω = 44.4 dBΩ

Page 82: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

82

163 Chris Basso – APEC 2009

The filter effect also appears on the Bode plotThe filter peaking brings instabilities…

10 100 1k 10k 100kfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdbo

ut2,

vdb

out2

#1 in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out2

#1, p

h_vo

ut2

in d

egre

esP

lot1

2

3

41

phase

gainWith filter

With filter

Without filter

Without filter

10 100 1k 10k 100kfrequency in hertz

-40.0

-20.0

0

20.0

40.0

vdbo

ut2,

vdb

out2

#1 in

db(

volts

)

-180

-90.0

0

90.0

180

ph_v

out2

#1, p

h_vo

ut2

in d

egre

esP

lot1

2

3

41

phase

gainWith filter

With filter

Without filter

Without filter

|T(s)|

argT(s)

Damp that RLC filter!

164 Chris Basso – APEC 2009

How to damp the RLC networkDamping can be obtained through different arrangements:a resistor in parallel with C1a resistor in parallel with L1Numerous other possible combinations!

1

V1AC = 1

2

R10.1

4

L1100u

3

C11u

Vout

R20.5

Vin

B1Current60/(V(4)+1)

5

Rdamp

Cdamp1

V1AC = 1

2

R10.1

4

L1100u

3

C11u

Vout

R20.5

Vin

B1Current60/(V(4)+1)

5

Rdamp

Cdamp

dc-block

Page 83: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

83

165 Chris Basso – APEC 2009

Buck, a design exampleThe damping resistor is calculated to 9.5 Ω in this exampleThe dc-block capacitor is swept from 2 to 10 times C1

1 10 100 1k 10k 100kfrequency in hertz

20.0

4.00

12.0

28.0

44.0

12345

dBΩ

ZoutFILTER

Cdamp = 0

Cdamp = 2 µFCdamp = 4 µF

Cdamp = 6 µFCdamp = 8 µF

1 10 100 1k 10k 100kfrequency in hertz

20.0

4.00

12.0

28.0

44.0

12345

dBΩ

ZoutFILTER

Cdamp = 0

Cdamp = 2 µFCdamp = 4 µF

Cdamp = 6 µFCdamp = 8 µF

166 Chris Basso – APEC 2009

Stabilizing a UC3843 converterA 19 V/3 A converter is built around an UC3843

Vout

HV-bulk

Gnd

R6a1

D2MUR160

R51k

R81k

R347k

D5MBR20100

C4100uF

C210n

C5a1.2mF

M1

IC2TL431

R910k

R1210k

C6100n

R6b1

L22.2u

C7220uF

T186H-6232

R1347k

400V

...

400V

C10470n

25V 25V

C5b1.2mF25V

Gnd

2 x 10mHSchaffner RN122-1.5/02

C132.2nFType = Y1

+ -

IN

IC4KBU4K

L1

X2

R144.7k

R1610 R18

47k

D81N4937

R231Meg

R241Meg

85-260 Vac

C3220uF

SPP11N60S5

R1747k

R1947k

1

2

3

4 5

8

6

7

CMP

FB

CS

GNDRt

DRV

Vcc

Ref

U1UC3843

C1510nF

R66k

C164.7nF

C12220p

R710k

C11100p

R1110k

R154.7k

R1056k

0.18 : 1 : 0.25

R1330

U3A

Vref

Vref

U3B

Page 84: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

84

167 Chris Basso – APEC 2009

Change the operating conditions easily

2

2

simulated

CCM operation, Rload = 6.3 Ω

168 Chris Basso – APEC 2009

Reduce the load to enter in DCM

DCM operation, Rload = 20 Ω

simulated

Page 85: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

85

169 Chris Basso – APEC 2009

From the open-loop Bode plot, compensate

VoutVref

Rupper66 kΩ

Rlower10 kΩ

Czero

RLed

1 kΩ

RpulldownCpole

CTR= 45%

Calculate mid-band gain: +18 dB

1820

CTR 4.7 0.45 2667.94

10

pullupLED

R kR ×= = = Ω

We place a zero at 300 Hz:

1 1 82 6.28 300 66zero

zero upper

C nFf R kπ

= = =× ×

We place a pole at 3.3 kHz: 1 1 10

2 6.28 3.3 4.7polepole pulldown

C nFf R k kπ

= = =× ×

k factor method

“Switch-Mode Power Supplies: SPICE Simulations and Practical Designs”, McGraw-Hill

The TL431 is tailored to pass a 1-kHz bandwidth

170 Chris Basso – APEC 2009

Verify in the lab. the open-loop gainSweep extreme voltages and loads as well!

Simulated

CCM operation, Rload = 6.3 Ω, Vin = 150 Vdc

Page 86: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

86

171 Chris Basso – APEC 2009

Verify in the lab. the open-loop gain

CCM operation, Rload = 6.3 Ω, Vin = 330 Vdc

0 100 1k 10k 100

Simulated

172 Chris Basso – APEC 2009

Verify in the lab. the open-loop gain

DCM operation, Rload = 20 Ω, Vin = 330 Vdc

Simulated

Page 87: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

87

173 Chris Basso – APEC 2009

As a final test, step load the output

2

Simulated

Good agreement between curves!

Vin = 150 VCCM

2 to 3 A1 A/µs

174 Chris Basso – APEC 2009

As a final test, step load the output

Vin = 330 VDCM

0.5 to 1 A1 A/µs

Simulated

DCM operation at high line is also stable

Page 88: Dc-dc converters feedback and control · 7 13 Chris Basso – APEC 2009 Poles, zeros and s-plane A plant loop gain is defined by: () Ns Hs Ds = solving for N(s) = 0, the roots are

88

175 Chris Basso – APEC 2009

ConclusionWe now understand the origins of phase margin needsThe crossover frequency value is analytically derivedCurrent-mode technique simplifies the compensationOperating mode transition is not a problem for CMType 2 and type 3 are also available with OTAs and TL431The optocoupler’s pole can degrade the phase marginDo NOT forget the influence of the EMI filterSPICE eases the design with multi-output convertersA real-case example confirmed the validity of the approach!

Merci !Thank you!

Xiè-xie!