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T.E. (E&TC)-Semester-VII Page 1
Department of Electronics & Telecommunication Engineering
Third Year Engineering
Semester – VI
Course Structure
Sr.
No.
Subject
Teaching Scheme
( hrs)
Examination Scheme
(Marks)
L T P Total Theory TW POE OE Total
1 Digital Signal Processing 4 -- 2 6 100 25 -- -- 125
2 VLSI Design 3 2 5 100 25 50 -- 175
3 Microprocessor and
Microcontrollers 4 - 2 6 100 25 50 -- 175
4 Optical Communication &
Network 4 - 2 6 100 25 -- -- 125
5 Industrial Management 3 -- 3 100 25 -- -- 125
6 Electronic System Design 2 - 2 4 -- 25 -- 50 75
7 Total 20 - 10 30 500 150 100 50 800
Index
Sr. No. Subject Subject code Page No.
1 Digital Signal Processing ETC307 02
2 VLSI Design ETC308 11
3 Microprocessor and Microcontrollers ETC309 24
4 Optical Communication & Network ETC310 33
5 Industrial Management ETC311 43
6 Electronic System Design ETC312 51
T.E. (E&TC)-Semester-VII Page 2
DSP-Course Plan
Course Digital Signal Processing Course Code 45692
Contact
Hours/ week
4 2 -- 6
Prepared by Mrs.Deshmukh S.C. Date 29/11/2018
Prerequisites Basic understanding of Signals and Systems, Transform Theory their
applications in signal processing and system analysis.
Course Outcomes :
At the end of the course the students should be able to:
CO307.1 Describe1 & Demonstrate2 use of DTFT in DSP.
CO307.2 Compute2 DFT & FFT to Infer2 LTI systems.
CO307.3 Apply3 different methods to Design4 FIR filters
CO307.4 Apply3 different methods to Design4 IIR filters
CO307.5 Predict5 digital filters through various realization techniques.
CO307.6 Understand2 architecture of DSP processors and its Comparison5 with general purpose
processors.
Mapping of COs with POs
POs
Cos
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1
CO308.1 1 1 2
CO308.2 1 3 1 3 1
CO308.3 2 3 1 3 2
CO308.4 2 2 1
CO308.5 1 1
CO308.6 3 3 3
T.E. (E&TC)-Semester-VII Page 3
Course Contents
Chapter
No. Title
No. of
Hours
Section I
1
Discrete Time Fourier Transform.
DTFT, Properties and symmetrical properties of DTFT, Introduction to
DSP Systems [BD], Convergence of DTFT: Gibb’s Phenomenon.
06
2
Discrete Fourier Transform
Frequency Domain Sampling and Reconstruction of Discrete Time
Signal. DFT, Properties of DFT, Circular Convolution and Circular Co-
relation using DFT and IDFT ,Analysis of LTI System using Circular
Convolution, Linear Convolution using Circular Convolution, Fast
Convolution. Overlap Save and Overlap add algorithm. Relationship
between DTFT, DFT and ZT. FFT Algorithms – Radix 2: DIT-FFT and
Radix 2: DIF, Goertzel FFT algorithm and Chirp-Z transform FFT
algorithm.
12
3
FIR Filter Design.
Characteristics of FIR Filters. Properties of FIR Filters.FIR Design
using Windowing Technique [Rectangular Window, Hamming Window
and Hamming Window]FIR Design using Kaiser Window.FIR Design
using Frequency Sampling Technique.
08
Section II
4
IIR Filter Design.
Introduction to IIR Filters, IIR Filter Designing using Impulse Invariant
method and Bilinear Transformation method, Butterworth
Filter approximation, Frequency Transformation.
08
5
Realization of FIR and IIR Filters.
Introduction, Basic realization blocks diagram. FIR realization- Direct
Form (Non-linear phase and Linear phase), Cascade and Parallel
realization. IIR realization- Direct form I and II, Cascade and parallel
realization.
08
6
DSP Processors.
Introduction, Architecture of DSP Processor,
TMS320C67XX, Specifications, Comparison between general
purpose and DSP Processors.
06
T.E. (E&TC)-Semester-VII Page 4
Reference Books:
Sr. No. Title of Book Author Publisher/Edition Topics
1
Digital Signal Processing
Principles, Algorithms and
Application
John G Prokis,
Manolakis
Pearson
Education
publication
All
2
Digital Signal Processing Salivahanam, A
Vallavaraj, C.
Guanapriya,
Tata McGraw
Hill 2,3,6
3 Digital Signal Processing SanjeetMitra MGH 1,2,3
4 Digital Signal Processing P. Ramesh Babu Scitech
publication 1,2,3,4
5 Digital Signal Processing E.C.Ifeachor Barrie W. Jervis 2,3
6 Digital Signal Processing Ashok Ambardar Cengage
learning 4,5,6
Evaluation scheme
Examination
Scheme Theory Term Work POE Total
Max. Marks 100 25 -- 125
Scheme of Marks
Section Unit No. Title Marks
I 1. DTFT 14
I 2. DFT,FFT 18
I 3. FIR Filter Design 18
II 4. IIR Filter Design 18
5. Realization 18
II 6. Digital Signal Processing 14
Course Unitization
Section
Unit Course
Outcomes
No. of Questions in
No. Title CAT-I CAT-II CAT-III
I
1. DTFT CO301.1 02 -- --
2. DFT CO301.2 02 -- --
FFT CO301.2 02 -- --
I&II 3. FIR filters CO301.3 -- 03 --
4. IIR filters CO301.4 -- 03 --
II 5. Realization CO301.5 -- -- 03
6. DSP Processors CO301.6 -- -- 03
T.E. (E&TC)-Semester-VII Page 5
Unit wise Lesson Plan :
Unit No 1. Unit Title Discrete Time Fourier Transform Planned
Hrs.
05
Lesson schedule
Class
No.
Details to be covered
1. DTFT Theory.
2. DTFT Numerical
3. Properties and Symmetrical properties of DTFT.
4. Introduction to DSP systems.
5. Convergence of DTFT. And Gibbs Phenomenon
Unit No 2 Unit Title Discrete Fourier Transform Planned
Hrs.
10
Lesson schedule
Class
No.
Details to be covered
1 Sampling and reconstruction
2 Properties of DFT
3 Circular Convolution using DFT
4 Linear Convolution using Circular convolution
5 Fast convolution overlap Add
6 Overlap save method
7 Relation between DFT,DTFT, Z transform
8 Radix 2 DITFFT
9 Radix 2 DIFFFT
10 Gortzel, Chirp-Z transform FFT algorithm
Unit No 3 Unit Title FIR Filter Design Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Characteristic and properties of FIR filter
2 FIR design using Hamming, Hanning window
3 FIR design using Rectangular , Blackman window
4 Kaiser window design
5 Frequency sampling technique
6 numerical
T.E. (E&TC)-Semester-VII Page 6
Unit No 4. Unit Title IIR filter design Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Impulse invariant Tech. Bilinear transformation.
2 Placement of poles & zeros.
3 Frequency band transformation.
4 Analog filter approximation (Butterworth) quantization and rounding problems.
5 Realization of IIR direct form structures cascade.
6 Realization of IIR direct form structures cascade.
Unit No 5 Unit Title Realization of FIR & IIR filters Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Introduction to realization
2 FIR realizatiom direct form-I
3 Nonlinear –linear phase realization
4 FIR Cascade realizatiom
5 FIR Parallel realization
6 IIR cascade –parallel realization
7 Direct form – I
8 Direct form – II
Unit No 6 Unit Title DSP Processors Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Introduction
2 Architecture of DSP processors
3 TMS320C67XX
4 Specifications, features
5 Comparison od DSP & general purpose processors
6
T.E. (E&TC)-Semester-VII Page 7
Model Question Paper
Course Title : Digital Signal Processing
Total
Marks
Duration 3 Hours 100
Instructions:
All questions are compulsory.
Section-I
Marks
1 Attempt any two
A Explain DIF- FFT algorithm in detail. 9
B Design the first order high pass digital butterworth filter whose cut off
frequency is 1 KHz at sampling frequency of 104 samples/sec. Use
BLT method.
9
C What is sectioned convolution? Explain in detail the overlap add
method
9
2 Attempt any two
A Explain the design procedure of FIR filter using Kaiser window. 8
B Explain the concept of frequency warping and its effect on frequency
transformation.
8
C Write a note on FIR filter using Fourier series 8
3
A Write a note on i) Comparison of FIR filters and IIR filters.
ii) Quantization and rounding in digital filter.
8
B Determine the eight-point DFT of the signal x(n)= {1,1,1,1,1,1,0,0}
and sketch its magnitude and phase.
8
C Design a digital IIR filter using impulse invariant method for a
transfer function H(s)=10/(s2+7s+10) and
Ts=0.2 sec.
8
Section-II
4 Attempt any three Marks
A What is adaptive filter? Explain various application of adaptive filter 9
B Explain LMS algorithm. What are its practical limitations? 9
C What are the advantages of DCT? Explain in detail forward and
inverse DCT
9
5 Attempt any two
A What are the limitations of Fourier transform? What are the merits of
wavelet transform
8
T.E. (E&TC)-Semester-VII Page 8
B What are various potential uses of wavelet transform 8
C Explain any four properties of CWT 8
6 Write short note on any three
A What are the properties of DCT 8
B Write a note on” sub band coding of speech and audio signals” 8
C Write a note on “ECG signal processing” 8
Assignments
List of assignments to meet the requirements of the syllabus
Assignment No. 1
Assignment Title FFT Algorithms CO
Batch I Explain DIF- FFT algorithm in detail. CO1
Batch II
Design the first order high pass digital butterworth filter whose
cut off frequency is 1 KHz at sampling frequency of 104
samples/sec. Use BLT method.
CO3
Batch III What is sectioned convolution? Explain in detail the overlap
add method
CO1
Batch IV Explain the design procedure of FIR filter using Kaiser
window.
CO2
Assignment No. 2
Assignment Title Transform and Application CO
Batch I Write a note on “DSP in ECG Processing” CO6
Batch II Differentiate between Fourier transform and wavelet transform CO5
Batch III What are the applications of DCT CO6
Batch IV 1. Write a note on LMS algorithm CO4
List of additional assignments
Assignment No. 1
Assignment Title CO
Batch I Write a note on i) Comparison of FIR filters and IIR filters.
ii) Quantization and rounding in digital filter. CO2
Batch II Determine the eight-point DFT of the signal x(n)=
{1,1,1,1,1,1,0,0} and sketch its magnitude and phase. CO1
Batch III Design a digital IIR filter using impulse invariant method for a
transfer function H(s)=10/(s2+7s+10) and CO2
T.E. (E&TC)-Semester-VII Page 9
Ts=0.2 sec.
Batch IV
Using frequency sampling method, design a band-pass filter with
the given specifications. Sampling freq. F=8000 Hz and cut off
frequencies fc1=1000 Hz; fc2=3000Hz. Determine the filter
coefficients for N=7.
CO1
List of open ended assignments
Assignment No. 2
Assignment Title CO
Batch I
The first five points of eight point DFT of a real valued sequence
are
{ 0.25,0.125 - j0.3018,0,0.125 - j0.0518,0}. Determine remaining
3 points.
CO1
Batch II Discuss in detail Direct form and cascaded form realization for
FIR systems. CO2
Batch III
An FIR filter has the input impulse response sequence
h(n)={2,2,1}. Determine the output sequence in response to the
input sequence x(n)={3,3,-2,0,+2,1,0,-2,-1,0} using overlap add
method.
CO3
Batch IV
Design the first order high pass digital Butterworth filter whose
cut off frequency is 1 KHz at sampling frequency of 104
samples/sec. Use BLT method.
CO2
List of experiments
List of experiments to meet the requirements of the syllabus
Experiment No. Experiment title CO
1. Generation of DT signals CO1
2. Convulation and Correlation of signals CO1
3. Computation of DFT and ODFT using standard formula CO2
4. Computation of DFT using FFT algorithms CO2
5. Computation of circular convulation CO2
6. Design of LPF,HPF, BPF, BRF filter using fourier series
method
CO3
7. Design of LPF,HPF, BPF, BRF filter using Frequency
sampling method
CO3
8. Design of FIR filter using Kaiser window CO3
T.E. (E&TC)-Semester-VII Page 10
9. Design of IIR LPF,HPF, BPF, BRF filter using impulse
invariant method
CO3
10. Design of FIR LPF,HPF, BPF, BRF filter using Billinear
transformation method
CO3
11. Design of IIR filter using placement of poles and zeroes CO4
List of additional experiments
Experiment No. Experiment Title CO
1. Study of FIR HPF filter CO3
2. Study of IIR HPF filter CO3
3. Study of IIR BRF filter CO3
List of open ended experiments
Experiment No. Experiment Title CO
1. Study of FIR BPF filter CO3
2. Study of IIR BRF filter CO3
3. Study of IIR BPF filter CO3
T.E. (E&TC)-Semester-VII Page 11
Course Plan
Course VLSI Design Course Code ETC308
(45694)
Examination
Scheme
Theory Term Work POE Total
Max. Marks 100 25 50 175
Contact
Hours/ week
Theory Tutorial Practical Total
3 - 2 5
Prepared by Mr. Sharan R. R. & Mr.Mattada M.P. Date 29/11/2018
Prerequisites This course requires the students to know about the fundamentals of
combinational & sequential logic design.
Course Outcomes
At the end of the course the students should be able to:
CO308.1 Explain2 elements, data types and operators in VHDL/Verilog.
CO308.2 Design6 combinational/Sequential circuits using different styles of modeling in VHDL
and/or Verilog.
CO308.3 Construct3 FSM, Model sequential logic circuits using VHDL.
CO308.4 Explain2 the basic principles of CMOS design.
CO308.5 Describe1 the features & internal architectures various PLDs
CO308.6 Choose3 appropriate testing methodology for a given digital system.
Mapping of COs with POs
POs
Cos
a
P
O
1
b
PO2
c
PO3
d
PO4
e
PO5
f
PO6
g
PO7
h
PO8
i
PO9
j
PO10
k
PO11
l
PSO1
CO308.1 2 2 2 2 2
CO308.2 3 3 3 3 3 2
CO308.3 3 3 3 3
CO308.4 2 1 1 2 1
CO308.5 2 1 2
CO308.6 3 3 1
T.E. (E&TC)-Semester-VII Page 12
Course Contents
Unit No. Title No. of
Hours
I
Introduction to VHDL
Level of abstraction. Need of HDL, VLSI Design flow, Features and
capabilities of VHDL, Elements of VHDL (Entity, Architecture,
Library, Package, and Configuration), Identifiers, literals, data types,
operators and Attributes (type, signal, signal value, array, block)
08
II
Combinational logic design using VHDL
Adder, subtractor, decoder, encoder, tristate-buffer, multiplexer, parity
generator, Parity checker, comparator using Concurrent & Sequential
statements.
07
III
FSM Design Using VHDL
Wait statement, delays, inertial delay, Transport delay, VHDL
implementation of counter, sequence detector, Design of content
Addressable memory CAB.
06
IV
Introduction to Verilog
Basic Verilog naming conventions, Verilog operators, data types,
assignment statements, control statements, behavioral modeling in
Verilog HDL, combinational logic design using Verilog.
05
V
MOS Transistor Theory
Physical structure of MOS transistor, MOS transistor under static
conditions, Introduction to CMOS inverter and its V-I characteristics.
05
VI
PLD Architectures and Testing
Xillnx9500 series, CPLD(XC9572), Spartan-IIIE FPGA (XC3S500E),
Testing: Fault models, path sensitizing random test design for
testability, Built - in self test and Boundary scan.
05
Text Books:
Sr.
No.
Title of Book Author Publisher Units
1 Fundamentals of Digital Logic
with VHDL design
Stephen Brown and
Zvonko Vranesic
Tata – Mcgraw
Hill
1 ,2,3,
6
2 “Digital integrated circuits- A
design perspective”, 2nd edition,
Jan Rabaey, Anantha
C,
PHI 5
3 “VLSI Design” (For Unit - 4) Debaprasad Das Oxford
University press.
4
T.E. (E&TC)-Semester-VII Page 13
Reference Books:
Sr. o. Title of Book Author Publisher/Edition Topics
1 “Design Through Verilog HDL” TR Padmanabhan,
B. Bala Tripura
Sundari,
Wiley
Publications.
4
2 Xilinx synthesis tool details- xst
Datasheets
- Xilinx 6
3 VHDL a Design Oriented approach S.S.Limaye Mcgraw-hill
Compnies
1,5
4 Principals of Digital System
Design using VHDL
Roth, John Cengage Learning 1,2,3,6
Scheme of Marks
Unit No. Title Marks with
options
1 Introduction to VHDL 14 to 18
2 Combinational logic design using VHDL 16 to 18
3 FSM Design Using VHDL 16 to 18
4 Introduction to Verilog 10 to 16
5 MOS Transistor Theory 12 to 18
6 PLD Architectures and Testing 16 to 20
Course Unitization
Unit Course
Outcomes
No. of Questions in
No. Title CAT-I CAT-II CAT III
1 Introduction to VHDL CO308.1 2
2 Combinational logic design using
VHDL
CO308.2 2
3 FSM Design Using VHDL CO308.3 2
4 Introduction to Verilog CO308.4 2
5 MOS Transistor Theory CO308.5 2
6 PLD Architectures and Testing CO308.6 2
T.E. (E&TC)-Semester-VII Page 14
Unit wise Lesson Plan
Unit No I Unit Title Introduction to VHDL Plan
ned
Hrs.
08
Lesson schedule
Class
No.
Details to be covered
1 Level of abstraction. Need of HDL
2 VLSI Design flow, Features and capabilities of VHDL
3 Elements of VHDL- Entity, Architecture
4 Elements of VHDL- Library, Package
5 Elements of VHDL- Configuration
6 Identifiers, literals, data types
7 Operators
8 Attributes
Review Questions
Q1 Draw VLSI system design flow diagram and briefly explain each block. CO308.1
Q2 What is meant by ‘package’ in VHDL? CO308.1
Q3 With the help of proper syntax briefly write about package body and
package declaration.
CO308.1
Q4 Which are the different types of Operators that operate on signals,
variables and constants in VHDL?
CO308.1
Q5 Summarize types of operators and with suitable examples elaborate
‘shift’ operators.
CO308.1
Unit No II Unit Title Combinational logic Design using VHDL Planne
d Hrs.
07
Lesson schedule
Class
No.
Details to be covered
1 Adder Concurrent& Sequential statements
2 Subtractor Concurrent& Sequential statements
3 Decoder Concurrent& Sequential statements
4 Encoder Concurrent& Sequential statements
5 Tristate buffer, multiplexer Concurrent& Sequential statements
6 Parity generator, Parity checker
7 Comparator using Concurrent& Sequential statements
T.E. (E&TC)-Semester-VII Page 15
Review Questions
Q1 Write behavioral VHDL code for Tristate buffer CO308.2
Q2 Write VHDL code to describe 4-bit Binary to Gray converter. OR Write a
VHDL code to describe 4 input binary to gray converter
CO308.2
Q3 Describe using VHDL code for 8-bit comparator. If A and B are 8-bit
numbers. comparator has three output A >B, A < B and A= B. use 4-
bit comparator to implement 8-bit comparator
CO308.2
Q4 Write a VHDL code for full adder using three styles of modeling CO308.2
Q5 Write a VHDL code for even parity generator having 8 input bits and 1 bit
parity output. OR Write VHDL code for even parity generator
CO308.2
Q6 Write a syntax and explain with example generate statement OR Write
syntax of For- Generate. Give suitable example
CO308.2
Unit No III Unit Title FSM Design using VHDL Planne
d Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Wait statements with examples
2 Delays: Inertial delay, Transport delay, Delta delay
3 VHDL implementation of counter
4 VHDL implementation of sequence detector-Mealy Model
5 VHDL implementation of sequence detector-Moore Model
6 Design of content addressable memory CAB.
Review Questions
Q1 Explain different types of wait statements in VHDL with example CO308.3
Q2 Design a Mealy FSM to detect an overlapping sequence (i) “1011” (ii)
1101 and describe using VHDL.
CO308.3
Q3 What are the different types of delays in VHDL? Explain with example. CO308.3
Q4 Write a VHDL code for up counter with synchronous and with
asynchronous reset.
CO308.3
Q5 Write a VHDL code for single/dual port RAM. CO308.3
Q6 Write a VHDL code to describe a 4 bit counter which counts only even
numbers .0,2, 4,...,14, 0,2, ...
CO308.3
Unit No IV Unit Title Introduction to Verilog
Planne
d Hrs.
05
Lesson schedule
Class
No.
Details to be covered
T.E. (E&TC)-Semester-VII Page 16
1 Basic Verilog naming conventions
2 Verilog operators, data types
3 Assignment statements, control statements
4 Behavioral modeling in Verilog HDL
5 Combinational logic design using Verilog
Review Questions
Q1 Explain the different types of data types in Verilog CO308.4
Q2 Briefly Explain about Assignment and control statements in Verilog with
examples
CO308.4
Q3 Write Verilog code for Half Adder, Full Adder, Decoder, Encoder, Mux,
De-Mux, Binary to gray code converter, Gray to binary converter, Flip-
flops, Counter, shift register
CO308.4
Q 4 Explain the different types of operators in Verilog CO308.4
Q 5 Differentiate between VHDL and Verilog HDL CO308.4
Unit No V Unit Title MOS Transistor theory Planne
d Hrs.
05
Lesson schedule
Class
No.
Details to be covered
1 Physical structure of MOS transistor
2 MOS transistor under static conditions
3 Introduction to CMOS inverter and its V-I characteristics.
4 Schematic and layout of simple gates
5 Schematic and layout of simple combinational circuits
Review Questions
Q1 Draw physical structure of MOS Transistor (MOSFET). Explain the V-I
characteristics of the same
CO308.5
Q2 Derive the expression for Threshold voltage of MOSFET under static
conditions.
CO308.5
Q3 Derive the expression for Drain current ID of MOSFET in
(i)Linear/Resistive region (ii) Saturation region
CO308.5
Q4 Draw CMOS inverter and its input-output and V-I characteristics CO308.5
Unit No VI Unit Title PLD Architecture and Testing Planne
d Hrs.
05
Lesson schedule
1 Xilinx 9500 series CPLD (XC 9572)
T.E. (E&TC)-Semester-VII Page 17
2 Spartan 3E FPGA (XC3S500E)
3 Testing : Fault models
4 Path sensitizing, random test
5 Built-in self test , Boundary scan
Review Questions
Q1 Draw and explain briefly architectural block diagram of XC9500 CPLD. CO308.6
Q2 Neatly draw and explain functional block diagram of XC9500 macrocell. CO308.6
Q3 Draw and explain in detail the product term allocator in a macrocell
within Function Block of XC9500 series.
CO308.6
Q4 Draw and briefly write about the Fast CONNECT II switch matrix
in Xilinx XC9500 series.
CO308.6
Q5 Draw the neat circuit diagram for Input-Output block for Xilinx
make 9500 series CPLD. explain the working of each component used
CO308.6
Q6 Draw and explain in detail the basic block diagram of Spartan IIIE
family FPGA
CO308.6
Q7 With a neat diagram explain Boundary scan Test methodology CO308.6
Q8 Briefly write about Built-In-Self-Test used for testing digital ICs CO308.6
Q9 Briefly write about the scan path technique for testing sequential
digital systems
CO308.6
Model Question Paper
Course Title : VLSI DESIGN Max.
Marks
100 Duration 3 hrs
Instructions: i) Figures to the right indicate full marks
ii) All questions are compulsory.
iii) Assume necessary data wherever necessary.
Q1 Attempt any three questions of the following. 18
A With neat diagram explain VLSI design flow. 6
B With suitable examples of each class briefly write about various
classes of data types used in VHDL programming.
6
C What is meant by ‘package’ in VHDL? With the help of proper syntax
briefly write about package body and package declaration.
6
D What are the features and capabilities of VHDL? Explain briefly. 6
Q2 Attempt any two questions of the following. 16
A Describe ‘if-then else’ VHDL Statement with proper syntax. Write a
VHDL code for 4:1 multiplexer using ‘if-then else’ statement.
8
B Describe the functioning of ‘process’ statement with proper syntax.
Write a VHDL code for positive edge triggered ‘D’ Flip flop with
8
T.E. (E&TC)-Semester-VII Page 18
synchronous ‘Clear’ input.
C Write a VHDL code for full adder using three styles of modeling 8
Q3 Attempt any two questions of the following. 16
A Explain Different types of i) Delays in VHDL
ii) Wait statements in VHDL
8
B Draw a state diagram for a sequence detector ‘1011’ which is realized
as a melay machine. Write a VHDL code for the above said machine.
8
C Write a VHDL code for 4 bit synchronous counter with clear and
preset.
8
Q4 Attempt any two questions of the following. 16
A Explain Different types of operators in Verilog 8
B Write a Verilog code for ‘D’ Flip-flop with synchronous and
asynchronous reset
8
C With a neat diagram explain MOSFET structure and its characteristics 8
Q5 Attempt any two questions of the following. 16
A With a neat diagram explain Inverter and its V-I characteristics 8
B Draw and explain briefly architectural block diagram of XC9500
CPLD
8
C Write schematic and stick diagram for 2 input NAND gate 8
Q6 Attempt any three questions of the following 18
A Neatly draw and explain CLB structure of XC3S500E 6
B Neatly draw and explain functional block diagram of XC9500
macrocell.
6
C Briefly write about Built-In-Self-Test used for testing digital ICs 6
D Briefly explain about boundary scan architecture 6
List of Experiments to meet the Requirements of the Syllabus
1. a) Half Adder & Full Adder using Dataflow or Behavioral.
b) Full Adder using Structural
2. a) Decoder
b) Encoder
3. a) Multiplexer
b) Demultiplexer
4. 2-bit Comparator
5. Flip flops (SR,D,T and JK)
6. Counter with Synchronous/ Asynchronous reset
7. Universal Shift Register
8. Sequence detector
9. Binary to Gray code converter (Verilog)
T.E. (E&TC)-Semester-VII Page 19
10. 4 bit counter (Verilog)
11. Counter and Seven Segment Display(Study Experiment)
12. LCD Interfacing(Study Experiment)
13. Mini Project
Assignment No. 1
Assignment
Title
Introduction to VLSI CO308.1,
CO308.2
Q1 Draw VLSI system design flow diagram and briefly explain each block.
Q2 Briefly elaborate different levels of abstraction in VLSI Design
Q3 Briefly write about various features and capabilities of VHDL language
Q4 Explain different elements of VHDL with syntax
Q5 Write the meaning of ‘Identifiers’ used in VHDL. With suitable examples write
about the various rules to look at before choosing any identifier.
Q6 Which are the different types of 'Operators’ that operate on signals, variables
and constants in VHDL? Summarize all types, and with suitable example elaborate
‘shift’ kind of operators.
Q7 What is meant by 'Package' in VHDL? With the help of proper syntax briefly write
about package body and package declaration
Q8 Explain the multi-valued logic in VHDL
Q9 Explain the syntax for physical literals. Write a physical type for current (nA, pA,
mA, A).
Q10 Explain with example the syntax of configuration statement
Q11 Write a short note on libraries in VHDL
Q12 With suitable examples of each class, briefly write about various classes of
data types used in VHDL programming.
Explain the different types of attribute in VHDL with suitable example. OR What
is meant by an Attribute in VHDL? Explain briefly signal value and array type of
Attributes used in VHDL with suitable examples.
Assignment No. 2
Assignment
Title
Combinational Logic design using VHDL CO308.2
Q1 Write behavioral VHDL code for tristate buffer.
Q2 Write VHDL code to describe 4-bit Binary to Gray converter.
Q3 Describe using VHDL code for 8-bit comparator. If A and B are 8-bit numbers.
comparator has three output A >B, A < B and A= B. use 4-bit comparator to
implement 8-bit comparator.
Q4 Write a VHDL code for full adder using three styles of modeling
Q5 Write a VHDL code for even parity generator having 8 input bits and 1 bit parity
output. OR Write VHDL code for even parity generator
T.E. (E&TC)-Semester-VII Page 20
Q6 Write a syntax and explain with example generate statement OR Write syntax of
For- Generate. Give suitable example
Q7 Design and describe using VHDL, 4 bit one hot decoder with ENABLE input and
VALID output. If ENABLE=0 then VALID= 1 otherwise VALID=0 and only one
of the 16 output is active.
Q8 Write a VHDL code to describe a 5-bit incrementer which increments the input
by one at the output using this full adder.
Q9 Write a VHDL code to describe a 4 input gray to binary converter
Q10 Write behavioral VHDL code for 3:8 decoder
Q11 Write VHDL code for 4:1 multiplexer using (i)case statement (ii)with-select
Q12 Write a VHDL code for N-bit parity generator using “generic”.
Q13 Write structural VHDL model for half adder
Q14 Declare Full Adder component as a package, and using the same package write
a VHDL code for 4 bit Ripple Adder
Q15 Describe 'lf-then-else' VHDL statement with proper syntax. Write a VHDL code
for 4: 1 multiplexer using 'lf-then-else’ statement.
Q16 Explain the functioning of ‘Case’ statement used in VHDL programming. Write a
VHDL code for 3:8 decoder using ‘case’ statement.
Q17 Using two half adder circuits draw the circuit for full adder. Write a VHDL code
for full adder using structural type of modeling.
Q18 Write a VHDL model for 8 tri-state buffers using 'generic' statement.(Note: use
common Enable for all tri-state buffers)
Q19 Write a VHDL model for HEX to Common Anode type seven-segment decoder
using 'with-select' statement.
Assignment No. 3
Assignment
Title
FSM Design Using VHDL CO308.3
Q1 Write a VHDL code for D flip flop with synchronous reset using 'wait until'
statement.
Q2 Design a Mealy FSM to detect an overlapping sequence (i) “1011” (ii) 1101 and
describe using VHDL.
Q3 Write a VHDL code for up counter with synchronous and with asynchronous reset.
Q4 Write a VHDL code to describe a 4 bit counter which counts only even numbers
.0,2, 4,...,14, 0,2, ...
Q5 Implement using ‘generate’ statement a 4 bit shift register use D F-F as a
component OR Write a VHDL code using generate statement for 4-bit serial in
serial out shift register using single D flip flop as a component.
Q6 Design a Moore FSM to design an overlapping sequence “1001” and describe using
VHDL
T.E. (E&TC)-Semester-VII Page 21
Q7 Write a VHDL code for (i) Synchronous reset D flip flop (ii) JK flip-flop (iii) D
flip-flop with asynchronous set and reset inputs. Draw entity diagram also.
Q8 Write a VHDL code for up down counter with control input up/down.
Q9 Describe the functioning of 'Process' statement with proper syntax. Write a VHDL
code for positive edge triggered 'D' flip-flop with synchronous ‘Clear’ input.
Q10 Convert following state table into its equivalent Moore model state diagram, and
write a VHDL model for the same state diagram.
Q11 a) Write a VHDL model for single port RAM
b) List and describe the i/o signals for dual port RAM and write a VHDL
Q12 Write VHDL code for 4 bit ripple counter using JK flip flop. Use structural
modeling for writing the same.
Q13 Draw a state diagram for a sequence detector’1011’ which is realized as a Mealy
machine. Write a VHDL code for the above said Mealy machine.
Q14 Design and describe using VHDL a Data path to implement operations A=A+B,
A=A-B, where A and B are 8 bit registers.
Q15 Explain the working of 4 input bus arbiter having fix priority with the help of
state diagram description for the same.
Q16 Design a two input 'N bit' serial adder and write a VHDL description for the
same.(hint: if A and B are the inputs then Sum=A+ B at every clock and count
is a carry bit which is stored for further additions at reset the stored carry bit
is cleared).
Q17 Write a VHDL code for single digit counter using WAIT UNTIL statement.
Q18 Explain ‘process’ statement using different types of ‘wait’ statements. Explain each
with suitable example.
Q19 Explain Delta, Transport and Inertial delay with suitable examples and respective
timing diagrams.
Q20 Write a VHDL code for D flip-flop with asynchronous reset using WAIT ON
statement
Assignment No. 4
Assignment
Title
Introduction to Verilog CO308.4
T.E. (E&TC)-Semester-VII Page 22
Q1 Explain the different types of data types in Verilog
Q2 Explain assignment and control statements in Verilog with suitable examples.
Q3 Explain the different types of operators in Verilog
Q 4 Write Verilog code for Half Adder, Full Adder, Decoder, Encoder, Mux, Demux,
Binary to gray code converter, Gray to binary converter,
Q 5 Write Verilog code for Flipflops, Counter, shift register.
Assignment No. 5
Assignment
Title
MOS Transistor Theory CO308.5
Q1 Draw and explain physical structure of MOSFET
Q2 Draw and explain CMOS inverter V-I Characteristics
Q3 Draw physical structure of MOS Transistor (MOSFET). Explain the V-I
characteristics of the same.
Q4 Derive the expression for Drain current ID of MOSFET in
(i)Linear/Resistive region (ii) Saturation region
Q5 Derive the expression for Threshold voltage of MOSFET under static conditions.
Assignment No. 6
Assignment
Title
PLD Architectures and Testing CO308.6
Q1 Draw and explain briefly architectural block diagram of XC9500 CPLD.
Q2 Neatly draw and explain functional block diagram of XC9500 macrocell.
Q3 Draw and explain in detail the product term allocator in a macrocell within
Function Block of XC9500 series.
Q4 Draw and briefly write about the Fast CONNECT II switch matrix in Xilinx
XC9500 series.
Q5 Draw the neat circuit diagram for Input-Output block for Xilinx make 9500
series CPLD. explain the working of each component used
Q6 Draw and explain in detail the basic block diagram of Spartan IIIE family
FPGA
Q7 Using neat suitable block diagram elaborate Input /Output block of Spartan IIIE
FPGA.
Q8 Draw the neat circuit diagram for Configurable Logic Block (CLB) used in
Spartan IIIE series of Xilinx make FPGA. Explain functionality of each
component used inside.
Q9 Briefly write about s-a-1 (stuck at-1) and s-a-0 (stuck-at-0) model faults with
suitable examples used while testing combinational logic
Q10 Explain briefly the concept of fault detection using path sensitization used in
T.E. (E&TC)-Semester-VII Page 23
combinational logic testing
Q11 Which are the different fault models used while testing combinational logic?
Explain each with suitable example.(Answer: Stuck at fault model and Path
sensitization)
Q12 Briefly write about the scan path technique for testing sequential digital systems
Q13 With the help of typical boundary scan cell diagram and basic boundary scan
architecture explain the concept of boundary scan testing.
Q14 Briefly write about Built-In-Self-Test used for testing digital ICs
Q15 Briefly explain the role of Multiple Input Signature Register (MISR) in BIST
Q16 With the help of suitable circuit sketch briefly elaborate role of LFSR in
component testing
Q17 Write a VHDL code for 4 bit modified LFSR which can also generate a
sequence 0000
T.E. (E&TC)-Semester-VII Page 24
Course Plan
Course
Code
ETC 309 Course Microprocessors &
Microcontrollers
Prepared by S.M.Hirikude & Sushmita Sharma 29/11/18
Pre-
requisites
This course requires student to know about the basic knowledge of digital
Electronics such as combinational circuits (multiplexer, demultiplexer, encoder,
decoder, adder, subtractor etc.) sequential circuits (flip flop, counter, timer, shift
registers etc.).This course requires the student to know about the basic concepts of
Computer based systems and their applications. Students also should have to know
basics about arithmetic, logical and control operations in digital electronics.
Course Outcomes
At the end of the course the students should be able to:
CO309.1 Describe2 the architecture of 8085
CO309.2 Write and execute assembly language program with 8085 including peripheral
interfacing.
CO309.3 Differentiate2 between Microprocessor & Microprocessor
CO309.4 Describe2 the architecture of 8051
CO309.5 Write and execute assembly language program with 8085 including peripheral interfacing.
CO309.6 Apply3 program writing skills using Embedded C & to use simulators and down
load the programs in Hardware kit
Mapping of COs with POs
POs
COs
a b c d e f g h i j K
CO309.1 1 1
CO309.2 2
CO309.3 1 2 1 1
CO309.4 3
CO309.5 1
CO309.6 2 2 1 1
1 Mild correlation 2 Moderato correlation 3 Strong correlation
T.E. (E&TC)-Semester-VII Page 25
Course Contents
Unit
No. Title
No. of
Hours
Section I
1. Introduction to 8085 Microprocessor:
CPU Architecture, Register Organization, 8085 Instruction Set, Addressing
modes. Stack & Subroutines, Instruction Cycle, Interrupts of 8085(Hardware
and software)
09
Hours
2. Interfacing: Memory interfacing, I/O interfacing, Memory mapped I/O, I/O mapped I/O,Peripheral Interfacing – Programmable I/O-8255 Interface, ADC – 0809, DAC– 0808, Seven segment LED, 4 x 4 Matrix keyboard , stepper motor
09
Hours
3. Introduction to MCS51Family:
Architecture, Functional pin out diagram, Programming Model, Memory
Organization, Addressing Modes, Instruction Set: Classification, Reset
Circuit, Machine cycle, oscillator circuit, Introduction to Assembly
Language Programming.
09
Hours
Section II
4. Hardware overview:
Input / Output Ports, Counters & Timers, Serial Communication, Interrupt.
Note: Structure of Above, Related S.F.R, Instruction, Associated Programs.
09
Hours
5. Interfacing & Application
Interfacing: RAM ROM, LCD, ADC, DAC, Keyboard, stepper motor
Minimum System Design & Application: Interfacing of Temperature Sensor
(LM35) 8051 Connection to RS232
08
Hours
6. Embedded ‘C’ Programming for 8051:
Data types and time delay, I/O Programming, Logic operations, Data
conversions, accessing code ROM space, Data serialization.
08
Hours
Reference books:
Sr.
No.
Title of Book Author Publisher/Edition Topics
covered
1. Microprocessors Architecture,
Programming and applications
with 8085A.
Ramesh S
Gaonkar
Prentice Hall. 1,2
2. The 8051 Microcontroller &
Muhammad Ali
Mazidi & Janice
Pearson
EditionL.P.E. 3,4,5,6
T.E. (E&TC)-Semester-VII Page 26
Embedded Systems Gillispie Mazidi
3. Microprocessors and
Programmed logic
Kenneth L Short Prentice-Hall 4,5,6
4. Douglas V Hall-
„Microprocessors and
Digital Systems”
Douglas V Hall Gregg Division,
McGraw-Hill. 1,2
5. The 8051 Microcontroller Ayala Delmar Cengage
Learning; 3 edition
(June 1, 2004) ...
3,4,5,6
Evaluation scheme:
Examination
Scheme
Theory Term Work OE Total
Max. Marks 100 25 -- 50 175
Contact
Hours/ week
4 2 6
Scheme of Marks
Section Unit No. Title Marks
I
1 Introduction to 8085 Microprocessor: 16 2 Interfacing 18 3 Introduction to MCS 51 18
II
4 Hardware overview 16 5 Interfacing & Application 16
6 Embedded ‘C’ Programming for 8051 16
Course Unitization
CO Evaluation Remark
CO309.1 CAT 1 1 question on unit 1 and 2 with 15 marks each
CO309.2
CO309.3 CAT 2 1 question on unit 3 and 4 with 15 marks each CO309.4
CO309.5
CAT 3 1 question on unit 5 and 6 with 15 marks each CO309.6
Unit wise Lesson Plan
T.E. (E&TC)-Semester-VII Page 27
Section I
Unit No Unit Title Planned Hrs.
1 Introduction to 8085 Microprocessor 09
Lesson schedule
Class
No.
Details to be covered
1 CPU Architecture, Register organization
2 8085 Instruction Set, Addressing modes.
3 8085 Instruction Set, Addressing modes.
4 8085 Instruction Set, Addressing modes.
5 Stack & Subroutines
6 Instruction Cycle
7 Instruction Cycle
8 Interrupts of 8085(Hardware and software)
9 Interrupts of 8085(Hardware and software)
Review Questions
Q1 Differentiate between software and hardware interrupts.
CO309.1
Q2 Draw the timing diagram of the instruction OUT 8 bit.
Q3 Draw and explain functional pin out and signals details for the
8085microprocessor.
Q4 Explain any two instructions in which 8085 processor uses the registers W and
Z.
Q5 Explain the PSW of 8085.
Q6 Explain Instruction Cycle.
Unit No Unit title Planned Hrs.
2 Interfacing 09
Lesson schedule
Class
No.
Details to be covered
1 Memory interfacing, I/O interfacing
2 Memory mapped I/O, I/O mapped I/O
3 Programmable I/O-8255 Interface
4 Programmable I/O-8255 Interface
5 ADC – 0809
6 DAC– 0808
7 Seven segment LED
8 4 x 4 Matrix keyboard
T.E. (E&TC)-Semester-VII Page 28
9 Stepper motor
Review Questions
Q1 Interface ROM of 4Kx8 using 2Kx4chip from starting address 2000H.
CO309.2
Q2 Explain successive Approximation ADC with neat diagram
Q3 Compare memory mapped l/O and peripheral mapped l/O.
Q4 What is the function of SIM and RIM instructions in 8085 microprocessor?
Q5 Explain BSR Mode & MODE 1 input or output with handshake of 8255 PPI.
Q6 Interface an 8 bit DAC with 8085 microprocessor using 8255 & ALP to
generate square wave of 1 KHz. Crystal frequency connected to 8085 is
6 MHz.
Unit No Unit Title Planned Hrs.
3 Introduction to MCS 51 09
Lesson schedule
Class
No.
Details to be covered
1 Overview of 8051, block diagram and pin-out
2 Memory Organization in 8051
3 Addressing modes and introduction to instruction set
4 Instruction set
5 Instruction set
6 Instruction set
7 Machine cycle, reset circuit and oscillator circuit
8 Programming model
9 Assembly language programs
Review Questions
Q1 Draw and explain memory organization of 8051
CO309.3
Q2 Explain different addressing modes with suitable examples
Q3 Explain bit oriented and logical instructions
Q4 Draw and explain oscillator and reset circuit of 8051
Q5 Explain various Bit Manipulation Instructions with examples in 8051.
SECTION II
T.E. (E&TC)-Semester-VII Page 29
Unit No. Unit Title Planned Hrs.
4 Hardware Overview 09
Lesson schedule
Class
No.
Details to be covered
1 I/O ports and their internal structure
2 Timer/counter structure, modes of timer
3 SFR‟s required for configuring timers and related programs
4 Serial port in 8051
5 Modes of serial port
6 SFR‟s required for configuring serial port and related programs
7 Interrupt structure
8 SFR‟s required for configuring interrupts
9 Related programs
Review Questions
Q1 Draw and explain I/O port structure
CO309.4
Q2 Explain different modes of timer/counter
Q3 Explain SFR‟s related to timer/counter
Q4 Explain the modes of operation of serial port
Q5 Explain the interrupt structure and SFR‟s used for configuring interrupts
Unit No Unit Title Planned Hrs.
5 Interfacing & Application 08
Lesson schedule
Class
No.
Details to be covered
1 Interfacing of RAM & ROM to 8051.
2 Interfacing of LCD and various commands of LCD.
3 Interfacing ADC & DAC to 8051.
4 Interfacing of matrix keyboard to 8051.
5 Interfacing of stepper motor to 8051.
6 Development of minimum system to measure temperature using LM 35.
7 8051 connection with RS 232 with application.
8 Programming related to above listed peripherals.
Review Questions
Q1 With neat diagram interface 2kx8 bytes of RAM & 2kx8 bytes of ROM to 8051.
CO309.5
Q2 Draw the interfacing diagram of DAC with 8051.
Q3 Draw diagram to interface LCD to 8051 in 8 bit mode.
Q4 Interface ADC 0808 to 8051 and write steps for ADC conversion
Q5 Write a program to display “SGI, Atigre” on LCD display
Q6 Draw interfacing diagram of a stepper motor to 8051.Also write an assembly
T.E. (E&TC)-Semester-VII Page 30
language program to rotate the motor anticlockwise in full stepping mode.
Unit No Unit Title Planned Hrs.
6 Embedded “C” programming for 8051 08
Lesson schedule
Class
No.
Details to be covered
1 Data types
2 Time delay
3 I/O programming
4 I/O programming
5 Logic operations
6 Data conversions
7 Accessing Code ROM space
8 Data Serialization
Review Questions
Q1 Explain why various 8051 C compilers produce different Hex file Sizes
CO309.6
Q2 Write an 8051 C program to toggle all bits of P1 every 200 ms.
Q3 Write a C program that finds the no.s of Zero in a 8 bit data stream
Q4 Write a program to convert the following series of ASCII no.s to packed BCD. Assume that ASCII data is located in data RAM “8767”
Q5 Why do we use the ROM code space for video game characters & shapes
Q6 Explain various logical operations that can be performed using embedded C
statements,also give example of each
Model Question Paper
Course Title : Microprocessor and Peripherals
Duration-4 Hrs. Max. Marks: 100
Instructions:
1 Attempt any three questions from each section
2 Figures to the right indicate full marks.
3 Wherever required neat sketches shall be drawn.
Section-I
1 a) With timing diagrams explain memory opcode fetch. 06
b) Explain following pins of 8085 Microprocessor.
i) S0
ii) S1
12
T.E. (E&TC)-Semester-VII Page 31
Section-II
4 a) Draw and explain control word and format of IC 8255. 06
b) Explain the functions of following pins for corresponding IC
I) Timer In of 8155
II) ALE of 8155
III) A0 & A1 of 8255
IV) EOC pin of ADC 0808/09
12
5 a) Draw and explainR2R Ladder and weighted code registers. 04
b) How ADC 0809 can be interfaced to 8085? Write a program to convert 0 to 10V
input signal to binary value and store the result in D register.
12
6 a) Write a C program that finds the no.s of Zero in a 8 bit data stream 04
b) Explain why various 8051 C compilers produce different Hex file sizes. Write
an embedded C program to generate square wave of 50% duty cycle on pin P1.2
of 8051.
12
*Note: - Question paper will consist of approximately 70 % theory type questions
(Hardware & design based problems) and approximately 30% Assembly language programs
type questions (Algorithms/ Software’s)
Practical/ Assignments: Minimum 03 Assignments for each batch.
iii) SOD
iv) Reset
v) ALE
2 a) Write a Program for 8085 to find number of even and odd number from array
of 10 numbers stored in memory from location C000.
04
b) Write ALP to continually transmit “HELLO” with baud rate 4800 to a terminal connected to serial port of 8051 (Crystal Freq. =
11.0592MHz)
12
3 a) Explain bit addressable instructions of 8051 04
b) Draw interfacing diagram to interface 4K x 8 ROM and 4K x 8 RAM to
MCS-51
12
T.E. (E&TC)-Semester-VII Page 32
List of Experiments (Minimum 08):
1. Arithmetic & Logical operations using 8085 .
2. Data transfer & Exchange using 8085 .
3. Data conversions using 8085
4. Interface Stepper motor using 8085
5. Interface ADC & DAC using 8085
6. Interface keyboard using 8085
7. Arithmetic & Logical operations using 8051
8. Data transfer & Exchange using 8051
9. Data conversions using 8051
10. Interface Stepper motor using 8051
11. Interface DAC using 8051
12. Timer & counter operation in 8051 using Embedded C
13. Interface LCD to 8051 using Embedded C
14. Serial Communication with 8051 using Embedded C
T.E. (E&TC)-Semester-VII Page 33
Optical Communication and Networks Course plan
Course Optical Communication & Networks Course Code ETC310
Prepared by Mr.Patil P.D. & Mr.Nikam P.B Date 29/11/2018
Prerequisites This course requires that student must have the fundamental knowledge of wave
& particle theory of light, working of LED.
Course Outcomes
CO3010.1 Apply4 the fundamental principles of optics and light wave to design optical fiber
communication systems.
CO3010.2 Identify1 structures, functions, materials, and working principle of optical fibers,
light sources, couplers & detectors
CO3010.3 Design6 optical fiber communication links using appropriate optical fibers, light
sources, couplers and detectors
CO3010.4 Apply4 the knowledge developed in-class to contemporary optical fiber
communication research and industrial area.
CO3010.5 Select1 proper optical detectors required in optical communication
CO3010.6 Identify1 different types of optical networks
Mapping of COs with POs
PO
CO a b c d e f g h i j k l PSO1
CO310.1 1 2
CO310.2 1 2
CO310.3 2 2
CO310.4 2 1 2 2
CO310.5 2 3 1 1
CO310.6 2 3 2
Correlation Levels: 1. Low 2. Medium 3.High
T.E. (E&TC)-Semester-VII Page 34
Course Contents
Unit No. Title : Optical Communication & Networks No. of
Hours
Section I
1
Overview of Optical Fiber Communication
Motivation for light wave communication, Basic Network Information
Rates, The evolution of Optic System, Elements of Optical Fiber
Transmission Link, ,optical spectral band, The nature of Light, Basic Optical
Laws and Definitions, Single Mode Fibers, Graded Index fiber structures
08
2
Optical Fibers: Structures, Wave guiding and Fabrication
Optical Fiber Modes and Configurations, Mode theory for waveguides,
Fiber Materials, Fiber Fabrication, Fiber Optic cables. 08
3
Transmission characteristics of optical fibers.
Attenuation, material absorption losses, scattering losses, bending losses,
dispersion, polarization, nonlinear effects.
08
Section II
4
Optical Sources
Topics from Semiconductor Physics, Light-Emitting Diodes(LEDs),Laser
Diodes, Light Source Linearity, Modal, Partition and Reflection Noise,
Reliability Considerations)
07
5
Optical Receiver
Physical Principal of Photodiodes, Photodetector Noise, Detectors Response
Time, Avalanche Multiplication Noise, Structure for InGaAs APDs,
Temperature effect of Avalanche Gain, Comparison of Photo detectors ,
Fundamental Receiver Operation, Digital Receiver Performance, Detailed
Performance Calculations
09
6
Optical Networks
Operational Principles of WDM, Passive Components, Tunable Sources,
Tunable Filters, Basic Networks, SONET/SDH, Broadcast and–Select
WDM Networks, Wavelength Routed Networks, Nonlinear Effects on
Network Performance, Performance of WDM+EDFA Systems, optical
CDMA.
08
Reference Books:
Sr.
No.
Title of Book Author Unit
No./Topics
1. Optical Communication John Senior 1,2,3,4,5,6
2. Optical Fiber Communication(Wiley)-3rd
edition
Agarwal 1,2,3,4,
T.E. (E&TC)-Semester-VII Page 35
Text Books:
Scheme of Marks
Section Unit No. Title Marks
I
1 Overview of Optical Fiber Communication 16
2 Optical Fibers: Structures, Wave guiding and Fabrication 16
3 Transmission characteristics of optical fibers. 18
II
4 Optical Sources 16
5 Optical Receiver 16
6 Optical Networks 18
Course Unitization
Section
Unit Course
Outcomes No. of Questions in
No. Title CAT-I CAT-II CAT-III
I
1. Overview of Optical Fiber
Communication CO310.1 2
2. Optical Fibers: Structures, Wave
guiding and Fabrication
CO310.2
2
I 3. Transmission characteristics of
optical fibers. CO310.3 2
II 4 Optical Sources CO310.3 2
II 5. Optical Receiver CO310.5 2
6. Optical Networks CO310.6 2
Sr.
No.
Title of Book Author Publisher/Edi
tion
Unit No
Topics
. Optical Fiber Communication
Fifth Edition(TMH)
Gerd Keiser. TMH 1,2,3,4,5,6
T.E. (E&TC)-Semester-VII Page 36
Unit wise Lesson Plan
Section I
Unit No 01 Unit Title Overview of Optical Fiber Communication Planned
Hrs. 06
Lesson schedule
Class
No. Details to be covered
1 Motivation for light wave communication. subject introduction, term work distribution
scheme
2 Study of optical spectral bands, introduction to network information rates.
3 Block diagram of optical communication link.
4 Introduction to optical networks. SONET &SDH, advantages & disadvantages of OCN
5 Study of basic optical laws, skew rays & meridional rays, light propagation by Total
internal reflection.
6 Types of optical fibers & there classification on the basis of material, refractive index&
modes.
Review Questions
Q1 Explain with the help of neat diagram block diagram of optical
communication system.
CO310.1
Q2 List advantages & disadvantages of optical fiber communication. CO310.1
Q3 1. Write a short note on
a) Skew rays & meridional rays.
b) Acceptance angle & numerical aperture
c) Step index & graded index
d) Single mode & multimode optical fiber
e) Simulation & modeling tools
f) Mode field diameter
CO310.1
Q4 Classify optical fibers on the basis of refractive index. CO310.1
Q5 Classify optical fibers on the basis of modes. CO310.1
Unit No 02 Unit Title Optical Fibers: Structures, Wave guiding
and Fabrication
Planned
Hrs. 06
Lesson schedule
Class
No. Details to be covered
1 Mode theory of light through cylindrical waveguide, different patterns in cylindrical
waveguide.
T.E. (E&TC)-Semester-VII Page 37
2 Materials used for manufacturing of optical fiber, their effect of change in refractive index.
3 Optical fiber fabrication techniques- Outside vapor phase oxidation(OVPO),Vapor phase
axial deposition(VPAD)
4 Optical fiber fabrication techniques- Modified chemical vapor deposition(MCVD), Plasma
activated chemical vapor deposition(PACVD)
5 Methods for drawing fiber, double crucible method
6 Mechanical properties of optical fiber, Types of optical cables.
Review Questions
Q1 What are the materials that are used for changing the refractive index
profile of optical fiber? CO310.2
Q2 What are the different methods used for manufacturing of optical fiber?
With the help of neat diagram explain any one of them? CO310.2
Q3 With the help of neat diagram explain MCVD in detail? CO310.2
Q4 With the help of neat diagram explain the double crucible method for
drawing optical fiber? CO310.2
Q5 With the help of neat diagrams explain different types of optical cables. CO310.2
Unit No 03 Unit Title Transmission characteristics of optical
fibers
Planned
Hrs. 06
Lesson schedule
Class
No.
Details to be covered
1 Signal attenuation in optical fiber types of losses in optical fibers, absorption losses
2 Types of scattering losses- linear & non-linear scattering losses.
3
Bending losses, Dispersion mechanism in optical fibers during transmission, types of
dispersion,
4 Chromatic dispersion:- Material dispersion & waveguide dispersion
5 Intermodal dispersion in single mode & multimode step index & graded index fibers,
6 Polarization mode dispersion, review of the unit
Review Questions
Q1 Explain different types of losses in optical transmission link? CO310.3
Q2 Explain the effect of pulse broadening effect in optical fiber? CO310.3
Q3 What are different types of scattering losses in optical fiber? Explain each
in details?
CO310.3
Q4 Write a short note bending losses in optical fiber? CO310.3
T.E. (E&TC)-Semester-VII Page 38
Q5 What do you mean by signal attenuation in optical fiber? Explain
absorption loss in optical fiber
CO310.3
Q6 With the help of neat diagram explain intermodal dispersion in step index
& graded index fiber?
Section II
Unit No 04 Unit Title Optical Sources Planned
Hrs. 07
Lesson schedule
Class
No.
Details to be covered
1 Introduction to semiconductor light sources, absorption, stimulated & spontaneous
emission, hetero junction & homo-junction structures.
2 Construction & working of double heterojunction LED, different structures of LED’s.
3 Important parameters of LED, internal & external quantum efficiency, recombination
lifetime of charges.
4 Construction & working LASER diode, types of LASER diodes, distributed feedback
LASER
5 LASER diode structures & radiation, current & optical confinement techniques
6 Modal, partition & reflection noise in LASER diode.
7 Necessity of light source linearity, temperature effect on optical sources,
Review Questions
Q1 What are the essential requirements for good Optical sources? CO310.4
Q2 With the help of energy band diagram & refractive index profile explain
the construction & working of double hetero junction LED? CO310.4
Q3 Compare LED & LASER CO310.4
Q4 Discuss LASER diode structures & radiation patterns
Q5 Explain in detail structure, energy band diagram & refractive index profile
for hetero junction injection LASER.
Q6 Explain temperature effect on light sources, light source linearity &
reliability?
Unit No 05 Unit Title Optical Receiver Planned
Hrs. 06
Lesson schedule
Class
No.
Details to be covered
1 Principle of operation of photo diodes, its types& parameters.
2 Construction & working of PN & PIN photo diode.
3 Types of error sources in optical receiver, external & internal noise
4 Inter symbol interference, noise due to receiver amplifiers
T.E. (E&TC)-Semester-VII Page 39
5 Structure for InGaAs APDs, Temperature effect of Avalanche Gain, Comparison of Photo
detectors
6 Introduction to Analog receiver, expression for probability of error BER
Review Questions
Q1 Explain in details structure of InGaAs APD’s? CO310.5
Q2 Compare different photo detectors? CO310.5
Q3 With schematic diagram explain in detail receiver configuration? CO310.5
Q4 Explain optical detection principle of the photodiode & reach through
avalanche APD. CO310.5
Q5 Draw & explain structure for InGaAs APD’s. What is effect of
temperature on avalanche gain? CO310.5
Unit No 06 Unit Title Optical Networks Planned
Hrs. 05
Unit Outcomes:
Lesson schedule
Class No. Details to be covered
1 Introduction to WDM & its operating principle.
2 Types of passive components:- 2x2 coupler. Machzender interferometer, star coupler
etc.
3 Introduction to fiber Bragg gratings, Introduction to active optical components MEMS,
tunable optical filters etc.
4 Basic WDM networks SONET& SDH, Wavelength Routed Networks
5 Nonlinear Effects on Network Performance, Performance of WDM+EDFA Systems,
introduction to optical CDMA.
Review Questions
Q1 What are Wavelength Routed Networks? Explain in detail Solitons, Write
a note on Performance of WDM + EDFA Systems
CO310.6
Q2 Explain in detail with operational principle WDM. CO310.6
Q3
Write short note on
a) Tunable optical filters.
b) Ultra high capacity optical network
c) Optical CDMA
CO310.6
Q4 Explain in detail transmission format & speed in SONET: CO310.6
Q5 Explain in details passive components used in optical communication
system
CO310.6
Q6 Explain in details different network topologies, performance of linear
buses & power budget?
T.E. (E&TC)-Semester-VII Page 40
Model Question Paper
Course Title : Optical Communication & Networks
Duration:3hours Max.
Marks:100
Instructions:
1. Figures to right indicate full marks.
2. Draw neat sketch wherever necessary.
3. Assume additional data if required and state it clearly.
Section-I
Marks
1 a Explain in detail Elements of Optical Fiber Transmission Link. 09
b Write a note on 'Graded index Fiber Structures'. 08
2 a Explain the process of fabrication of Optical Fiber. 08
b Explain in detail different Optical Fiber Modes and Configurations. 08
3 a Write a note on’ Signal Distortion in Optical Waveguide’s. 08
b Explain the effect of Pulse Broadening in Graded-index Waveguide. 08
4 a Explain in detail with internal structure Light-Emitting Diodes (LEDs). 08
b Write a note on 'Partition and reflection Noise’ related to laser Diodes. 08
Section-II
Marks
5 a Explain with internal structure lnGaAs APDs. 09
b Compare different Photo-detectors. 09
6 a Explain in detail Fundamental Receiver Operation. 08
b Explain various parameters used for performance calculation of Optical
Receiver.
08
7 a Explain in detail with operational principle WDM? 08
b Write a note on Tunable filters? 08
8 a What are Wavelength Routed Networks? Explain in detail Solutions, I 08
b Write a note on Performance of WDM + EDFA Systems 08
Assignments
List of experiments/assignments to meet the requirements of the syllabus
Assignment No. 1
Assignment Title CO310.1
Batch I 1. What are the different techniques to improve the network information
rates?
2. Write a short note on:-
a) Simulation & modeling tools
b) Glass fiber
c) Acceptance angle
d) Numerical aperture
e) Critical angle
T.E. (E&TC)-Semester-VII Page 41
Batch II 1. Classify optical fibers on the basis of modes?
2. Explain different fiber materials and axial vapor phase deposition
technique of fiber fabrication?
Batch III 1. Explain the modified chemical vapor deposition technique (MCVD) &
how the fiber is drawn?
2. State different types of optical cables?
3. Explain mechanical properties of fibers? Find expression for failure
probability?
Batch IV 1. Explain the evolution of Fiber optics system.
2. Explain the need for optical fiber communication system.
3. Explain light transmission mechanisms through opticalfibers and
different types of optical fibers with necessary diagrams’.
Assignment No. 2
Assignment Title CO310.2
Batch I Explain the basic optical law and definitions
Explain the Fiber modes i.e. Step-Index fiber and Graded index fiber.
Explain the mode theory for circular Waveguides.
Batch II Explain the wave guide equations for Step Index fiber.
Explain the fiber optic cables.
Batch III Explain the single mode fiber with its advantages.
Explain the multimode fibers with its application.
Explain the Graded Index fibers,
Batch IV Explain the Fiber Materials.
Explain the fiber Fabrication
Explain the mechanical properties of fibers.
List of additional assignments /experiments
Assignment No. 3
Assignment Title CO310.3
Batch I Explain with internal structure lnGaAs APDs.
Compare different Photo-detectors.
Batch II Explain in detail Fundamental Receiver Operation.
Explain various parameters used for performance calculation of Optical
Receivers
Batch III Explain in detail with operational principle WDM.
Write a note on 'Tunable filters
T.E. (E&TC)-Semester-VII Page 42
Batch IV What are Wavelength Routed Networks? Explain in detail Solitons, Write
a note on Performance of WDM + EDFA Systems
T.E. (E&TC)-Semester-VII Page 43
Course Title - Industrial Management and Operation Research
Course Industrial Management and Operation
Research Course Code ETC311
Prepared by Mr.S.M.Ingale Date 29/11/2018
Prerequisites
Industrial management and operations research are closely related fields that deal with
the design, analysis, and control of complex systems that include people, machines,
material, and information, and the interactions of such systems with their environment.
Course Outcomes: At the end of the course the students should be able to:
CO311.1 Use1 techniques, skills for engineering practice.
CO311.2 Function2 on multidisciplinary teams
CO311.3 Exploring3 professional and ethical responsibility
CO311.4 Depth4 in conceptual and analytical foundations.
CO311.5 Exploring3 of the managerial skills and team work towards the growth of organization
CO311.6 Familiar1 with the entrepreneur skills and opportunities available from the Govt. for
SSI and MSI
Mapping of COs with POs
PO
CO a b c d e f g h i j k l PSO1
CO311.1 1 2
CO311.2 1 3 1 2
CO311.3 2 1 3
CO311.4 1
CO311.5 1 1 1
CO311.6 1 3 3 3
Course Contents
Unit No. Title No. of
Hours
Section I
1. Function of management 06
2. Marketing 06
3. Costing 06
Section II
4. Operation research and LPP 06
5. Assignment and Transportation Models 06
6. PERT and CPM 06
Reference Books/Text Books:
Sr.
No.
Title of Book Author Publisher/Edition Topics
T.E. (E&TC)-Semester-VII Page 44
1. Management for Businesses and
Industry. C.S. George . .
2. Industrial Organization. Bethel Atwater,
Smithy, Stackman
and Riggs
3. Essential of Management. Koontz , Odonell
4. Industrial Organization and
management. O.P. Khanna
5. Industrial management Tata M cGraw Hill
6. Qualitative Techniques L.C.Jhamb sharma
and Banga
7. Operation Research W.L. Winston Cengage Learning
8. Problems in OR Hira and Gupta
9. Introduction to Operation Research Gillet Tata Mc graw Hill
Examination
Scheme
Theory Term Work POE Total
Max. Marks 100 25 -- 125
Contact
Hours/ week
4 -- 4
Scheme of Marks
Section Unit No. Title Marks
with
options
I 1. Function of management 18
2. Marketing 16
3. Costing 16
II 4. Operation research and LPP 16
5. Assignment and Transportation Models 16
6. PERT and CPM 18
Course Unitization
Section
Unit Course
Outcomes
No. of Questions in
No. Title CAT-I CAT-II CAT III
I
1. Function of management 311.1 02
2. Marketing 311.2 02
3. Costing 311.3 02
II 4. Operation research and LPP 311.4 02
5. Assignment and 311.5 02
T.E. (E&TC)-Semester-VII Page 45
Transportation Models
6. PERT and CPM 311.6 02
Unit wise Lesson Plan
Section I
Unit No 01 Unit Title Function of Management Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Planning Nature, Types, Improvement, Forecasting methods and importance, Organization
Importance and Principles.
2 Staffing Procedure of staffing, performance, appraisal methods
3 Directing Leadership styles, Motivation Theeries-Maslows, Herzbergs, Mc Greqors
4 Comparative study of other configurations of differential amplifiers.
5 Communication Process types, Barriers and Remedies
6 Controlling- process
Review Questions
Q1 What can be done to make organizational planning more effective and efficient and
give one of the practical examples of the industry?
CO311.1
Q2 Explain in brief the functions of management? CO311.1
Q3 Discuss Herzberg’s theory of motivation. how can understanding of this theory help
managers more effectively to motivate subordinate?
CO311.1
Q4 “A leader is a follower”. Do you agree with this statement? What are the major
characteristics of a leader and a follower?
CO311.1
Q5 What is controlling? Discuss steps in controlling procedure. CO311.1
Q6 Describe why forecasting is important for industries. CO311.1
Q7 What are the theories of motivation? Describe any one. CO311.1
Unit No 02 Unit Title Marketing. Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Marketing and selling concept,
2 Marketing mix, Advertising- needs types, advantages and limitations.
3 Material Management - Purchase and its importance,
4 Policies and procedure, Five Rs of purchasing.
T.E. (E&TC)-Semester-VII Page 46
5 Inventory Control - Inventory costs, EOG analysis,
6 ABC analysis
Review Questions
Q1 Describe fully market research procedure CO311.2
Q2 What is marketing strategy? Explain the importance of 4p,s in marketing mix. CO311.2
Q3 What is marketing strategy? What are the product related decisions while
deciding marketing strategy?
CO311.2
Q4 Define and discuss the concept of integrated materials management. Also state
major functions of material management CO311.2
Unit No 03 Unit Title Costing Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Elements of cost, cost estimation procedure,
2 Entrepreneurship- importance, Qualities, function of entrepreneur
3 Small scale industries procedure of starting SSI unit, Difference Schemes for SSI.
4 Forms of Business Organization Single, partnership, Joint stock, co-operative and state and
central Govt.
5 Social responsibilities and business ethics- introduction
Review Questions
Q1 What are the different types of purchasing policies? Under what condition is each
appropriate? How does it improve the efficiency of organization?
CO311.3
Q2 Explain
1.Procedure to start small scale industry
2. Management information system.
CO311.3
Q3 “Risk taking ability becomes an important personality trait to become successful
entrepreneur”. Comment CO311.3
Q4 Define operation research and explain application of O.R.
CO311.3
Section II
Unit No 04 Unit Title Planned
Hrs.
08
Lesson schedule
Class
No.
Details to be covered
T.E. (E&TC)-Semester-VII Page 47
1 Introduction to Industrial management and operation Research.
2 Operations Research Definition, methodology, Scope and limitations.
3 Linear programming Concept, Formulation of LPP.
4 Examples on LPP
5 Graphical Method
6 Numerical on graphical method.
7 Simple method
8,9 numerical on Simplex method
Review Questions
Q1 Explain the following w.r.t.LPP
i. Initial or starting solution
ii. Concept of duality
Entering and leaving variables
311.4
Q2 Solve the following LPP using graphical method Maximize Z=50x1+30x2
subjected to
2x1+x2 >= 18
X1 + x2 >=12
3x1 + 2x2 <=34
X1 ,x2 >_=0
311.4
Unit No 05 Unit Title Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Assignment Problems Introduction Balanced, Unbalanced assignment.
2 Prohibitive type of assignments, Hungarian methods.
3 Transportation Problems For finding basic feasible solution by Northwest corner method.
4,5 Least cost method
6,7 Vogels approximation method
Unit No 06 Unit Title PERT AND CPM Planned
Hrs.
06
Lesson schedule
Class
No.
Details to be covered
1 Project Management Programmed Evaluation and review technique (PERT).
2 Critical Path Method (CPM).
3 Network analysis
4 Examples for Identifying critical path
5 Probability of completing the project within given time.
T.E. (E&TC)-Semester-VII Page 48
Model Question Paper
Course Title : INDUSTRIAL MANAGEMENT AND ORGANIZATION
RESEARCH
Duration Instructions: 1) Attempt all questions. Max.
Marks
03 Hours 2) Figures to the right indicates full marks. 100Marks
3) Assume suitable data if necessary.
Section-I
1 20
a What is marketing? What are the characteristics of Marketing? 12
b Explain marketing and Selling concept. 04
c What is Marketing mix explain briefly.
04
2 Solve any two 15
a What is inventory control Explain in detail. 07
b Define operation research and explain application of O.R. 08
3
Solve any two
15
a What are the importance of planning explain briefly. 08
b Write a note on following i) Maslows motivation theory
ii) Herzberg’s motivational theory
iii) Mc Groger thory.
07
Section-II
1 20
a Define operation research and briefly explain the methodology of OR
? 07
b Solve using graphical method maximize z =2 +
Subject to + <=10; + <=6; - <=2; - <=1;
, >=0
07
c maximize z=3 + + +5
Subject to 8 + + +2 <=10; 2 + + +4 <=5; +
+ + <=6; , >=0; Solve using simplex method.
06
2 15
a Four sales man are to be assigned to four districts, estimate of sales
revenue in thousands of rupees for each sales man are give below.
Districts
Sales man A B C D
1 32 35 40 28
2 40 25 30 22
3 42 27 34 30
05
T.E. (E&TC)-Semester-VII Page 49
4 25 39 41 35
Assign the sales man in different districts and find the profit.
b Find out the initial basic solution to the following transportation
problem using north west corner method.
D1 D2 D
3
D4 D5 SUPPLY
S1 3 4 6 8 9 20
S2 2 10 1 5 8 30
S3 7 11 20 40 3 15
S4 2 1 9 14 16 13
DEMAN
D
40 6 8 18 6
04
C Find out the initial basic solution to the following transportation
problem using Vogel’s method.
D
1
D2 D
3
D
4
SU
PPL
Y
S1 19 30 5
0
1
0
7
S2 70 30 4
0
6
0
9
S3 40 8 7
0
2
0
18
DEMAND 5 8 7 1
4
05
3
15
a
Consider the problem of assigning five operators to five machines.
The assignment costs are given below.
Operator/machines I II III IV V
A 10 5 13 15 16
B 3 9 18 3 6
05
T.E. (E&TC)-Semester-VII Page 50
C 10 7 2 2 2
D 5 11 9 7 12
E 7 9 10 4 12
b Four different jobs are to be done on four different machines. The
given table indicates the cost of producing job I on machine j in
rupees. Assing jobs to different machines so that the total cost is
minimized.
Machines/jobs I II III IV
1 5 7 11 6
2 8 5 9 6
3 4 7 10 7
4 10 4 8 3
05
C Explain the significance of PERT and CPM 05
T.E. (E&TC)-Semester-VII Page 51
Electronic System Design Course Plan
Course Code ETC312 Course Electronics System Design
Prepared by Mrs. Apte S.K. & Mrs.Narvekar.P.R. Date 29/11/2018
Prerequisites
This course requires students to know what is an op-amp, basic circuits using
op-amp, basic digital circuits and identifying blocks required for designing a
particular system.
Course Outcomes
At the end of the course the students should be able to:
C312.1 Design2 a digital measurement system using conventional components and discrete IC’s.
C312.2 Use1 phase locked loop for modulation and demodulation of analog signals for communication
C312.3 Design2 the basic circuits for audio and video signal amplification.
C312.4 Make use of3 the timers for various applications such as event counting, pulse
generation and delay generation.
C312.5 Design2 an entire instrumentation system for measuring various physical quantities and controlling the process variable using analog controllers like ON-OFF, Proportional and PID controllers.
C312.6 Design2 a Switched Mode Power Supply (SMPS) in different configurations such as step-up, step-down and invert and Digitize3 the systems by the use of microcontrollers
Mapping of COs with POs
POs
COs a b c d e f g h i j k l PSO1
CO312.1 2 1 2 1 2 3 2 1 3 1
CO312.2 3 3 2 2 3 3
CO312.3 1 1 2 3 2
CO312.4 3 2 1 2
CO312.5 2 1 2 1 2 3 2
CO312.6 1 3 1 2 2
T.E. (E&TC)-Semester-VII Page 52
Course Contents
Unit No. Title No. of
Hours
1
Digital Voltmeter
Design of 4-digit numeric display circuit, Design of 3 ½ digit
DVM, Study of IC 7107/7106. 03
2
Phase Locked Loop
Design of digital phase locked loops (cd 4046 & 565), Its use in
frequency synthesizer, frequency & phase demodulation,
Amplitude modulation.
03
3
Audio & Video Amplifiers
Audio amplifier: audio op-amp applications mike pre-amplifier with tone
control, study of LM 386. Video amplifier: Theory, voltage gain, NE 592,
filter applications.
05
4
Timers
Fundamentals of IC timers, 2240 Binary Programmable
Timer/counter, use of timers for event or interval timing, design of
frequency counter using IC 74C926 for the time & event Counting.
05
5
Sensor Signal Conditioning
for sensors to get output in standard range
1) Temperature – RTD, Thermocouple, Semiconductor LM 35,
AD549 and 1N4148
2) Strain gauge type transducers of 350 Ohm /120 Ohm bridge
configuration
3) V to I and I to V converters for std. input and output Standard input
output ranges – 0 to 2V (DVM), 0 to 5 V (Micro controller), 4 to 20
mA (Industrial)
4) Optical encoders
Process controllers using above transducers ON/OFF, proportional
and PID controller. Algorithm implementation only for any 8-bit
Micro controller based process controllers.
05
6
Switched Mode Power Supply
Introduction to SMPS, IC LM3524, Design of SMPS using LM 3524,
Step-up, Step-down and Invert mode.
Micro Controller Based Design
Design of process controllers PID, Standard bus interface design.
03
Text Books:
Sr. No. Title of Book Author Publisher/Edition Topics
1 Industrial Control Electronics Michel Jacob Prentice Hall 5
2 Intersil Data Manual - Intersil 1,4
3 Linear Integrated Circuits Ramakant Pearson 2
T.E. (E&TC)-Semester-VII Page 53
Gaikwad
4 Linear Data Manual -
National Semiconductors 3,6
Evaluation scheme
Examination
Scheme Theory Term Work POE Total
Max. Marks -- 25 50 75
Contact
Hours/ week 2 2 - 4
Unit wise Lesson Plan
Unit
No 1. Unit Title Digital Voltmeter
Planned
Hrs. 03
Lesson schedule
Class
No. Details to be covered
1 Working principle of Digital Voltmeter and design constraints.
2 Design of 3½ digit voltmeter.
3 Additional circuits for digital voltmeter and DVM using IC 7107
Review Questions
Q1 List the components required for counting circuit.
CO312.1
Q2 Explain the working principle of Digital Voltmeter.
Q3 Explain various blocks of digital voltmeter.
Q4 Explain astable and monostable multivibrator with circuit diagram.
Q5 Explain seven segment display types and the driver IC’s required for
each type.
Q6 Draw and explain auto polarity indicator and corrector circuit and
attenuator circuit.
Q7 Explain different phases of operation of IC 7107.
Unit
No 2 Unit Title Phase Locked Loop
Planned
Hrs. 04
Lesson schedule
Class Details to be covered
T.E. (E&TC)-Semester-VII Page 54
No.
1 Working principle of PLL, study of NE565 and CD4046.
2 Design of PLL using NE565 and CD4046.
3 Blocks of frequency synthesizer and its design.
4 Application of PLL for modulation and demodulation of signals.
Review Questions
Q1 What is a Phase Locked Loop? Explain its working principle.
CO312.2 Q2
Draw the pin-out of NE565 and CD4046 and explain functioning of
each
pin.
Q3 What is frequency synthesizer? Explain blocks of frequency synthesizer.
Q4 Explain use of PLL in modulation and demodulation of signals.
Unit
No 3. Unit Title Audio & Video Amplifiers
Planned
Hrs. 04
Lesson schedule
Class
No. Details to be covered
1 Basics of audio amplification, audio amplifier blocks and additional circuits.
2 Study of audio amplifier IC LM 386.
3 Basics of video amplification and related circuits.
4 Study of video amplifier IC NE592.
Review Questions
Q1 What is an audio amplifier? Explain the circuit related to it.
CO312.3 Q2 Draw the pin-out of IC LM 386 and explain use of each pin.
Q3 What is video amplifier? Explain various circuits related to it.
Q4 Draw the pin-out of IC NE 592 and explain use of each pin
Unit
No 4 Unit Title Timers
Planned
Hrs. 05
Lesson schedule
Class
No. Details to be covered
1 Fundamentals of IC timers and CMOS timers.
2 Study of IC 2240 binary programmable timer.
3 Design of frequency counter.
4 Study of IC 74C926.
5 Design of time period measurement circuit using IC 74C926.
Review Questions
T.E. (E&TC)-Semester-VII Page 55
Q1 What is a timer? What are its applications?
CO312.4
Q2 Explain principle used in frequency measurement.
Q3 Explain the principle of time period measurement.
Q4 Explain the use of each pin of IC 74C926. What are its advantages?
Q5 Explain use of binary programmable counter IC 2240.
Unit
No 5. Unit Title Sensor Signal Conditioning
Planned
Hrs. 05
Lesson schedule
Class
No. Details to be covered
1 Study of different temperature and pressure measurement sensors. Strain gauge type transducers of 350ohm/120ohm bridge configuration.
2 Designing of V to I and I to V converters for standard voltage and current ranges and use of optical encoders
3 Design of ON-OFF controller.
4 Design of Proportional controller.
5 Design of PID controller.
Review Questions
Q1 Write different types of temperature sensors along with their specifications
CO312.5
Q2 Draw and explain instrumentation amplifier.
Q3 Explain V to I and I to V converter using op-amp.
Q4 Explain working of ON-OFF controller.
Q5 Explain working of Proportional controller.
Q6 Compare ON-OFF, Proportional and PID controller
Unit
No 6 Unit Title Switched Mode Power Supply
Planned
Hrs. 03
Lesson schedule
Class
No. Details to be covered
1 Introduction to SMPS. Study of IC LM 3524 and use of each pin of it.
2 Various modes of SMPS such as Step-up, Step-down and Invert.
3 Design of process controllers using 8051.
Review Questions
Q1 Write the advantages and disadvantages of regulated power supplies.
CO312.5
Q2 Explain the working principle and different blocks of SMPS.
Q3 Write the advantages and disadvantages of SMPS.
Q4 Write the use of each pin of SMPS IC LM 3524.
Q5 Write design steps for designing SMPS in different modes like step-
T.E. (E&TC)-Semester-VII Page 56
up, step-down and invert
Q6 Draw the interfacing diagram of 8051 with ADC 0808.
Q7 Draw the interfacing diagram of 8051 with DAC 0808.
Q8 Write the algorithm for designing process controllers using Microcontroller
Q9 Explain standard buses for interfacing of 8051 microcontroller
Assignments
List of assignments to meet the requirements of the syllabus
Assignment No. 1
Assignment Title Digital Voltmeter CO
Batch I List the components required for counting circuit.
CO312.1 Batch II Explain the working principle of Digital Voltmeter.
Batch III Explain various blocks of digital voltmeter.
Batch IV Explain astable and monostable multivibrator with circuit
diagram.
Assignment No. 2
Assignment Title Phase Locked Loop CO
Batch I What is a Phase Locked Loop? Explain its working principle.
CO312.2 Batch II
Draw the pin-out of Ne565 and CD4046 and explain
functioning of each pin.
Batch III What is frequency synthesizer? Explain blocks of
frequency synthesizer
Batch IV Explain working principle of DTMF
Assignment No. 3
Assignment Title Audio and Video Amplifiers CO
Batch I What is an audio amplifier? Explain the circuit related to it.
CO312.3
Batch II Draw the pin-out of IC LM 386 and explain use of each
pin.
Batch III What is video amplifier? Explain various circuits related
to it.
Batch IV Draw the pin-out of IC NE 592 and explain use of each
pin
Assignment No. 4
Assignment Title Timers CO
Batch I What is a timer? What are its applications?
CO312.4
Batch II Explain principle used in frequency measurement.
Batch III Explain the principle of time period measurement.
Batch IV Explain the use of each pin of IC 74C926. What are its
T.E. (E&TC)-Semester-VII Page 57
advantages?
Assignment No. 5
Assignment Title Sensor Signal Conditioning CO
Batch I Write different types of temperature sensors along with their specifications.
CO312.5 Batch II Draw and explain instrumentation amplifier.
Batch III Explain V to I and I to V converter using op-amp.
Batch IV Explain working of ON-OFF controller.
Assignment No. 6
Assignment Title Switched Mode Power Supply CO
Batch I Write the advantages and disadvantages of regulated power supplies.
CO312.6 Batch II Explain the working principle and different blocks of
SMPS.
Batch III Write the advantages and disadvantages of SMPS.
Batch IV Write the use of each pin of SMPS IC LM 3524.
Lab Plan
Experiment No Experiment Title CO
1 Design of 3 ½ digit Digital Voltmeter using discrete IC’s CO312.1
2 Design of Digital Voltmeter using IC 7107 CO312.1
3 Design of Frequency Synthesizer using IC NE 565 CO312.2
4 Design of Frequency Synthesizer using IC CD 4046 CO312.2
5 Design of Frequency Counter using IC 74C926 CO312.4
6 Design of Time Period Measurement using IC 74C926 CO312.4
7 Design of ON-OFF Controller using op-amp CO312.5
8 Design of Proportional Controller using op-amp
CO312.5
9 Design of Switched Mode Power Supply (SMPS) using
LM 3524 CO312.6
List of Additional Experiments
1 Design of Audio Amplifier using LM 386 CO312.3
2 Microcontroller based ON-OFF controller CO312.7