Description UF3C065030B3oss 293 C rss 2 C oss(er) 215 pF C oss(tr) 480 pF E oss 17.5 mJ Q G 51 Q GD 11 Q GS 19 t d(on) 34 t r 16 t d(off) 56 t f 15 E ON 392 E OFF 113 E TOTAL 505 E

Rev. A, March 2019

Description

Features

Typical applications

Package

D2PAK-3L

650V-27mW SiC Cascode

United Silicon Carbide's cascode products co-package its high-

performance G3 SiC JFETs with a cascode optimized MOSFET to

produce the only standard gate drive SiC device in the market today.

This series exhibits ultra-low gate charge, but also the best reverse

recovery characteristics of any device of similar ratings. These

devices are excellent for switching inductive loads when used with

recommended RC-snubbers, and any application requiring standard

gate drive.

w Very low switching losses (required RC-snubber loss negligible

. under typical operating conditions)

w EV charging

w PV inverters

w Switch mode power supplies

w Power factor correction modules

w Motor drives

w Induction heating

w Typical on-resistance RDS(on),typ of 27mW

w Maximum operating temperature of 175°C

w Excellent reverse recovery

w Low gate charge

w Low intrinsic capacitance

w ESD protected, HBM class 2

Part Number Marking

UF3C065030B3 UF3C065030B3

DATASHEET

UF3C065030B3

TABD (2)

S (3)

G (1)

TAB

13

2

Datasheet: UF3C065030B3 Rev. A, March 2019 1

https://unitedsic.com/group/sic-fets/https://unitedsic.com/spice/uf3c065030b3.txthttps://unitedsic.com/contact/https://unitedsic.com/design-resources/https://unitedsic.com/products/sic-fets/uf3c065030b3/

Maximum Ratings

Symbol Value Units

VDS 650 V

VGS -25 to +25 V

65 A

47 A

IDM 230 A

EAS 120 mJ

Ptot 242 W

TJ,max 175 °C

TJ, TSTG -55 to 175 °C

TL 250 °C

1. Limited by TJ,max

2. Pulse width tp limited by TJ,max

3. Starting TJ = 25°C

Thermal Characteristics

Min Typ Max

RqJC 0.48 0.62 °C/W

UnitsParameter Symbol Test ConditionsValue

Thermal resistance, junction-to-case

Gate-source voltage DC

Max. lead temperature for soldering,

1/8” from case for 5 seconds

Power dissipation TC = 25°C

Maximum junction temperature

Operating and storage temperature

TC = 25°C

Pulsed drain current 2 TC = 25°C

Single pulsed avalanche energy 3 L=15mH, IAS =4A

IDTC = 100°C

Continuous drain current 1

Parameter Test Conditions

Drain-source voltage


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Electrical Characteristics (TJ = +25°C unless otherwise specified)

Typical Performance - Static

Min Typ Max

BVDS 650 V

6 150

30

IGSS 6 20 mA

27 35

43

VG(th) 4 5 6 V

RG 4.5 W

Typical Performance - Reverse Diode

Min Typ Max

IS 65 A

IS,pulse 230 A

1.3 1.4

1.35

Qrr 211 nC

trr 34 ns

Qrr 188 nC

trr 32 ns

Reverse recovery charge

Reverse recovery charge

Reverse recovery time

VR=400V, IF=40A,

VGS=-5V, RG_EXT=22W

di/dt=1500A/ms,

TJ=25°C

VR=400V, IF=40A,

VGS=-5V, RG_EXT=22W

di/dt=1500A/ms,

TJ=150°CReverse recovery time

Drain-source on-resistance RDS(on) mW

Parameter Symbol Test ConditionsValue

Units

Gate threshold voltage VDS=5V, ID=10mA

Gate resistance f=1MHz, open drain

Forward voltage VFSD

VGS=0V, IF=20A,

TJ=25°CV

VGS=0V, IF=20A,

TJ=175°C

Diode continuous forward current 1 TC=25°C

Diode pulse current 2 TC=25°C

Drain-source breakdown voltage VGS=0V, ID=1mA

VDS=650V,

VGS=0V, TJ=25°C

VDS=650V,

VGS=0V, TJ=175°C

Parameter Symbol Test ConditionsValue

Units

mATotal drain leakage current IDSS

Total gate leakage currentVDS=0V, TJ=25°C,

VGS=-20V / +20V

VGS=12V, ID=40A,

TJ=25°C

VGS=12V, ID=40A,

TJ=175°C



Typical Performance - Dynamic

Min Typ Max

Ciss 1500

Coss 293

Crss 2

Coss(er) 215 pF

Coss(tr) 480 pF

Eoss 17.5 mJ

QG 51

QGD 11

QGS 19

td(on) 34

tr 16

td(off) 56

tf 15

EON 392

EOFF 113

ETOTAL 505

ERS_ON 5.3

ERS_OFF 7.9

td(on) 32

tr 16

td(off) 57

tf 16

EON 370

EOFF 118

ETOTAL 488

ERS_ON 4.6

ERS_OFF 8.2

4. The switching performance are evaluated with a RC snubber circuit as shown in Figure 24.

Gate-source charge

Gate-drain chargeVDS=400V, ID=40A,

VGS = -5V to15VnC

Total gate charge

Total switching energy including RS

energy4

Turn-on delay time

VDS=400V, ID=40A,

Gate Driver =-5V to

+15V,

Turn-on RG,EXT=1.8W,

Turn-off RG,EXT=22W

Inductive Load,

FWD: same device with

VGS = -5V and RG = 22W,

RC snubber: RS=5W and

CS=330pF, TJ=150°C

nsRise time

Turn-off delay time

Fall time

Turn-on energy including RS energy4

mJ

Turn-off energy including RS energy4

Total switching energy including RS

energy4

Snubber RS energy during turn-on

Snubber RS energy during turn-off

Snubber RS energy during turn-on

Snubber RS energy during turn-off

Effective output capacitance, time

related

VDS=0V to 400V,

VGS=0V

COSS stored energy VDS=400V, VGS=0V

ns

Turn-off energy including RS energy4

Fall time

Turn-on energy including RS energy4

Turn-on delay time

Rise time

Turn-off delay time

VDS=400V, ID=40A,

Gate Driver =-5V to

+15V,

Turn-on RG,EXT=1.8W,

Turn-off RG,EXT=22W

Inductive Load,

FWD: same device with

VGS = -5V and RG = 22W,

RC snubber: RS=5W and

CS=330pF, TJ=25°C

mJ

ValueUnits

Reverse transfer capacitance

Effective output capacitance, energy

related

VDS=0V to 400V,

VGS=0V

pF

Parameter Symbol Test Conditions

Input capacitance

Output capacitanceVDS=100V, VGS=0V

f=100kHz



Typical Performance Diagrams

Figure 1. Typical output characteristics at TJ = -

55°C, tp < 250ms

Figure 2. Typical output characteristics at TJ = 25°C,

tp < 250ms

Figure 3. Typical output characteristics at TJ = 175°C,

tp < 250ms

Figure 4. Normalized on-resistance vs. temperature

at VGS = 12V and ID = 40A

0

50

100

150

200

0 1 2 3 4 5 6 7 8 9 10

Dra

in C

urr

en

t, I

D(A

)

Drain-Source Voltage, VDS (V)

Vgs = 15V

Vgs = 10V

Vgs = 8V

Vgs = 7.5V

Vgs = 7V

Vgs = 6.5V

0

50

100

150

200

0 1 2 3 4 5 6 7 8 9 10

Dra

in C

urr

en

t, I

D(A

)Drain-Source Voltage, VDS (V)

Vgs = 15V

Vgs = 10V

Vgs = 8V

Vgs = 7V

Vgs = 6.5V

0

50

100

150

200

0 1 2 3 4 5 6 7 8 9 10

Dra

in C

urr

en

t, I

D (A

)


Vgs = 15V

Vgs = 10V

Vgs = 8V

Vgs = 7V

Vgs = 6.5V

Vgs = 6V

0.0

0.5

1.0

1.5

2.0

-75 -50 -25 0 25 50 75 100 125 150 175

On

Re

sist

an

ce,

RD

S_O

N (P

.U.)

Junction Temperature, TJ (°C)



Figure 5. Typical drain-source on-resistances at VGS =

12V

Figure 6. Typical transfer characteristics at VDS = 5V

Figure 7. Threshold voltage vs. junction temperature

at VDS = 5V and ID = 10mA

Figure 8. Typical gate charge at VDS = 400V and ID =

40A

0

20

40

60

80

100

0 25 50 75 100 125 150

On

-Re

sist

an

ce,

RD

S(o

n)(m

W)

Drain Current, ID (A)

Tj = 175°C

Tj = 25°C

Tj = - 55°C

0

25

50

75

100

125

150

0 1 2 3 4 5 6 7 8 9 10

Dra

in C

urr

en

t, I

D(A

)

Gate-Source Voltage, VGS (V)

Tj = -55°C

Tj = 25°C

Tj = 175°C

0

1

2

3

4

5

6

-100 -50 0 50 100 150 200

Th

resh

old

Vo

lta

ge

, Vth

(V)


-5

0

5

10

15

20

0 10 20 30 40 50 60

Ga

te-S

ou

rce

Vo

lta

ge

, VG

S(V

)

Gate Charge, QG (nC)



Figure 9. 3rd quadrant characteristics at TJ = -55°C Figure 10. 3rd quadrant characteristics at TJ = 25°C

Figure 11. 3rd quadrant characteristics at TJ = 175°C Figure 12. Typical stored energy in COSS at VGS = 0V

-100

-75

-50

-25

0

-4 -3 -2 -1 0

Dra

in C

urr

en

t, I

D(A

)


Vgs = -5V

Vgs = 0V

Vgs = 5V

Vgs = 8V

-100

-75

-50

-25

0

-4 -3 -2 -1 0

Dra

in C

urr

en

t, I

D(A

)


Vgs = - 5V

Vgs = 0V

Vgs = 5V

Vgs = 8V

-100

-75

-50

-25

0

-4 -3 -2 -1 0

Dra

in C

urr

en

t, I

D(A

)


Vgs = - 5V

Vgs = 0V

Vgs = 5V

Vgs = 8V

0

5

10

15

20

25

30

35

40

45

0 100 200 300 400 500 600

EO

SS

(mJ)




Figure 13. Typical capacitances at f = 100kHz and

VGS = 0V

Figure 14. DC drain current derating

Figure 15. Total power dissipation Figure 16. Maximum transient thermal impedance

1

10

100

1,000

10,000

0 100 200 300 400 500 600

Ca

pa

cita

nce

, C

(p

F)


Ciss

Coss

Crss

0

10

20

30

40

50

60

70

80

-75 -50 -25 0 25 50 75 100 125 150 175

DC

Dra

in C

urr

en

t, I

D(A

)

Case Temperature, TC (°C)

0

50

100

150

200

250

300

-75 -50 -25 0 25 50 75 100 125 150 175

Po

we

r D

issi

pa

tio

n,

Pto

t(W

)

Case Temperature, TC (°C)

0.001

0.01

0.1

1

1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01

Th

erm

al

Imp

ed

an

ce, Z

qJC

(°C

/W)

Pulse Time, tp (s)

D = 0.5

D = 0.3

D = 0.1

D = 0.05

D = 0.02

D = 0.01

Single Pulse



(a) (b)

Figure 17. Safe operation area at TC = 25°C, D = 0,

Parameter tp

Figure 18. Reverse recovery charge Qrr vs. junction

temperture

Figure 19. Clamped inductive switching energy (a) and RC snubber energy loss (b) vs. drain current at TJ =

25°C, turn-on RG_EXT = 1.8W, and turn-off RG_EXT = 22W

0.1

1

10

100

1 10 100 1000

Dra

in C

urr

en

t, I

D (A

)


1ms

10ms

100ms

1ms

DC 10ms

0

50

100

150

200

250

0 25 50 75 100 125 150 175

Qrr

(n

C)


VDD = 400V, IS = 40A,di/dt = 1500A/ms,

VGS = -5V, RG =22W

0

100

200

300

400

500

600

700

800

0 10 20 30 40 50 60

Sw

itch

ing

En

erg

y (

mJ)


Etot

Eon

Eoff

VDD = 400V, VGS = -5V/15VRC snubber: CS=330pF, RS=5W, FWD: same device with VGS=-5V, RG = 22W

0

2

4

6

8

10

12

14

16

18

0 10 20 30 40 50 60

Sn

ub

be

r R

S E

ne

rgy

(m

J)


Rs Etot

Rs Eon

Rs Eoff



(a) (b)

(a) (b)

Figure 20. Clamped inductive switching turn-on energy including RC snubber energy loss (a) and RC snubber

energy loss (b) as a function of total external turn-on gate resistor RG_EXT

Figure 21. Clamped inductive switching turn-off energy including RC snubber energy loss (a) and RC snubber

energy loss (b) as a function of total external turn-off gate resistor RG_EXT

0

100

200

300

400

500

600

700

0 5 10 15 20 25 30

Tu

rn-o

n E

ne

rgy

, Eo

n (

mJ)

Total External Turn-on RG, RG_EXT (W)

VDD = 400V, ID = 40A,VGS = -5V/15V, TJ = 25°CRC snubber: CS=330pF, RS = 5WFWD: same device with VGS = -5V, RG = 22W

0

1

2

3

4

5

6

0 5 10 15 20 25 30

Tu

rn-o

n S

un

bb

er

RS

En

erg

y (

mJ)

Total External Turn-on RG, RG_EXT (W)

0

50

100

150

200

0 10 20 30 40 50

Tu

rn-O

ff E

ne

rgy

, Eo

ff (

mJ)

Total External Turn-off RG, RG,EXT (W)

VDD = 400V, ID = 40A,VGS = -5V/15V, TJ = 25°CRC snubber: CS=330pF, RS = 5WFWD: same device with VGS = -5V

0

2

4

6

8

10

0 10 20 30 40 50

Tu

rn-o

ff S

un

bb

er

RS

En

erg

y (

mJ)

Total External Turn-off RG, RG_EXT (W)



(a) (b)

(a) (b)

Figure 22. Clamped inductive switching energy including RC snubber energy loss (a) and RC snubber energy

loss (b) as a function of junction temperature at ID = 40A

Figure 23. Clamped inductive switching energy including RC snubber energy loss (a) and RC snubber energy

loss (b) as a function of snubber capacitance at ID = 40A and TJ = 25°C

0

100

200

300

400

500

600

700

0 25 50 75 100 125 150 175

Sw

itch

ing

En

erg

y (

mJ)


EtotEonEoff

VDD = 400V, VGS = -5V/15V, RG_ON = 1.8W, RG_OFF = 22W, FWD: same device with VGS=-5V, RG=22W, RC snubber: CS= 330pF, RS = 5W

0

2

4

6

8

10

12

14

0 25 50 75 100 125 150 175

Sn

ub

be

r R

S E

ne

rgy

(m

J)


Rs Etot

Rs Eon

Rs Eoff

0

100

200

300

400

500

600

700

0 200 400 600 800

Sw

itch

ing

En

erg

y (

mJ)

Snubber Capacitance, CS (pF)

EtotEonEoff

VDD = 400V, VGS = -5V/15VRG_ON = 1.8W, RG_OFF = 22WFWD: same device with VGS=-5V, RG=22W, RC snubber: RS = 5W

0

5

10

15

20

25

30

35

0 200 400 600 800

Sn

ub

be

r R

S E

ne

rgy

(m

J)

Snubber Capacitance, CS (pF)

Rs Etot

Rs Eon

Rs Eoff



Applications Information

Disclaimer

Like other high performance power switches, proper PCB layout

design to minimize circuit parasitics is strongly recommended due to

the high dv/dt and di/dt rates. An external gate resistor is

recommended when the cascode is working in the diode mode in

order to achieve the optimum reverse recovery performance. For

more information on cascode operation, see www.unitedsic.com.

United Silicon Carbide, Inc. reserves the right to change or modify

any of the products and their inherent physical and technical

specifications without prior notice. United Silicon Carbide, Inc.

assumes no responsibility or liability for any errors or inaccuracies

within.

Figure 24. Clamped inductive load switching test circuit

An RC snubber (RS = 5W and CS = 330pF) is required to improve the turn-off waveforms.

SiC cascodes are enhancement-mode power switches formed by a

high-voltage SiC depletion-mode JFET and a low-voltage silicon

MOSFET connected in series. The silicon MOSFET serves as the

control unit while the SiC JFET provides high voltage blocking in the

off state. This combination of devices in a single package provides

compatibility with standard gate drivers and offers superior

performance in terms of low on-resistance (RDS(on)), output

capacitance (Coss), gate charge (QG), and reverse recovery charge

(Qrr) leading to low conduction and switching losses. The SiC

cascodes also provide excellent reverse conduction capability

eliminating the need for an external anti-parallel diode.

Information on all products and contained herein is intended for

description only. No license, express or implied, to any intellectual

property rights is granted within this document.

United Silicon Carbide, Inc. assumes no liability whatsoever relating

to the choice, selection or use of the United Silicon Carbide, Inc.

products and services described herein.


Documents

Description UF3C065030B3oss 293 C rss 2 C oss(er) 215 pF C oss(tr) 480 pF E oss 17.5 mJ Q G 51 Q GD 11 Q GS 19 t d(on) 34 t r 16 t d(off) 56 t f 15 E ON 392 E OFF 113 E TOTAL 505 E