Design and Control of a Diode Clamped Multilevel Wind.pdf

8/11/2019 Design and Control of a Diode Clamped Multilevel Wind.pdf

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A. Hkansson et al. (Eds.): Sustainability in Energy and Buildings, SIST 22, pp. 797812.

DOI: 10.1007/978-3-642-36645-1_71 Springer-Verlag Berlin Heidelberg 2013

Chapter 71

Design and Control of a Diode Clamped Multilevel Wind

Energy System Using a Stand-Alone AC-DC-AC

Converter

Mona F. Moussa and Yasser G. Dessouky

Arab Academy for Science and Technology and Maritime Transport

Miami, P.O. Box: 1029, Alexandria, Egypt

[email protected]

Abstract. The major application of the stand-alone power system is in remote

areas where utility lines are uneconomical to install due to terrain, the right-of way

difficulties or the environmental concerns. Villages that are not yet connected to

utility lines are the largest potential market of the hybrid stand-alone systems using

diesel generator with wind or PV for meeting their energy needs. The stand-alone

hybrid system is technically more challenging and expensive to design than the

grid-connected system that simply augments the existing utility system.

Multilevel inverter technology has emerged recently as a very important alter-

native in the area of high-power medium-voltage energy control. This paper

presents the topology of the diode-clamped inverter, and also presents the relevantcontrol and modulation method developed for this converter, which is: multilevel

selective harmonic elimination, where additional notches are introduced in the

multi-level output voltage. These notches eliminate harmonics at the low or-

der/frequency and hence the filter size is reduced without increasing the switching

losses and cost of the system. The proposed modulation method is verified

through simulation using a five-level Diode-clamped inverter prototype. The sys-

tem consists of a 690V wind-driven permanent magnet synchronous generator

whose output is stepped down via a multiphase transformer, designed to eliminate

lower order harmonics of the generator current. The transformer secondary vol-

tages are rectified through an uncontrolled AC/DC converters to provide differentinput DC voltage levels of the diode clamp quazi phase multilevel inverter where

the pulse widths are adjusted to eliminate low order harmonics of the output vol-

tage whose magnitude is kept constant with different loading condition by con-

trolling the inverter switching and maintaining low total harmonic distortion

THD.

Keywords: Selective Harmonic Elimination, stand alone systems, converters,

wind energy, renewable energy and Diode clamped Multilevel Inverter.

1 Introduction

In this paper a regulated AC-DC-AC converter is studied, where the AC-DC converterhas lower THD while the elimination of harmonics using diode-clamped multilevel


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798 M.F. Moussa and Y.G. Dessouky

inverter (DCMLI) has been implemented. The problem of eliminating harmonics inswitching inverters has been the focus of research for many years. The current trend of

modulation control for multilevel inverters is to output high quality power with highefficiency. For this reason, popular traditional PWM modulation methods are not the

best solution for multilevel inverter control due to their high switching frequency. Theselective harmonic elimination method has emerged as a promising modulation controlmethod for multilevel inverters. The major difficulty for the selective harmonic elimi-

nation method is to solve the equations characterizing harmonics; however, the solu-tions are not available for the whole modulation index range, and it does not eliminateany number of specified harmonics to satisfy the application requirements. The pro-posed harmonic elimination method is used to eliminate lower order harmonics andcan be applied to DCMLI application requirements. The diode clamped inverter hasdrawn much interest because it needs only one common voltage source. Also, it isefficient, even if it has inherent unbalanced dc-link capacitor voltage problem [1].

However, it would be a limitation to applications beyond four-level diode clampedinverters for the reason of reliability and complexity considering dc-link balancing and

the prohibitively high number of clamping diodes [2].By increasing the number of levels in the inverter, the output voltages have more

steps generating a staircase waveform, which has a reduced harmonic distortion.However, a high number of levels increases the control complexity and introduces

voltage imbalance problems. Three different topologies have been proposed for multi-level inverters: diode-clamped (neutral-clamped) [8]; capacitor-clamped (flying capa-citors) [13]; and cascaded multicell with separate dc sources [14]-[17].

The system configuration, as shown in Fig.1, is made-up of wind stand-alone sys-tem, multi-phase transformer connected to pulse series-type diode rectifier, dc link

filter, diode clamped multilevel inverters, trap filters, and the load.

Fig. 1.Diode clamped multilevel wind energy system using a stand-alone AC-DC-AC converter

system


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71 Design and Control of a Diode Clamped Multilevel Wind Energy System 799

An interior permanent magnet synchronous generator IPMSG

is feeding a multi-

phase transformer with four secondary windings. In order to reduce the line generator

current THD, multipulse diode rectifiers powered by phase-shifting transformers are

often employed. Consequently, each winding of the transformer is connected to 6-

pulse series-type diode rectifier whose DC output is regulated by a DC link LC filterto feed a diode clamped inverters such that they are controlled independently in order

to improve the performance under different load conditions. The output voltage of the

inverter is supplying a three-phase 440V, 60kVA load with regulated voltage through

a feedback signal from output load voltage to control the pulse width of the upper

transistor.

2 Wind Stand-Alone System

The stand-alone wind system using a constant speed generator is has many features

similar to the PV stand-alone system. For a small wind system supplying local loads,

a permanent magnet IPMSG makes a wind system simple and easier to operate.

The battery is charged by an AC to DC rectifier and discharged through a DC to AC

inverter.

The wind stand-alone power system is often used for powering farms.In Germany,

nearly half the wind systems installed on the farms are owned either by individual

farmers or by an association. The generalized d-q axis model of the generator is used

to model the synchronous generator [19].

3

Multi-phase Transformer Connected to Pulse Series-Type

Diode Rectifier

Fig. 2 shows the typical configuration of the phase-shifting transformers for 12-pulse

rectifiers. There are two identical six-pulse diode rectifiers powered by a phase-

shifting transformer with two secondary windings. The dc outputs of the six-pulse

rectifiers are connected in series. To eliminate low-order harmonics in the line currentiA, the line-to-line voltage vab of the wye-connected secondary winding is in phase

with the primary voltage vABwhile the delta-connected secondary winding voltage v~bleads vABby = 30. The rms line-to-line voltage of each secondary winding is Vab=

V~b = K VAB/2. From which the turns ratio of the transformer can be determined

by [20]:

2and

, where Kis the step down ratio.

The configuration of a Y/Z-2 phase-shifting transformer is shown in Fig. 2, where the

primary winding remains the same as that in the Y/Z-1 transformer while the


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Fig. 2.12-pulse diode rectifier

secondary delta-connected coils are connected in a reverse order. The transformer

turns ratio can be found from:

30

30

30 0

1230

.

The phase angle has a negative value for the Y/Z-2 transformer, indicating that Vablags VAB by ||. The phase-shifting transformer is an indispensable device in

multipulse diode rectifiers. It provides three main functions: (a) a required phase dis-placement between the primary and secondary line-to-line voltages for harmonic can-cellation, (b) a proper secondary voltage, and (c) an electric isolation between therectifier and the utility supply [20].

4 Trap Filters

To attenuate the penetration of harmonics into the a.c system from a rectifier load, har-

monic filters can be connected to the neutral from each line. The manner in which the

harmonics currents are by-passed is to provide harmonic filters as shown in Fig. 3. For a

6-pulse system, tuned harmonic filters are provided for the 13thand 17thharmonic com-

ponents. For the higher order harmonics, a high pass filter is provided. Care must betaken to avoid excessive loss at the fundamental frequency. A practical problem is that

of frequency drift, which may be as much as 2% in a public supply system. Either the

filters have to be automatically tuned or have a low Q-factor to be effective.


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Fig. 3.Harmonic trap filter

When, trap filters are designed to eliminate the 11th

harmonic, they do this by pro-

viding a low impedance path for that harmonic [21].

5 Diode-Clamped Multilevel Inverter

The diode-clamped inverter, or the neutral-point clamped (NPC) inverter, effectively

doubles the device voltage level without requiring precise voltage matching [22].

Fig. 4.Diode-clamped five-level multilevel inverter circuit topologies


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Fig. 4 shows a five-level diode-clamped converter in which the dc bus consists of

four capacitors, C1, C2, C2, and C1. For dc-bus voltage Vdc, the voltage across each

capacitor is Vdc1, Vdc2, Vdc2, and Vdc1 respectively, and each device voltage stress will

be limited to one capacitor voltage level Vdc/4 through clamping diodes [23]-[25].

To explain how the staircase voltage is synthesized, the neutral point n is consi-dered as the output phase voltage reference point. There are five switch combinations

to synthesize five level voltages across a and n.

1. For voltage level Van= Vdc1, turn on all upper switches S1S4.

2. For voltage level Van= Vdc2, turn on three upper switches S2S4and one lower

switch S1'.

3. For voltage level Van= 0, turn on two upper switches S3and S4and two lower

switches S1'and S2'.

4.

For voltage level Van= -Vdc1, turn on one upper switch S4 and three lower switch-es S1' S3'.

5. For voltage level Van= -Vdc2, turn on all lower switches S1' S4'.

6 Determination of Output Waveform Shape

The concept of the proposed technique is to combine the selective harmonic eliminated

PWM method with the optimised harmonic step waveform method. The Selective

Harmonic Elimination (SHE) method introduces additional notches in the basic voltagewaveform of the square wave inverter. The inverter output voltage is chopped a

number of times at an angle(s) to eliminate the selected harmonic(s) [26]-[29]. These

angles are calculated in off-line correlating the selected harmonics to be eliminated in

the inverter output voltage. In similar lines, for the multilevel inverter, the notches are

optimised to eliminate the lower order harmonics in the output voltage of a multilevel

inverter. In the Optimized Harmonic Stepped-Waveform Technique OHSW method

the number of switching is limited to the number of level of the inverter [30].

Fig. 5.Output voltage waveform of a diode clamped inverter


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The output voltage waveform V(t) shown in Fig. 6 can be expressed in Fourier se-

ries as [31]:

Vt V sinn (1)

The amplitude of the nthharmonic is expressed only with the first quadrant switching

angles 1, 2, as:-

V

Hcosn Hcosn (2)

Where 0

Vnis equated to zero for the harmonics to be eliminated [31], as follows:

V 0 Hcos5 Hcos5 (3)

V 0 Hcos7 Hcos7 (4)

V 0 Hcos11 Hcos11 (5)

These are three equations and also:

H H 1 (6)

Solving these four equations together using MATHCAD software, the value of H1, H2,1, and 2can be obtained as shown in table 1. Having got the values of the angles

and DC voltage heights H, the spectrum analysis using Fourier Transformation for theoutput voltage can be obtained.

Table 1.

1 = 10.97; 2 = 35.24;

H1= 0.634; H2= 0.365;

7

Simulation

The stabilized AC-DC-AC power supply used is shown in Fig. 6 which consists of a

step down transformer with one primary and four secondary and whose turns ratio are

(0.8:H1), (0.8:H2), followed by an uncontrolled rectifier and then a dc link low pass

filter, therefore, two different DC voltages are obtained. Each DC voltage is feeding a

quazi-single inverter whose angles are 1, and 2 (given in table I) which are clamped

to get the required wave form. This system consists of a load voltage feedback control

signal in order to maintain the voltage of the load constant at 380V irrespective of the

loads variations by controlling the DC voltage levels of through the controlled rectifi-

ers. The inverters operate at 60Hz. The system has been tested from 10% to 20% offull load at time t = 0.9s, from 80% to 100% of full load at time t = 1.9s, and from

100% to 110% of full load at time t = 2.9s. The transient response results are shown in

Fig. 7.


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Fig. 6.Simulink block diagram

The proposed simulink system configuration is shown in Fig. 7, where a three-

phase 50kVA, 690V step-up transformer has one primary coil and four secondary

coils which feed three bridge rectifiers, which are cheap since they are uncontrolled

devices in converting the AC to DC. Each bridge rectifier is connected to a DC/AC

diode clamped inverter. The output voltages of the inverters are clamped together and

connected to supply a three-phase 380V, 60kVA load with regulated voltage througha feedback signal from output load voltage to control the thyristor rectifiers.

The value of the inductance of the 1st trap filter is 0.0022 H, while that of the 2nd

trap filter is 0.0013H. Both trap filters have a capacitance of 19.2F. The value of the

inductances of the four DC link filters are the same L1, L2, L3, L4 = 5mH, while the

capacitances of the 1stand 4thDC link filters are C1 = C4= 17600 F. and the capacit-

ances of the 2ndand 3rdDC link filters are C2 = C3= 8800 F.

(a) (b)

Fig. 7.(a) RMS output current, (b) Duty ratio K1

Discrete,

Ts = 1e-005 s.

powergui

v+-

v+-

v+-A

B

C

a1

b1

c1

a2

b2

c2

a3

b3

c3

a4

b4

c4

Transformer

A

B

C

+

-

A

B

C

+

-

A

B

C

+

-

A

B

C

+

-

A

B

C

a

b

c

A B C

A B C

A

B

C

A

B

C

A B C

AB C

A B C

AB C

C

P

S1

S2

S3

N

Phase_C

B

P

S1

S2

S3

N

Phase_B

A

P

S1

S2

S3

N

Phase_A

node 1

node 1 node 1node 1node 1

L4

L3

L2

L1

w

mA

B

C

IPMS Gen

-K-InRMS

wr

440

K1

A

BC

CONTROL

SIGNALS

C4

C3

C2

C1

Add

PID

Voltage

Controller

0 0.5 1 1.5 2 2.5 3 3.5 40

50

100

150

Time, (S)

R

M

S

O

u

tp

u

t

C

u

rren

t,

(A

)

0 0.5 1 1.5 2 2.5 3 3.5 4-700

-600

-500

-400

-300

-200

-100

0

100

200

300

400

Time Sec

D

u

ty

R

atio

,K

1

%


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(a)

(b)

(c) (d)

Fig. 8.InstantaneousO/P current, with its spectrum analysis at: (a) 10%, (b) 80%, (c) 100%,(d) 110% of the load

0.9 0.905 0.91 0.915 0.92 0.925 0.93 0.935 0.94 0.945-20

-10

0

10

20

Output Current at 0.9s, (A)

Time (s)1.9 1.905 1.91 1.915 1.92 1.925 1.93 1.935 1.94 1.945

-100

0

100

utput urrent . s,

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)

Fundamental (60Hz) = 17.77 , THD= 8.33%

M

ag(

%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Fre uenc Hz


M

ag(

%

o

fFundam

ental)

2.9 2.905 2.91 2.915 2.92 2.925 2.93 2.935 2.94 2.945-200

-100

0

100

200


Time s

3.9 3.905 3.91 3.915 3.92 3.925 3.93 3.935 3.94 3.945

-200

-100

0

100

200


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag(

%

ofFun

dam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)

Fundamental (60Hz) = 204 , THD= 0.80%

M

ag(

%

ofFu

ndam

ental)


10/16


(a) (b)

(c) (d)

Fig. 9.Instantaneous O/P voltage, with its spectrum analysis at: (a) 10%, (b) 80%, (c) 100%,

(d) 110% of load

0.9 0.905 0.91 0.915 0.92 0.925 0.93 0.935 0.94 0.945

-500

0

500

upu o age a . s, vo

Time s

1.9 1.905 1.91 1.915 1.92 1.925 1.93 1.935 1.94 1.945400

200

0

200

400

Output Voltage at 1.9s, (volt)

Time s

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Fre uenc Hz


M

ag(%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag

(%

ofFundam

ental)

2.9 2.905 2.91 2.915 2.92 2.925 2.93 2.935 2.94 2.945-400

-200

0

200

400


Time s

3.9 3.905 3.91 3.915 3.92 3.925 3.93 3.935 3.94 3.945-400

-200

0

200

400


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag(

%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag(

%

ofFundam

ental)


11/16


(a) (b)

(c) (d)

Fig. 10.Strain voltage, with its spectrum analysis at: (a) 10%, (b) 80%, (c) 100%, (d) 110% of

the load

0.9 0.905 0.91 0.915 0.92 0.925 0.93 0.935 0.94 0.945

-500

0

500

Strain Voltage at 0.9s, (volt)

Time (s)

1.9 1.905 1.91 1.915 1.92 1.925 1.93 1.935 1.94 1.945-500

0

500


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Fre uenc Hz


M

ag

(%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Fre uenc Hz


M

ag(

%

ofFundam

ental)

2.9 2.905 2.91 2.915 2.92 2.925 2.93 2.935 2.94 2.945

-400

-200

0

200

400

Strain Voltages at 2.9s,(volt)

Time (s)

3.9 3.905 3.91 3.915 3.92 3.925 3.93 3.935 3.94 3.945

-400

-200

0

200

400


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)

Fundamental (60Hz) = 453.2 , T HD= 18.10%

M

ag(

%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag(%

ofFundam

ental)


12/16


(a) (b)

Fig. 11.(a) DC current I1, (b) DC current I2

(a) (b)

Fig. 12.Input current, with its spectrum analysis at: (a) 10%, (b) 80%, (c) 100%, (d) 110% of

the load

0 0.5 1 1.5 2 2.5 3 3.5 40

50

100

150

Time, (S)

D

C

C

u

rren

t,

I1

(A

)

0 0.5 1 1.5 2 2.5 3 3.5 40

20

40

60

80

100

120

140

160

Time, (S)

D

C

C

u

rrent,

I2

(A

)

0.9 0.91 0.92 0.93 0.94 0.95

-5

0

5

Input Current at 0.9s, (A)

1.9 1.91 1.92 1.93 1.94 1.95

50

0

50


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag

(%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)


M

ag

(%

ofFundam

ental)


13/16


(c) (d)

Fig. 12.(continued)

It should be noted that some power suppliers use the transformer after the DC to

AC inverter to step up the voltage in the 60 Hz frequency level [32] while in this sys-

tem the step up transformer is used before the AC to DC rectifier in the 50 Hz fre-

quency level which has an advantage of lower iron core losses and less noise. The

results of Fig. 8 to Fig. 13 show that the effectiveness of this AC/DC/AC converter to

supply a regulated AC voltage regardless of the load changes with low THD.

From the simulation results, it can be noted that the phase-shifting transformer is

an indispensable device in multipulse diode rectifiers. It provides three main func-

tions: (a) a required phase displacement between the primary and secondary line-to-

line voltages for harmonic cancellation, (b) a proper secondary voltage, and (c) an

electric isolation between the rectifier and the utility supply. Also, it is clear that the

trap filters are provided to eliminate the 13th

and 17th

harmonic components.

The inverters are diode clamped together to result in an output voltage free of 3rd,

5th, 7th, 9thand 11thharmonics. The result showed that the output voltage resulted in an

almost sinusoidal current.

8 Conclusion

The selected harmonic elimination is a popular issue in multilevel inverter design.

The proposed selective harmonic elimination method for DCMLI has been validated

in simulation. The simulation results show that the proposed algorithm can be used toeliminate any number of specific lower order harmonics effectively and results in a

dramatic decrease in the output voltage THD. In the proposed harmonic elimination

method, the lower order harmonic distortion is largely reduced in fundamental switch-

ing. Multilevel inverters include an array of power semiconductors and capacitor

2.9 2.91 2.92 2.93 2.94 2.95-100

-50

0

50

100


Time (s)3.9 3.91 3.92 3.93 3.94 3.95

-100

-50

0

50

100


Time (s)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Fre u enc Hz


M

ag

(%

ofFundam

ental)

0 100 200 300 400 500 600 700 800 900 10000

20

40

60

80

100

Frequency (Hz)

Fundamental (50Hz) = 99.66 , THD = 10.75%

M

ag(

%

ofFundam

ental)


14/16


voltage sources, the output of which generate voltages with stepped waveforms. The

commutation of the switches permits the addition of the capacitor voltages, which

reach high voltage at the output, while the power semiconductors must withstand only

reduced voltages. Thus, by increasing the number of levels in the inverter, the output

voltages have more steps generating a staircase waveform, which has a reduced har-monic distortion. However, a high number of levels increases the control complexity

and introduces voltage imbalance problems. The most attractive features of multilevel

inverters are that, not only, they draw input current with very low distortion, but also,

they generate smaller common-mode (CM) voltage, thus reducing the stress in the

motor bearings. In addition, using sophisticated modulation methods, CM voltages

can be eliminated.

A high performance static AC-DC-AC converter is designed. The controller has a

good control property. The system topology adopts two single-phase diode clamped

inverters such that they are controlled independently in order to improve the perfor-mance under different load conditions. It is clear that, the phase-shifting transformer

is an indispensable device in multipulse diode rectifiers, since it provides three main

functions: (a) a required phase displacement between the primary and secondary line-

to-line voltages for harmonic cancellation, (b) a proper secondary voltage, and (c) an

electric isolation between the rectifier and the utility supply. With the help of the de-

veloped algorithm, the switching angles are computed from the non-linear equation

characterizing the Selective Harmonic Elimination problem to contribute minimum

THD in the output voltage waveform. Therefore, lower order harmonics like 3 rd, 5th,

7

th

, 9

th

, 11

th

,

13

th

, and 17

th

are eliminated and higher-order harmonics are optimizedin case of fundamental switching without using PWM. The selected harmonic elimi-

nation is a popular issue in multilevel inverter design. The proposed selective harmon-

ic elimination method has been validated using Matlab Simulink. The simulation

results show that the proposed algorithm can be used to eliminate any number of

specific lower order harmonics effectively and results in a dramatic decrease in the

output voltage THD. In the proposed harmonic elimination method, the lower order

harmonic distortion is largely reduced in fundamental switching.

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