Design and Experimental Operation of a Control

7/27/2019 Design and Experimental Operation of a Control

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in a variable operating-point condition. Here lies thecomplexity of this inverter. Several techniques have beenproposed to control the buckboost [616]. Many of themare based on the well-known small-signal linear models suchas current-mode control [69], robust control, H

Ncontrol

and fuzzy logic control [1014]. However, small-signalmodels are calculated for a particular point of operationand are valid to control the DCDC converter only forsmall variations around this point. In the buckboostinverter, the output voltages of both buckboost convertersexperience large variations, and therefore these controltechniques are not appropriate to achieve an accurate andstable control of both the buckboost converters in such avariable operating condition. The sliding-mode control is atechnique that can deal with this condition [2, 15, 16].However, it has some disadvantages related to the requiredcomplex theory, the variable switching frequency, the lackof control of the average inductance current and the con-straints in the selection of the controller parameters [17, 18].

To control both buckboost converters, this paperproposes a double-loop control strategy that is able tocontrol them in a variable operating point condition. Aninitial first theoretical approach of the proposed controlstrategy was introduced in [4]. Now, a prototype has been

physically implemented and experimentally tested. Thecontrol strategy is based on the averaged continuous-timemodel of the buckboost converter [19] and consists of anew inner control loop for the inductor current and an alsonew outer control loop for the output voltage. Both loopsinclude compensations to decouple the converter modelseen by the controller from the point of operation. In thisway, the strategy is able to control both buckboostconverters in a variable operating condition such as that onerequired by the buckboost inverter. Additionally, thecontrol strategy makes use of some feed-forward compen-sations to improve the robustness against both input voltageand output AC disturbances. Simulation and experimentalresults validate the good qualities of the proposed controlstrategy. As shown, both buckboost output voltages, andthen the differential output alternating voltage, areaccurately controlled, with high robustness against externaldisturbances. In addition, the direct control of the currentmakes possible to achieve a high reliability against transientshort circuits and nonlinear loads, which can be in fact asource of small short circuits. The proposed controltechnique can be therefore considered as an advantageousalternative to the previously mentioned techniques.

2 Control scheme for buckboost DCDC converter

2.1 Buck-Boost averaged continuous-time

modelThe proposed control strategy is now developed andcustomised for the buckboost 1 of Fig. 1. The controlscheme for the second buckboost is the same.

The averaged continuous-time model of buckboost 1 isgiven by the following expressions, where iC1, iL1 and iO1 arethe capacitor, inductor and output currents, vL1, vINand vO1are the inductor, input and output voltages, and d1 is theaveraged continuous-time duty cycle

vL1 vINd1 1 d1vO1 1iC1 1 d1iL1 iO1 2

Concerning the inductance L1 and capacity C1, whoseinternal resistances are rL1 and rC1, their differential

equations are

vL1 rL1iL1 L1 diL1dt

3

iC1 rC1C1 diC1dt

C1 dvO1dt

4The model given by (1) to (4) describes the buckboostdynamic behaviour up to half the switching frequency [19].These equations show bilinear dynamics that make thecontrol of the buckboost quite difficult. To deal with it, adouble-loop control scheme is proposed with a new innercontrol loop for the inductor current and an also new outercontrol loop for the output voltage.

2.2 Proposed inner control loop forinductor currentThe proposed inner control loop for the inductor current isshown in Fig. 2. Capital letters are used for the variables inthe block diagram. The system to be controlled is defined by(1) and (3). In this system the term vO1+vIN behaves as avariable gain, and vO1 as an external disturbance. The inputto the system is the duty cycle d1. If this variable is chosen tobe the control variable, the variable gain vO1+vIN makesvery difficult, almost impossible, the design of a controllerthat stabilises the system under a variable operatingcondition. The proposal is to choose the inductor voltagevL1 as the control variable instead of the duty cycle d1, asshown in Fig. 2. From the inductor voltage referencegenerated by the controller vL1ref, the duty cycle d1 can beobtained by means of the following expression, derivedfrom (1):

d1 vLref vO1vO1 vIN 5

The proposed control scheme can also be considered fromanother point of view. First, the variable gain vO1+vIN iscompensated by means of its inverse value. This compensa-tion can be made thanks to the much higher bandwidth ofthe current loop in comparison with the output voltagebandwidth. Secondly, the influence of vO1 is cancelled by

adding to the loop its sensed and filtered value withopposite polarity, which acts in fact as a feedforwardcompensation. With these compensations, the plant to becontrolled is just the inductor transfer function, and then a

PI+

+

+

+

IL1ref

IL1ref

VL1ref

V01

V01

filter

filter

filter

11+T

fs

11+T

fs

freezing of integral

1

V01f

+VINf

d1

VIN

converter

V01+V

IN

VL1

IL11

rL1

+ L1s

1+Tfs1

Fig. 2 Proposed inner control loop for inductor current

IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 661
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simple proportionalintegral (PI) controller can be used.The required division in (5) is not a problem as thedenominator is always greater than zero, and can be doneby means of either simple analogue circuits or digitalprogramming. Finally, the duty cycle is limited in order toavoid extreme voltages and a non-constant switchingbehaviour, with the corresponding freezing action of theintegral term.

2.3 Proposed outer control loop for output

voltageThe scheme of the outer control loop proposed for theoutput voltage is shown in Fig. 3. Again, capital letters areused for the variables. This scheme is based on the samephilosophy as the current loop. The system to be controlledis defined now by the (2) and (4), and the current controlloop. If the reference for the current loop iL1refwere chosento be the control variable, the plant seen by the controllerwould exhibit a gain defined by 1d1. This gain is variablebecause the buckboost operates in a variable operatingcondition. The proposal is now to use the capacitor currentas the control variable. However, the reference for theinductor current cannot be directly obtained by means of

(2) as that implies the use of the duty cycle. The dynamics ofthe duty cycle are defined by the inner current loop, and itsuse to calculate the reference for this loop would coupleboth loops and could make the system unstable. Theproposed solution is to compensate 1d1 with (vIN+vO1)/vIN, as shown in the control scheme of Fig. 3. With thissolution, duty cycle variations up to the voltage loopbandwidth will be successfully compensated and voltagereferences in this frequency range will be accurately trackedby the control loop. In addition, the current iO1, which is thesame as iO, acts as an external perturbation that affects thecontrol loop, especially during sudden load variations. Afeedforward compensation is again used to minimize thiseffect. With these compensations, the current reference iL1ref

is then obtained from the following expression, in which thecontrol variable is the reference for the capacitor currentiC1ref:

iL1ref vIN vO1vIN

iC1ref iO1 6

Again, the proposed compensations can be done by meansof simple analogue circuits or digital programming. As theinductor current can be considered instantaneously con-trolled from the point of view of the voltage control loop,the plant to be controlled appears as the capacitor transferfunction. Therefore a PI controller can be again used and

easily designed by traditional techniques. The currentreference is limited and the corresponding freezing actionis taken over the integral part in this situation.

3 Control of buckboost DCAC inverter

To achieve an alternating voltage at the output of theinverter, both buckboost DCDC converters are drivenwith two DC-biased 1801 phase-shifted voltage references

vOref ffiffiffi2

pVrms sin 2pft 7

vO1ref VDC 12vOref VDC 1ffiffiffi

2p Vrms sin 2pft 8

vO2ref VDC 12vOref VDC 1ffiffiffi

2p Vrms sin 2pft 9

where vOref is the reference for the buckboost inverter,vO1refand vO2refare the references for both individual buckboost converters, f and Vrms are the frequency and RMSvalue of the output voltage, and VDCis the DC-bias voltage.The main disadvantage of the independent referencesshown in (8) and (9) is that the output voltage is notdirectly controlled. It can therefore be affected by DCoffsets and show a poor rejection to external disturbances.An alternative is to drive one buckboost with anindependent reference (e.g. buckboost 1), and then usethe other buckboost to control directly the inverter outputvoltage [4, 18]

vO2ref vO1 vOref vO1 ffiffiffi2

pVrms sin 2pft 10

This alternative is used in the implementation of the controlstrategy on the prototype inverter.

4 Simulation analysis

4.1 Prototype inverterTo validate the proposed control strategy a prototypebuckboost inverter has been designed and built and theproposed control strategy implemented. The parameters ofthe prototype inverter are

L1 L2 128mH C1 C2 80mFfs 20 kHz PN 1:5 kWvIN 48 V Vrms 125 VVDC 108 V f 60Hz 11

where the only parameters that have not been mentionedbefore are fs, which is the switching frequency, and PN,which denotes the rated power. The inductances exhibitinternal resistances of around 10mO. Those of thecapacitors are close to 350 mO.

The simulation results have been obtained by means ofMatlab/Simulinks and are shown in this Section. The

physical implementation of the prototype inverter isdescribed in the following Section together with theexperimental results.

+

+

+

V01ref

V01fil

+

PI

filter

I01 1

1+Tfs

IC1ref

1

1+Tfs

1

1+Tfs

VINf+V

01f

VINf

VIN

IL1ref IL1

I01

V01IC1

1 1d1C

1s

1+rC1

C1s

converter

current loop

filter

filter

freezing of integral

Fig. 3 Proposed outer control loop for output voltage

662 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
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The prototype inverter incorporates the proposed controlstrategy. The double-loop control scheme already describedtogether with the proposed current and voltage controlloops is implemented in each buckboost. The controllersare designed to track voltage references of 60 Hz. Thespecifications for the PI controller of the current loop are abandwidth of 4 kHz and a phase margin of 501. For the PIcontroller of the voltage loop, the bandwidth is set to500Hz and the phase margin to 501. With these specifica-tions, the proportional and integral constants (KP and Tn,respectively) are 3.51 and 1.64

104 for the current loop,

and 0.202 and 4.31 104 for the voltage loop. Thesaturation limits for the current reference can be selected asa trade-off between the maximum allowable overcurrent intransient situations and the rated characteristics of theinverter elements. According to these design guidelines, thelimits are set to 125 and 50 A for the prototype inverter.Finally, the references for both buckboost of the inverterare set in the way described by (8) and (10).

4.2 Simulation resultsSimulation results for the inverter operating at rated powerare shown in Fig. 4. As shown, the proposed controlscheme achieves an accurate control of the voltages and

currents, with a Total harmonic distortion (THD) of theinverter output voltage of 0.68%.

The robustness of the control strategy against distur-bances in the input voltage is shown in Fig. 5. Now, a 10%120Hz square-wave disturbance has been added to theinput voltage. Due to the compensations included in theloops, both buckboost reject effectively this disturbance,and then the inverter output voltage remains stable andcontrolled.

The reliability of a generation unit when supplying loadsin an autonomous electric network, particularly its ability toovercome transient situations with no activation of itsprotections, is a very important aspect. Transient shortcircuits are a typical example of these situations. They canappear as a consequence of the connection of non-linearloads consisting of a diode bridge and a flat capacitor. Theycan also appear due to faults in the loads connected to theinverter. In this case, the short circuit lasts until the loadprotection fuse blows. These situations are tested in Fig. 6and 7. In Fig. 6, a nonlinear load consisting of a diodebridge, a flat capacitor and a resistive load, is suddenlyconnected while the inverter is already supplying 70% ofnominal power to a linear load. Figure 7 shows the inverterresponse to a short circuit of 1ms at the output when it issupplying rated power. In both situations, the currents arecontrolled up to their saturation limits (125 A and 50 A)during the short circuits, and the system returns to normal

behaviour when they finish with high stability and nooscillations.

5 Experimental validation

5.1 Physical implementation of 1.5 kWprototype inverterThe parameters of the prototype inverter were indicated in(11). Inductors L1 and L2 are two 128mH 60 A-rated RMS-current inductors. The choice of inductor RMS-current isbased on the theoretical current waveform, which has beenobtained by means of solving the corresponding differentialequation by numerical methods. Capacitors C1 and C2 aretwo 80mF 500 V electrolytic capacitors. For the switching

stage of both buckboost circuit two SemikronSKM150GB123D modules are used [20]. Both are mountedon a Semikron P16/350 heatsink. Drivers for the IGBT are

of type SKHI 23/12, also from Semikron, and the on- andoff-gate resistances are 6.8O.

The overall implementation of the control strategy isshown in Fig. 8. The voltage control loops of both buckboost converters as well as the generation of their referencesare digitally implemented on a DS1104 board fromdSPACE [21]. The current control loops are implementedtogether with the generation of the PWM switchingcommands in an analogue board. This board receives fromthe DS1102 board the current references. The duty cycles d1and d2 are calculated from the current control loops, andthen the PWM switching commands are generated for theSKHI 23/12 drivers. The duty cycles are limited to between

vO

1,vO1ref,vO2,vO2ref,vIN,

V

0

250

200

150

100

50

time, s

0 0.01 0.02 0.03 0.04 0.05

iL1,

iL1ref,

iL2,

iL2ref,

A

0

120

100

80

60

40

20

20

40

0 0.01 0.02 0.03 0.04 0.05

time, s

0

50

200

150

100

50

100

150

200

vO,vOref,vIN,

V

0 0.01 0.02 0.03 0.04 0.05

time, s

Fig. 4 Simulated inverter operation at rated power

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0.05 and 0.95. Analogue protections for the currents andvoltages are included in the analogue the board. When they

are activated an inhibit signal stops the operation of theboards and drivers. Finally the parameters for the PIcontrollers are those indicated in the previous Section.

The electronic circuitry that implements the currentcontrol loop and the generation of the PWM switchingcommands for the buckboost 1 is shown in Fig. 9. Thecircuitry for the buckboost 2 is the same, and both areintegrated in the analogue board. Current measuring ismade by means of a LEM LA 125-P current sensor, whilevoltages measuring are carried out by means of LEM LV25-P voltage sensors. The operational amplifiers are TL084and the comparators are LM311. The mathematicaldivision required to compensate vO1+vINis made by meansof an AD632 from Analog Devices. From the duty cycle, aUC3637 from Unitrode generates the PWM switchingcommands for the SKHI 23/12 drivers, which have beenincluded in Fig. 9 to clarify the operation of the circuit. TheB-outputs of the UC3637 are used by the control circuitryof buckboost 2. The 1.5 nF capacitors together with the4.7kO resistances at the output of the LM311 comparatorsare used to implement a dead time of 2 ms. The inhibit signal

00

50

100

150

200

250

time, s

0.01 0.02 0.03 0.04 0.05

0

time, s

0.01 0.02 0.03 0.04 0.05

vO1,vO1ref,vO2,vO2ref,vIN,

V

vO,vOref,vIN,

V

200

150

100

50

50

100

150

200

0

Fig. 5 Simulated robustness against disturbance in the inputvoltage of 10% 120 Hz square wave

400

200

0

200

400

0 0.02 0.04 0.06 0.08 0.1100

0

100

200

VO,

VOref,

V

time, s

iL1

,iL2,

A

Fig. 6 Simulated system response to 400 W nonlinear loadconnection while supplying 70% linear load

200

100

0

100

200

200

100

0

100

200

time, s

vO,vOref,

V

iL1,

iL2,A

0 0.01 0.02 0.03 0.04 0.05

Fig. 7 Simulated system response to transient short circuit fromt 6ms to t 7 ms

voltage control digital board

(DS1104 )

current control and

PWM switching analog boardSKHI 23/12 drivers

vOref

vO1ref

vO2ref

generation

of voltage

references

vO1

vO1

controlloop

vO2

control

loop

vO2

vO1

Inh Inh Inh

iO2

iO1

vIN

vIN

iL1

controlloop

iL2

control

loop

iL2

vO2

vIN

vIN

iL1

vO1

iL 2ref

iL1ref

d1

d2

generation

of PWM

swiching

commands

driver forbuck-boost1

driver for

buck-boost2

T1

T2

T3

T4

Fig. 8 Overall implementation of proposed control strategy



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can cancel the switching commands by means ofHEF4081B AND-gates.

5.2 Experimental resultsThe prototype inverter with the proposed control strategy

has been experimentally tested in different situations, whichare summarised in Fig. 10. As shown in this figure, the testsinclude linear and nonlinear load operation, and transientshort circuits. The linear load is a 10O resistive load, which

makes the inverter operate at full power. The nonlinear loadconsists of a Semikron SKB 30/08 diode bridge, a 680 mFcapacitor and a 68O resistive load. The short circuit test iscarried out by means of directly short-circuiting the inverteroutput through a fuse. The short-circuit finishes when thefuse blows. A Tektronix TDS 5054 digital phosphor

oscilloscope is used to register the obtained waveforms.Figure 11 shows the results when the inverter operates at

full power and supplies the 10O resistive linear load. Figure11a shows the buckboost output voltages vO1 and vO2, andthe inverter input and output voltages, vIN and vO. Figure11b shows the inverter output voltage vO and current iO.Finally Fig. 11c presents the inductor currents iL1 and iL2 ofboth buckboost together with the output voltages vO1 andvO2. The practical results shown in these graphs validate theproposed control strategy and the simulation results. Figure11a and 11c show how the proposed control strategyachieves an accurate control of the inductor currents andoutput voltages, and consequently of the inverter outputvoltage at full power. Other than validating the proposed

control strategy, these results highlight the advantages ofthe buckboost inverter. The DCAC conversion is carriedout in a single stage from DC levels that are lower than the

inductor current measurement

LA125-P M

iL1

iL1

1k

600nf

33

2.7k

TL084

+

TL084

+

TL084

+

TL084

+

TL084

+

TL084

+

TL084

+

TL084

+

LM311

+

LM311

+

current

referenceiL1ref

10k

10k

10k

5.6k

3.6k

18k

10k

10k

integral

freezing

9.1nfPI controller vIN compensation

10k

10k

10k

10k10k

30k

output voltage measurement

+VO1

55k

820

1k

180

110nf

+HT +HT

HTHTLV25-P LV25-PM M

input voltage measurement

+VIN

55k

1k

820

180

110nf

10k

10k

10k

10k

20k

+15V

15V

10k

Z2

Z1Y1X1

X2Y2

out

AD632

Vos

vO1

+vIN

compensation and d1

calculation

1k10V

825

53.6

k

AIN+AIN

UC3637

BIN+BIN

BOUTAOUTVTH

+VTHCT

ISET

15V

+15V 15V

+15V +15V

15V

+15V +15V

10nf

100nf

1.9

6k

4.7

k

12k

1.0

2k

100nf

7.5

V

2.2

k

4.7

k

1nf

Inh

7.5

V

2.2

k

4.7

k

1.5nf

4081B

4081B

SKHI23/12

T1

T2

1.5nf

PWM switching orders generation and drivers

Fig. 9 Circuitry for current control loop and generation of PWM switching commands for buckboost 1 (buckboost 2 is identical)

prototype

buck-boost

inverter fuse

diode bridge

linear load (full power)

nonlinear load

transient short circuit

Fig. 10 Experimental tests on prototype inverter



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AC peak voltage. Furthermore, the buckboost outputvoltages vO1 and vO2 are not required to be greater than theinput voltage vIN as it happens with the boost DCACinverter. On the contrary, a disadvantage of the buckboostinverter lies in the inductor current waveforms, which canachieve high peak values and increase the losses in both the

IGBTs and the inductors. The robustness against outputcurrent disturbances is shown in Fig. 12, where the 10Oresistive linear load, which consumes full power, is suddenly

connected to the inverter. As shown, the output voltagesreject this disturbance even when the load is connected atthe maximum voltage.

The inverter starting response is tested in Fig. 13.Initially, both buckboost capacitors are precharged up to

their DC component. In Fig. 13a the starting of the inverteris carried out softly from zero volts. In Fig. 13b the startingis carried out at the peak values of the output voltagewaveforms. The inverter starting response is in bothsituations stable and accurately controlled.

The operation with the nonlinear load is shown inFig. 14. This test shows both the nonlinear load connection

0

0 3

4

VO1

VO2

VO

VIN

a

VO1

VO2

0 4

0 2

c

iL1

iL2

1

b

Vo

io

Fig. 11 Experimental results at full power with linear load (10ms/div)a Input and output voltages vO1, vO2, vIN, vO 100V/div

b Inverter output voltage and current vO 50V/div; iO 10A/div

c Inductor currents and output voltages of both buckboost vO1, vO2100V/div; iL1, iL2 50A/div

0

0 3

4

VO1

VO2

VO

iL1

Fig. 12 Experimental response to connection of linear loaddemanding full power (vO1, vO2, vO 100V/div; iO 20A/div; 2ms/point)

VO1

VO

VO2

VO1

VO

VO2

1

4

0

0

1

4

0

0

a

b

Fig. 13 Experimental inverter starting response (vO1, vO2, vO100V/div; 10 ms/div)



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and the normal operation with this load. The connection isin fact a short circuit, as the capacitor is discharged, and thisshort circuit appears again shortly at the maximum andminimum peaks of the voltage waveforms. The response of

the inverter is stable and controlled. The stability of thesystem in these situations in which small short circuitsappear can be achieved thanks to the inner current controlloops, which control the currents to its maximumprogrammed value during the short circuits.

Finally the last test involves a direct short circuit at theoutput of the inverter by means of the sudden connection ofa fuse. The upper and lower limits of the current referenceare set to 20- and 20 A to make possible a long short circuit(almost nine cycles). Higher limits decrease the melting timeof the fuse and the short-circuit duration. The results areshown in Fig. 15, where the short circuit lasts around140 ms. During this time, the output voltage vO goes zero,the buckboost voltages vO1 and vO2 are the same, and thecurrent iL1 is always controlled to its upper and lower limits.Although it has not been included, current iL2 has the sameevolution except for the 1801 phase shift. This test validatesthe high reliability of the inverter in these situations. As thecurrents are controlled to their limit values, no protectionsare activated and the system returns back to its normaloperation when the short-circuit finishes. Obviously, long-short circuits have to be always avoided, and the protectionscan be programmed to be activated when the short circuitlasts more than a given maximum time.

6 Conclusions

The two buckboost DCDC converters of the buckboostDCAC inverter are required to work in a variableoperating-point situation. To deal with this condition, adouble-loop control strategy for these DCDC convertershave been proposed that consists of a new inner controlloop for the inductor current and an also new outer controlloop for the output voltage. These loops include differentcompensations that make possible the control of the buckboost DCDC converter with variable operating points. Inaddition, feedforward additional loops were included toimprove the robustness against disturbances in the inputvoltage and output current.

The proposed control strategy was designed andimplemented on a 1.5kW buckboost DCAC inverter.Several simulation and experimental tests were carried outto validate the strategy. The results show that the proposedstrategy achieves a stable and accurate control of both DCDC converters, and then of the inverter output voltage.Additionally to the tests carried out at normal operationwith linear loads, the strategy is also tested in challengingsituations. Experimental results with nonlinear loadsconsisting of a diode bridge and a flat capacitor, as well

as with transient short circuits, show that the proposedstrategy is capable to deal with these situations and controlthe system with high robustness and reliability.

7 References

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2 V!azquez, N., Almaz!an, L., Alvarez, J., Aguilar, C., and Arau, J.:Analysis and experimental study of the buck, boost and buckboostinverters. Proc. of IEEE Conf. of Power Electronics Specialists.(PESC), Charleston, SC, USA, 1999, pp. 801806

3 Kazimierczuk, M.K.: Synthesis of phase-modulated resonant DC/AC

inverters and DC/DC converters, IEE Proc., Part B, Electr. PowerAppl., 1992, 139, pp. 3873944 Sanchis, P., Ursua, A., Gubia, E., and Marroyo, L.: buckboost

DCAC inverter: proposal for a new control strategy. Proc. of IEEEConf. of Power Electronics Specialists (PESC), Aachen, Germany,2004, pp. 39943998

5 C!aceres, R.O., and Barbi, I.: A boost DCAC converter: analysis,design and experimentation, IEEE Trans. Power Electron., 1999, 14,(1), pp. 134141

6 Middlebrook, R.D.: Topics in multiple-loop regulators an current-mode programming, IEEE Trans. Power Electron., 1987, PE-2, (2),pp. 109124

7 Ninkovic, P., and Jankovic, M.: Tuned-average current-mode controlof constant frequency DC/DC converters. Proc. of IEEE Int. Symp.on Industrial Electronics (ISIE), 1997, pp. 235240

8 Dixon, L.: Average current mode control of switching powersupplies. Unitrode Seminar SEM700;, 1990

9 Tang, W., Lee, F.C., and Ridley, R.B.: Small-signal modelling ofaverage current-mode control, IEEE Trans. Power Electron., 1993, 8,

(2), pp. 11211910 Leyva-Ramos, J., Morales-Salda*na, J.A., and Mart!nez-Cruz, M.:Robust stability analysis for current-programmed regulators, IEEETrans. Ind. Electron., 2002, 49, (5), pp. 11381145

11 Buso, S.: Design of a robust voltage controller for a buckboostconverter using m-synthesis, IEEE Trans. Control Syst. Technol., 1999,7, (2), pp. 222229

12 C!aceres, R., Rojas, R., and Camacho, O.: Robust PID controlof a buckboost DCAC converter. Proc. of IEEE Conf. onTelecommunications Energy (INTELEC), Phoenix, AZ, USA, 2000,pp. 180185

13 Asumadu, J.A., and Jagannathan, V.: Synthesis of nonlinear controlof switching topologies of buckboost converter using fuzzy logic.Proc. of IEEE Conf. on Instrumentation and MeasurementTechnology., Baltimore, MD, USA, 2000, pp. 169173

14 Sasaki, S., and Inoue, T.: Systematic approach to robust nonlinearvoltage control of buck/boost converter. Proc. of IEEE Conf. ofPower Electronics Specialists. (PESC), Galway, Ireland, 2000,pp. 14081413

15 Biel, D., Fossas, E., Guinjoan, F., and Ramos, R.: Sliding modecontrol of a boostbuck converter for AC signal tracking task. Proc.of IEEE Int. Symp. on Circuits and Systems (ISCAS), Orlando, FL,1999, Vol. 5, pp. 242245

0

0 2

4

VO2

VO

VO1

Fig. 14 Experimental response to nonlinear load connection (vO1,vO2, vO 100V/div; 20 ms/div)

VO1

VO2

VO

iL13

2

4

0

0

0

Fig. 15 Experimental response to transient short circuit (vO1, vO2,vO 100V/div; iL1 40A/div; 20 ms/div



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16 Mattavelli, P., Rossetto, L., and Spiazzi, G.: General purpose slidingmode controller for DC/DC converter applications. Proc. of IEEEConf. of Power Electronics Specialists (PESC), Seattle, WA, USA,1993, pp. 609615

17 V!azquez, N., !Alvarez, J., Aguilar, C., and Arau, J.: Some criticalaspects in sliding-mode control design for the boost inverter. Proc. ofIEEE Int. Congress on Power Electronics (CIEP), Morelia, Mexico,1998, pp. 7681

18 Sanchis, P., Alonso, O., Marroyo, L., Meynard, T., and Lefeuvre, E.:A new control strategy for the Boost DCAC Inverter. Proc. of

IEEE Conf. of Power Electronics Specialists (PESC), Vancouver,Canada, 2001, Vol. 2, pp. 974979

19 Middlebrook, R.D., and Cuk, S.: A general unified approachto modeling switching-converter power stages. Proc. of IEEEConf. of Power Electronics Specialists. (PESC), 1976,pp. 1834

20 Semikron Databook 2003. Available: http://www.semikron.com21 dSPACE Catalogue 2004. Available: http://www.dspace.com


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