Keyword(s): Abstract:

Design of an Energy-Efficient Silicon Microring Resonator-Based PhotonicTransmitterCheng Li, Chin-Hui Chen, Binhao Wang, Samuel Palermo, Marco Fiorentino, RaymondBeausoleil

HP LaboratoriesHPL-2014-21

Silicon ring resonator; optical interconnects; pre-emphasis

Silicon microring resonator-based photonic interconnects offer an attractive substitute to conventionalelectrical interconnects due to the negligible frequency-dependent channel loss and high bandwidth densityoffered via wavelength-division multiplexing (WDM). This paper presents silicon photonic transmittersemploying ring modulators designed in a 130 nm SOI process wire-bonded with CMOS drivers in a 1Vstandard 65nm CMOS technology. The transmitter circuits incorporate high-swing (2Vpp and 4Vpp)drivers with non-linear pre-emphasis to bypass the bandwidth limitation of the carrier-injection silicon ringmodulator. The 1st generation silicon ring modulator wire-bonded with 4Vpp CMOS driver achieves12.7dB extinction ratio at 5Gb/s with 4.04mW power consumption, while the 2nd generation ringmodulator wirebonded with 2Vpp CMOS driver achieves 9.2dB extinction ratio at 9Gb/s with 4.32mW.Both of these measurements exclude the laser power.

External Posting Date: May 6, 2014 [Fulltext] Approved for External PublicationInternal Posting Date: May 6, 2014 [Fulltext]

Copyright 2014 Hewlett-Packard Development Company, L.P.

Design of an Energy-Efficient Silicon Microring

Resonator-Based Photonic Transmitter

Cheng Li, Chin-Hui Chen, Binhao Wang, Samuel Palermo, Marco Fiorentino, and Raymond Beausoleil

April 16, 2014

Abstract

Silicon microring resonator-based photonic interconnects offer an attractive substitute to

conventional electrical interconnects due to the negligible frequency-dependent channel loss

and high bandwidth density offered via wavelength-division multiplexing (WDM). This paper

presents silicon photonic transmitters employing ring modulators designed in a 130 nm SOI

process wire-bonded with CMOS drivers in a 1V standard 65nm CMOS technology. The trans-

mitter circuits incorporate high-swing (2Vpp and 4Vpp) drivers with non-linear pre-emphasis to

bypass the bandwidth limitation of the carrier-injection silicon ring modulator. The 1st gener-

ation silicon ring modulator wire-bonded with 4Vpp CMOS driver achieves 12.7dB extinction

ratio at 5Gb/s with 4.04mW power consumption, while the 2nd generation ring modulator wire-

bonded with 2Vpp CMOS driver achieves 9.2dB extinction ratio at 9Gb/s with 4.32mW. Both

of these measurements exclude the laser power.

Index Terms — Silicon ring resonator, optical interconnects, pre-emphasis.

I. INTRODUCTION

Optical channels are potential candidates to replace conventional electrical channels for efficient

inter/intra-chip interconnects due to their attractive properties: flat channel loss over a wide fre-

quency range and strong immunity to crosstalk and electromagnetic noise. An important feature

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of optical interconnects is the ability to combine multiple data channels on a single waveguide

via wavelength-division-multiplexing (WDM) to greatly improve bandwidth density and amortize

connector costs over high aggregate bandwidth. In order to take full advantage of these benefits,

silicon photonic platforms are being developed that enable tightly integrated optical interconnects

and novel photonic network architectures. One promising photonic device is the silicon microring

resonator [4,12], which can be configured either as an optical modulator or a WDM drop filter. Sil-

icon ring resonator modulators/filters offer the advantages of small size, relative to Mach-Zehnder

modulators, and increased filter functionality, relative to electro-absorption modulators [7].

Silicon microring resonator-based photonic links provide a unique opportunity to deliver distance-

independent connectivity whose pin-bandwidth scales with the degree of wavelength-division mul-

tiplexing. As shown in Fig. 1, multiple wavelengths generated by an off-chip continuous-wave

(CW) laser are coupled into a silicon waveguide via a grating coupler. This off-chip laser can ei-

ther be a distributed feedback (DFB) laser bank [5], which consists of an array of DFB laser diodes,

or a comb laser [11], which is able to generate multiple wavelengths simultaneously. Implementing

a DFB laser bank for dense WDM (DWDM) photonic interconnects (e.g., using 64 wavelengths)

is quite challenging due to area and power budget constraints. A possible alternative is a single

broad-spectrum comb laser source, such as an InAs/GaAs quantum dot comb laser that can gener-

ate a large number of wavelengths in the 1100nm to 1320nm spectral range with typical channel

spacing of 50-100GHz and optical power of 0.2-1mW per channel [11]. A system operating near

1310nm wavelength (O-band) incurs slightly higher optical loss in fiber compared to a 1550nm

(C-band) system. However, this has negligible impact in short-reach interconnect applications. At

the transmitter side, each ring modulator inserts data onto a specific wavelength through electro-

optical modulation. The modulated optical signals propagate through the link optical waveguides

and arrive at the receiver side where ring filters drop the modulated optical signals of a specific

wavelength at a photodetector (PD) that converts the signals back to the electrical domain. This

paper presents silicon ring resonator-based photonic transmitter prototypes that address the limited

2

intrinsic bandwidth of the carrier-injection ring modulator, achieving energy-efficient high-speed

optical modulation in a compact silicon area suitable for on-chip WDM interconnects. The sili-

con ring modulator and its model are introduced in Section II. Section III outlines the architecture

of the WDM transmitter circuits prototype. Section IV describes transmitters with independent

dual-edge pre-emphasis to compensate for the bandwidth limitations of the carrier-injection ring

resonators used in this work. Experimental results of the silicon photonics transmitter prototype

with a CMOS pre-emphasis driver fabricated in a 65nm CMOS technology wire-bonded to pho-

tonic devices fabricated in a 130 nm SOI process, are presented in Section V. Finally, Section VI

concludes the paper.

II. SILICON RING MODULATOR MODELING

A basic silicon ring modulator consists of a straight waveguide coupled with a circular waveg-

uide with diameters in tens of micron meters, as shown in Fig. 2a. At the resonance wavelength

most of the input light is coupled into the circular waveguide and only a small amount of light can

be observed at the through port. As a result, the through port spectrum displays a notch-shaped

characteristic shown in Fig. 2b. This resonance can be shifted by changing the effective refrac-

tive index of the waveguide through the free-carrier plasma dispersion effect [8] to implement the

optical modulation. For example, the ring modulator exhibits low optical power level at through

port when the resonance aligned well with the laser wavelength, while a high optical power level

is displayed when the resonance blue-shifts due to the increase of carrier density in the waveguide

lowering the waveguide effective refractive index. Two common implementations of silicon ring

resonator modulators include carrier-injection devices [12] with an embedded p-i-n junction side-

coupled with the circulate waveguide, operating primarily in forward-bias, and carrier-depletion

devices [4] with only p-n junction side-coupled, operating primarily in reverse-bias. Although

a depletion ring generally achieves higher modulation speeds relative to a carrier-injection ring

3

due to the ability to rapidly sweep the carriers out of the junction, its modulation depth is lim-

ited due to the relatively low doping concentration in the waveguide to avoid excessive optical

loss in the waveguide. In contrast, carrier-injection ring modulators can provide large refractive

index changes and high modulation depths, but are limited by relatively slow carrier dynamics of

forward-biased p-i-n junction. As shown in Fig. 2b, when applying a forward-bias voltage over

the p-i-n junction of the carrier-injection ring, the resonance shifts towards to shorter wavelength,

called blue shift, due to the accumulated carriers changing the waveguide refractive index. While a

reverse-bias voltage extracts the carriers accumulated in the junction during the forward-bias mod-

ulation and restore the waveguide refractive index. The ring modulator bandwidth is limited by

the slow carrier-injection operation due to the relatively slow carrier dynamics of forward-biased

p-i-n junction [12]. Increasing the optical rising transition by simply applying a high modulation

swing leads to a slow optical falling transition and cause the inter-symbol interference (ISI), since

the over-injected carriers need longer time to be swept out from the ring waveguide.

Although pre-emphasis modulation scheme [12] has been proposed to break the tradeoff between

the optical rising and falling transitions, a major ring modulator driver design challenge is that there

are no accurate models to predict the high-speed optical modulation signal quality under different

pre-emphasis duration and voltage levels. In this work, an accurate SPICE model of silicon ring

modulator is developed to enable an efficient co-simulation with electrical driver circuits. It in-

cludes a large-signal SPICE p-i-n model [9] to predict the carrier distribution in the intrinsic region

of the p-i-n junction switched under the modulation signals, and a ring macro-model to catch the

dynamic electro-optic effects between the junction carrier density and the silicon ring waveguide

refractive index at wavelength ∼1300nm described by (1)

∆(n) = 6.2 × 10−22 × ∆N + 5.9 × 10−18 × ∆P 0.8 (1)

where ∆N(cm−3) and ∆P (cm−3) are the silicon waveguide refractive index changes due to the

electron and hole concentration changes, respectively. ∆(n) of 1.5×10−3 was found at wavelength

4

of 1300nm with injection of 1018 carriers/cm3 [8].

Fig. 3 shows device model simulation results of the 1st generation carrier-injection silicon ring [1]

modulators with positive and negative 200ps pulse responses overlaid. The 5µm diameter ring

device exhibits a quality factor of ∼9000. A simple 2Vpp NRZ modulation produces the excessively

long optical rise time shown in Fig. 3a, mainly because the 1V forward-bias voltage is not high

enough to overcome the slow carrier dynamics in the p-i-n junction. Increasing the modulation

swing to 4Vpp dramatically improves the optical rise time at the expense of high-level ringing and a

high steady-state charge value. Unfortunately, this large amount of charge results in a slow optical

fall time due to the modulator’s series resistance (∼2KΩ) limiting the drift current to extract the

excess carriers in the junction. As a result, a deteriorated extinction ratio (Fig. 3b) is observed

relative to 2Vpp NRZ modulation case. The conflicting requirements for fast rising and falling

transitions are addressed through the use of a pre-emphasis modulation technique [12]. During a

rising-edge transition the positive voltage overshoots (2V) for a fraction of a bit period to allow

for a high initial charge before settling to a lower voltage (1V) corresponding to a reduced steady-

state charge. A similarly shaped waveform is used for the falling-edge transition to increase the

drift current to extract the carriers. As the rising and falling-edge time constants are different, a

non-linear modulation waveform is applied. We adjust the amount of over/under-shoot time of the

pre-emphasis waveform for a specific modulator, with the rising-edge pre-emphasis pulse typically

wider than the falling-edge. Adjusting the pre-emphasis time, rather than utilizing different voltage

levels, allows the optimization of the transient response to be decoupled from the steady-state

extinction ratio value. A fast optical rising and falling with the pre-emphasis modulation is shown

in Fig. 3c.

The major issue of the 1st generation ring modulator is that the large series contact resistance

(∼2KΩ) requires high modulation swing (4Vpp) to compensate the voltage overhead on the large

∼2KΩ series contact resistance, which also limits the drift current to extract the excess carriers

in the junction and lead to a slow optical falling transition. The 2nd generation ring modulator [2]

5

reduces the series contact resistance down to ∼200Ω, providing a potential for high-speed and

energy efficient optical modulation. Unlike the 4Vpp driver which outputs a differential voltage

swing with approximately 0V average bias level on the p-i-n diode, the 2Vpp single-ended driver

provides a 2Vpp output swing on the modulator cathode and utilizes a non-linear voltage DAC on

the anode with adjustable DC-bias levels for an optimized eye opening. The 9-bit segmented bias

DAC consists of a coarse 3-bit non-linear R-string DAC to match the p-i-n I-V characteristics and a

fine 6-bit linear R-2R DAC to achieve linear voltage steps on each non-linear voltage segment [3].

In order to overcome the relatively slow carrier dynamics in forward-bias, the anode is biased at a

voltage level close to the p-i-n junction threshold voltage. Note that since the resonance wavelength

blue-shifts to shorter wavelengths due to the accumulation of free carriers in the ring waveguide,

when increasing the resonator p-i-n diode anode voltage, the bias DAC can also be used for bias

tuning [3] to compensate the resonance drifts due to the fabrication variation, allowing for both

improved tuning power efficiency and speed relative to heater-based tuning [6]. The co-simulation

result of 2nd generation ring prototype based on the proposed ring model with CMOS 2Vpp pre-

emphasis driver circuits is show in Fig. 4. An optimum 9Gb/s optical eye has been achieved when

the pre-emphasis duration is set to 80ps and anode is biased at 1.45V.

III. WDM TRANSMITTER ARCHITECTURE

Fig. 5a shows a block diagram of the CMOS WDM photonic transmitter prototype integrating

five TX modules in a 1mm2 65nm CMOS area, with one transmitter being used as forwarded-

clocking and the other four being used as data transmission in the 4-channel data WDM link. Ap-

plying a forwarded-clock architecture in a photonic WDM system offers the potential for improved

high frequency jitter tolerance with minimal jitter amplification due to the clock and data signals

experiencing the same delay over the common low-dispersive optical channel. Two versions of

the CMOS drivers are implemented to modulate the two generation designs of the carrier-injection

6

ring modulators. A differential driver, with approximately 0V average bias level, provides a 4Vpp

output swing to allow for high-speed operation of the 1st generation ring modulator with rela-

tively large series contact resistance (∼2KΩ), while a single-ended driver delivers a 2Vpp output

swing on the 2nd generation ring modulator cathode and utilizes a non-linear bias-tuning DAC on

the anode for an adjustable DC-bias level. A half-rate CML clock is distributed to the 5 CMOS

transmitter modules where 8-bit parallel data is multiplexed to the full output data rate by cascade

2:1 mux before being buffered by the modulator drivers. The distributed CML clock is convert-

ed to CMOS levels by the local CML-to-CMOS buffer. These CMOS drivers are wire-bonded to

carrier-injection silicon ring resonator modulators as shown in Fig. 5b. A continuous wavelength

light near 1300nm from a tunable laser is vertically coupled into the photonic device’s input port

via the grating coupler. The modulated light is then coupled out from the modulator’s through port

into a multi-mode fiber for routing to the optical oscilloscope for high-speed data recovery and eye

measurement.

IV. NON-LINEAR PRE-EMPHASIS MODULATOR DRIVER

The 4Vpp and 2Vpp pre-emphasis drivers employ the similar circuits architecture. An on-chip 27-1

PRBS source generates eight bits parallel outputs. Serialization of eight bits data is performed in

both transmitter versions with three 2:1 multiplexing stages, with the serialization clocks generated

from a half-rate CML clock which is distributed to five transmitter modules, converted to CMOS

levels, and subsequently divided to switch the mux stages. The serialized data is then transmitted

by the modulator drivers, with both output stage versions utilizing a main driver, positive-edge and

negative-edge pre-emphasis pulse drivers in parallel (Fig. 6a) to generate the pre-emphasis output

waveform. Tunable delay cells, implemented with digitally-adjustable current-starved inverters

(Fig. 6b), allow for independent control of the rising and falling-edge pre-emphasis pulse duration

over a range of 20 - 100ps. Finally, pulsed-cascode output stages (Fig. 6c) with only thin-oxide

7

core devices reliably provide a final per-terminal output swing of twice the nominal 1V supply.

A capacitive level shifter and parallel logic chain generate the signals INlow, swinging between

GND and the nominal VDD, and INhigh, level-shifted between VDD and 2×VDD, that drive the

final pulsed-cascode output stages. During an output transition from high to low, the INlow input

switches MN2 to drive node midn to near GND and the INhigh input triggers a positive pulse

from the level shifted NOR-pulse gate that drives the gate of MN1 to allow the output to begin

discharging at roughly the same time that the MN1 source is being discharged. Similarly, during

an output transition from low to high, the INhigh input switches MP1 to drive node midp to near

2V and the INlow input triggers a negative pulse from the NAND-pulse gate that drives the gate

of MP2 to allow the output to begin discharging at roughly the same time that the MP2 source

is being charged. This scheme guarantees that the drain-source voltage doesn’t stress the output

pMOS/nMOS transistors with the nominal 1V supply.

V. EXPERIMENTAL RESULTS

The CMOS driver circuits were fabricated in a 65nm CMOS general purpose process. As shown

in the photographs of Fig. 5b, a chip-on-board test setup is utilized, with the CMOS driver wire-

bonded both to silicon ring resonator chips for optical signal characterization. For high-speed

optical testing, a continuous-wavelength laser is coupled through a grating coupler to a waveguide

connected to a silicon ring resonator through a single-mode fiber probe. The current version of the

grating coupler used in this work exhibits 7dB loss due to the simplified structure of the grating

that is etched at the same time as the waveguide. In future work, further improvement can be

achieved with more sophisticated two-mask gratings which have demonstrated loss down to 2-

3dB [10]. The waveguide loss is measured to be 3dB/cm, which is negligible for the 500µm

waveguide. Overall, with 1mW optical power from the CW laser source, around 40µW is detected

at the ring’s through-port output when the ring is on off-resonance. After vertically coupling the

8

modulated light out into a single-mode fiber, the light is observed with an optical oscilloscope. The

4Vpp CMOS driver modulates the 1st generation ring modulator to improve the carrier dynamics in

the p-i-n junction and compensate the voltage overhead due to the large series contact resistance.

Optimizing the pre-emphasis settings allows for an open eye with a 12.7dB extinction ratio. Here

the maximum optical data rate is limited to 5Gb/s due to the unanticipated excess contact resistance

(∼2kΩ) of the ring resonator modulator. Device contact resistance of ∼200Ω has been achieved in

the 2nd generation ring modulator. The cathode is modulated by the energy efficient 2Vpp CMOS

driver and the anode is biased at an adjustable DC level through a non-linear voltage DAC for pre-

emphasis optimization and bias-based ring resonance wavelength tuning. The measured optical eye

diagram of 2nd generation prototype is show in Fig. 7b. It achieves extinction ration of 9.2dB at

modulation speed of 9Gb/s. Both generations of ring modulators exceed the ∼7dB extinction ratios

achieved with the depletion-mode devices of [6]. The modulation efficiency of two generations

of prototypes are 808fJ/bit (5Gb/s) and 500fJ/bit (9Gb/s) respectively. Half modulation swing

and low junction series resistance enable the 2nd generation prototype to improve the modulation

energy efficiency by 38% and increase the modulation speed by 80% relative to the 1st generation

prototype. This provides strong motivation to leverage this photonic I/O architecture in a WDM

system with multiple ∼10Gb/s channels on a single waveguide. The optical modulation speed is

limited up to 9Gb/s, mainly due to two reasons. First, the lack of driver output impedance control

and the relatively long bond wires introduce some additional reflection-induced ISI, degrading the

signal quality. Second, attenuation in the on-chip global clock distribution path limits the CMOS

driver operation speed. Improving electrical driver operation speed and adopting advance CMOS

and photonics integration technique are the points of emphasis for future planned prototype.

9

VI. CONCLUSION

This paper presented silicon ring modulator-based photonic WDM transmitters which incorpo-

rate high-swing non-linear pre-emphasis drivers to overcome the limited bandwidth of carrier-

injection ring resonator modulators. These prototypes provide the potential for silicon photonic

links that can deliver distance-independent connectivity whose pin-bandwidth scales with the de-

gree of wavelength-division multiplexing.

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List of Figures

Fig. 1. Silicon ring resonator-based wavelength-division-multiplexing (WDM) link.

Fig. 2. (a) Top and cross section views of carrier-injection silicon ring resonator modulator, (b)

optical spectrum at through port.

Fig. 3. Simulated 1st generation ring resonator modulator response to 200ps data pulses with: (a)

2Vpp simple modulation, (b) 4Vpp simple modulation, (c) 4Vpp modulation with pre-emphasis.

Fig. 4. Simulated 2nd generation ring modulator 9Gb/s optical eye diagram driven by the 2Vpp

CMOS driver.

Fig. 5. (a) WDM transmitter architecture, (b) Optical transmitter circuits prototype bonded for

optical testing.

Fig. 6. Non-linear pre-emphasis modulator driver transmitters: (a) per-terminal 2V pre-emphasis

driver, (b) tunable delay cell, (c) pulsed-cascode output stage.

Fig. 7. Measured ring modulator optical eye diagram: (a) 5Gb/s optical eye diagrams of 1st

generation ring modulators driven by the 4Vpp pre-emphasis driver; (b) 9Gb/s optical eye

diagrams of 2nd generation ring modulators driven by the 2Vpp pre-emphasis driver.

11

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Fig. 1. Silicon ring resonator-based wavelength-division-multiplexing (WDM) link.

(a) (b)

Fig. 2. (a) Top and cross section views of carrier-injection silicon ring resonator modulator, (b)optical spectrum at through port.

(a) (b) (c)

Fig. 3. Simulated 1st generation ring resonator modulator response (bottom) to 200ps data pulses(top) with: (a) 2Vpp simple modulation, (b) 4Vpp simple modulation, (c) 4Vpp modulation withpre-emphasis.

14

Fig. 4. Simulated 2nd generation ring modulator 9Gb/s optical eye diagram driven by the 2VppCMOS driver.

(a) (b)

Fig. 5. (a) WDM transmitter architecture, (b) Optical transmitter circuits prototype bonded foroptical testing.

15

(a) (b) (c)

Fig. 6. Non-linear pre-emphasis modulator driver transmitters: (a) per-terminal 2V pre-emphasisdriver, (b) tunable delay cell, (c) pulsed-cascode output stage.

(a) (b)

Fig. 7. Measured ring modulator optical eye diagram: (a) 5Gb/s optical eye diagrams of 1st gen-eration ring modulators driven by the 4Vpp pre-emphasis driver; (b) 9Gb/s optical eye diagrams of2nd generation ring modulators driven by the 2Vpp pre-emphasis driver.

16