Design of the 2.4/5.2 GHz Dual-Band VCO Ming C. Tsai, and Jian H. Chen

Department of Electrical Engineering, University of Tatung

Abstract

We present a novel design of a switched resonator dual-band VCO which allows better trade-off between tuning range and power consumption. Based on TSMC 0.25µm 1P5M CMOS technology, the dual-band VCO operates near 2.4GHz and 5.2GHz with phase noise of -107 and -104 dBc/Hz at a 600-kHz. offset and ~6.7mW power consumption. In the design of dual-band VCO we used Agilent ADS with TSMC 0.25µm RF CMOS process model version 3.0 to simulate.

Introduction

With the development of the wireless communications, portable radio service has seen a remarkable amount of growth in recent year, such as cellular phones, message pagers, and wireless LANs (Local Area Networks). The personal communication markets are constantly increasing demand for compact, low-cost, smaller, and saving power portable devices. This demand has promoted the pursuit of single-chip RF transceivers realization as silicon process technologies are scaled down. Oscillators are necessary for wireless communications which generates a periodic output. Different communication systems need different oscillators. The technologies for an oscillator must have to focus on the specifications of oscillator including phase noise, tuning range, output power, and oscillation frequency …, etc.

As the silicon process technologies are scaled down, the tuning range of circuit using the varactors will be reduced due to the reduced bias range for varactors. Used dual- or multi- band voltage control oscillators (VCO’s) to increase tuning range has been proposed in references [1] and [2].

In addition to a large area, in these circuits, additional issues relating to the power-up and power-down transients of the VCO’s must be considered. Relaxation oscillator-based VCO’s or ring oscillator have a large tuning range, but the phase noise usually worse than LC-tank based VCO’s. To address these issues, a switched resonator LC-tuned VCO is proposed and demonstrated in a dual-band VCO.

VCO architecture

The frequency of most RF oscillators must be adjustable. The LO frequency in 802.11b communication system must vary in 20MHz spacing per channel. If output frequency of an oscillator can

be varied by a voltage, then the circuit is called a “voltage-controlled oscillator” (VCO).

Voltage controlled capacitor (varactor) using a MOS structure is a MOS varactor and using P+ or N+ on N-well junction structure is a MOS varactor. It is essential to have a high quality factor Q. In the ideal case, a varactor should have a very large Cmax /Cmin ratio and a very high Q value. The cross section of a TSMC MOS varactor is shown in figure 1(a). A MOS varactor with two of branches (M=1 and n=2), where M parameter means “number of devices in parallel” and n parameter means “number of branches.” The simulation of this device is shown in figure 1(b). The simulation result in figure 1(b), we know that varactor with tunable range from 7 pF to 25 pF, but the small linear region is about from -1V to 0.6V that we have to care in our design..

In the equivalent circuit for a MOS varactor, we lump the oxide capacitor and depletion capacitor into Cgate to model the behavior of voltage dependent capacitance, Rs and Ls are the parasites of the electrodes, Rch and Cov are used to fit the channel resistance and overlap capacitance. Cgate is modeled by the following empirical relation:

++×+= )

544.0284.0tanh(191.889.6 VGpFpFCgate ……(1)

The feedback oscillator can be viewed as a one-port implementation as well. Calculating the impedance seen at the drain of the cross-coupled transistors, we note that positive feedback yields

mginR /2−= . Thus, if the admittance mg is more than or equal to the equivalent parallel admittance of the tank, the circuit oscillates. This topology is called a “negative-Gm oscillator.”

In order to achieve better performance such as high phase noise, low power dissipation and wide tuning range. We choose np-core differential LC VCO structure.

Switched Resonator Concept

A switched resonator and simulation results are

shown in figure 2(a). The inductance seen between nodes X and Y are changed by turning the MOS transistor M1 on and off.

The inductance is approximately the sum of L1 and L2. But the actual combined inductance is somewhat lower due to the effects of the parasitic capacitance CGD in series with CGS, and CDB of the MOS transistor.

When MOS transistor is turning on, L2 is shunted out and the inductance is decreased as shown in figure 2(b). Furthermore, when node Y is grounded,

Cp is reduced because the transistor capacitances and the parasitic capacitances associated with L1 (partially) and L2 are shunted to ground by the low on resistance of MOS transistor. Thus, leading to simultaneous decreases of inductance and capacitance. The quality factor, Qind, each of the spiral inductors used in L1 and L2 is significantly lower than that of the MIM capacitances in the resonator.

An inductor with series resistance RSL, and inductance of L, the RPL is approximately

SLPL R

LR22ω

= (2)

where ω is the desire oscillation frequency. For oscillation to be sustained

1222

=××=××

SLindMSL

M RQGR

LG ω (3)

where GM is the effective transconductance of the VCO core transistors.

Now, we discussed two cases in equation 3: Case 1: If L or RPL is larger, then GM can be smaller

since 122=

××

SL

M

RLG ω . And the power

consumption of the VCO can be reduced while GM is getting smaller. Because of this, increasing capacitance arbitrarily to tune down the frequency is not desirable. Case 2: Increasing L arbitrary high is another way to tune down the frequency, but this will increase the series resistance RSL and limit the phase noise performance, when the core voltage swing is near the maximum which is the typical operating condition. This is also undesirable. So we need a mechanism, a switched resonator, which can be both tuned of L and C. The phase noise limitation imposed by arbitrarily increasing L can be illustrated using the Lesson-Cutler phase noise equation shown below:

∆

∆+

∆

+=∆ω

ω

ωω

ω3/1

20 1

212log10)( f

LQPskTFL ...(4)

Parameter Ps can be represented as Vrms2/RP where

Vrms is the root mean square voltage across the LC-tank. Substituting this and equation 2 back into the above equation, phase noise can be expressed as

∆

∆+

∆

+=∆ω

ω

ωωω

3/12

02

21

214log10)( f

Lrms

LSL

QVQkTFRL .(5)

Equation 5 shows when the voltage swing is near the maximum, phase noise is only determined by the noise factor and RSL. These mean a tuning element in which both L and C can be simultaneously tuned provides a greater flexibility to trade-off phase noise

and power consumption, as well as to achieve given phase noise performance over a larger frequency tuning range.

Design of the Dual-Band VCO

The block diagram of dual-band VCO as shown in figure 3 and the schematic is presented in figure 4, two of the resonance frequencies are 2.4GHz and 5.2GHz that was controlled by Vsw. Used np-core as active devices provided negative conductance that compensate the losses in the tank. We note that positive feedback yields

mgRin 1

−= (6)

The conventional np-core VCO composed of M1, M2, M3 and M4 and buffers composed of M7 and M8. By controlling the gate voltage (VSW) of M5 and M6, inductance of the tanks can be controlled. L1 are shunted by two of the 2.185nH inductor, and L3 and L4 are 3.715nH. Fine tuning of the VCO is accomplished using MOS varactor.

The simulation results of the dual-band VCO is shown in figure 5 at 2.4GHz and figure 6 at 5.2GHz. The chip micrograph for the dual-band VCO is shown in figure 7.

As shown in figure 7, to minimize the impact of mutual inductance between L2 and L3, the inductors are separated. When the mutual inductance is large, the slope of transition will be more gradual and the resonator has a lower Q. In the high band mode, due to the inductor L1 is shunted by two 2.5 turns’ inductors, caused the phase noise performance down. The die size is about 1×1 mm2 including the output buffer, and the simulation results are summarized in table 1.

Conclusions

The switched resonator dual-band VCO is presented and demonstrated in a dual-band VCO operating near 2.4GHz and 5.2GHz with phase noise of –107 and –104 dBc/Hz at a 600KHz offset, respectively and ~7mW power consumption. In this VCO, the switched resonator is utilized for coarse tuning (VSW) and another varactor (VTUNE) is utilized for fine tuning.

Switched resonator not only achieved better trade-off between phase noise and power consumption, but also provided a wide tuning range.

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direct-conversion receiver for DBS applications,” IEEE Int. Solid-State Circuit Conf., pp. 140-141, 2000.

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[3] S. M. Yim and K. O. Kenneth, “Demonstration of a Switched Resonator Concept in a Dual-Band Monolithic CMOS LC-Tuned VCO,” IEEE Custom Integrated Circuits Conference, pp. 205-208, 2001.

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Integrated Circuits, Cambridge University, 1998.

(a) (b)

Fig. 1 (a) Cross section of a MOS varactor and (b) capacitance tunable range from 7 pF to 25 pF.

(a)

(b) (c)

Fig. 2 A switched resonator (a) schematic and (b) the simulated capacitance and (c)inductance.

Fig. 3 The block diagram of dual-band VCO. Fig. 4 Schematic of the dual-band VCO.

Fig. 5 Simulation results of resonance frequency, phase noise and output power @ 2.4GHz

Fig. 6 Simulation results of resonance frequency, phase noise and output power @ 5.2GHz

Fig.7 Chip micrograph

Parameters Dual-band VCO at VDD=1.7v

Core Current 3.94mA 3.97mA

Center frequency 2.4G Hz 5.2GHz

Tuning Range 2.4GHz ~ 2.7GHz 4.9GHz~5.3GHz

Vtune 0.5V ~ 1.5V 0.5V ~ 1.5V

Phase Noise @ 600KHz offset -107dBc/Hz -104dBc/Hz

Gain 350M Hz/V 400M Hz/V

Power Consumption 6.7mW 6.7mW

Table 1 VCO characteristics.