Designers Choice 2 2008

8/10/2019 Designers Choice 2 2008

1/68

www.silica.com

2/2008

DESIGNERSCHOICE

IntelAtom Z5xx with SCH US15W (page 24)

Maxim

MAX8654

12 V, 1.2 MHzStep-Down

Regulator

(page 43)

THINK SMALL, THINK COOL:INTELS NEW LOW POWERPROCESSORS

Freescale

MPR083

8-Position

Rotary Wheel

Touch Controller

(page 49)

Renesas

SH7763

SH-4A CPU with

2 x Gbit Ethernet

Controller

(page 33)

Microchip

PIC32MX3xx/4xx

32-Bit MCU with

MIPS32 M4K CPU

Core

(page 28)

Cypress

CY8C201xx

CapSense Express

Capacitive Touch

Sensing Solution

(page 22)


2/68

At TI, weve been helping our customers design high-performance power conversion products that meet strict

efciency regulations for over 20 years. TI can help you get to market fast with a winning, energy-saving design.

Thats High-Performance Analog >>Your Way.

www.ti.com/greenpower-e or call toll free:

00800-ASKTEXAS (00800 275 839 27)or international: +49 (0) 8161 80 2121

Energy-Efficient PowerSolutions

High-Performance Analog >>Your Way

UCC28600 Green Mode PWM Controller Enables off-line power supplies to meet light-load efciency standards

TPS40140 Stackable Multiphase Controller Improves point-of-load efciency in power-hungry data centersand telecom equipment

TPS2410 ORing FET Power Rail Controller Replaces low-efciency diodes with high-efciency, high-reliability control and protection solutions

UCC28060 Industrys First Single-Chip Dual phase for high-efciency, high-power density and easy phase Interleaved PFC Controller management for light-load efciency

UCD9112 Digital Controller w/Congurable GUI Easy-to-use, exible point-of-load solution for multi-rail power topologies

PTH08T250W 50-A Non-Isolated Power Module 96%-efcient, stackable, and easy-to-use point-of-load module

w/TurboTransTMTechnology for servers, wireless infrastructure, datacom and telecom equipment

TMS320F28335 Digital Signal Controller Highly integrated digital controller improves efciency of renewable energy

systems

TurboTrans, High-Performance Analog >>Your Way and the floating bar are trademarks of Texas Instruments. 1997A1 2008 TI


3/68

www.silica.com

ear Customer,

he environment changed for customers in

uropean electronics - the pressure of com-et t on s now e t rom aroun t e wor ,

not just within a single country or region.

ar Eastern OEMs have competed chiefly on

price in the past, but increasingly in future

they will compete on performance and

features. And shorter design cycles, driven

y mprovements n tec no og ca capa ty

and by intensified global competition, require

accelerated design processes.

f Europe is to thrive as a centre of

electronics, it will be by designing high-margin, value-added products that more

than offset the high costs of operating here.

hese days, such value is derived from non-

ar ware e ements, c e y:

Customer and application knowledge

and insight

he ability to innovate at speed

ngineering an outstanding user

exper ence

n this context, what kinds of engineer-

ing requirements will customers have of

a distributor? If European electronics is

now all about speed and margin, how can

ILICA help you get to market quicker with

advanced, feature-rich applications?

y providing appropriate, extendable,

available-on-demand hardware develop-

ment platforms that allow software to be

wr tten e ore custom ar ware s rea y.

Design Support

provide available-on-demand platforms for

customers app cat on eve opment teams.

Each board carries a set of peripheral

components and interfaces which is care-

fully chosen to support the main FPGA or

processor.

ea more a out our atest re erence

platforms in this edition of Designers hoice

or contact one of our local application

specialists.

n re ar s

SILICA VP Marketing

ILI A | e ng neers o str ut on.

By dramatically reducing your board

design and layout overhead. In particu- ar, we a m to prov e es gn support t at

accelerates the customisation of ge-

neric development platforms; and that

eliminates the wasted engineering effort

associated with the design of non-core

hardware elements such as power circuits

an t e s gna c a n.

By delivering trainings in the use of

advanced core technologies.

y extending product and design-insupport up from the hardware level to the

operating system, to ensure that applica-

tion developers have a working platform

as ear y n t e es gn cyc e as poss e.

The traditional European distribution model

aims to meet these new needs by adapting

existing design-in services or bolting on

new ones. For instance, many distributors

w support t e w e range o eva uat on

its provided by device manufacturers. Extra

emphasis is also often given to supporting

core technologies such as microprocessors

and programmable logic.

ilicas approach has been to take these

same elements of the distribution service,

and turbo-charge them. Depth and intensity

of engineering expertise and support are

our hallmark. Working closely with our key

suppliers, Silica has designed and manu-

acture propr etary eve opment ts w c


4/68

CONTENTS BY MANUFACTURER

DESIGNERS CHOICE 02/2008

AD8372 Dual Variable Gain Amplifier 7

AD7991/5/9 4-ch, 12/10/8-Bit ADC with I2C-Compatible Interface 12

ADuM540x 4-ch Isolators with Integrated DC/DC Converter 38

ADIS16209 High Accuracy, 2-Axis Digital Inclinometer 48

ADZ -BF5 7-EZLIT valuation Kit for AD P-BF5 x Blackfin 5

CY8C201xx CapSense Express: Capacitive Touch Sensing Solution 22

CY3280-BK1 Universal PSoCCapSenseTMController Kit 5

AP7173 1.5 A Low Dropout Linear Regulator 39

MPC8315E/8314E PowerQUICC II Pro Processor Family 23

MPR083 8-Position Rotary Touch Wheel Controller 49

OptiMOSTM 30/40/60/80 V MOSFET Families 15

82574L/IT 82574L/IT Gigabit Ethernet Controller 9Z-P140 Z-P140 PATA Solid State Drive 20

AC80566Ux & AF82US15W AtomTM Processor Z5xx with System Controller Hub 2

IRGB40x 600 V Trench IGBTs 16

IRS2 6xD Robust -Phase 600 V ICs 4

IRS233xD 3-Phase Gate Driver for Motor Drive Applications 4

MAX 674 High Performance Clock Synthesiser

MAX5035/MA X5033 76 V Step-Down DC/DC Converter 42

MAX8654 12 V, 1.2 MHz Step-Down Regulator 43MAX6622 5-Channel Precision Temperature Sensor 50

MCP413x/415x/423x/425x Digital Potentiometers 13

dsPIC30F6015 DSC for 3-Phase Motor Control 26

PIC24HJ32 Low Pin-Count 16-Bit MCU 27

PIC32MX3xx/4xx 32-Bit MCU with MIPS32 M4K CPU Core 28

WINHOMESVWIN32 Home Server, 32-Bit with 10 CALs 35

www.silica.com


5/68

02/2008 DESIGNERS CHOICE

NANDxxGyzB NAND Flash Memory 21

PN531 Highly Integrated Transmission Module 10

PMZxxx MOSFETs in SOT883 17

LPC2365/67/77 16/32-Bit ARM7TDMI-S Microcontroller 29

PC2478 ARM7TDMI-S Microcontroller

LPC32x0 16/32-Bit ARM926EJ-S Microcontroller 31

PIP213-12M High Performance DC/DC Buck Converter 44

NCP3120 Dual 2.0 A Switching Regulator 45

H8SX/1622F 32-Bit CISC MCU with Precision 16-Bit ADC 32

SH7763 SH-4A CPU with 2 x Gbit Ethernet Controller 33

50360 P5-II Condensed Colour Source 3

W724C P7 Z-Power LED 37

NI4140K 4 High-Side Smart Power Solid State Relay 46

PM8800A Integrated PoE Interface and PWM Controller 47

LIS344AL 3-Axis, 3.5 g Compact Linear Accelerometer 51

CC2480 2.4 GHz ZigBeeNetwork Processor 11

ADS612x 12-Bit, 65...125 MSPS ADC 14

TMS320DM6467 High Performance DaVinci Processor 18

MSP430F2x x Ultra-Low Power 16-Bit RISC MCU 34

XC5V FXT Virtex

-5 Platform FPGA 19

AES-SP3A-E VAL400-G Spartan-3A and PSoC Evaluation Kit 53

AES-V5FXT-EVL30-G Xilinx Virtex-5 FXT Evaluation Kit 54

FireCracker-BF537E Audio, Video and Communications Design Platform 56


6/68


CONTENTS BY APPLICATION

Manuacture

PartNumbers

PageNumber

utomotive

Wire

ommunications

Wireless

Communications

Computer

&relatedProducts

ConsumerProducts

n

ustral-Motor

Control/-Drive

ndustrial-Lighting

Industrial-Test

&Measurement

Industrial-Medical

Equipment

In

ustral-Power

anagement

In

ustrial-Power

Supply

Industrial-Othe

Securit

ransportaton

AmplifiersADI AD8723 7 X X X X X

Clock

MXM MAX3674 8 X X X X X X

Connectivity, Communication & Interface ICs

ITL 82574L/IT 9

NXP PN531 10 X X X X X

TIS CC2480 11

Data Converter ICs

ADI AD7991/5/9 12 X X X

MCP MCP413x/415x/423x/425x 13

TIS ADS612x 14 X X X X

Discretes

IFX OptiMOSTM 3 families 15

IRF IRGB40x 16 X X X X X X

NXP PMZxxx MOSFETs in SOT883 17 X X X X

DSPs

TIS TMS320DM6467 18

FPGA

XLX Virtex-5 FXT 19

Memories

ITL Z-P140 20 X X X X X X X

NUM NANDxxGyzB 21

Microcontrollers and -processors

CYP CY8C201xx 22 X X X X X X X X

FSC MPC8315E/8314E 23

ITL AC80566Ux & AF82US15W 24 X X X X X X X

MCP dsPIC30F6015 26 X X X X X X X X

MCP PIC24HJ32 27

MCP PIC32MX3xx/4xx 28 X X X X X XNXP LPC2365/67/77 29

NXP LPC2478 30

NXP LPC32x0 31 X X X X X X X X

REN H8SX/1622F 32

REN SH7763 33 X X X X X X

TIS MSP430F2xx 34

Operating Systems

MST Windows Home Server 35 X

Optoelectronics & Displays

SSC F50360 36

SSC W724C0 37 X X

Power Management ICs

ADI ADuM540x 38

DII AP7173 39 X X X X

IRF IRS2336xD 40 X

IRF IRS233xD 41 X

MXM MAX503x 42 X X X

MXM MAX8654 43 X

NXP PIP213-12M 44 X X X X

ONS NCP312x 45 X X X X

STM VNI4140K 46 X

STM PM8800A 47 X X X X

Sensors

ADI ADIS16209 48 X

FSC MPR083 49 X X

MXM MAX6622 0 X

STM LIS344AL 1

Tools and Services

ADI ADZS-BF527-EZLITE 2AES AES-SP3A-EVAL400-G 3 X X X X X X

AES AES-V5FXT-EVL30-G 4 X X X X X X

CYP CY3280-BK1 5 X X

SIL FireCracker-BF537E 6 X X X X X X

www.silica.com


7/68


CLOCKS

&TIMING

ICs

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

ervice available or alreadyelivere T R from Manufacturer.

apes are available, but not stocked atvnet Log st cs due to low demand.

Device supported by or programming equipment,but the socket for this package must be provided by customer.

AD8372ACPZ-WP

un ts rom:

6.30

D8372ACPZ-R7

un ts rom:

4.55 AMPLIFIERS

The AD8372 is a dual, digitally controlled,

Variable Gain Amplifier VGA that provides

precise gain control, high IP , and low noise

figure. The excellent distortion performance

and moderate signal bandwidth make the

AD8372 a suitable gain control device for a

variety of multichannel receiver applications.

For wide input dynamic range applications,the AD8372 provides a broad 41 dB gain

range. The gain is programmed through a

bidirectional 4-pin serial interface. The se-

r a nter ace cons sts o a c oc , atc , ata

input and data output lines for each channel.

The AD8372 provides the ability to set the

transconductance of the output stage using

a single external resistor. The RXT1 and

RXT2 pins provide a band gap derived stable

reference voltage of 1.56 V. Typically . k

shunt resistors to ground are used to set the

maximum gain to a nominal value of 31 dB.

The current setting resistors can be adjusted

to manipulate the gain and distortion per-

ormance o eac c anne . s s a ex e

feature in applications where it is desirable

to trade off distortion performance for lower

power consumption.

The AD8372 is powered on by applying the

appropriate logic level to the ENB1, ENB2

pins. When powered down, the AD8372 con-

sumes less than 2.6 mA and offers excellent

input-to-output isolation. The gain setting is

preserved when powered down.

a r cate on an na og ev ces, nc., g

frequency BiCMO process, the AD8 72

provides precise gain adjustment capabili-

ties with good distortion performance. The

quiescent current of the AD8372 is typically

106 mA per channel. The AD8372 amplifiercomes n a compact, t erma y en ance

5 5 mm 32-lead LFCSP package and oper-

ates over the temperature range of

-40+85 C.

Key Features

Dual independent digitally controlled VGA

Differential input and output

pen-collector differential output

7.8 dB noise figure to 100 MHzmaximum gain

150 differential input

HD2/HD3 better than 77 dBc for 1 V p-p

differential output

- dB bandwidth of 1 0 MHz

41 dB gain range

1 dB step size 0.2 dB

Serial 8-bit bidirectional SPI control

interface

Wide input dynamic range n-programma e output stage

Power-down feature

Single 5 V supply: 106 mA per channel

Key Applications

Differential ADC drivers

CMTS upstream direct sampling receivers

CATV modem signal scaling

Generic RF/IF gain stages

Single-ended-to-differential conversion

AD8372Dual Variable Gain AmplifierChristian Bangert, SILICA Europe

P/N Package Programming Taping & Reeling Marking

AD8372ACPZ-R7 32-pin LFCSP

AD8 72ACPZ-W 2-pin LFCS

ENB1

IPC1

INC1

CLK1

RXT2

LCH1

IPC2

INC2

REF1

SDI1

SDO1

REF2

OPC1

ONC1

RXT2

SDI2

LCH2

OPC2

ENB2

ONC2

SDO2

CLK2

POSTAMPCHANNEL 1

POSTAMPCHANNEL 2

REGISTERSAND

GAIN DECODER

AD8372

RXT2


8/68


0.00

MAX3674High-Performance Clock SynthesiserPeter Carr, SILICA UK

ervice available or alreadyelivere T R from Manufacturer.r r n a r r.

Tapes are available, but not stocked atT pes r v i l ble , but not t cked tvnet Logst cs due to low demand. .

Device supported by or programming equipment,D vi e pp rted by r pr gr min ip nt,but the socket for this package must be provided by customer.

MAX3674ECM+

un ts rom:

4.40

he MAX3674 is a high-performance net-

ork clock synthesiser IC. It integrates a

crystal oscillator, a low noise phase-locked

oop (PLL), programmable dividers, and

high-frequency LVPE L output buffers. The

LL generates a high-frequency clock based

on a low-frequency reference clock provided

by the on-chip crystal oscillator or an

external LVCMOS clock. The MAX3674 hasexce ent per o tter, cyc e-to-cyc e

jitter and supply noise rejection perform-

ance. With output frequencies program-

mable from 21.25...1360 MHz and support

of two differential PECL output signals, the

evice provides a versatile solution for the

most eman ng c oc app cat ons.

Programming is accomplished through a

2-wire IC bus or parallel interface that can

change the output frequency on demand for

frequency margining. Both LVPECL outputs

ave synchronous stop functionality and the

PLL has a LOCK indicator output.

Key Features

21.251360 MHz programmable PLL

synthesised output clocks

Two differential LVPECL-compatible

outputs

Cycle-to-cycle jitter 1.6 ps RMS and

period itter 0.9 ps RM at 500 MHz

On-chip crystal oscillator or selectable

LVCMO -compatible reference clock input

Excellent power-supply noise rejection

Parallel or 2-wire IC programming

interface

+ . V power supply

Low power consumption: 396 mW at 3.3 V 48-pin LQFP Pb-free package

-40+85 C temperature range

Key Applications

Ethernet network ASIC clock generation

Storage area network ASIC clocking

Optical network ASIC clocking

rogramma e c oc source or server,

computing or communication systems

Frequency margining

P/N Package Programming Taping Reeling arking

MAX 674ECM+ 8-pin LQF

MAX3674

REF_CLK

XTAL1

XTAL2

SDASCLM[9:0]NA[2:0]NBP

QA

QA

QB

QB

CLK_STOPA

CLK_STOPB

BYPASS

PLOAD M R GND LOCK

16 MHz

SERIAL I2CINTERFACE

PARALLELINTERFACE

PLL DIVIDERCONTROLS

REF_SEL

+3.3 V

+3.3 V

VCC

+3.3 V

VCC

_PLL

+3.3 V

Z = 50

130

82

LVPECLOUTPUTS

+3.3 V

NETWORKASIC


9/68




AMPLIFIER

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

CLOCKS

&TIMING

ICs

WG82574IT

100 units from:

5.95

WG82574L

100 units from:

3.95

The 82574 family (82574L and 82574IT) are

single, compact, low power components that

offer a fully-integrated Gigabit Ethernet

Media Access Control (MAC) and Physical

Layer (PHY) port. The devices use the PCI

Express PCIe architecture Rev. 2.0 .The 82574 family provide a single-port

implementation in a relatively small area so

they can be used for server and client con-

figurations as LAN on Motherboard (LOM)

esigns. The 574 family can also be used

in embedded applications such as switch

add-on cards and network appliances.

Key Features

PCI Express (PCIe)

64-bit address master support for

systems using more than 4 GB of

physical memory

rogramma e ost memory rece ve

buffers (256 bytes...16 KB)

Intelligent interrupt generation features

to enhance driver performance

Descriptor ring management hardware

for transmit and receive software

contro e reset

Message signaled interrupts

(MSI and MSI-X)

Configurable receive and transmit data

FIFO, programmable in 1 KB increments

MAC

Flow Control Support compliant with

the 802. X pecification

VLAN support compliant with the802.1Q Specification

MAC Address filters: perfect match

unicast

ters: mu t cast as ter ng,

broadcast filter and promiscuous mode

Statistics for management and RMOM

MAC loopback

PHY

Compliant with the 1 Gb s IEEE 802.3

802. u 802. ab specifications

EEE 802. ab auto negotiation support

Full duplex operation at 10/100/1000 Mb/s

Half duplex at 10/100 Mb/s

High Performance

TCP segmentation capability compatible

w t arge sen o oa ng eatures

Support up to 256 KB TCP

segmentation (TSO v2)

ragmented UDP checksum offload

for packet reassemble

IPv4 and IPv6 checksum offload support

plit header support

Receive Side Scaling (RSS) with two

hardware receive queues

9 KB jumbo frame support

32 KB packet buffer size

Manageability

NC- I for remote management core

MBus advanced pass through

interface

Low Power

Magic Packet wake-up enable with

unique MAC address CPI register set and power down

functionality supporting D0 and

D3 states

Full wake up support (APM and ACPI)

Smart power down at S0 no link and

Sx no lin

sa e unct on

External interfaces

PCIe Rev. 2.0 (2.5 GHz) x1

MDI (Copper) standard IEEE 802.3

Ethernet interface for 1000BA E-T,

100BASETX and 10BASE-T applications (802.3, 802.3u and 802.3ab)

NC-SI or SMBus connection to a

Manageability Controller (MC)

IEEE 1149.1 JTAG

Key Applications

Industrial

r nt mag ng

ommunications infrastructure

Infotainment

Medical

Interactive clients

Key Design Tips

Schematics

Reference design layout

LAN software drivers and tools

O supported: Windows, Linux, FreeB D,

Netware, DOS

82574L/ITIntel82574L/IT Gigabit Ethernet ControllerUros Mali, SILICA Slovenia


WG82574L mm x 9mm QFN

WG82 74IT 9mm x 9mm QF

PCIe x1 SmBus NC-SI

SPI Flash/EEPROM

1000Base-T Network Interface

ManagementPCI Express

Packet buffer LAN configuration

Ethernet MACEthernet PHY

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs



10/68

1 DESIGNERS CHOICE 02/2008


Tapes are available, but not stocked atvnet Logst cs due to low demand.


OM5555 N531US02

Design Kit

188

N5 10A HN

100 units from:

3.10

he PN531 is a highly integrated transmis-

sion module for contactless communica-

tion at 13.56 MHz including microcontroller

functionality based on an 80C51 core with

2 Kbyte of ROM and 1 Kbyte of RAM. This

microcontroller-based transmission module

combines an outstanding modulation and

demodulation concept completely integrated

for different kinds of contactless communi-cation methods and protocols at 1 .56 MHz

ith an easy to use firmware for the different

supported modes and the required host

interfaces.

n reader/writer mode the PN531s internal

transmitter part is able to drive a reader

r ter antenna es gne to commun cate

ith ISO1443A/MIFARE or FeliCA cards

and transponders without additional active

circuitry.

n card mode the PN 1 is able to answer

a reader writer command either in FeliCaor ISO14443A/MIFARE standard. The PN531

generates the proper digital load modulated

signals and with an external circuit, can

respond to commands sent by reader/writer.

he PN5 1 offers the possibility to directly

communicate with several NFC enabled

devices in the NFC IP-1 mode. The NFC IP-1

mode offers different baudrates up to

424 kbit s.

Key Features

80C51 microcontroller core with

32 Kbyte ROM and 1 Kbyte RAM

g y ntegrate ana og c rcutry or

transmission and reception

Output drivers to connect an antenna with

minimum number of external components

Integrated RF level detector

Integrated mode detector

2.5... .6 V power supply

USB bus powered (in USB mode)

Hardware and embedded firmware

support for:

ISO 14443A reader writer mode

MIFARE Classic encryption and MIFARE

higher baudrate communication up to

424 kbit/s

Contactless communications according

to FeliCa scheme at 212 kbit/s and

424 kbit s NFC standard ECMA 40 and I O 18092:

NFC IP-1 interface and protocol

Host protocol on following interfaces:

USB 2.0 full speed, SPI, I2C,

high speed serial UART

Internal oscillator to connect a

27.12 MHz quartz

Internal oscillator to connect a

4 MHz quartz for the USB interface

Specific I O ports and interrupt sources

for external evices control

Key Applications

The PN531 is tailored to fulfil the

requ rements o var ous app cat ons us ng

contactless communication ase on NF

IP-1, ISO 1443A and FeliCa protocols.

Applications for the PN531 are very wide,

ranging from identification to electronic

payment.

Key Design Tips

Design kit for the PN531 available:

OM5555 N531US02

PN531Highly Integrated Transmission ModuleAlessandro Vigano, SILICA Europe

P/N ac age Programm ng Taping & Reeling ark ng

PN5310A3HN 40-pin HVQFN

OM5555/N531US02 oo

FIFO Control

64 Byte FIFO

Control RegisterBank

MIFARE Classic Unit

Random NumberGenerator

AmplitudeRating

ReferenceVoltage

AnalogTest

MUX andDAC

I-ChannelAmplifier

I-ChannelDemodulator

Q-ChannelAmplifier

Q-ChannelDemodulator

RF clockrecovery

Q-ChannelDemodulator

RF leveldetector

Transmitter Control

Temp.Sensor

Q-ClockGeneration

ClockGeneration,Filtering andDistribution

Oscillator

Power DownControl

ResetControl

VoltageMonitor

&Power On

Detect

State Machine

Command Register

Programmable Timer

Interrupt Control

CRC16Generation & Clock

Parallel/Serial Converter

Bit Counter

Parity Generation &Check

Frame Generation &Check

Bit Decoding Bit Coding

Card Mode Detector

Serial Data Switch

A/D Converter

8-bit Parallel, SPI, UAT, I2C Interface Control(incl. Automatic Interface Detection & Synchronisation)

DVDD

DVSS

AVDD

AVSS

NRSTPD

IRQ

SIGINSIGOUTLOADMOD

OSCIN

OSCOUT

VMID AUX1, 2 RX TVSS TX1 TX2 TVDD

NWR NRD NCS ALE A0...A5 D0...D7PVDD PVSS

V,

GND

V,

GND


11/68





AMPLIFIER

CLOCKS

&TIMING

ICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

EZ430-RF2480

Z-Accel

emo Kit

86

CC2480A1RTC

1k units from:

6.90

The CC2480 is the first product from TIs new

Z-Accel family of 2.4 GHz ZigBee certified

network processors which offers cost-

effective, low power ZigBee functionality

with a minimal development effort. Z-Accel

is a complete solution where the Z-StackTM

V1.4.3, TIs ZigBee-2006 compliant stack is

runn ng on a g ee processor w e t e

application runs on an external M U. The

CC2480 handles all the timing-critical and

processing-intensive ZigBee protocol tasks,

while leaving the resources of the external

MCU free to handle the application.

So, Z-Accel makes it easy to add ZigBee

functionality to new or existing applica-

tions like home and building automation,

industrial monitoring and control, medical

applications, low-power wireless sensor

networ s, remote contro s, automate meter

reading and many others. At the same time

Z-Accel provides great flexibility in choice of

microcontroller because it communicates

with any MCU via an SPI or UART interface,

and it can easily be combined, for example,

with TIs MPS430 ultra-low power MCUs.

The device supports TIs SimpleAPI, which

has only 10 API calls to learn, as well as the

full ZigBee API. The Z-Accel can implement

any type of ZigBee device: Coordinator,

Router or En Device.

The CC2480 has a fully integrated and robust

IEEE 802.15.4-compliant 2.4 GHz DSSS RF

transceiver and offers excellent receiver

sensitivity and best in class robustness to

nter erers, ow power consumpt on an an

automatic low-power mode in idle periods.

Key Features

IEEE 802.15.4-compliant 2.4 GHz D

RF transceiver

Wide supply voltage range (2.03.6 V)

CC24802.4 GHz ZigBeeNetwork ProcessorKlaus Stephan, SILICA Germany


C2480A1RTC 48-pin QFN

Z4 0-RF248 oo

MEMORYARBITRATOR

8051 CPUCORE

DMA

128 KB

FLASH

8 KB

FLASHWRITE

RESETRESET_N

GPIO3

GPIO2

GPIO1

GPIO0

A1

A0

SI/TX

SO/RX

SS/CT

C/RT

SRDY

MRDY

32.768 kHz

32 MHzCRYSTAL OSC

HIGH SPEEDRC-OSC

32 kHz RC-OSC

CLOCK MUX &CALIBRATION

USART

IEEE802.1

5.4

MACT

IMER

AESENCRYPTION

&DECRYPTION

IRQCTRL

FIFOANDFRAMECONTROL

AGC

RF_P RF_N

MODULATORDEMODULATOR

POWER ON RESETBROWN OUT

SLEEP MODE CONTROLLER

XOSC _Q2

XOSC _Q1

ADCAUDIO/DC

2 CHANNELS

VDD

(2.0...3.6 V)

DCOUPL

ON-CHIP VOLTAGEREGULATOR

RECEIVECHAIN

TRANSMITCHAIN

FREQUENCY

SYNTHESIZER

DIGITAL

ANALOG

MIXED

GPI/O

32 K_XOSC_Q2

32 K_XOSC_Q1

CRYSTAL OSCSLEEP TIMER

SRAM

Low current consumption

(Rx: 27 mA, Tx: 27 mA)

Fast transition times

Port expander with 4 general I O pins

Battery monitor and temperature sensor

7...12 bits ADC with two channels

Robust power-on-reset and brown-out-

reset circuitry

7 7 mm 48-lead QLP package

Key Applications

Home/Building automation

Industrial control and monitoring

ow power w re ess sensor networ s

Set-top boxes and remote controls

Automated meter reading

Key Design Tips The EZ430-RF2480 is a USB-based

wireless demonstration tool providing all

t e ar ware an so tware necessary to

evaluate the 4 network processor

and the MSP430 MCU

www.ti.com/lprfnetwork, TIs Low-Power

RF Developer Network enables custom-

ers to find a suitable partner to assist with

ar ware esg n, mo u es, em e e

software, gateways, commissioning tools,

etc.

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs


12/68





AD7999YRJZ-xRLx

1k units from:

0.96

AD7995YRJZ-xRLx

1k units from:

1.45

AD7991YRJZ-xRLx

1k units from:

2.05

EVAL-AD7991/5EBZ

Evaluation Board

83

he AD7991/AD7995/AD7999 are 12/10/8-bit,

ow power, successive approximation ADCs

ith an IC-compatible interface. Each part

operates from a single 2.7...5.5 V power sup-

ly and features a 1 s conversion time. The

track-and-hold amplifier allows each part

to handle input frequencies of up to 14 MHz

and a multiplexer allows taking samples

from four channels. Each device provides a2-wire serial interface compatible with IC

interfaces.

he AD7991 and AD7995 come in two ver-

sions and each version has an individual2C address. This allows two of the same

ev ces to e connecte to t e same 2 us.

oth versions support standard, fast, and

high speed I2C interface modes. The AD7999

comes in one version.

he devices normally remain in a shutdownstate, powering up only for conversions.

he conversion process is controlled by a

command mode, during which each I2C read

operat on n t ates a convers on an returns

the result over the I2 us.

hen four channels are used as analog in-

uts, the reference for the part is taken from

VDD

this allows the widest dynamic input

range to the ADC. Therefore, the analog in-

put range to the AD is V...DD

. An external

reference, applied through the VIN3

/VREF

input,

can also be used with this part.

Key Features

12/10/8-bit ADCs with fast conversion

time: 1 s typical

4 analog input channels/3 analog input

c anne s w t re erence nput

pecified forDD

of .7 . V

Sequencer operation

Temperature range: -40 C...+125 C

IC-compatible serial interface supports

standard, fast and high speed modes

two versions allow two I a resses

Low power consumption

Shutdown mode: 1 A maximum

8-lead SOT-23 package

Key Applications

System monitoring

Battery-powered systems

Data acquisition

e ca nstruments

Key Design Tips

Evaluation boards for the 4-channel,

12 10-bit ADCs are available:

EVAL-AD7991EBZ/EVAL-AD7995EBZ

AD7991/5/912/10/8-Bit ADC, I2C-Compatible InterfaceChristian Bangert, SILICA Europe


D7 1YR Z-xRLx 8-pin SOT-23

D7 YRJZ-xRLx 8-pin SOT-23

AD7999YRJZ-xRLx 8-pin SOT-23

- oo

EVAL-AD7995EBZ ool

I/PMUX

SCL

SDA

GND

AD7991/7995/7999

12-/10-/8-BITSARADC

VIN0

CONTROLLOGIC &

I2CINTERFACE

VDD

VIN1

VIN2

VIN2/Vref

T/H


13/68

02/2008 DESIGNERS CHOICE 1

AMPLIFIER

CLOCKS

&TIMING

ICs

DIGITAL

SIGNAL

PROCESSORS

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

DISCRETE

DATA

CONVERTER

ICs

MCP4132-xxxE/xx

1k units from:

0.34

MCP4231-xxxE/xx

1k units from:

0.45

MCP4251-xxxE/xx

1k units from:

0.47




The MCP413x/415x/423x/425x are single

and dual potentiometers or rheostat devices

with volatile memory including different

resistor values and step number options.All derivatives have an SPI interface (with

SDI and SDO multiplexed on smallest de-

vices packages).

e res stor va ue s not permanent y store

in the memory, but reset at each power-

up of the device. The MCP4xx1 are digital

potentiometers (ie outputs a voltage divider

on 3 pins), while the MCP4xx2 are the rheo-

stat devices (ie outputs a divided resistor

value on 2 pins . The MCP4xx1 can be usedin rheostat configuration too, by letting a

terminal output floating.

We have 2 resolution options, 7; 8-bit, cor-

responding to 2 numbers of dividing resistor

steps 129; 257 , and 4 full scale resistor

values: 5; 10; 50; 100 k.

Key Features

Low wiper resistance: 75 typ

ow temperature coe c ent:

Absolute rheostat : 50 ppm typ. 0...70 C

Relative: ratiometric (potentiometer):

15 ppm typ (0...70 C)

Resistor terminal shutdown feature by

shuntdown pin or TCON register ower-on reset an rown-out reset

protection

Serial interface inactive current (2.5 A typ)

SPI interface: support single/continuous

read/write operation, support single/con-

tinuous increment decrement operation

upport split rail application

Wide bandwidth (-3 db) operation:

2 MHz (typ) for 5 kdevice

Wide operating range 1.85.5 V(2)

Key Applications

Mechanical potentiometer replacement

o ume contro

Actuator contro

Programmable gain and offset adjustment

MCP413x/MCP415x/MCP423x/MCP425xDigital PotentiometersGilles Robert, SILICA France

P/N ac age Programming Taping Reeling Marking

MCP413x-xxxE/P, MCP42x1-xxxE/P PDIP-8, PDIP-14

MCP413x-xxxE/SN, MCP42x1-xxxE/SL,MCP42x2-xxxE/UN

I - , I -14, M P-1

MCP414x-xxxE/Mx, MCP415x-xxxE/Mx,MCP42x1-xxxE/ML, MCP42x2-xxxE/MF

DFN-8/10, MSOP-8, QFN-16

Power-up/Brown-outControl

VDD

VSS

SPI SerialInterfaceModule &ControlLogic(WiperLock

Technology)

ResistorNetwork 0(Pot 0)

Wiper 0& TCONRegister

ResistorNetwork 1(Pot 1)

Wiper 1& TCONRegister

CS

SCK

SDI

SDO

NCSHDN

Memory (4x9)

Wiper0Wiper1

TCONSTATUS

P0A

P0W

P0B

P1A

P1W

P1B

For Dual Resistor NetworkDevices Only

For Dual PotentiometerDevices Only

# of POTs Wiper Configuration Memory Type OR Wiper Settings RAB options (k) # of steps

MCP4131 otent ometer(1) id-Scale 5.0/10.0/50.0/100.0 129

CP413 eostat id-Scale 5.0/10.0/50.0/100.0

MCP4151 Potentiometer(1) RAM id-Scale 5.0/10.0/50.0/100.0 257

MCP4152 Rheostat RAM id-Scale 5.0/10.0/50.0/100.0 257

MCP4231 2 Potentiometer(1)

RAM id-Scale 5.0/10.0/50.0/100.0 129MCP4232 2 Rheostat RAM id-Scale 5.0/10.0/50.0/100.0 129

CP4251 otent ometer(1) i - cale 5.0/10.0/50.0/100.0 25

CP425 eostat id-Scale 5.0/10.0/50.0/100.0 25

Note 1: Floating either terminal (A or B) allows the device to be used as a Rheostat (variable resistor).Note 2: Analog characteristics only tested from 2.7...5.5 V unless otherwise noted.

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs


14/68





ADS6122IRHBT

100 units from:

10.50

DS6122EV

Evaluation Module

205

ADS6125IRHBT

100 units from:

23.90

he ADS612x is a 12-bit pin compatible

family of analog to digital converters with

125 105 80 65 Msps sample rate that is

ery nterest ng or g spee app cat ons

here low power consumption and high A

performances have to be reached even at

igh input frequencies.

he ADS612x family, with an input bandwidth

of 450 MHz, can sample input frequenciesup to 450 MHz at 125 Msps (under-sampling

mode). The 12-bit data output is available

and can be selected in both DDR LVDS and

CMOS and coded in either straight offset

binary or 2s complement format.

he reference voltage can be either internal

or externa an can e se ecte y ser a

interface. The integration of the reference

capacitors on-chip eliminates the need of

external decoupling.

he family also includes programmable

coarse and fine gain to modify the input fullscale range in order to get improved SFDR

performance with little SNR degradation.

he clock inputs can be driven single-ended

(LVCMOS) or differentially (SINE, LVPECL

or LVDS which reduce the susceptibility to

common mode noise.

Key Features

1 -bit resolution, no missing code

65125 Msps sample rate

Input bandwidth 450 MHz

INL 1 LSB, DNL max. 0.6 LSB

Programmable internal or external

re erence mo e

No external decoupling required for

references

Supports sine, LVDS, LVCMOS and LVPECL

clock with amplitude down to 400 mVPP

Clock duty cycle stabiliser

3.3 V analog supply and

1.83.3 V digital supply

ow power:

4 mW at 1 5 Msps

285 mW at 65 Msps

30 mW in power down mode

Programmable coarse gain and fine gain

in 1 dB steps from 0...6 dB to improveFDR

32-lead QFN package

Key Applications

re ess commun cat ons n rastructure

Software defined radio

Test and measurement instrumentation

Radar systems

Medical imaging

g e n t on v eo

Key Design Tips

ADS612xEVM Evaluation Modulesfor AD 612x family

ANTIALIASINGCALC Anti Aliasing

Calculation tool for A to D converters

ADC-INPUT-CALC Op Amp to ADC

circuit topology calculator

ADS61xx EVM Users Guide

g spee ata convers on app cat on

note (sbaa045)

ADS612x12-Bit, 65125 MSPS ADCLucio Fornuto, SILICA Italy


D 122IRHBT QFN-32 (5 x 5 mm)

DS612 IRHBT QFN-32 (5 x 5 mm)

D 124IRHBT QFN-32 (5 x 5 mm)

D 61 IRHBT QFN-32 (5 x 5 mm)

ADS612xEVM oo

SHA 12-bitADC

CLOCKGEN

Reference

DigitalEncoderand

Serialiser

ControlInterface

INP

INM

CLKP

CLKM

VCM

CLKOUTP

CLKOUTM

D0_D1_P

D0_D1_M

D2_D3_P

D4_D5_P

D6_D7_P

D8_D9_P

D10_D11_P

D2_D3_M

D4_D5_M

D6_D7_M

D8_D9_M

D10_D11_M

ADS612X

SCLK

SEN

SDATA

RESET

AVDD

AGND

DRVDD

DRGND

PDN


15/68

02/2008 DESIGNERS CHOICE 1




AMPLIFIER

CLOCKS

&TIMING

ICs

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

DIGITAL

SIGNAL

PROCESSORS

IPP028N08N3 G

1 k units from:

1.37

B 1 N 4L

10k units from:

0.68

The OptiMOS 3 30/40/60/80 V families offer

industry-leading performance in such key

power conversion metrics as on-state

res stance, w c a ows t em to re uce

power losses by as much as 0 in a given

standard TO (Transistor Outline) package.

The new OptiMOS 3 families include

MOSFETs that offer best-in-class

DSon (on-state resistance), achieving an

DSonas low as 1.4/1.6 mfor 30/40 V prod-

ucts in SuperSO8 packages, 3.5 mfor 60

V products in D-PAK packages and

2.5 mfor 80 V products in D-PAK pack-

ages. The FOM (Figure Of Merit, calculated

as on-state resistance times gate charge of

these devices is as much as 25 better than

that of their closest competitors, and ena-

bles fast switching while minimising conduc-

tion losses and on-state power dissipation,

allowing higher power densities.

It also results in less heat generation in the

driver and therefore, improved system reli-

ability. In addition, the low RDS(on)

allows the

use o sma er pac ages, suc as t e

3.3 x 3.3 mm S3O8 Shrink SuperSO8 ,

so less space is required in a design

thereby increasing power density.

Key Features

Best-in-class RDS(on)

Low switching losses

Increase in power densities by

up to 30%

FOM Figure Of Merit, calculated as

on-state resistance times gate charge)

enables fast switching

Key Applications

SMPSs (switched-mode power supplies)

DC/DC converters

DC motor drives

ome app ances

mall electric vehicles

Industrial automation systems

Consumer devices as power tools

Telecommunications equipment

OptiMOS330/40/60/80 V MOSFET FamiliesGiovanni Caruso, SILICA Italy


BSC016N04LS G TDSON-8

PP08N08N G O220-

1 3 5 7 9 11 13 15 17 19 21

91

90

89

88

87

86

85

8483

82

81

80

79

Efficiency

[%]

/out

[A]

OptiMOS2; HS: 12 m, LS: 3.2 mOptiMOS3; HS: 12 m, LS: 3 m

Efficiency improvement replacing OptiMOS2 30 V by OptiMOS3 30 V in a DC/DC buck converter

DISCRETES


16/68





IRGP4063DPbF

10k units from:

1.80

IRGB4060DPbF

10k units from:

0.65

IRGB4059DPbF

10k units from:

0.50

he family of 600 V insulated gate bipolar

transistors (IGBTs) reduces power dissipa-

tion by up to 30% in uninterruptible power

supply (UPS) and solar inverter applications

up to kW.

he new devices use IRs latest-generation

field stop trench technology to reduce

conduction and switching losses, and areoptimised for switching at 20 kHz with low

short circuit requirements, enabling higher

efficiency power conversion in UPS and

solar inverter applications. Co-packaged

ith ultrafast soft recovery diodes, the new

family of IGBTs has lower collector-to-

emitter saturation voltage (VCE (on)

) and total

switching energy (ETS) than punch-through

PT) and non-punch-through (NPT) type

I BTs. In addition, the internal ultrafast

soft recovery diode improves efficiency

and reduces EMI.

Key Features

Low VCE (on)

Trench IGBT technology

Low switching losses

Maximum junction temperature 175 C

5 s SCSOA

Square RBSOA

100% of the parts tested for 4X rated

current ILM

PositiveCE (on)

empera ure

coefficient

Ultra fast soft recovery co-pack diode

Tighter distribution of parameters

Lead-free package

Key Applications

Uninterruptible power supply (UPS)

Solar inverter applications

Key Design Tips

number of application notes is available:

AN-944 - use gate charge to designthe gate drive circuit for power MOSFETs

and IGBTs

AN-955 - protecting IGBTs and MOSFETs

from ESD

AN-98 - IGBT characteristics

AN-986 - ESD testing of MOS gated

power transistors

AN-990 - application characterisation

of IGBTs

AN-1045 - AC TIG welding:

output inverter design basics

AN-1086 - BVCES testing considerations

for ultra-thin wafer depletion stop trench

IGBTs

AN-1088 - PDP power devices

IRGB40x600 V Trench IGBTsFlorian Freund, SILICA Europe


IRGB4059DPbF TO-220

IRGB4045DPbF TO-220

IRGB4060DPbF TO-220

IRGB4064DPbF TO-220

IRGP406 DPbF T -247


17/68





AMPLIFIER

CLOCKS

&TIMING

ICs

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

Key Features

Better performance than existing small

footprints

Higher power dissipation and lower

DSON with higher current density Reduced heat dissipation can eliminate

need for cooling fan or bulky heat sink

MZxxxxN

un ts rom:

0.14

or porta e app cat ons, oar rea estate

is a critical factor and drives the development

of products with ever smaller footprints. For

todays space-constrained and power hungry

applications, NXPs MO FETs in OT88

offer the perfect solution, delivering superiorthermal performance with minimal size:

1.0 x 0.6 x 0.5 mm.

PMZ250UN/ 270XN/ 350XN/ 390UN/ 760SNMOSFETs in SOT883Lasse Lindstrom, SILICA Sweden

P/N ackage rogramming aping Reeling Marking

xxxx SOT88

P/N

Maximum values Typical values

VDS GS

I (A) Pd

RDS(ON)

(m) Q Qd

Ciss

V 25 100 W 10 V 4.5 V 2.5 V 1.8 V nC nC pF

PMZ250UN 20 8 2.28 1.44 1.25 250 20 20 0.89 0.18 45.00

PMZ270XN 20 12 2.15 1.36 1.25 270 440 0.72 0.18 4.00

PMZ350XN 30 12 1.87 1.18 1.25 350 520 0.65 0.18 7.00

PMZ390UN 30 8 1.78 1.13 1.25 390 460 550 0.89 0.20 43.00

PMZ760SN 60 20 1.22 0.77 1.25 760 1100 1.05 0.22 23.00

Drain

SourceGate Voltage

Vs+

L

2

1

Gate

R

Occupies only 1.17 mm, 30% less than

SC-75 or SC-89

Key Applications

Load switch

Mobile phone

Notebooks MP players

External pass devices

Buck converter

Boost converter DISCRETES


18/68





va uat on o u e:

1390

MS320DM6467ZUT

100 units from:

61

he TM 20DM6467 leverages TIs DaVinciTM

technology to meet the networked mediaencode and decode application processing

needs of next-generation embedded devices.

o allow consumers to seamlessly move

content across t e r v eo en pro ucts,

exas Instruments is offering a new DaVinci

technology digital media processor for video

transcoding in media gateways, multi-point

control units, digital media adaptors, video

security DVRs and IP set-top boxes. Wrapped

t a comp ete o erng o eve opment

tools and digital media software, the

MS320DM6467 is a DSP-based system-on-

chip specifically tuned for real-time, multi-

format, high-definition (HD) video transcod-

ing. Integrating an ARM926EJ-S core and

600 MHz C64x+ D P core along with a high-

definition video co-processor, conversion

engine and targeted video port interfaces,

the system solution delivers a 10 x perform-

ance improvement over previous generation

processors to perform simultaneous, multi-

ormat enco e, eco e an transco ng

up to H.264 HP@L4 (1080 p 30 fps, 1080i 60

fps, 720p 60 fps).

Key Features

Advanced very-long-instruction-word

(VLIW) TMS320C64x+ DSP core

C64x+ instruction set features

C64x+ L1/L2 memory architecture

ARM92 E - core

Embedded trace buffer (ETB11) with

4 KB memory for ARM9 debug

Endianness: little endian for ARM and DSP

Dual programmable High-Definition Video

Image Co-Processor (HDVICP) engines

Video port interface VPIF

Video data conversion engine (VDCE)

Two transport stream interface (TSIF)

modules (one parallel/serial and

one serial only)

External memory interfaces (EMIFs)

Enhanced direct-memory-access (EDMA)

controller (64 independent channels)

10/100/1000 Mb/s Ethernet MAC (EMAC)

USB Port with integrated 2.0 PHY

32-bit, 33 MHz, 3.3 V Peripheral Component

Interconnect PCI master/slave interface

Two 64-bit general-purpose timers

(each configurable as two 32-bit timers)

One 64-bit watchdog timer

Three configurable UART/IrDA/CIR

modules (one with modem control signals)

One PI with two chip-selects

Master/slave I2 Bus

Two multichannel audio serial ports

(McASPs)

32-bit Host Port Interface (HPI)

VLYNQ interface (FPGA interface) Two Pulse Width Modulator (PWM) outputs

ATA/ATAPI I/F (ATA/ATAPI-6 specification)

Up to 33 general-purpose I/O (GPIO) pins

(multiplexed with other device functions)

On-chip ARM ROM bootloader (RBL)

Individual power-saving modes for ARM DSP

ex e c oc generators

3.3 V and 1.8 V I/O, 1.2 V internal

Key Applications

Video encode/decode/transcode/transrate

Digital media

Networked media encode/decode

eo mag ng

Vi eo infrastructure

Video conferencing

Video surveillance

Key Design Tips

DM6467 Digital Video Evaluation Module:

The TMS320DM6467 Digital Video Evalua-

tion Module (DVEVM) enables developers

to start immediate evaluation of DaVinci

processors an eg n u ng g ta v eo

applications such as surveillance servers/

recorders, media gateways, multi-point

control units, digital media adaptors, set-top

boxes and many other high-definition video

applications.

TMS320DM6467High Performance DaVinci ProcessorIrfan Bheda, SILICA UK


TMS320DM6467ZUT 529-pin BGA

oo

JTAG Interface

System Control

PLLs/ClockGenerator

InputClock(s)

Power/SleepController

PinMultiplexing

ARM926EJ-S CPU

16 KBI-Cache

32 KB RAM

8 KBD-Cache

8 KB ROM

DSP Subsystem

C64x+TM DSP CPU

32 KBL1 Pgm

128 KB L2 RAM

32 KBL1 Data

High Definition

Video-Imaging

Coprocessor

(HDVICP0)

Switched Central Resource (SCR)

Peripherals

EDMA I2C SPIUART

Serial Interfaces

DDR2Mem Ctlr(16/32b)

Async EMIF/NAND/

SmartMediaATA

Program/Data Storage

WatchdogTimer PWM

System

General-Purpose

Timer

USB 2.0PHY

VLYNQEMACwith

MDIO

Connectivity

HPI

McASP

VideoPort I/F

PCI(33 MHz)TSIF

High Definition

Video-ImagingCoprocessor

(HDVICP1)

CRGEN VDCE


19/68





AMPLIFIER

CLOCKS

&TIMING

ICs

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

MEMOR

IES

ES-V FXT-

EVL30-G

valuation Kit

265

XC VFX70T-

2FF665C

1 units from:

720

C VFX 0T-

1FF665C

units from:

280

The Virtex-5 families provides the newest

most powerful features in the FPGA mar-

et. Using the second generation A MBL

Advanced Silicon Modular Block column-based architecture, the Virtex-5 family contains

four distinct platforms (sub-families), the

most choice offered by any FPGA family. Each

p at orm contans a erent rat o o eatures

to address the needs of a wide variety of

advanced logic designs. This overview contains

detailed information about the LX, LXT, SXT

and FXT platforms. In addition to the most

advanced, high-performance logic fabric,

Virtex-5 FPGAs contain many hard-IP system

evel blocks, including powerful 6-Kbit block

RAM/FIFOs, second generation 25 x 18 DSP

slices, SelectIO technology with built-in

digitally-controlled impedance, ChipSync

source-synchronous interface blocks, system

mon tor unct ona ty, en ance c oc man-

agement tiles with integrated DCM (Digital

Clock Managers) and phase-locked-loop (PLL)

clock generators, and advanced configuration

options. The LXT and SXT devices also contain

power-optimised high-speed serial transceiver

locks for enhanced serial connectivity, a PCI

Express compliant integrated Endpoint

block, and tri-mode Ethernet MACs (Media

Access Controllers). Topping the range are the

FXT devices, offering even higher performance

GTX serial gigabit transceivers capable of upto 6.5 Gbps speed, and up to two PowerPC

440 processor cores, each delivering 1,100

DMIPS@550 MHz. The PPC440 processor

block includes a 5 x 2 128-bit crossbar switch

to minimise latency when building ultra-high

performance systems, and an Auxiliary Proc-

essor Unit port for high bandwidth connections

to a Floating Point Unit or to custom FPGA

logic. These features allow advanced logic de-

s gners to u t e g est eve s o per orm-

ance and functionality into their FP A-based

systems. Built on a 65-nm state-of-the-art

copper process technology, Virtex-5 FPGAs are

a programmable alternative to custom ASIC

technology. Most advanced system designs

require the programmable strength of FPGAs.

Virtex-5 FPGAs offer the best

solution for addressing the needs of

high-performance logic designers, high-

performance DSP designers, and high-

performance embedded systems designers

wt unprece ente og c.

Key Features Cross-platform compatibility - LXT, SXT,

and FXT devices

Powerful clock management tile (CMT)

clocking

36-Kbit block RAM/FIFOs -

True dual-port RAM blocks

High signal-integrity flip-chip packaging

available in Pb-free packages High-performance parallel electIO

technology 1.2...3.3 V I/O

Flexible configuration options SPI and

Parallel FLASH interface

Integrated Endpoint blocks for PCI

Express LXT/SXT Compliant with the

PCI Express Base pecification 1.1

x1, x2, x4, or x8 lane support per block

Tri-mode 10/100/1000 Mb/s Ethernet

MACs (LXT/SXT)

RocketI TP transceivers

100 Mb/s...3.75 Gb/s LXT/SXT RocketIO High Speed GTX transceivers

500 Mb/s...6.50 Gb/s (FXT)

PowerPC 440 Processor cores

1,100 DMIPS@ 550 MHz (FXT)

ystem Monitoring capability

on all devices

Key Applications

ptimised for embedded processing and

memory-intensive applications with

highest-speed serial connectivity

Key Design Tips

XilinxVirtex-5 FXT Evaluation Kit,

designed by Avnet. More Information

see page 54.

XC5V FXTVirtex-5 Platform FPGARichard Griffin, SILICA UK


C5VFXxxT-xFF665X FF-665 BGA

AES-V FXT-EVL 0-G oo

APUPower PC

440Processor

DCR

I

R

W

Crossbar

DMA

DMA

PLB Slv0

Memory I/F

PLB Master

PLB Slv1

DMA

DMA

FIELD

PROGRAMMABLE

GATEARRAYS


20/68


ervice available or alreadyelivere T R from Manufacturer.r r n a r r.

Tapes are available, but not stocked atT pes r v i l ble , but not t cked tvnet Logst cs due to low demand. .

Device supported by or programming equipment,D vi e pp rted by r pr gr min ip nt,but the socket for this package must be provided by customer.

SSDPAPS0002G1

100 units from:

26.90

he IntelZ-P140 PATA Solid State Drive

SSD) is an ultra-small, complete storage

solution for mobile, digital entertainment,

an em e e app cat ons, o er ng ow-

power, high performance and durability.

Using the industry standard PATA interface,

the IntelZ-P140 PATA SSD offers the

capacity and features to accelerate comput-

ing trends towards greater mobility.

Specifically designed for small form factor

requ rements, t e nte Z-P140 PATA D is

small and lighter than a coin, the ideal solu-

tion to meet the next generation of ultramo-

bile computing.

Key Features

Standard PATA(IDE) interface

mall Form Factor: 12 x 18 x 1.8mm,

.6 gramms

Right Density: 2.16 GByte

Right Performance: 40 MB/s read,

30 MB/s write

100% Solid State: Shock Vibrationres ent

Low Power: 300 mW active, 1 mW standby

Industrial temperature (4 GB): -40+85 C

2.5 Mio/h MTBF

Active wear leveling algorithm

static and dynamic

Error Correction Code (ECC): 4 symbol

Key Applications

Mobile internet devices Digital entertainment

Embedded products

Z-P140IntelZ-P140PATA Solid State DriveAndreas Sichtig, SILICA Germany

Package Programming Taping Reeling arking

DPAP 2 Package-on-Package (PoP)

40 Pin PATA I/F40-pin PATA I/FPATA

Controller

Channel 0DATA 0 [0-7]




NANDFlash

Memory


21/68


AMPLIFIER

CLOCKS

&TIMING

ICs

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MICRO-

CONTROLLERS

&PROCESSOR

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

MANAGEMENT

ICs

SENSOR

TOOLS

&

SERVICES

ervice available or alreadyelivere T R from Manufacturer.e v r r n tu .

apes are available, but not stocked atpe re vai b , b t not stocked tvnet Log st cs due to low demand. .

Device supported by or programming equipment,D ic pp rt b or program in uipment,but the socket for this package must be provided by customer.

NAND08G

W3B2CN6E

Samples from:

7.62

NAND04G

W3B2DN6E

Samples from:

3.49

NAND01G

3B2BN6E

Samples from:

2.22

For high-density demands in wireless, em-

e e an ata storage app cat ons, oo

at Numonyx NAND flash devices. ingle-

level cell solutions reliably re-write and

retain beyond the demands of even intense

applications, like solid state drives. Our

multi-level cell solutions give you twice the

ens ty n t e same area.

Numonyx NAND Flash LC large page family

is available in densities starting from 1 Gb

and above, with supply voltage of 1.8 or 3 V.

Page size is available in 2 Kbytes

(2048 + 64 spare). One of the most important

requ rements o app cat ons stor ng an

andling large quantities of data is a very

high data throughput. Numonyx NAND Flash

memory products combine this essential

element with fast write time and low power

consumption.

ll devices are footprint-independent with

modular interface for easy density upgrade,

and are available in a wide range of pack-

ages including TSOP, VFBGA and LGA.

Key Features

116 Gb density

Copy back program mode, to optimise

management of defective blocks

Cache read mode, to improve read

throughput

Cache program mode/multiplane program

to improve program throughput Chip enable dont care, for easy code

download by MCUs

Bus Sharing capability enables code

shadowing in RAM and Boot from NAND

Security identifier and serial number

OTP area

ar ware ata protect on p n

Key Applications

Code and or data storage solutions for: Consumer electronics like GPS, DSC,

hybrid HDD, MP3/PMP player, SSD, DTV,

STB, gaming

Communications

Routers/switches

Enterprise servers

Generic FPGA and CPU

Industrial PLC

In-cab automotive

Key Design Tips

Application notes, datasheets and white

papers on existing Flash File Systems

so tware are ava a e rom

http://numonyx.com/en-US/Resource

Center/Pages/TechnicalLiterature.aspx

NANDxxGyzBNAND Flash MemoryDirk Schmitz, SILICA Germany


NAND0xGx3BxxN6 T

NAND0xGx BxxZA6 VFB A

NAND0xGx3BxxZL6E ULGA-52

WPE

W

R

I/O0-I/O7, x8

CL

AL

RB

Addressregister/counter

Command

interfacelogic

P/E/R controller,high voltage

generator

I/O buffers & latches

Y decoder

Page buffer

NAND flashmemory array

Xdecoder

Command registerCache register

MEMOR

IES


22/68





CY8C20110-LDX2I

100 units from:

0.62

CY8C20140-SX2I

100 units from:

0.54

Cypress Semiconductor introduced the

CapSense Express capacitive touch sensing

solution for button and slider replacement.

he CapSense Express solution enables de-

signers to implement up to 10 buttons and

or sliders in as little as five minutes - with no

coding. The PSoC Express visual embedded

system design tool and CapSense Express

configuration tool allow designers to monitor

an tune t e per ormance o t e uttons

and sliders in real time using a graphical

user interface. Competing solutions require

designers to program and test each adjust-

ment, adding design time and cost.

he CY8C201x0 Cap ense Express device

allows the control of 10 IOs configurable as

capacitive sensing buttons or as GPIOs for

driving LEDs or interrupt signals based on

arious button conditions. The GPIOs are

also configurable for waking up the device

rom s eep ase on an nterrupt nput. e

user has the ability to configure buttons,

outputs, and parameters, through specific

commands sent to the IC port. The IOs have

the flexibility in mapping to capacitive but-

tons and as standard GPIO functions such as

nterrupt output or nput, r ve an g-

ital mapping of input to output using simple

logical operations. This enables easy PCB

trace routing and reduces the PCB size and

stack up. CapSense Express products are

designed for easy integration into complex

app cat ons.

For battery-powered applications, the de-

vices offer low power consumption of just

1 mA active current and 2.6 A in sleep

mode. In addition, 2 Kb of Flash memory and

an IC communication interface are provided

so designers can choose whether to store

tuning values in Flash or load them over IC

at power-up.

he CapSense analog system contains the

capac t ve sensng ar ware w c supports

the CapSense Successive Approximation

(CSA) algorithm. This hardware performs

capacitive sensing and scanning without

external components. Capacitive sensing is

configurable on each pin. An internal 1.8 V

re erence prov es a sta e nterna re er-

ence so that capacitive sensing functionality

is not affected by minor VDD

changes.

Key Features

Active current: continuous sensor scan:

1.5 mA

Sleep current: no scan, continuous sleep:

2.6 A

Reduce BOM cost

nterna osc ator - no externa osc ators

or crystal

Free development tool - no external

tuning components

.4 . V

Temperature range: -40+85 8/16-pin SOIC and QFN packages

Key Applications

utton an s er rep acement

Key Design Tips

Reference designs available:

CY 218-CAPEXP1: Board with 10 buttons

CY3218-CAPEXP2: Board with a slider

CY3218-CAPEXP3: Board with 4 buttons

CY8C201xxCapacitive Touch Sensing SolutionsLionel Deflandre, SILICA France


CY8C201A0/10/40/60/80-LDX2I 16-p in Q FN

CY8C201A0/10/40/60/80-SX2I 16-pin SOIC

Y 2 142- X1I 8-pin SOIC

System Bus

CapSense Express Core

System Bus

Clock SourcesInternal Main Oscillator

Configuration andControl Engine

Sleep &Watchdog

InterruptController

512 BSRAM

External VCC2.4...3.6 V and4.75...5.25 V 10 configurable IOs

CapsenseBlock

I2CSlave

Voltage &Current

Reference

SystemResets

POR/LVD

2 KB Flash


23/68




AMPLIFIER

CLOCKS

&TIMING

ICs

DATA

CONVERTER

ICs

DIGITAL

SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

OPERATING

SYSTEMS

OPTO

ELECTRONICS

POWER

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ICs

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TOOLS

&

SERVICES

CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

PC8315E-RDB

Reference Board

360

PC8315EVRAGD

00 units from:

29.50

PPC8315EVRAFD

00 units from:

25.90

PC8315EVRADD

00 units from:

23.50

The MPC8315E is a cost-effective, low-

power, highly integrated host processor that

addresses the requirements of several stor-

age, consumer an n ustra app catons,

including main CPUs and I/O processors

in Network Attached Storage (NAS), Voice

over IP (VoIP) router/gateway, intelligent

wireless LAN (WLAN), set top boxes, indus-

trial controllers and wireless access points.The MPC8 15E extends the PowerQUICC II

Pro family, adding higher CPU performance,

additional functionality, and faster interfaces

while addressing the requirements related

to time-to-market, price, power consump-

tion and package size. This document also

supports the MPC8 14E host processors

but is written from the perspective of the

MPC8315E.

Key Features e300 (MPC603e-based) core, which

includes 16 Kbytes of L1 instruction and

data caches, a floating point unit and

erformance monitor

Dual SATA 3 Gbps controllers with

integrated PHY (not available for

MPC8314E

Dual PCI Express x1 controllers with

integrated SerDes PHY

Dual three-speed 10, 100, 1000 Mbps

Ethernet controllers (eTSEC) 32/16-bit DDR1/DDR2 memory controller

Dedicated security engine

TDM interface

32-bit PCI 2.3 controller (3.3 V-compatible)

USB 2.0 host and device controller with an

on-chip high-speed PH

ex e en ance oca us contro er

eLBC)

Intergrated programmable interrupt

controller (IPIC)

Power Management Controller (PMC)

Four-channel general purpose DMAcontroller

Serial Peripheral Interface (SPI) controller

ith master and slave support

Single I2C controller

General-purpose I/O (GPIO) port with

32 parallel I O pins muxed on various

nter aces

ystem timers including a periodic inter-

rupt timer, real-time clock, software

watchdog timer and four general-purpose

timers

Dual UART (DUART) Designed to comply with IEEE td.

1149.1, JTAG boundary scan

Key Applications

eo surve ance

Instrumentation panel

Security

Test and measurement

ensing

Printer MFP/Mono/Color Residential gateway

Network attached storage

WiFi access points

Wimax CPE

Routers

Control cards

Key Design Tips

Tools an software:

CodeWarrior 8.8

Linux v2.6 with drivers for SATA,

4-port GigE Switch (Vitesse), USB

IEEE1588, and power management

PE form factor oar

WindRiver

IXXAT

Low cost reference design available:

MPC8315E-RDB

Power management solutions available:

MC34701 34702 34712 34713 34716 34717

MPC8315E/8314EPowerQUICC II Pro Processor FamilyCostica Dima, SILICA Europe

P/N ackage rogramming aping Reeling Marking

PC8 14EVRAx 2 -PB

MPC8315EVRAxD 620-PBGA

PC8 1 E-RDB oo

Core ccelerators I/O2-lane SerDes2-lane SerDes

Coherent System Bus

SecurityAcceleration

DDR1/DDR2MemoryController

PerformanceMonitor,

DUART, I2C,Timers, GPIO,

Interrupt Control

Local Bus

PCIPCI USB2 x PCI

Express2 x GigabitEthernet

16 KBI-Cache

e300 Core

16 KBD-Cache

TDM

2SATA

2SATA

4-ch.DMA4-ch.DMA

RGMIIRTBI (R)MII SGMII


MICRO-

CONTROLLERS

&PROCESSORS


24/68





AF82US15W

10 units from:

22

AC80566UE025DW

10 units from:

60

AC80566UC005DE

0 units from:

18

he IntelAtom processor Z5xx series

delivers the benefits of Intelarchitecture

for small form factor, thermally constrained

an an ess em e e app cat ons.

mplemented in 45 nm technology, these

power-optimised processors provide robust

erformance per-watt in an ultra-small

13 x 14 mm package.

hese single-core processors are validatedt t e nte System Controller Hub (SCH

US15W, which integrates a graphics memory

controller hub, and I/O controller hub into

one small 22 x 22 mm package that

addresses key requirements of small form

factor, thermally constrained and fanless

embedded applications (SCH has a TDP -

Thermal Design Power - of 2.3 W).

t combines the IntelGraphics Media

Accelerator 500 (IntelGMA 500), memory

controller, and I/O controller in a single-chip

solution, while featuring advanced 3Dgraphics and extensive I/O capabilities

such as USB 2.0, SDIO and PCI Express.

dditionally, it supports IntelHigh Defini-

t on u o1 an ar ware v eo eco e

acceleration.

t supports a 400/533 MHz CMOS front-side

bus (FSB), dual independent display, and

1 GB max. memory down in a single channel

ith one or two ranks.

Key Features of the Intel

Atom processor Z5xx

Available in two options

nte Atom processor Z5 0 at 1.6 GHz

core speed with 533 MHz CMOS FSB,

2.2 W thermal design power (TDP) and

support for Hyper-Threading Technology

(HT Technology)2

Intel Atom processor Z510 at 1.1 GHz

core speed with 400 MHz CMO F B,

and 2.0 W TDP

Multiple micro-ops per instruction are

combined into a single micro-op and

executed in a single cycle, resulting in

mprove per ormance an power savngs

In-or er execution core consumes less

power than out-of-order execution

HT Technology (1.6 GHz SKU only) provides

high performance per-watt efficiency

in an in-order pipeline

New C6 (Deep Power Down Technology)

state removes power from processor core

and caches, resulting in less leakage than

C4 state

Split VTT rail removes power from ~90%

of the I O, reducing C6 state leakage and

ac ev ng a s gn cant y ower e power

Dynamic L2 cache sizing reduces leakage

due to transistor sleep mode

SSE3 instruction set enables software to

accelerate data processing in specific ar-

eas, such as complex arithmetic and video

eco ng

Enhanced Intel SpeedStep Technology re-

duces average system power consumption

Execute Disable Bit3 prevents certain

classes of malicious buffer overflow

attacks

m e e ecyc e support protects

system investment by enabling extended

product availability for embedded

customers

Key Features of the Intel

System Controller Hub US15W

Graphics and Display

Intel GMA 500 is a flexible, program-

mable architecture that supports

shader-based technology, 2D, D and

advanced 3D graphics, high-definition

ideo decode and image processing.

eatures include screen tiling, internal

true color processing, zero overhead

anti-aliasing, programmable shader 3D

accelerator, and 2-bit floating-point

operations.

IntelAtom Processor Z5xx (AC80566Ux)With IntelSystem Controller Hub (US15W)Silvre Mochet, SILICA France


C80 66UE02 D 441-ball FCBGA (13 x 14 mm)

AC80566UC005DE 441-ball FCBGA (13 x 14 mm)

F82US1 1249-ball FCBGA (22 x 22 mm)

IntelGraphics MediaAccelerator 500

18/24-bit LVDS

IntelHighDefinition Audio

1 IDE channel

SDVO

Required for design

400/533 MHz FSB

Hardware VideoDecode Acceleration

8 USB 2.0 ports

2 PCI Express* x1

DDR2 400/533 MHz(memory down)

EmbeddedController

IntelAtomProcessorZ530or

Z510

SMBus

GPIO

FWHSDIO/MMCports 2 x 4, 1 x 8

LPC

IntelSystem

ControllerHub US15W


25/68

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&TIMING

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CONNECTIVITY,

COMMUNICATION

&INTERFACEICs

DATA

CONVERTER

ICs

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SIGNAL

PROCESSORS

DISCRETE

FIELD

PROGRAMMABLE

GATEARRAYS

MEMOR

IES

OPERATING

SYSTEMS

OPTO

ELECTRONICS

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ICs

SENSOR

TOOLS

&

SERVICES


MICRO-

CONTROLLERS

&PROCESSORS

Dual display pipes with rotation sup-

port, along with Low-Voltage Differential

Signaling (LVDS) and serial DVO (SDVO)

sp ay ports, perm t s mu taneous

independent operation of one display or

two. SDVO adapters provide interfaces

to a variety of external display techno-

logies such as DVI, TV-out, and analog

CRT. The LVD interface allows the Intel MA

500 to communicate directly to a flat-

panel display. It supports 18-bit or 24-bit

color and EDID and EDID-less displays

with a maximum pixel clock of 112 MHz.

DVO may be used for any external

display device (HDM/DVI, analog TV, VGA/

CR and LVDS). It includes EDID and EDID-

less support and a 160 MHz pixel clock.

Video

Har ware vi eo eco e acceleration

relieves the decode burden from the

processor and reduces power con-

sumption of the system

Full hardware acceleration of H.264,

MPEG2, VC1 and WMV9 is supported,

eliminating the need for software

CODEC and offloading the processor

Audio

Intel High Definition Audio supports up

to four audio streams (up to 16 channelseach), 32-bit sample depth and sample

ates to 192 KHz

Interfaces

The Intel SCH US15W supports eight

USB 2.0 ports, and three Secure Digital

I/O 1.1 1-bit or 4-bit and Multimedia

Card Controller 4.0 (1-bit, 4-bit or 8-bit)

ports. The SMBus Host Controller is

compatible with most I2C devices, while

LPC 1.1 enables firmware hub, embed-

ed controller and other legacy devices.

A single-channel PATA interface sup-

ports two devices (master/slave), and

two x1 ports support PCI Express Base

Specification Revision 1.0a.

Advanced Configuration and Power

Interface ACPI management exposes

platform power management features

and details to the operating system,

allowing application control of system

sleep states, device power states, CPUpower states, CPU performance states,

and CPU throttling states.

Key Applications

n-ve c e n ota nment

Medical

Interactive client

(kiosks, point-of-sale terminals)

aming

Industrial control

Key Design Tips

The new two-chip Intel platform provides

more than 80% reduction in total footprint

over previous-generation three-chip Intel

platform (IntelCeleronM Processor

Ultra Low Voltage 423with Mobile Intel

945GME Express Chipset)

Along with a strong ecosystem of hard-

ware and software vendors, including

members of the IntelEmbedded and

Communications Alliance (intel.com/go/

eca), Intel helps cost-effectively meet

eve opment c a enges an spee t me-

to-market

1 Inte High Definition Audio requires a system with an appropriate Intel chipset and a motherboard with an appropriate codec and the

necessary drivers installed. ystem sound quality will vary depending on actual implementation, controller, codec, drivers and speakers.

For more information about IntelHD audio, refer to www.intel.com.2 Hyper-Threading Technology (HT Technology) requires a computer system with an Intel processor supporting HT Technology, and an HT

Technology-enabled chipset, BIOS and operating system.3 Enabling Execute Disable Bit functionality requires a platform or system with a processor with Execute Disable Bit capability and a

supporting operating system.


26/68





DSPIC30F6015-20E PT

1k units from:

6.70

DSPIC30F6015-30I PT

1k units from:

5.95

he dsPIC30F6015 controller supports a

ariety of motor control applications such as

brushless DC motors, single and 3-phase

n uct on motors, an sw tc e re uctance

motors. They are also well suited for Unin-

terrupted Power Supplies (UPS), inverters,

switched mode power supplies and power

factor correction, and also for controlling

the power management module in servers,te ecommun cat on equ pment an ot er

industrial equipment. The device is ideal

for applications that drive power FETs and

require advanced algorithmic processing.

he dsPIC30F6015 Digital Signal Controller

(DSC) offers designers a performance speed

of 30 Mips. It incorporates Microchips

enhanced Flash self-programming capability,

hich permits a remote upgrade to the

lash program memory, allowing code

revisions in end users applications. Thedevice is offered in industrial and extended

temperature range. It features an 8-channel

advanced Pulse-Width Modulation (PWM)

per p era es gne or power-convers on,

motor-control and lighting applications, an

associated 1 MSPS 10-bit A/D converter with

16 channels, 144 Kbytes of Flash program

memory an t can operate at u spee

using an internal oscillator no crystal

required). This DSC is offered in a 64-pin

TQFP package. The device supports a wide

operating voltage range: 2.55.5 V.

Key Features

144 Kbytes of Flash program memory,

which can withstand typically 100,000

erase write cycles and has 40-plus years

o ata retent on over a w e operat ng-

voltage and temperature range

DSP Engine Features:

Single cycle Multiply-Accumulate

(MAC) operation

17 x 17-bit single cycle hardwarefractional/integer multiplier

Two 40-bit wide accumulators with

optional saturation logic

40-stage barrel shifter

8 Kbytes of SRAM

4 Kbytes of high-endurance EEPROM

(1 million erase/write cycles typical)

8 output PWM, complementary or inde-

pendent modes, 4 duty-cycle generators,

programmable dead time

10-bit A/D converter with up to 16 signal

channels, 1 MSPS, 4 sample and holds for

simultaneous sampling and trigger optionrom a vance

Quadrature encoder interface

Five 16-bit timers

1 x CAN, 2 x SPI, 2 x UART

One I2C peripheral

5-Volt operation to maximize analog

no se mmun ty or to m n m ze vo tage

translation logic

Lowest power consumption in the

power-down mode of operation

Key Applications

AC Induction Motors (ACIM)

Brushed DC Motors (BDC)

Brushless DC Motors BLDC

Permanent Magnet Synchronous Motors

(PMSM)

Key Design Tips

All dsPIC30F DSCs use the same MPLAB

Integrated Development Environment (IDE)

shared by Microchips PIC microcontroller

family. Additionally, the dsPIC30F is sup-

porte y croc p s g -per ormance

development systems, including: MPLAB

C30 C Compiler, MPLAB SIM 30 Software

Simulator, MPLAB ICD 2 In-Circuit Debug-

ger, MPLAB REAL ICE In-Circuit Emulator

and MPLAB Visual Device Initializer.

dsPIC30F6015DSC for 3-Phase Motor ControlManfred Degener, SILICA Germany


DSPIC30F6015-20E/PT 64-pin TQFP

DSPIC30F6015-30I/P

Documents

Designers Choice 2 2008