Designware Non-Volatile Memory

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  • 7/25/2019 Designware Non-Volatile Memory

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    Datasheet

    DesignWare NVM IP Portfolio

    Highlights

    ` Broadest portfolio of area-optimized

    reprogrammable CMOS NVM IP` Support for 64 bit to 512 kbit

    instances

    ` Few to 1,000,000 write cycle

    endurance

    ` Standard CMOS and BCD processes

    without additional masks or

    processing steps

    ` 15+ years of data retention at 150C

    ` Extended temperature range

    including industrial and automotive

    Grade 0 temperature ranges

    ` Integrated error checking and

    correction (ECC) functionality

    ` Single core supply operation

    ` Silicon characterized and qualified

    to exceed industry standards

    Target Applications

    ` Mobile

    `Automotive

    ` Internet of Things

    Technology (optional)

    `TSMC 250CMOS/BCD,

    180CMOS/BCD, 152G, 130G,

    90LP, 65LP, 55GP, 40LP

    ` GlobalFoundries 180IC

    ` SMIC 180G, 130G

    ` IBM 9SF and 9LP, 8RF, 7HV

    `TowerJazz 180SL

    ` SilTerra 180G

    Overview

    Synopsys DesignWareNVM IP provides reprogrammable Non-Volatile Memory (NVM)

    supporting up to 512 kbits in standard CMOS and BCD process technologies with noadditional masks or processing steps. Small in area and low in power, DesignWare NVM

    IP delivers industry-leading reliability in products that support write cycle endurance

    from a few to one million.

    Validated through rigorous characterization, qualification, and reliability testing, the

    silicon-proven DesignWare NVM IP is delivered as a hard GDSII block and includes all

    the required control and support circuitry including the charge pump and high voltage

    distribution circuits. With more than 12 years of development history, the DesignWare

    NVM IP is the area, power and reliability leader in reprogrammable CMOS NVM for

    automotive, industrial and consumer products (Figure 1).

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    DesignWare NVM IP Portfolio 2

    DesignWare NVM IP Portfolio

    Synopsys offers the broadest portfolio of

    reprogrammable NVM in the world:

    ` Medium Density up to 512 kbits

    of on-chip memory with flash-like

    functionality for analog integrated

    circuits (ICs)

    `AEONMultiple-Time Programmable

    (MTP) electrically erasableprogrammable read only memory

    (EEPROM) highest endurance and

    reliability for data storage and EEPROM

    replacement

    `AEON MTP Ultra Low-Power (ULP)

    ULP MTP targeted at RFID, NFC and

    wireless applications

    `AEON Few-Time Programmable

    (FTP) Trim area-optimized NVM for

    trimming applications

    DesignWare Medium Density

    NVM IP

    Synopsys DesignWare Medium Density

    NVM IP delivers flash-like functionality

    for up to 512 kbits of on-chip memory

    in standard CMOS and BCD processes

    without the requirement of extra masks or

    processing steps. The NVM IP eliminates

    the need for external EEPROM or flash

    memory when integrating microcontrollers

    in analog IC designs such as smart

    sensors, power management and

    touchscreen controller applications. The

    NVM IP is delivered as a hard IP block

    and includes all the necessary support

    and control circuitry, including all high-

    voltage generation and distribution

    required for programming (Figure 2).

    Key Features

    ` Support for 16 kbit to 512 kbit instances

    ` 1,000 write cycle endurance

    ` 10 year data retention at 125C

    `Extended temperature range(-40C to 125C)

    ` Integrated ECC functionality

    ` More than 5X the density of lower

    bit-count NVM

    ` Less than 40 nanoseconds access time

    ` Convenient 32-bit word interface for

    both program and read

    DesignWare AEON MTP

    EEPROM NVM IP

    Synopsys DesignWare AEON MTP

    EEPROM NVM IP delivers EEPROM-level

    performance in standard CMOS

    processes. Supporting up to 8 kbits and

    optimized for high write cycle endurance,

    the EEPROM NVM IP block is available

    in a wide range of process nodes from

    250-nm to 40-nm. The IP supports up

    to 1,000,000 write cycles and has been

    qualified to automotive-level standards

    in select process nodes. Delivered as a

    hard IP block with all the necessary high

    voltage and control circuitry included, the

    AEON MTP EEPROM NVM IP is available

    in advanced, high-voltage, and analog/

    mixed signal nodes (Figure 3).

    Key Features

    ` Support for 128 bit to 8 kbit instances

    ` Up to 100,000 (advanced processes)

    and up to 1,000,000 (high voltage and

    analog/mixed signal processes) write

    cycle endurance

    ` Up to 10 year data retention

    ` Industrial and automotive Grade 0

    temperature ranges

    `Available integrated ECC functionality

    ` Optimized for high endurance and

    maximum reliability

    ` Single core supply operation

    NVM array

    Charge

    pump

    Digitalcontroller

    Sense amps

    Rowlogic

    Column logicDIN[x:0]

    ADDR[n:0]

    PROG

    READ

    DOUT[x:0]

    READY

    VDD

    VDD_HV

    ERASE

    READ_BIAS_EN

    SCAN_

    CLK

    ECC_DISABLE

    SCAN_

    EN

    SCAN_

    IN

    SCAN_

    OUT

    TMS[5:0]

    TMR

    TM[3:0]

    PTF/FA Test Mode AccessScan Test

    ECC_USED

    ECC_FAILURE

    PROG_FAILURE

    ERASE_FAILURE

    IP_EN

    TM_

    DIGIN

    TM_

    DIGOUT

    CP_EN

    SCAN_

    TESTMODE

    SCAN_

    RESET

    VSS

    DOUT[31:0]

    READY

    Chargepump

    Column logic

    Rowlogic

    Sense amps

    NVM array

    Digitalcontroller

    DIN[31:0]

    ADDR[n:0]

    PROG

    READ

    VDD (core)

    VSS

    Figure 2: DesignWare Medium Density NVM IP block diagram

    Figure 3: DesignWare AEON MTP EEPROM NVM IP block diagram

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    05/15.RP.CS5802.

    Synopsys, Inc. 690 East Middlefield Road Mountain View, CA 94043 www.synopsys.com

    2015 Synopsys, Inc. All rights reserved. Synopsys i s a trademark of Synopsys, Inc. in the United States and other countries. A list of Synopsys trademarks is

    available at http://www.synopsys.com/copyright.html . All other names mentioned herein are trademarks or registered trademarks of their respective owners.

    DesignWare AEON MTP ULP

    NVM IP

    Synopsys DesignWare AEON MTP ULP

    NVM IP is optimized for power- and area-

    sensitive wireless applications including

    RFID and NFC tags used in everything

    from logistics tracking to security

    and authentication.

    Developed in standard 180-nm/3.3Vprocess nodes, the MTP ULP NVM IP

    offers best-in-class power consumption

    and enables the MTP functionality

    required by the Gen2 EPC and ISO15693

    RFID standards. Delivered as a hard

    IP block, the IP operates from a single

    core supply and includes support and

    control circuitry, including the high voltage

    generation and distribution required for

    programming (Figure 4).

    Key Features

    ` Support for 64 bit to 1 kbit instances

    ` Up to 100,000 write cycle endurance

    ` Peak programming current