Development of DC Power Line Carrier Communication Interface for Digital Networking for Control of COIL

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INDIAN INSTITUTE OFTECHNOLOGY,K H m G P U R 721302. DECEMBER 0-22,2004 45 I

Development of DC Power Line CarrierCommunication Interface for Digital Networking forControl of COILBB Shrivastava

Abstract-Power Line Carrier Commudca~on (PLCC)integrates the transmission of voice and data through the m eelectrical line, Keeping in view the advantages of power Linecarrier communication,we have implemented it in the controlsystem for Chemical Oxygen Iodine Laser (COIL). We havedeveloped an interface card to couple PC witb the power h eusing l ow-cos t , easily avatlable semiconductor devires. In thispaper w e are presenting description of the Interfacecnrd and It soperation.

Index Terms-Control of COIL, Networking, PLCC, owerline Modem, Serial Communication. . .I. INTRODUCTION

In conventional power line carrier communication(PLCC)the voice signal is modulated on carrier frequency ' andtransmitted over power line [1]-[2]. The digital power linetechnology similarly allows f low of information through

Power Line technology provides very high data transmission,is economical because of single cording system and offersincreased ruggedness [3]. In our control system, we aresuperimposing the digital information on dc power line inserial protocol without modulating on a carrier freqiency. Insuch concept, power line is used as connecting wire of net. Itempowers various modules (nodes of the system), whichcommunicate in half duplex mode and control various sub-systems. erial is very common communication protocol (notto be confused with USB) for device communication thatcomes standard on just ab out every PC and many devices forinstrumentation [4]. Instead of using the off-the-shelfprotocols, a unique protocol has been developed for precisecontrol and fast data communication, which is running 'successfully. The serial port sends and receives bytes ofinformation at the rate of one bit at a time. Although it isslower than a parallel port, it is simpler and can be used overlonger distance (can be extended up to 1200 meters [4]).

Rg. . Prototype sscmblyofDC ower tinenrodem

same cording which supplies the electric power to the node.11 DE~CFUITONF THE CIRCUIT '

Mnuscript received August I S , 2Wand acceptedonOctober 18.2004.DB Shrivastava is w i th Chemical and Excimcr Laser Section Centre forAdvanced Technology, Dept. of Atomic Energy, Indm. 452 013 India(phone: 091-731-248-8246; fax: 091-731-248-8250; e-mail:[email protected]). . .

The circuit developed by us is depicted in fig 1. Thisdevice modulates and demodulates the serial data bysuperimposing it on power line. Waveform of levelconversion by this device is shown n fig. 3and fig. 4.Theschematic of the device is depicted in fig 2.The first stage ofthe circuit is RS (EB-232 RS-422 RS-485) o TTL level


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I .I , '452 IEEE INDIA ANNUAL CONFERENCE 2004, INDICON 2004

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Fig. 2 . Schematic circuit diagram of dc power'he interface card using RS 232 serial port. Marker A, B. C, D, E, Tx and Rx'are placed 10'.elaborate circuit by the help of waveforms

converter [5J.We have used TC232 integrated chip' that transistor 42 nd 43,This confighation is used to'drive theprovides s i p 1 conversion between RS232 o TTL 'and'vice - MOSFET which works like an on / off switch for modulationversa. One can also use SN 75176 integrated c!ip to interface of space and mark '(as depicted in fig 7). The power line isthis card wth RS-485. Serial communication provides t w o shorted when the MOSFET across it is on, in case of space.independent channels for data communications (i.e. @n&t Since it is on or a short interval it does not affect functioning(Tx) nd receive (Rx))along with some hand-shaking signal. of device connected across the power line. The resistance RS,Since this card provides channel for data flow fiom PC 6 R6 and capacitor C2 are used to bias MOSFET. pto-isolatorpower line and vice-versa,' one can ignore hand-shaking is used as a demodulator for the power line data. Th e anodesignals. Since power line communication teq uires .ody a pair I of opto,isolator is kept at constant.voltage by diode D1 andof wires, it is necessary ,to couple transmit', and receive, . 4 capacitor C1 .The cathode . is , connected to input power line.charq els together. A twisted pa ir .cable is .&d as connecting Whenever space is present on'power line opto isolator startsw i r e of the network because of its .low cost, easy installation, ' conducting. The .'resistarice R9 is used to .bias th e * opto-flexibility for moves and changes, and ability to support t he . ' coupler. This configuration is of. more. importance ,.whenfuil LAN bandwidth.' signa l is coming fiom long distance. This stage also reshapes'One important advantage of twisted-pair cable over non:' the.demodulated signal. This demodulated data (shown in fi gtwisted cable isresistance to cross talk. 8) is fed to stage-I1 where it is processed by logical gates.Th e .second stage integrates.monostable dt ivi bra to r [6] This data is sent to stage-I for appropriate level conversion,iCD4047) nd some logical gates, which is used to prevent .after whc h data is transmitted to PC.echoing of data f i l e transmission rom PC o power line. In the circuit, capacitor C1 and Schottky diode Dlform aTh b monostable multivibrator is triggered by start bit of half wave rectifier that provides power for the this modemtransmitted serial data (Tx pin of PC Serial port) and th e board by ''stealing" it from the power line during the idleoutput of monostabie dtivibrator &sables the AND gate communication periods when the bus is at logic high. This(G4) or fhdfe duration .of time (which is determined by arrangement also provides power at the presence of mark onextema1,compotmt R and C connected at pin no. 1, 2 and 3 the net during communication. Diode D1 prevents power lossof CD 4047) at tihe data f low from PC o power line (as . of modem board, at the presence of space on power line. Thisdepicted in fig 5). The AN D gate G1, G2 and G3 are is a discrete implementation o f parasite power technique usedconfgured as inverting buffer. To compensate the for such device to provide their operating power. The smallpropagation delay caused by multivibrator, fured delay has value of'resistance RI (1E) s connected to prevent largebeen introduced in data line between stage4 and stage4 current f low through diode while charging of capacitor C1using .R3 nd C10 (illustrated by fig 6). Due to this, the hence it prevents th e sudden overloading of power line. Th eechaed signal arrives at .34% the arrival of signal from resistance R10 s used to bias -led which gives the visualCD4047 nd hence it is blocked by AND gate G4. .indicationof power. 'The Transient Voltage Suppressor (TVS) onnected acrossThe third stage anodulates transmitted data on to power the MOSFET and power line is used to provide circuitline. The transistor Q 1 is driven.by nverting buffers which protection by restricting the signal excursions and surge ondrives the totem pole configuration made wth bipolar the powerline.

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INDIAN INSTITUTEOF TECHNOLOGY, KSIARAGPUR 721302, DECEMBER 20-22,2004+

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fiI. WAVEFORMSThe niceties of device are elaborated clearly by followingwaveforms. Figure 3 an d 4 show the level conversion ofRS232 to power line and vice-versa by this modem. Thewaveform at channel 2 in fig.3 represents the R5232 signal

transmitted from PC. The first wavefom in channel 1 Gustabove the channel 2 wavefor&) represents the transmitteds i p 1 over power line. The next waveform in channel 1 issame signal which is being retransmitted after a certain delayfrom another node to PC o show th e demodulation process o fth e circuit. To illustrate waveform more clearly 10101010binary data has been employed over power line.

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Fig. 3. Modulation ofRS232 ignal over power line

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Fig.4. Demodulation o f RS232 rom power line

Fig, 5 shows (channel 2 ) the output of monostablemultivibrator at marker E of schematic diagram. Logic lowdisables the AND. gate G4 fo r the duration of input signalfrom PC. Hence it prevents the echoing of transmitted signal,

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Fig.5. Generation of receive disable at transmission of dah from pcFig.6. Shows the action of low pass filter (using R3 and C10)to introduce the. delay in transmission line to compensate thepropagation delay caused by multivibrator. W ithout this delaythe echo preventer gate G4 is ineffective as echoed signal atmarker D reaches before receive disable signal at nyrker E.channel 1 represents the ou tput of TC232 at marker A in the~ ' J - R ~ - M15: 13:59

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Fig. 6.Waveform at marker A and B of schematic diagram

schematic whereas channel 2 represents the signal after delaycircuit (marker B in the schematic).Fig. 7. Shows the modulation of space and mark on powerline using MOSFET. he wavefom represented by channel 2is input to th e MOSFET (Marker C in the schematicdiagram).


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454 '! ' I IEEE INDIAANNUAL CONFERENCE 2004. MDICON 2004

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1 T U. DC 1 A t -542 y S & -1.816 k W 25 MS/S2 I U DC J - 1 oc 1 5 . 6 U D "ALFig.7 . Waveform at the input and output o f the MOSFET ..

Fig. 8 represents th e demodulated and reshaped data (atmarker D in the schematic disgram) received fiom pow er lineusing opto coupler and logic gates.

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.Fig. 8 . Demodulated data

COMMUNICATION PROTOCOLIn this scheme all the modules are connected via a powerline cable in a bus topology [7]. A unique protocol has beendeveloped* or precise control and fast data communicationamong nodes. These nodes are configured in a multiprocessorcommunication environment [S] in which each byte isconsists of 11 bits. The transmitted (Tx), r received (Rx)byte startswthspace followed by 8-bit data stream.

At the end of data stream i.e. 10' bit con tains the signature ofdata stream Mark at this position denotes that the content ofdata stream is address of specific node, At the t i me of data

flow, 10" bit contains space. Th e ll* bit is stop bit, whichcontainsmark.

/ D O X D f X D 2 X D 3 w b T O P BlTDE-1 A DDR e S SD8- DATASTARTBlT

Fig. 9. Serial transmission protocol

Central processor initiates the communication inmultiprocessor environment by transmitting the address bj.teto specific module. An nterrupt is generated in each moduleof the network. The address-matching module replies tocentral processor and enables itielf for data communication.Now all the information is transmitted as data i.e. lO* bitcontains space al l the timAt thi s time nterrupt is generatedonly on selected module however other module are doingthere specified task without being disturbed by datacommunication. At th e end of data communication centralprocess transmits EN D OF COMMUNICATION signal toparticular module to disable data communication till furtheraddressing. - .

Iv. RESULTS AN D DISCUSSIONIn first phase we could test our circuit up to 57.6 kbps datatransfer speed and we found that baud rate is not limited by I

th e connecting wire of the net i.e. the twisted pair cable. Wefound that circuit is not susceptible to noise occurred onpower line below 3V.We found that at larger number ofnodes (i.e. at higher power line current), the resistance ofcable also plays an important role in data transmission. Th emain data error during the communication was due to longdistance (in our case, 100 meters) between nodes. This washappening due to ground liAing of signals, which wastransmitted fiom node located at far away fiom centralize dcpower supply. After th e incorporation of opto-coupler andreshaping of demodulated signal, we are able to get error freesignals.

V. CONCLUSIONThis circuit enables data communication as well as powertransm$sion to various control module spread over local areanetwork of our control system on a single pair of wire. Thishelped us in implementing a very neat and easy to h d l esFtem particularly so for troublcshooting. The circuit hasworked reliably up to 57.6 Kbps data rate and is bemg testedforhigher baud rates.

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REFEREN&David H, Unlockingrhe potcntiil of power d i s t r i b d n networks",Power l ine commwrical ions, Power Economics,April 2000Hcndrik C.F. et al, "Power Line Communication:An OvcrView", Tnamuctionof the S A Institute o H e c t ~ I c dngineers,Scptrmba 1995Ascm Incorpamted. h t e p ~ / ~ . a s c o m c o m o ~ e ~ b j c c t s / t c o rd c l s h o w N o d J s i t e N o d ~ ~ 3 6 3 ~ ~ c o n t c n l l q l 7 0 5 6 4 ~ l ~ ~ 1 p g c I D JhbnlPaul H. and Winfield H, "Art of Elecrtonicr", 2"" edition ,CambridgeUniversityF'ress, 1 9 8 9 , ' ~ ~ .27

[J ] Application Note:Using the TC232, Microchip Technologhttpd/wwl.microchip.comldownloadslen/AppNotes/0034.pdfGcIosLogicDuta Book National SemiconductorCorporation,Paul J. F,"Handbook f LAN Technology", n te rkx t PublicationsMcGraw-Hill,Inc.,New York, 1989 ,pp. 159- I #Almel Mjcrucontroller Datu Book, Atmel Corporation, December

I n c O r p O ~ t o d ,[6J171[8]I997

1988, pp. 5.149 - 5.153

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Development of DC Power Line Carrier Communication Interface for Digital Networking for Control of COIL