Development Platform iW-RainboW-G24D

Arria 10 SoC/FPGA Development Kit

www.iwavesystems.com

iW-RainboW-G24D

HIGHLIGHTS

SPECIFICATIONS

iWave’s Arria 10 SoC/FPGA Development kit comprises of Arria 10 SoC/FPGA SOM and custom carrier card. The SOM is equipped with 32-bit DDR4 memory support for HPS with optional ECC and 64-bit DDR4 support for FPGA. The Arria10 development kit carrier board supports required set of features like FMC (HPC) connector & PCIex4 connectors to validate Arria 10 SoC/FPGA high speed transceivers and other On-Board connectors to validate Arria10 SoC HPS interfaces.

APPLICATIONS: Test and measurement equipment, Control and

intelligence equipment, Diagnostic medical imaging equipment, Wireless infrastructure equipment, Compute and storage equipment, Broadcast and distribution equipment.

Arria 10 SoC & FPGA device compatibility

SX270, SX320, SX480, SX570, SX660

GX270, GX320, GX480, GX570, GX660

32 - Bit DDR4 support with ECC for HPS

64 - Bit DDR4 support for FPGA

MicroSD Connector for HPS booting

FMC (HPC) Connector x 1

PCIex4 Connector x 4nos

USB3.0 Type C Connector

Gigabit Ethernet through RJ45 Magjack

USB2.0 OTG through MicroAB connector

Industrial Grade operation

Arria 10 SoC/FPGA SOM:

Arria10 SoC/FPGA

1GB DDR4 SDRAM (32bit) with ECC for HPS/FPGA (Expandable)

MicroSD Connector for HPS booting

Configuration Flash for FPGA (Optional)

DDR4 RAM (64bit) from FPGA (Optional)

Arria 10 SoC/FPGA Carrier Board:

Serial Interface Features:

Debug UART through USB MicroAB Connector (for HPS)

Communication Features:

Gigabit Ethernet through RJ45MagJack (for HPS)

USB2.0 OTG through MicroAB Connector (for HPS)

FPGA USB3.0 through USB TypeC Connector

High Speed Expansion Connectors:

FMC High Pin Count (HPC) Connector:

FPGA High Speed Transceivers x 10

Upto 43 LVDS IOs

Four General Purpose Clock Input LVDS Pair/Single Ended

Five General Purpose Clock Output LVDS Pairs/Single Ended

PCIex4 Connector x 4nos:

FPGA High Speed Transceivers x 8 (2 transceivers per connector)

Upto 60 Single Ended IOs (15 IOs per connector)

Two General Purpose Clock Input LVDS Pairs/Single Ended

Two General Purpose Clock Output LVDS Pairs/Single Ended

Additional Features:

Power ON/OFF Switch

Reset Switch

20Pin HPS IO Header

JTAG Connector (Optional)

Power Supply:

Form Factor: 180mm X 120mm

12V Power Input Jack

Note1: In Arria10 SoC/FPGA SOM, these interfaces can be supported only if Arria10 SoC family devices which supports Hard Processor System (HPS) are used.Note2: In Arria10 SoC/FPGA SOM, if Arria10 SoC family device is not used and FPGA family device is used, then also 32bit DDR4 can be supported from FPGA fabric.Note3: In Arria10 SoC/FPGA SOM, these interfaces can be supported only if Arria10 SoC family devices are used because these interfacesare supported through Dedicated I/O pins of Hard Processor System (HPS).Note4: PCIex4 connectors are only the physical connector. The pinout is not as per PCIex4 standard.Note5: FPGA design for USB3.0 is not included by default.

1,2

1,3

4

5

NAND Flash for HPS booting(Optional)1,3

OS SUPPORT

Linux 4.1.22

Arria 10 SoC FPGA Development Board - BLOCK DIAGRAM

OPTIONAL KITS/ModulesDELIVERABLES

Arria 10 SoC Development Kit Arria 10 SoC SOMBoard Support PackageUser Manual

CUSTOM DEVELOPMENT

BSP Development/OS PortingCustom SOM/Carrier Development Custom Application/GUI Development Design Review and Support

Ordering the Arria 10 Development Kit The Development Kit can be ordered online from the iWave Websitehttp://www.iwavesystems.com/webforms

iWave Systems Tech. Pvt. Ltd.,th nd7/B, 29 Main, BTM Layout 2 Stage,

Bangalore-560076, India. Ph:+91-80-26683700, 26786245Email: mktg@iwavesystems.comwww.iwavesystems.com

iWave Japan, Inc.8F-B, Kannai Sumiyoshi Building,3-29, Sumiyoshi-cho, Naka-ku, Yokohama, Kanagawa, Japan.Ph: +81-45-227-7626Email: info@iwavejapan.co.jpwww.iwavejapan.co.jp

iW-G

24D

-BR

-R1.0

Note: iWave reserves the right to change these specifications without notice as part of iWave’scontinuous effort to meet the best in breed specification. The registered trademarks are proprietaryof their respective owners.

*Optional items not included in the standard deliverables.

ple SOMs based on ARMNXP, Renesas, Qualcomm, Altera, Intel and TI Processors.

iWave System has won the confidence of its c

iWave EuropePostbus 61973130 DD VlaardingenThe NetherlandsPh: +31 10 28403383Email: info@iwavesystems.eu

UART0 Debug Port

USB1 OTG

Gigabit Ethernet (EMAC1)

Bank1F (CH0) Transceiver

Bank1C (CH0 & CH1) Transceivers

Bank1C (CH2 & CH3) Transceivers

Bank1C (CH4 & CH5) Transceivers

Bank1D (CH0 & CH1) Transceivers

Power to Peripherals

UART1, SPI, I2C & GPIOs

15 FPGA IOs & 1 CLKOUT

15 FPGA IOs & 1 CLKIN

15 FPGA IOs & 1 CLKIN

15 FPGA IOs & 1 CLKOUT

5V

Bank1E (CH0 to CH5) Transceivers

Bank1F (CH1 to CH4) Transceivers

12V

JTAG

Note: PCIex4 connectors are only the physical connector. The pinout is not as per PCIex4 standard.

4 FPGA CLKIN & 5 CLKOUT pairs

To Transceiver Banks

12V, 3.3V, 1.8V

43 FPGA LVDS IO Pairs

Arria10 SX/GX SOM

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on

en

ctor1

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SOM

Exp

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ctor2

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Reference Clock

Generator(Op�onal)

PCIex4 Connector1(JESD204B)

FMC Connector

(HPC)

PCIex4 Connector2(JESD204B)

PCIex4 Connector3

(JESD204B)

(JESD204B)

PCIex4 Connector4

UART to USB converter

Power

Regulators

Power Regulators

Power Jack

(12V)

USB MicroAB Connector

USB MicroAB Connector

RJ45 Magjack

USB TypeC Connector

HPS Header

JTAG Connector (Op�onal)