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DIGITAL 2 : EKT 221
Today’s Outline Register Transfer
Clock Gating Load Control Feedback
Register Transfer Language Type of Registers Basic Symbols Mathematical & Logical Symbols
RTL Arithmetic Operations Conditional Register Transfer
LOAD ENABLE
Transfer of new info into register is referred to as LOADING the register
PARALLEL LOADING : when all bits loaded simultaneously on clock pulse (same source).
A control signal is used to control the clock cycles.
Using this control, input clock pulses are prevented from reaching the register when its content is not to be changed.
REGISTERS
Definition : Registers consist of a set of Flip-flops (FFs), together with gates that implement their state transition
1 FFs = 1 bit Therefore, n bit register – n number of FFs Registers are useful for storing and
manipulating information.(eg: arithmetic, logical, boolean)
Example : 4 bit RegisterD
D
D
D
D0
D1
D2
D3
CLK
CLEAR
Q0
Q1
Q2
Q3
Q0
Q1
Q2
Q3
D0
D1
D2
D3
CLEAR
4 BIT REGISTER
SYMBOL
LOGIC DIAGRAM
Clear = Active LOWClear = 0 = reset register
LOAD as Control Signal
LOAD
CLK
CLK input to Flip Flop
CLK
LOAD
CLK FF
- When Load =1, CLK FF will follow the CLK (Master Clock) input.
- When CLK FF has a PGT (+ve going Transition) new data will be loaded into register
Q0
Q1
Q2
Q3
D0
D1
D2
D3
CLEAR
Data Transfer
REGISTER with Clock Gating
Load signal is used to enable the clock signal to pass through if 1 and prevent the clock signal from passing through if 0.
This is called a clock gating.What logic is needed for gating? CLK + LOADWhat is the problem?Gated Clock to FF Clock Skew of gated clocks
with respect to clock or each other* Skew = Clock Signals arrive at different FFs or REG at different times
REGISTERS with Load Controlled Feedback
A more reliable way to selectively load a register:– Run the clock continuously, and– Selectively use a load control to change the register contents.
Example: 2-bit register with Load Control:
• For Load = 0,loads register contents (hold current values)• For Load = 1,loads input values (load new values)• Hardware more complex than clock gating, but free of timing problems
LoadInput1
Input2
FeedbackInput x
Load
Register Transfer Language (RTL)
HIGH LEVEL LANGUAGEExample : C+, VB, JAVA
ASSEMBLY LANGUAGEExample : uP and uC
OPCODE
MICROCODE
Mircocode (Micro-operations):Operations executed on data stored in registers, performed in one clock cycle
Register Transfer Language (RTL):Symbolic notation used to describe micro-operations
Register Transfer Language (RTL)
RTL• Is an algebraic notation used to define machine level
operations• It is not executed by a computer• It is used to explain how the computer works.
Example:
In 68000 assembly language instruction ADD#3, D2
is define in RTL as [D2] [D2] + 3
Register Transfer Language(RTL)
Types of Registers
AR (Address Registers) DR (Data Registers) PC (Program Counters) IR (Instruction Registers) Rn (n indicates the Register number, eg R2)
Block Diagram of Registers
R
PC(H)
Register
16 bit Register
7
8 bit Register
6 5 4 3 2 1 0
Bit 7 Bit 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit 16 Bit 0
PC(L)
8 bit = 1 byte
H = High order byte L = Low order byte
PC(H) = PC(15:8)
PC(L) = PC(7:0)
BASIC SYMBOLS
R followed by a number is referring to a register:
R2 = second register/register no 2
R2
BASIC SYMBOLS
M refers to Memory with addresses in square braces:
Direct Addressing :
M[10] = contents of memory address 10
In this example, M[10] refers to 10111011
100000001011101111111111
91011
Address Content
MEMORY
BASIC SYMBOLS
M refers to Memory with addresses in square braces
In-direct Addressing :
M[R3] = content of the memory address in R3
100000001011101111111111
151617
Address Content
MEMORY
100000000000011000001111
123
Address Content
REGISTER
00001111= 15
Ans : M[R3] refers to 10000000
BASIC SYMBOLS
Arrow pointing to the right shows transfer of data :
R4 R3 = Stores the value of R3 to R4
* The word transfer is misleading, since it implies that data is moved from one location to another. In fact, the data is copied from one location to another since it also still resides in register R3
BASIC SYMBOLS
A comma represents simultaneous transfer:
R1 R2, R6 R7 = Stores R2 into R1 and at the same time stores R7 into R6.
BASIC SYMBOLS
Parenthesis indicates part of the register.
R8(1) = bit 1of R8
R8
7 6 5 34 2 1 0
1 0 1 11 0 0 0
Bit Position
Content
MSB LSB
LSB : Least Significant BitMSB : Most Significant Bit
BASIC SYMBOLS
Parenthesis indicates part of the register.
R3(7:0) = the least significant byte of R3
Note : 1 byte = 8 bit
R3
7 6 5 34 2 1 0
1 0 1 11 0 0 0
14..915 8
10..1
MATHEMATICAL AND LOGICAL SYMBOLS
Addition is indicated by the + sign:
R1 R2+R3
Add R2 and R3, stores in R1
R2 R4+R1
Add R4 and R1, stores in R2
Example 1 :
Example 2 :
MATHEMATICAL AND LOGICAL SYMBOLS
Subtraction is handled not with the minus sign but with complementing.
1’s complement :
2’s complement :
R5 R3+R4
R5 R3+R4+1
R3 minus R4 in 1’s complement
R3 minus R4 in 2’s complement
MATHEMATICAL AND LOGICAL SYMBOLS
QUIZ : Minus R2 from R1 and stores the answer in R8 (use 2’s comp method)
RTL : R8 R1+R2+1
What is the value of R8 if R1 = 01000100
and R2 = 00100011.
Summary
Symbol Description Example
Square brackets Specifies an address for memory
M[R2]
Letters Denotes a register AR, IR, PC, R2
Parentheses Denotes part of a register
R2(1), R2(7:0), PC(L)
Arrow Denotes Transfer of data R1 R2
Comma Separates simultaneous transfers
R1 R2, R3 R2
Arithmetic Operations
+ Addition
- Subtraction
* Multiplication
/ Division
Example: R2 R1+R2
Example: R2 R1+R2+1
Example: R2 R1*R2
Example: R2 R1/R2
Conditional Register Transfer
Conditional Statement Using control signal to control the transfer Can be symbolised by if-then statement
If (K1 = 1) then (R2 R1)
In RTL we can write it as:
K1 : R2 R1
A subscripted letter followed by a colon is a conditional
Conditional Register Transfer
R2R1
K1
CLK
n
K1
CLK
Transfer occurs here
n = no of lines = no of bits
Transfer occurs in parallel
K1 : R2 R1
Conditional Register Transfer
Content of R2 will be stored in R5 when condition K1 occurs:
R5
R2
K
K1 :R5 R2Example:
Summary
Note : Any register may be specified for source 1, source 2, or destination.
Thank You