Digital Signal Processing and Generation for a DC Current

Transformer for Particle Accelerators

Silvia Zorzetti

Contents Introduction

Fermilab Direct-current current transformer principles

Direct Current Current Transformer (DCCT) Simulink Model Specifications and Parameters Hardware Digital implementation Open loop test Closed loop test

Introduction This activity was supported and

accomplished at Fermilab, in the Instrumentation Department of the Accelerator Division

• Main Injector (MI)

• Rapid cycling synchrotron

• 150 GeV as Injector for the Tevatron

• High intensity protons for fixed target and neutrino physics

• Recycler

• Permanent Magnetics

• 8 GeV

• Antiproton cooling before the injection into the Tevatron

• Proton storage

• Tevatron

• Superconducting synchrotron

• 980 GeV

Circular Accelerators at Fermilab

Different types of DCCTs at FNAL An analog, homebrew version was developed

at FNAL in the 80’s. Installed in all the machines, except for the Recycler Bandwidth: 2 MHz

A commercial DCCT, designed by K. Unser (Bergoz) Entire system, i.e. pickup, electronics, cables, etc. Only DC signal detection (narrow band). In 2004 the system failed due to an asymmetry of

permeability between the toroids. Temporary replaced with another commercial DCCT

from Bergoz, will finally be replaced by the “digital” DCCT that is now under development.

DCCT Introduction The DCCT is a diagnostics instrument, used to

observe the beam current. Detection of DC and low frequency components of

the beam current Non-Distructive instrument For the detection of high frequency components

the classical AC transformer is used.

Principle of Operation - AC Transformer The classical AC transformer can be used to

identify the high frequency components of the beam current

Principle of Operation of the DCCT – Single Toroid The modulator winding drives the toroid into

saturation. The total magnetic flux is shifted

proportionally to the DC current The measured DC current is proportional to

the amplitude of the 2nd harmonic detected by the detector winding

Principle of Operation of the DCCT – Double Toroids

Principle of Operation of the DCCT – Double Toroids

Complete System

Beam DCCT

Modulator 400Hz

digitally supplied

Second Harmonic detector AM

demodulator on FPGA

AC Transformer Sum and

Feedback Output

Second Harmonic Detector

Input: The input signal can be viewed as a low frequency signal modulated (in amplitude) with 800Hz

Second Harmonic Detector

CIC1: Perform the first decimation of the signal sampling frequency From 62.5MHz to 500kHz

Second Harmonic Detector

NCO: Supplies in-phase and quadrature-phase signals of same

amplitude and frequency (800Hz), for downconversion to baseband

Second Harmonic Detector

CIC2: Performs a second decimation of the sampling frequency, allows a more efficient FIR filter From 500kHz to 2kHz

Second Harmonic Detector

FIR: Defines the overall system bandwidth at baseband DC to 100Hz

Second Harmonic Detector

Some mathematics to format the signal, and adjust gain and phase There is no phase detector required, because the signal is

sufficiently slow, thus a signum detector is implemented.

DCCT Model Analytic study of the DCCT functionality Simulink Model of the complete system

(AC+DC) Toroids behaviour simulation Filter Design Feedback

Simulink Model

Simulink Model – Flux at Ib=0 (a.u.)

Simulink Model – Output Voltage at Ib=0

Simulink Model – Flux at Ib=1 (a.u.)

Simulink Model – Voltage Output at Ib=1

Simulink Model – AC + DC Closed Loop

Required Specifications and Parameters Number of turns per winding Current and Voltage to saturate the toroids DCCT Bandwidth AC Bandwidth

Parameter Space Toroids Saturation

Isat<3A , Vsat=36V, Nm=22

AC and DC Sensor windings BDC=100Hz BAC=1MHz Ns_DC=100 Ns_AC=200

Test Setup for Toroid Measurements

Output Voltage from the pick-up windings of the toroids

There is a mismatch between the voltage outputs from the two toroids. Poor matching of the core material

Complete System

VHDL Implementation – CIC

0 kM

fkf s

k

M: Differential Delay ρ: Decimation factor N: Filter Order A: Gain Notch at:

NMA )(

CIC Filter – VHDL Model

The firmware is synchronized with a single clock Integration Section Comb Section Gain Number of bits: )(log)(log 22 MNBB inout

Filters – Test Setup

VHDL Implementation and Test– CIC1

fs=62.5MHz,

fd=500kHz,

M=1 ρ=125 N=2

f1=500kHz A= 15625

VHDL Implementation and Test– CIC2

fs=500kHz,

fd=2kHz,

M=2 ρ=250 N=2

f1=1kHz A= 250000

VHDL Implementation and Test– FIR

bi: filter coefficients N: filter order (127)

FIR Filter- VHDL Model

The firmware is synchronized with a single clock Counter ROM Serial Function Number of bits

VHDL Implementation and Test- FIR

fs=2kHz,

fc=100Hz,

N=127

VHDL Impelementation and Test – AM Demodulator

With a waveform generator a low frequency signal, modulated at 800Hz is generated and digitized by the ADC

The resulting output signal is observed on an oscilloscope, connected to the DAC.

VHDL Implementation and Test- Demodulator

Input: Output:

t)fm(t)cos(2 0

)m(t

Open Loop Test Measurement Setup

DC Dectector - Output signalBefore the Transition Board - Ib=0.4A

The signal is supplied by the DCCT DC Sense

Before the transition board

There are both odd and even harmonics

DC Detector - Output Signal After the Transition Board - Ib=0.4A

The signal is supplied by the DCCT DC Sense

Passed by the Transition Board

Has only the 2nd harmonic (800 Hz), the 1st harmonic is suppressed.

Open Loop Result

Closed Loop Test Measurement Setup

Closed Loop Results

Conclusions At this stage a preliminary implementation

and test of the DCCT has been successfully realized. P control τ=0.05s Resolution 0.01A

Next steps Implementation of the AC section Faster loop control

Thank you for your attention

Silvia Zorzetti

Backup Slides

Silvia Zorzetti