21/01/2008P.Medina/P.J Coleman-Smith AGATA November 2007 1

DIGITISERPatrice MEDINA

For The Digitiser Technical Group

_ J.Thornill Liverpool_ D.Wells Liverpool_ D.Seddon Liverpool_ P.Coleman_Smith Daresbury_ I.Lazarus Daresbury_ R.Baumann IPHC_ L.Charles IPHC_ M.Chambit IPHC_ C.Parisel IPHC_ M.Richer IPHC_ L. Arnold IPHC

21/01/2008P.Medina/P.J Coleman-Smith AGATA November 2007 2

Block Diagram

• 44 Channels 100 MHz/14 bits.

• 38 Optical lines 2Gbits/s.

• 400 W Power.

• Cooling by water.

• Specific Mechanical Housing.

• Ethernet for Slow Control.

2 channels new preamp Setup in non volatile memory

New

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StatusStatus• Prototype tests in some place : Cologne / Liverpool / Padova

Liverpool/IPHC

• SNR average value 75.45 dB. (74.56<SNR<76.17)

• ENOB average value 12.24 bits. (12.09<ENOB<12.36)

• Static Power consumption : Stand alone 240 W

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Status• Productions :

– All PCB populated.

– One digitiser received at IPHC (Week 45).

– Others digitisers delivery week 47.

– 18 digitisers have been ordered.

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Mechanical PCB assembly

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Mechanical PCB assembly

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TOOLS

Trial Laser BoardClock Distribution TNT2 FADC

Slow Control Communication Tests Board

In TESTS

Waveform Generator6x16 bits 400MHz :- 6 channels with 5 ms of memory.- Can produce signals from scanning or simulation

Waveform Generator6x16 bits 400MHz (2006)

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Waveform Generator ( PSG) Waveform Generator (Pulse Signal Generator )6x16 bits 400MHz :- 6 channels with 5 ms of memory.- Can produce signals from scanning or simulation.- MDR26 output compatible with AGATA.-Could be use to simulated one Crystal

PSG

AgataDigitiser

MDR26

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Working mode• Experiment setup ( Xport interface) :

• Range, Spare Channel, Inspections etc (Offset)• Preamp. Controls • Temperature, monitoring DC supply etc• FPGA Setup

• Stand alone ( Xport interface)• Detector laboratory• Maintenance / Development mode :

• Histogram (FADC Number, Energy, ENOB,… )• FPGA Setup• Tests • In progress: <Memory setup / Automatic SNR Tests / Stability tests>

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Stand Alone GUI : SamWise

Stand alone GUI interface

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VHDL “Stand alone”• Tests to be done for :

– Pulser control.

– TOT Implementation in digitiser. ( Padova / Milan / IPHC)

The tests will be done with a “Core box” from Cologne (Dr Pascovicci)

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Conclusions

• Waiting for the production tests.

• Use for testing improvement of the Energy Calculation.

• Begin to think for the future digitiser…

• Beginning of the effective work 06/2004

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Digitiser Production

• All the electronics are manufactured.

• 7 sets of Digitiser modules assembled

• 1 Digitiser delivered to Strasbourg.

• 4 Digitisers will be delivered by end November.

• Mechanical manufacturing problem– Cooling plates not flat enough. Replacements will be

issued.

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Mechanical problem• The three cooling plates are not flat.

• Not enough contact with the modules.

• Manufacturer will fix the problem.