doc.: IEEE 802.11-00/xxx€¦ · Web viewIrregular structured LDPC codes with rate compatibility for TGn. Date: August 13, 2004. Author: Victor Stolpman, Nico van Waes, Tejas Bhatt,

January 2000 doc.: IEEE 802.11-00/xxx

IEEE P802.11Wireless LANs

Irregular structured LDPC codes with rate compatibility for TGn

Date: August 13, 2004

Author: Victor Stolpman, Nico van Waes, Tejas Bhatt, Jianzhong Zhang, Amitabh DixitNokia

6000 Connection Dr, Irving TXPhone: 972 374 0958

e-Mail: {Victor.Stolpman, Nico.vanWaes, Tejas.Bhatt, Charlie.Zhang}@Nokia.com

In this partial PHY proposal for TGn, we describe a structured approach to irregular LDPC code construction based on “seed” matrices that are

expanded using permutation matrices for purposes of error correction control. These codes have small storage requirements with good block error

rate performances over a wide range block sizes. Also described in this document is a structured approach to puncturing irregular LDPC codes

facilitating rate-compatibility without having to modify the connective net in the encoder or decoder while still offering a wide range of code rates for link optimization. This flexibility allows for re-use of the same hardware across a

wide variety of air-interfaces.

Submission page 1 V. Stolpman et al, Nokia


Introduction:Modern communication systems use Forward Error Correction (FEC) codes in an attempt to convey information more reliably through channels with random events. One such FEC error control system use Low-Density Parity-Check (LDPC) codes because of error correcting capabilities that rival the performance of the so-called Turbo-Codes and for their applicability over a wide range of statistical channels [1,2,3]. In fact, some random irregular LDPC constructions based on edge ensemble designs have error correcting capabilities measured in Bit Error Rate (BER) that are within 0.05dB of the rate distorted Shannon limit for the AWGN channel [3].

Unfortunately, these random LPDC code constructions require long codeword constructions (on the order of 106 to 107 bits) in order to achieve these error rates, and despite good BER performance, these random code constructions often have poor Block Error Rate (BLER) performances. Hence, these random constructions do not lend themselves well to packet-based communication systems. Yet another disadvantage of random constructions based on edge distribution ensembles is for each codeword length another random construction is needed. Thus, communication systems employing variable block sizes (e.g. TCP/IP) would require multiple code definitions that could consume a significant about of non-volatile memory storage for a large combination of codeword lengths and code rates.

An alternative to random LDPC construction is structured LDPC constructions that rely on a general algorithmic approach to constructing LDPC matrices and require much less non-volatile memory than random constructions. Thus, the problem is to design irregular structured LDPC codes that have good overall error performance (both BER and BLER) for a wide range of code rates and block sizes with attractive storage requirements. The result of such LDPC codes is a better performing communication system with lower cost terminals. These factors make such a FEC attractive for application over a wide range of products including but not limited to IEEE802.16 and IEEE802.11n compliant products.

Thus, this exact description below for LDPC code construction succeeds at solving the above said problem while out performing competing solutions [4] in overall error performance for similar block sizes and iterations without the non-volatile memory requirements of randomly constructed codes.

Seed Matrix, Spreading Matrices and the Expanded LDPC Matrix:In this section, we describe and define the binary “seed” parity-check matrix of dimension

with the code rate defined as . Simply, the seed matrix is a starting matrix used to generate expanded LDPC parity-check matrices through a

spreading process. In the “Simulation Results” section, we specifically define seed matrices for code rates 1/2, 2/3, and 3/4 of dimensions , , and respectively that solves the earlier stated problem definition. Also it is important to note that these given seed matrices are nearly upper triangular, and as a result all expanded LDPC matrices using these seeds in the following described approach will also have a nearly upper triangular construction that lend themselves well for encoding purposes (i.e. near linear encoding complexity with respect to codeword length) [5].

The purpose of these seed matrices is to identify the location and type of sub-matrices in the expanded LDPC parity-check matrix constructed from expanding with a given set of



spreading matrices where all elements of the set are of dimension . The ones in determine the location of sub-matrices in the expanded matrix that contain a spreading matrix from the following set of matrices

where is a positive prime integer (to be define specifically later), denotes the all zeros matrix (i.e. where every matrix element is a zero), is the identity matrix, is a full-rank permutation matrix, , and so on in like fashion up to . Specifically, we define here as the single circular-shift permutation matrix, e.g. for

.

The zeros in indicate the location of the sub-matrix in the expanded matrix . Thus, the expanded LDPC matrix is of dimension where and with sub-matrices consisting of permutation matrices of dimension

raised to an exponential power from the set of , or simply in matrix form

where for and . In matrix form, the final exponential matrix is

and is of same dimension as the , . The selection of the matrix elements of the set uses and is described further in the following section.

Exponent Matrix Construction:Specifically, let be defined as the smallest prime integer that satisfies both and

. We then define an interim exponent array matrix as



where .

Finally, we construct the exponential matrix used in the expanded LDPC matrix by replacing each one in with the corresponding matrix element (i.e. same row and column) in the interim exponent matrix , and we replace each zero in with . Thus, the elements of belong to the set when using modulo- arithmetic in the construction of .

A Small Construction Example:For example purposes only, let

thus ,

and let

thus ,

so is the smallest prime number that satisfies the specified conditions and . Then, the interim and final exponent matrices as defined above are

and ,

and the expanded LDPC matrix is



.

Rate 1/2 Irregular Seed Parity-Check Matrices: for

1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 0 11 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 0 0 10 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 1 1 0 00 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 00 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 1 00 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 00 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 1 0 1 1 0 00 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 00 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 0 00 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 00 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 1 0 00 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 1 0 0 00 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 10 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 0 0 0 1 0 1 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 0 0 0 1 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 0 0 1 0 1 1 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 0 0|------------------- Parity Bits--------------------|--------------- Systematic Bits ------------------|



for


for





1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 1 1 0 1 0 0 0 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 1 0 0 0 1 0 1 0 1 1 1 0 0 0 1 0 0 0 0 0 1 0 0 0 00 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 0 0 0 0 1 0 1 0 0 0 1 0 0 1 0 0 0 0 0 1 1 1 0 0 00 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1 0 1 0 0 0 1 1 0 0 1 0 0 0 0 0 1 1 0 0 10 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 1 0 1 0 1 0 0 0 1 1 0 0 0 0 1 0 0 0 0 0 0 0 00 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 0 1 0 0 0 10 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 1 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 0 1 00 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 1 0 0 1 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 00 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 0 1 0 1 0 0 1 1 0 0 0 0 0 0 1 0 0 1 0 0 0 00 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 0 0 0 0 1 0 1 0 0 0 0 00 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 0 1 0 1 0 0 0 0 0 0 0 0 1 1 1 0 0 1 0 0 0 00 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 00 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0 0 1 00 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 1 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 1 1 0 10 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 0 1 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 1 1 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 0 1 0 1 0 0 1 1 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0|----------- Parity Bits----------|------------------------- SystematicBits---------------------------|

for




for


for





1 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 1 1 1 0 1 1 1 11 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 0 0 0 0 0 0 1 0 1 0 0 1 0 00 1 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 1 1 0 1 0 1 1 0 0 1 0 0 0 0 0 1 0 1 1 0 1 0 0 00 0 1 1 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 00 0 0 1 1 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 0 1 0 0 0 0 0 0 1 0 1 0 0 00 0 0 0 1 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 0 1 0 0 0 0 1 1 0 1 1 0 1 0 0 1 0 0 0 1 0 1 1 0 0 0 00 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 1 1 1 0 1 0 0 1 0 1 1 0 1 0 0 1 1 0 0 0 1 0 0 0 00 0 0 0 0 0 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 1 0 1 1 1 1 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 00 0 0 0 0 0 0 1 1 0 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 0 1 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 0 1 00 0 0 0 0 0 0 0 1 1 0 0 0 1 1 1 1 0 0 1 0 0 1 0 1 1 0 0 1 0 0 0 0 0 1 0 0 1 0 1 0 0 0 0 0 0 1 00 0 0 0 0 0 0 0 0 1 1 0 0 0 1 1 0 0 0 0 0 1 1 0 1 1 0 1 0 1 0 0 0 0 0 0 1 0 1 0 0 0 1 0 0 1 0 10 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 0 0 0 1 0 1 1 0 1 0 0 0 0 0 1 1 0 0 0 1 0 0 1 1 1 0 0 0 1|------ Parity Bits------|----------------------------- SystematicBits--------------------------------|

for


for




for


Additional Block Sizes, Code Rates and Seed Matrices:As for additional block sizes (forward-compatibility), the above seed matrices already support codeword sizes larger than 2304. Also addressing forward-compatability and hardware reuse, this proposed approach easily accommodates additional seed matrices and offers flexibility to design codes for different channels and applications as the standard evolves.

Also, this general approach to irregular structured LDPC code construction can be easily applied to support additional code rates (e.g. 7/8) and seed matrices that allow for different architectures that trade off area, latency and decoding throughput. By specifying different seed matrices, this approach can accommodate different class devices that have different system requirements (e.g. data rates, latency, performance, channel-bonding, block sizes, etc.) and silicon requirements at the receiver (e.g. silicon area, clock frequency, memory, iterations, etc.).

Thus, additional seed matrices and code rates will be added as IEEE802.11n takes shape.



Simulation Results:In these simulation results, we demonstrate BLER and PER performances of these irregular structured LDPC codes using various codeword lengths, channel models, decoding approaches, and number of decoing iterations. First, we demonstrate code performances in AWGN channels using convention-Belief Propagation (BP) (i.e. Sum-Product-Algorithm (SPA)) and various approaches to layered-BP that allows for fast convergence. Then, we show results for the IEEE802.11n channel models B, D, and E using different antenna configurations (1x1 and 2x2) of various packet lengths with gray-mapped QAM modulation. In order to fairly evalate the performance of these codes (i.e. without impairments due to sub-optimal detection), the receiver used Log-Likelihood-Ratios (LLR) with perfect channel state information. In the IEEE802.11n channel models, we show significant performance gains of these proposed irregular structured LDPC codes (without the use of an interleaver) with respect to the IEEE802.11a covolutional code using its corresponding interleaver.

Figure 1: Rate 1/2 BPSK results in AWGN using 50 iterations of conventional BP (SPA)


0 0.5 1 1.5 2 2.5 3 3.5 4

10-4

10-3

10-2

10-1

100

BLER R1/2

Eb/No [dB]

BLE

R

N= 576, K= 288,( 36 bytes,Ns=12)N= 720, K= 360,( 45 bytes,Ns=15)N= 768, K= 384,( 48 bytes,Ns=16)N= 864, K= 432,( 54 bytes,Ns=18)N= 960, K= 480,( 60 bytes,Ns=20)N=1008, K= 504,( 63 bytes,Ns=21)N=1152, K= 576,( 72 bytes,Ns=24)N=1296, K= 648,( 81 bytes,Ns=27)N=1344, K= 672,( 84 bytes,Ns=28)N=1440, K= 720,( 90 bytes,Ns=30)N=1536, K= 768,( 96 bytes,Ns=32)N=1584, K= 792,( 99 bytes,Ns=33)N=1728, K= 864,( 108 bytes,Ns=36)N=1872, K= 936,( 117 bytes,Ns=39)N=1920, K= 960,( 120 bytes,Ns=40)N=2016, K=1008,( 126 bytes,Ns=42)N=2112, K=1056,( 132 bytes,Ns=44)N=2160, K=1080,( 135 bytes,Ns=45)N=2304, K=1152,( 144 bytes,Ns=48)





1 1.5 2 2.5 3 3.5 4

10-4

10-3

10-2

10-1

100

BLER R2/3

Eb/No [dB]

BLE

RN= 576, K= 384,( 48 bytes,Ns=12)N= 720, K= 480,( 60 bytes,Ns=15)N= 768, K= 512,( 64 bytes,Ns=16)N= 864, K= 576,( 72 bytes,Ns=18)N= 960, K= 640,( 80 bytes,Ns=20)N=1008, K= 672,( 84 bytes,Ns=21)N=1152, K= 768,( 96 bytes,Ns=24)N=1296, K= 864,( 108 bytes,Ns=27)N=1344, K= 896,( 112 bytes,Ns=28)N=1440, K= 960,( 120 bytes,Ns=30)N=1536, K=1024,( 128 bytes,Ns=32)N=1584, K=1056,( 132 bytes,Ns=33)N=1728, K=1152,( 144 bytes,Ns=36)N=1872, K=1248,( 156 bytes,Ns=39)N=1920, K=1280,( 160 bytes,Ns=40)N=2016, K=1344,( 168 bytes,Ns=42)N=2112, K=1408,( 176 bytes,Ns=44)N=2160, K=1440,( 180 bytes,Ns=45)N=2304, K=1536,( 192 bytes,Ns=48)

1.5 2 2.5 3 3.5 4 4.5 5

10-4

10-3

10-2

10-1

100

BLER R3/4

Eb/No [dB]

BLE

R

N= 576, K= 432,( 54 bytes,Ns=12)N= 720, K= 540,( 67.5 bytes,Ns=15)N= 768, K= 576,( 72 bytes,Ns=16)N= 864, K= 648,( 81 bytes,Ns=18)N= 960, K= 720,( 90 bytes,Ns=20)N=1008, K= 756,( 94.5 bytes,Ns=21)N=1152, K= 864,( 108 bytes,Ns=24)N=1296, K= 972,(121.5 bytes,Ns=27)N=1344, K=1008,( 126 bytes,Ns=28)N=1440, K=1080,( 135 bytes,Ns=30)N=1536, K=1152,( 144 bytes,Ns=32)N=1584, K=1188,(148.5 bytes,Ns=33)N=1728, K=1296,( 162 bytes,Ns=36)N=1872, K=1404,(175.5 bytes,Ns=39)N=1920, K=1440,( 180 bytes,Ns=40)N=2016, K=1512,( 189 bytes,Ns=42)N=2112, K=1584,( 198 bytes,Ns=44)N=2160, K=1620,(202.5 bytes,Ns=45)N=2304, K=1728,( 216 bytes,Ns=48)


Figure 4: BLER comparision of 50 conventional BP (SPA) iterations and 15 layered BP for Rate 1/2 BPSK in AWGN of codeword length of N=1152.

Figure 5: BPSK-AWGN results of 12 iterations of layered BP for coderates 1/2, 2/3 and 3/4 of codeword lengths N=1920.


1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.810

-4

10-3

10-2

10-1

100

Eb/N0 (dB)

BLE

R

Comparing Conventional and Layered Belief Propagation, AWGN, BPSK, N=1152

Nokia, Conventional BPNokia, Layered BPTI, Conventional BPTI, Layered BP

Conventional BP : 50 IterationsLayered BP : 15 Iterations

1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.210

-3

10-2

10-1

100

Eb/N0 (dB)

BLE

R

Layered Belief Propagation, 12-iterations, AWGN, BPSK, N=1920

R-1/2R-2/3R-3/4


Figure 6: BPSK AWGN comparisions of various BP decoding approaches.

2 4 6 8 10 12 14 16 18 20 22

10-2

10-1

100

SNR [dB]

PE

R

Packet Error Rate for LDPC Codes in ChB 2x2 using N=2304

CC .11a ChB R1/2 2x2 4-QAM 24Mbps (1008 bytes)LDPC(30-SPA) ChB R1/2 2x2 4-QAM 24Mbps (1008 bytes)CC .11a ChB R3/4 2x2 16-QAM 72Mbps (1080 bytes)LDPC(30-SPA) ChB R3/4 2x2 16-QAM 72Mbps (1080 bytes)CC .11a ChB R2/3 2x2 64-QAM 96Mbps (960 bytes)LDPC(30-SPA) ChB R2/3 2x2 64-QAM 96Mbps (960 bytes)

Figure 7: Channel B 2x2 Packet Error Rate (PER) results using conventional BP (SPA) and codeword length N=2304


1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.810

-4

10-3

10-2

10-1

100

Eb/N0 (dB)

BLE

R

Comparing Conventional and Layered Belief Propagation, AWGN, BPSK, N=1920, R-1/2

Conventional BP, 12-iterLayered BP, 12-iterLayered BP, 8-iterParallel Layered BP, 12-iter


5 10 15 20 25

10-3

10-2

10-1

100

SNR [dB]

PE

R

Packet Error Rate for LDPC Codes in ChD 1x1 using N=2304

CC .11a ChD R1/2 1x1 4-QAM 12Mbps (144 bytes)LDPC(20-SPA) ChD R1/2 1x1 4-QAM 12Mbps (144 bytes)CC .11a ChD R3/4 1x1 16-QAM 36Mbps (216 bytes)LDPC(20-SPA) ChD R3/4 1x1 16-QAM 36Mbps (216 bytes)CC .11a ChD R2/3 1x1 64-QAM 48Mbps (192 bytes)LDPC(20-SPA) ChD R2/3 1x1 64-QAM 48Mbps (192 bytes)

Figure 8: Channel D 1x1 Packet Error Rate (PER) results using conventional BP (SPA) and codeword length N=2304

3 4 5 6 7 8 9 10

10-2

10-1

100

SNR [dB]

PE

R

Packet Error Rate for LDPC Codes in ChE 2x2 using N=2304

CC .11a ChE R1/2 2x2 4-QAM 24Mbps (1008 bytes)LDPC(30-SPA) ChE R1/2 2x2 4-QAM 24Mbps (1008 bytes)

Figure 9: Channel E 2x2 Packet Error Rate (PER) results using conventional BP (SPA) and codeword length N=2304 (more simulation results will be added)



Structured Puncturing:In this section, we introduce a “seed” puncture-degree sequence of dimension

where each element indicates the degree of a variable node corresponding to a codeword element to be punctured in the code defined by . We expand this seed puncture sequence to create an expanded puncture-degree sequence of dimension that contain the variable-degrees corresponding to the columns of the expanded parity-check matrix

of dimension

where each element indicates the degree of a variable node corresponding to a codeword element to be punctured in the expanded code defined by and represents the Kronecker product. To offer more flexibility in degree selection, multiple seed sets can be used of possible different dimensions for

for

corresponding to the degrees to puncture in an intermediate expanded parity-check matrix of dimension where . Although there is no limit on the maximum value of , it is desirable to keep storage costs low and hence keep as a small number (in this report we have used ).

Then, the expanded puncture-degree sequence of dimension can be constructed in a similar fashion as above that contains the variable-degrees corresponding to the columns of the expanded parity-check matrix of dimension where is a positive integer.



where each element indicates the degree of a variable node corresponding to a codeword element to be punctured in the expanded code defined by .

The degree-puncture sequence is then mapped to variable node-puncture nodes where each element has the degree for ,

where for and elements from the set occur at

most once with in the variable node puncture sequence (i.e. cannot puncture the same codeword element twice). Although further optimization can be done in the future, for this document the mapping approach used the very first variable-nodes (starting in the left most column of and moving right) that have degrees corresponding to order of degree elements in

.

In order to achieve a particular effective code rate from a mother code of dimension , say

where for ,

we use the very first elements of (i.e. ) to puncture code word elements. This nested structure to puncturing, reduces storage complexity and can achieve all the possible code rates, i.e.

provided is long enough. By puncturing codeword elements, there is no need to change the connective net for multiple code rates given that the effective code rate is within the mother codes capability (i.e. implementation friendly). Of course, there is a useful range of code rates of which outside performance will suffer as with most punctured error correction codes.

Application of Structured Puncturing:Primarily, puncturing is used for code rate adaptation in applications that use multiple code rates and a single decoder. For example, in MIMO applications using SVD-beamforming (or variant of) the use of puncturing can allow for adaptation of different spatial streams to have different code rates without having to use multiple decoders or the changing of the connective net of a single decoder in the middle of reception. From earlier matrix constructions, we have seen acceptable performance for a reasonable range of effective coderates puncturing different mothercodes that would facilitate such a link adaptation scheme. Going forward, we would like to add seed pucture sequences to the above set of codes and any additional seed-matrices for means of code rate adaptation as IEEE802.11n takes shape.



References:

[1] R. G. Gallager, “Low-density parity-check codes,” IRE Trans. Inform. Theory, vol. IT-8, pp.21-28, Jan. 1962.

[2] T. J. Richardson, M. A. Shokrollahi, and R. L. Urbanke, “Design of Capacity Approaching Irregular Low-Density Parity-Check Codes,” IEEE Transactions on Information Theory, vol. 47, pp. 619-637, Feb. 2001.

[3] Sae-Young Chung, On the Construction of Some Capacity-Approaching Coding Schemes, PhD Dissertation, MIT, 2000.

[4] P. Joo, et al., “LDPC coding for OFDMA PHY,” IEEE C802.16d-04/86r1, http://ieee802.org/16, May 2004.

[5] T. J. Richardson and R. L. Urbanke, “Efficient Encoding of Low-Density Parity-Check Codes,” IEEE Transactions on Information Theory, vol. 47, pp. 638-656, Feb. 2001.

[6] M. M. Masour and N. R. Shanbhag, “Turbo decoder architectures for low-density parity check codes,” IEEE Global Comm. Conf. (GLOBECOM), Nov. 2002, pp. 1383-1388.

[7] M. M. Mansour and N. R. Shanbhag, “Low power VLSI architectures for LDPC codes,” in 2002 International Low Power Electronics and Design, 2002, pp. 284-289.

[8] D. E. Hocevar, “LDPC code construction with flexible hardware implementation,” Proc.: IEEE Int’l Conf. On Comm. (ICC), Anchorage, AK, May 2003.

[9] M. M. Mansour and N. R. Shanbhag, “High-Throughput LDPC Decoders,” IEEE Trans. On VLSI Systems, vol. 11, No. 6, pp. 976-996, December 2003.


http://ieee802.org/16

Documents

doc.: IEEE 802.11-00/xxx€¦ · Web viewIrregular structured LDPC codes with rate compatibility for TGn. Date: August 13, 2004. Author: Victor Stolpman, Nico van Waes, Tejas Bhatt,