Dominance Fault Dominance Fault CollapsingCollapsing

Lu YuanlinLu Yuanlin

ECE Dept. Auburn UniversityECE Dept. Auburn University

Basic of Fault CollapsingBasic of Fault Collapsing

• Equivalence Fault Equivalence Fault CollapsingCollapsing

• Dominance Fault Dominance Fault CollapsingCollapsing

sa0 sa1

sa0 sa1

sa0 sa1sa0 sa1

sa0 sa1

sa0 sa1

Fault Dominance

Fault Equivalence

sa0 sa1 sa0 sa1 sa0 sa1 sa0 sa1

Fanout Branch Selection Fanout Branch Selection in Dominance Fault Collapsingin Dominance Fault Collapsing

G4

sa0 sa1

sa0 sa1

sa0 sa1

G1

G2

G3

sa0 sa1

• Delete the faults on input fanout branch with Delete the faults on input fanout branch with priority!priority!

Algorithm Algorithm ------Extract Gate & Node Info.Extract Gate & Node Info.

• One Node ArrayOne Node Array Each Fault Line is a NodeEach Fault Line is a Node

• Two Gate ArraysTwo Gate Arrays1.1. One-Port Gate (NOT, BUF)One-Port Gate (NOT, BUF)

2.2. Multi-port Gate (AND, OR, XOR …)Multi-port Gate (AND, OR, XOR …)

struct nodestruct node

{ char name[20];{ char name[20];

int node_type;int node_type;

int fanout; int fanout;

char sa1_del; char sa1_del;

char sa0_del;char sa0_del;

int br_node; int br_node;

int gate_no; int gate_no;

char gate_type; char gate_type;

int gate_con_no; int gate_con_no;

};};

struct node nodes[500] ;struct node nodes[500] ;

struct p2_gate { char type[10]; int in_node1; int in_node2; int in_node3; int in_node4; int in_node5; int out_node; int input_no; };struct p2_gate p2gate[255];

Algorithm Algorithm ------Dominance Fault CollapsingDominance Fault Collapsing

• Read each Read each multi-portmulti-port gate information from the multi- gate information from the multi-ports gate array ports gate array

{a. using its output node as array index to read the node {a. using its output node as array index to read the node array, array,

and delete that node’s both “sa0” and “sa1” ;and delete that node’s both “sa0” and “sa1” ; b. Decide which input nodes are on fanout branches,b. Decide which input nodes are on fanout branches, if (an if (an ANDAND or or NANDNAND gate) gate) delete delete “sa0”“sa0” on those nodes with priority ; on those nodes with priority ; else if (an else if (an OROR or or NORNOR gate) gate) delete delete “sa1”“sa1” on those nodes with priority ;} on those nodes with priority ;}

• Read each Read each one-portone-port gate information from the one port gate information from the one port gate array gate array

{ using its output node as array index to read the node { using its output node as array index to read the node array,array,

and delete that node’s both “sa0” and “sa1” ;}and delete that node’s both “sa0” and “sa1” ;}

Fanout of POFanout of PO

PO1

PO2

sa1

PO1

PO2

sa1sa0

sa1

sa1sa0

RESULTRESULT

BenchmarkCircuit

Total Faults

Equivalent Collapsed

FaultsDominance Collapsed Faults

My Hitec MyMyTested

By HitecRedundant

C17 34 22 22 16 16 0

74181

XOR 404 237 237 160 - -

Five gates replacement

516 269 269 192 188 4