Drift Chamber Status Report

Tokyo PHENIX Meeting

Milestones Achieved

Initial delay in start of net production; 2 weeks due to late delivery of small US made precision screws.

Middle October: 13 X-nets made and tested at PNPI: • 8 excellent (<2 namp)• 3 acceptable (<50 namp)• 2 sparked:

• One stray wire strand.• One poor glue application.

MECH Milestones continued

End of October:• 32 UV nets made, all excellent.

Early November:• Mechanical mods to the Large prototype begun.• Shipped 10 wire modules (2 X, 4 U, 4 V).

Middle November:• Wire modules arrive intact (no tangling)• Installation complete by Thanksgiving.

New Modules Installed

Module ProfileOld: UV cages “Tilt”

into active volumeNew: UV cages flush with end

Feedthroughs

Component Overview

The ASD/TMC card accepts chamber signals directly.

The FEM card responds to triggers and orchestrates readout of 4 ASD/TMC cards (one “Keystone”).

ASD8 = preAmp, Shaper, Discriminator (“PENN chip”)TMC = Time Memory Cell, Yasuo Arai KEK.

ASD/TMC Tests

Real ASD/TMC Card

Mini FEM => Logic analyzer

ARCNet/Timing Emulation Box:

Supplies pulses

Supplies triggers

Supplies ENDat’s

Noise Tests on ChamberOn Chamber

HV connected

reads always running

3fC threshold

TMC level

•With the scope set to 5 second persistence, we record all disc firings.

•No white noise!

•Readout noise comes from Mini-FEM

Interim Readout SolutionASD/TM C FEM

inte rna l c lo c kingHo o k fo r m a nua l trig g e rO utp ut “trig g e r a p p lie d ”

Ho o k fo r ENDa t’sN IM Bin

C o sm icTe le sc o p e

Re a l ARC Ne t

PC(La b vie w)

TTL -> DiffTwist Pa ir

Sc ra m b le r

VM E(PHO NC S)

G -2 FIFO

Units in Blue a re te m p o ra ry wo rka ro und s

MECH: Since leaving for QM97

All RC cards installed. Pure nitrogen tests, all cages at once. Corona at expected point. Need one more day of turns w/ 50-50. No measurable leaks. Vlad seems optimistic.

ELEC: Since Leaving for QM97

A-side signal boards stuffed and tested. ARCNet slave FPGA design complete. We’ll write user code in ARCNet board called from

hooks inside JF code (a standard option!). Otherwise too slow. Some code written.

g-2 blank FIFO card and most parts in hand. Pre-prod proto shipped from LLNL. Need to address:

• Cabling• DC-DC convertor mechanical details.