E. Atkin, E. Malankin, V. Shumikhin NRNU MEPhI, Moscow 1

1

ANALOG FRONT-END CHIP FOR GEM DETECTORS

E. Atkin, E. Malankin, V. ShumikhinNRNU MEPhI, Moscow

2

OUTLINE

GEM Chip structure Channels structure Test benches Experimental data Summary

3

GEM DETECTORS

Cross-section of a triple GEM detector

P. Abbon et al. / NIM (2007) 455–518

~50 µm

4

CBM

Muon system of the international CBM experiment, being designed on the new accelerator facilities at FAIR GSI (Darmstadt, Germany), built on the base of the gaseous detector of high resolution. Muon System consists of about 1 million channels. For the Muon System signals read-out ASIC application is neccesary.

5

CBM


6

CBM


~1 million channels

↓~15 000 ASICs x

64 ch.

7

CBM


~1 million channels

↓~15 000 ASICs x

64 ch.

Front-end forMUCH

8

SPECIFICATIONS

Input signal range of 1.5-100 fC Charge polarity – negative ENC – less than 0.3 fC Detector capacitance up to 100 pF Maximum hit rate/channel – 2 MHz Power consumption – 2 mW/ch

9

CHIP STRUCTURE

1.5 CSA + stand alone Shaper channels (Preamp ver. 1)

2.5 CSA channel with built-in shaping (Preamp ver. 2)

3.OpAmp block

4.Digital test structures

10

CHANNEL STRUCTUREPREAMP VER.1

11

CSA CORE

• Input transistor – nMOS (7mm * 360 nm) • Common source stage• Folded boost current amplifier • Output source follower

Feedback: gain setting cap + discharge transistor to set the maximum hit rate of channel not less than 2 MHz

12

SHAPER

Noninverting 2nd order

Sallen-Key filter

The shaper has two additional adjustments:- TAIL – tail cancellation- SH_BL – baseline tuning

13

PREAMPVER.2

• Input transistor – nMOS (4mm * 360 nm) • Common source stage• Folded boost current amplifier • Output source follower

Feedback: gain setting cap + discharge resistor to set the maximum hit rate of channel not less than 2 MHz

14

CHIP LAYOUT

• CLCC68 Package

• Die–1525 x 1525 μm2

• UMC 180 nm CMOS

MMRF process

• 2012 run of

Europractice

15

TESTBOARD

CLCC Socket

LDO regulato

r

1 pF capacita

nce

Detector capacita

nce emulatio

n

16

TESTBOARD

CLCC Socket

LDO regulato

r

1 pF capacita

nce

Detector capacita

nce emulatio

n

Reference potentiome

ters

17

OUTPUT RESPONSES (VER.1)

Input charge swept from 25 to 70 fC

CSA CSA & Shaper

Shaper

CSA

Voltage pulser

18

TRANSFER FUNCTION (VER.1)

• Dynamic range – 1.5 – 100 fC• Integral nolinearity ~ 4%

ShaperChannel gain ~ 6

mV/fC

CSACSA gain ~ 2.5

mV/fC

19

RMS NOISE MEASURMENTS (VER.1)

Aim: Cin >> Cdet

Estimation: CSA open-loop gain ≥ 1400

20

CSA OUTPUT RESPONSE & TRANSFER FUNCTIONVER.2

transfer functionCSA gain ~ 5 mV/fCCSA output

21

NOISE ESTIMATION

PreAmp (ver. 1)ENC – 875е Cdet = 1p 2427e Cdet = 100p

PreAmp (ver. 2)ENC – 1070е Cdet = 1p 2500e Cdet = 100p

22

TESTBOARD WITH GEM*

Socket with Chip

GEM Anode

Pad area 5x5 mm2

Pad capacitance 12 pF

Gas chamber

with Ar/CO2 *Testboard designed by PNPI

team

23

TESTS WITH 55FE SOURCE*

55 Fe amplitude spectrum, obtained

by the preamplifier & GEM.

*tests provided by PNPI team

Preamplifier output

24

SUMMARY Designed and prototyped 2 versions of read-out with preliminary CBM MUCH specifications:

Preamplifier (ver.1)

Preamplifier (ver. 2)

Gain 6 mV/fC; 5 mV/fC

Input signal range

1.5-100 fC; 1.5-100 fC;

Maximum channel rate

2 MHz 2 MHz

Power consumption

1.2 mW/channel 2 mW/channel

ENC Cdet = 1p Cdet = 100p

875е 2427e

1070е2500e

Area on chip 1050 x 100 µm 200 x 100 µm

25

THANKS FOR YOUR ATTENTION...

Documents

E. Atkin, E. Malankin, V. Shumikhin NRNU MEPhI, Moscow 1