ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the

ECE 331 – Digital System Design

Introduction to and Analysis ofSequential Logic Circuits

(Lecture #20)

The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6th Edition, by Roth and Kinney,

and were used with permission from Cengage Learning.

Fall 2010 ECE 331 - Digital System Design 2

Material to be covered …

Chapter 13: Sections 1 – 4Chapter 17: Section 4


Combinational vs. Sequential

Combinational Logic Circuit Output is a function only of the present inputs. Does not have state information. Does not require memory.

Sequential Logic Circuit (aka. Finite State Machine) Output is a function of the present state. Has state information Requires memory. Uses Flip-Flops to implement memory.


Synchronous vs. Asynchronous

Synchronous Sequential Logic Circuit Clocked All Flip-Flops use the same clock and change

state on the same triggering edge.

Asynchronous Sequential Logic Circuit No clock Can change state at any instance in time. Faster but more complex than synchronous

sequential circuits.


General Models for Sequential Circuits

A sequential circuit can be divided conveniently into two parts -- the flip-flops which serve as memory for the circuit and the combinational logic which realizes the input functions for the flip-flops and the output functions.

The combinational logic may be implemented with gates, with a ROM, or with a PLA.


Sequential Circuits: Models

Moore Machine Outputs are a function of the present state. Outputs are independent of the inputs. State diagram includes an output value for each

state.

Mealy Machine Outputs are a function of the present state and the

present input. State diagram includes an input and output value for

each transition (between states).


Sequential Circuits: Models


Sequential Circuits: Mealy Model


Sequential Circuits: Moore Model


Sequential Circuits: State Diagram

State

Output

Input

Moore MachineEach node in the graphrepresents a state in the sequential circuit.


Sequential Circuits: State Diagram

Mealy MachineEach node in the graphrepresents a state in the sequential circuit.

Input

State

Output


Sequential Circuit Analysis


Analysis by Signal TracingWe can analyze clocked sequential circuits to find the output sequence resulting from a given input sequence by tracing 0 and 1 signals through the circuit. The basic procedure is:

1. Assume an initial state of the flip-flops (all flip-flops reset to 0 unless otherwise specified).

2. For the first input in the given sequence, determine the circuit output(s) and flip-flop inputs.

3. Determine the new set of flip-flop states after the next active clock edge.

4. Determine the output(s) that corresponds to the new states.5. Repeat 2, 3, and 4 for each input in the given sequence.


Example: Moore Machine


Example: Moore Machine

0 1 1 0 1


Example: Mealy Machine


Example: Mealy Machine


Analysis using State Tables and Graphs

Although constructing timing charts is satisfactory for small circuits and short input sequences, the construction of state tables and graphs provides a more systematic approach which is useful for the analysis of larger circuits and which leads to a general synthesis procedure for sequential circuits.

The state table specifies the next state and output of a sequential circuit in terms of its present state and input.


Analysis Procedure1. Determine the flip-flop input equations and the output

equations from the circuit.2. Derive the next-state equation for each flip-flop from its

input equations, using one of the following relations:

D flip-flop Q+ = D (13-1)

D-CE flip-flop Q+ = D•CE + Q•CE′ (13-2)

T flip-flop Q+ = T Q (13-3)

S-R flip-flop Q+ = S + R′Q (13-4)

J-K flip-flop Q+ = JQ′ + K′Q (13-5)


Analysis Procedure

3. Plot a next-state map for each flip-flop.4. Combine these maps to form the state table. Such a

state table, which gives the next state of the flip-flops as a function of their present state and the circuit inputs, is frequently referred to as a transition table.


Sequential Circuit Analysis• Determine the Flip-Flop input equations

In terms of the present state and input variables

• Determine the FSM output equation(s)

• Determine the next state values in the state table Assume binary encoding

Use Flip-Flop Characteristic Equation

• Construct the state table Assign a state to each binary state assignment

• Draw the corresponding state diagram

• Determine the behavior of the FSM


Example:

Analyze a sequential circuit using D Flip-Flops


Example: Analysis (D FF)

Derive the State Table for the following Sequential Logic Circuit:



1. The flip-flop input equations and output equation are

DA = X xor B' DB = X or A Z = A or B

2. The next-state equations for the flip-flops are

A+ = X xor B' B+ = X or A



3. The corresponding next-state (K-) maps are



4. The state table, or transition table, is then determined from the next-state maps



5. The state graph can then be drawn from the state table


Example:

Analyze a sequential circuit using JK Flip-Flops


Example: Analysis (JK FF)

Derive the State Table for the following Sequential Logic Circuit:



1. The flip-flop input equations and output equation are

JA = X.B JB = X Z = X.B' + X.A + X'.A'.B

2. The next-state equations for the flip-flops are

A+ = JA.A' + KA'.A B+ = JB.B' + KB'.B

KA = X KB = X.A

A+ = X.B.A' + X.A B+ = X.B' + X.A.B



3. The corresponding next-state (K-) maps are



4. The state table, and transition table, is then determined from the next-state maps



5. The state graph can then be drawn from the state table


Example:

Analyze a serial adder


Example: Serial Adder

The serial adder adds two n-bit binary numbers.

serial inputs

serial output



Truth Table for the Full Adder:



Timing Diagram for the Serial Adder:



State Graph for the Serial Adder:

What type of state machine is this?


Example:

Analyze a state machine with multiple inputs.


Example: Multiple Inputs

State Table for a state machine with multiple inputs:


Example: Multiple Inputs

State Graph for a state machine with multiple inputs:

How many paths leave each state?

What type of statemachine is this?


Questions?

Documents

ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the