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EE 2
12M
icro
proc
esso
rsSe
ctio
n 03
2
Sylla
bus
•In
stru
ctor
: Dr A
li Zi
ya A
lkar
•
e-m
ail:
alka
r@ha
cette
pe.e
du.tr
–of
fice
hour
s: T
o be
det
erm
ined
–co
urse
WEB
pag
e: w
ww
.ee.
bilk
ent.e
du.tr
/~ee
212
•C
oord
inat
or A
ssis
tant
: Ibr
ahim
Hok
elek
, Tel
: x16
13
–ho
kele
k@ee
.bilk
ent.e
du.tr
•
Labo
rato
ry W
EB p
age:
–w
ww
.ee.
bilk
ent.e
du.tr
/~ee
212/
lab/
lab.
htm
l•
Text
book
: •M
. A. M
azid
i& J
. G. M
azid
i, "T
he 8
0x86
IBM
PC
and
Com
patib
le C
ompu
ters
", Pr
entic
e H
all,2
000.
•U
sefu
l Boo
ks:
•An
tona
kas,
“An
Intro
duct
ion
to th
e In
tel F
amily
of M
icro
proc
esso
rs”,
Pre
ntic
e H
all,
1999
•K.
R. I
rvin
e, “A
ssem
bly
Lang
uage
for I
ntel
Bas
ed C
ompu
ters
”, Pr
entic
e H
all,1
999.
•W
. A. T
riebe
land
A. S
ingh
, “Th
e 80
88 a
nd 8
086
Mic
ropr
oces
sors
: Pro
gram
min
g,
Inte
rfaci
ng, S
oftw
are,
Har
dwar
e, a
nd A
pplic
atio
ns” P
rent
ice
Hal
l, 20
00.
•Br
ey, “
The
Inte
l Mic
ropr
oces
sors
”, Pr
entic
e H
all,
2000
3
Sylla
bus
•D
. W. S
mith
, "PI
C in
pra
ctic
e: A
n in
trodu
ctio
n to
the
PIC
mic
roco
ntro
ller"
,But
terw
orth
-H
eine
man
n, 2
001.
•Ar
t of A
ssem
bly
Lang
uage
Pro
gram
min
g,
“http
://w
ebst
er.c
s.uc
r.edu
/Pag
e_Ao
AWin
/aoa
pdf.z
ip"
•C
ompu
ter U
sage
:•
Mic
roso
ft’s
Mac
ro A
ssem
bler
, Deb
ugge
r, an
d C
onve
ntio
nal H
igh
Leve
l Pr
ogra
mm
ing
Lang
uage
s in
the
PC e
nviro
nmen
t.
•Pr
ereq
uisi
tes:
•Lo
gic
circ
uits
, dig
ital d
esig
n
•N
umbe
r rep
rese
ntat
ions
and
bas
ic c
ompu
ting
algo
rithm
s
•G
radi
ng:
•M
idte
rm:E
ssay
/writ
ten
25%
•Fi
nal:E
ssay
/writ
ten
35%
•La
b w
ork
25%
•H
omew
ork
15%
4
Sche
dule
WEE
K(1)
: Int
rodu
ctio
n to
Mic
roco
mpu
ters
and
M
icro
proc
esso
rs,C
ompu
ter C
odes
, Pro
gram
min
g an
d O
pera
ting
Syst
ems
WEE
K(2)
: 80x
86 P
roce
ssor
Arc
hite
ctur
e
WEE
K(3)
: 808
8/80
86 In
stru
ctio
n Se
t, M
achi
ne C
odes
, Ad
dres
sing
Mod
es, D
ebug
WEE
K(4)
: 808
8/80
86 M
icro
proc
esso
r Pro
gram
min
g
WEE
K(5)
: 808
8/80
86 M
icro
proc
esso
r Pro
gram
min
g
WEE
K(6)
: The
808
8 an
d 80
86 M
icro
proc
esso
rs a
nd T
heir
Mem
ory
and
Inpu
t/Out
put I
nter
face
s, IS
A Bu
s
5
Sche
dule
WEE
K(7)
: Mem
ory
and
Mem
ory
Inte
rfaci
ng
WEE
K(8)
: Inp
ut/O
utpu
t Int
erfa
ce C
ircui
ts a
nd P
erip
hera
l D
evic
es 8
255
WEE
K(9)
: Inp
ut/O
utpu
t Int
erfa
ce C
ircui
ts a
nd P
erip
hera
l D
evic
es 8
254
WEE
K(10
): In
terru
pt In
terfa
ce o
f the
808
8 an
d 80
86
Mic
ropr
oces
sors
WEE
K(11
): Pr
ogra
mm
able
Inte
rrupt
Con
trolle
r and
the
8259
WEE
K(12
): An
Intro
duct
ion
to P
ICm
icro
cont
rolle
rs
WEE
K(13
): Se
rial D
ata
Com
mun
icat
ion
and
1645
0/82
50/8
251
chip
s
WEE
K(14
): Pe
rson
al C
ompu
ter A
rchi
tect
ure
and
Bus
Sys.
6
Wee
k 1
Intr
oduc
tion
to M
icro
com
pute
rs a
nd
Mic
ropr
oces
sors
, Com
pute
r Cod
es,
Prog
ram
min
g, a
nd O
pera
ting
Syst
ems
7
How
it a
ll st
arte
d?
8
Evol
utio
n in
term
s of
Tec
hnol
ogy
9
A br
ief h
isto
ry•I
t all
star
ted
with
the
1832
Bab
bage
mec
hani
cal m
achi
ne to
ca
lcul
ate
the
navi
gatio
n ta
bles
for t
he R
oyal
Arm
y, U
.K.
•194
3 Fi
rst e
lect
roni
c co
mpu
ter i
s use
d to
dec
ode
the
Ger
man
Arm
y se
cret
cod
es, c
oded
by
the
Enig
ma
mac
hine
: C
olos
sus,
noth
ing
else
thou
gh!!
•194
6 Fi
rst G
ener
al P
urpo
se c
ompu
ter:
ENIA
C 1
7000
va
cuum
tube
s, 50
0 m
iles o
f wire
30
tons
, 100
000
ops
per
se
c.@
U.o
f Pen
n
•194
8 de
velo
pmen
t of t
rans
isto
r at t
he B
ell L
abs.
•195
8 In
vent
ion
of th
e IC
by
Jack
Kilb
y at
Tex
as
Inst
rum
ents
•Firs
t mic
ropr
oces
sor a
t Int
el in
197
1---
4004
10
A br
ief h
isto
ry
•In
tel 4
004
was
a 4
bit
up. O
nly
45 in
stru
ctio
ns P
Cha
nnel
Mos
fet
tech
nolo
gy. 5
0 K
inst
ruct
ions
per
sec
ond
(< E
NIA
C!).
•
Late
r 800
8 as
an
8 bi
t u p
roce
ssor
then
808
0 an
d M
otor
olla
680
0.•
8080
was
10x
fast
er th
an 8
008
amd
TTL
com
patib
le (e
asy
inte
rfaci
ng)
•M
ITS
Alta
ir 88
00 1
974.
The
BAS
IC In
terp
rete
r was
writ
ten
by B
ill G
ates
. Ass
embl
er p
rogr
am w
as w
ritte
n by
Dig
ital R
esea
rch
Cor
pora
tion
(Aut
hor c
omp.
Of D
r-DO
S)•
1977
808
5 m
icro
proc
esso
r. In
tern
al c
lock
gen
erat
or, h
ighe
r fre
quen
cy a
t red
uced
cos
t and
inte
grat
ion.
The
re a
re 2
00 m
ilion
8085
’s a
roun
d th
e w
orld
!•
1978
808
6+80
88 m
icro
proc
esso
rs 1
6 bi
t. Ad
dres
sed
1 M
byte
of
mem
ory.
Sm
all i
nstru
ctio
n ca
che
(4-6
byt
es) e
nabl
ed p
refe
tch
of
inst
ruct
ions
.•
IBM
dec
ided
to u
se 8
088
in P
C.
11
A br
ief h
isto
ry
•In
198
3 80
286
rele
ased
, ide
ntic
al to
808
6 ex
cept
the
addr
essi
ng a
nd
high
er c
lock
spe
ed.
•32
bit
mic
ropr
oces
sor e
ra. I
n 19
86 m
ajor
ove
rhau
l on
8028
6 ar
chite
ctur
e 80
386
DX
with
32b
it da
ta +
32
bit a
ddre
ss (4
G b
ytes
)•
1989
804
86 =
803
86 +
8038
7co
proc
esso
r +8K
B ca
che
•19
93 P
entiu
m (8
0586
). In
clud
es 2
exe
cutio
n en
gine
s.•
Pent
ium
Pro
incl
uded
256
K Le
vel 2
cac
he m
echa
nism
as
wel
l as
Leve
l 1
cach
e. A
lso
3 ex
ecut
ion
engi
nes
whi
ch c
an e
xecu
te a
t the
sam
e tim
e an
d ca
n co
nflic
t and
stil
l exe
cute
in p
aral
lel.
•Pe
ntiu
m 2
incl
uded
L2
cach
e on
its
circ
uit b
oard
(cal
led
slot
)•
Late
r Pen
tium
3 a
nd 4
rele
ased
with
sev
eral
arc
hite
ctur
al a
nd
tech
nolo
gica
l inn
ovat
ions
.
12
Pent
ium
Pro
cess
or v
ersu
s In
tel 4
004
layo
uts
13
Evol
utio
n of
Inte
l Mic
ropr
oces
sors
14
Evol
utio
n of
Inte
l Mic
ropr
oces
sors
15
Type
s of
Mic
roco
mpu
ters
•M
icro
proc
esso
r:Pr
oces
sor o
n a
chip
•In
198
2, IB
M b
egan
sel
ling
the
idea
of a
per
sona
l com
pute
r. It
feat
ured
a
syst
em b
oard
des
igne
d ar
ound
the
Inte
l 808
8 8-
bit m
icro
proc
esso
r, 16
K
mem
ory
and
5 ex
pans
ion
slot
s.–
This
last
feat
ure
was
the
mos
t sig
nific
ant o
ne a
s it
open
ed th
e do
or fo
r 3rd
par
ty
vend
ors
to s
uppl
y vi
deo,
prin
ter,
mod
em, d
isk
driv
e, a
nd R
S 23
2 se
rial a
dapt
er
card
s.–
Gen
eric
PC
: A c
ompu
ter w
ith in
terc
hang
able
com
pone
nts
man
ufac
ture
d by
a
varie
ty o
f com
pani
es•
Mic
roco
ntro
ller i
s an
entir
e co
mpu
ter o
n a
chip
, a m
icro
proc
esso
r with
on-
chip
mem
ory
and
I/O.
–Th
ese
parts
are
des
igne
d in
to (e
mbe
dded
with
in) a
pro
duct
and
run
a pr
ogra
m
whi
ch n
ever
cha
nges
–H
ome
appl
ianc
es, m
oder
n au
tom
obile
s, h
eat,
air-c
ondi
tioni
ng c
ontro
l, na
viga
tion
syst
ems
–In
tel’s
MC
S-51
fam
ily, f
or e
xam
ple,
is b
ased
on
an 8
-bit
mic
ropr
oces
sor,
but
feat
ures
up
to 3
2K b
ytes
of o
n-bo
ard
RO
M, 3
2 in
divi
dual
ly p
rogr
amm
able
dig
ital
inpu
t/out
put l
ines
, a s
eria
l com
mun
icat
ions
cha
nnel
.
16
Gen
eral
Pur
pose
Mic
ropr
oces
sors
CPU
Gen
eral
Pu
rpos
e M
icro
proc
esso
rR
AM
Seria
l C
OM
Po
rtTi
mer
I/OR
OM
Thes
e ge
nera
l mic
ropr
oces
sors
con
tain
no
RA
M, R
OM
, or I
/O
ports
on
the
chip
itse
lfEx
. Int
el’s
x86
fam
ily (8
088,
808
6, 8
0386
, 803
86, 8
0486
, Pe
ntiu
m)
Mot
orol
a’s 6
80x0
fam
ily (6
8000
, 680
10, 6
8020
, etc
)
Dat
a bu
s
Add
ress
bus
Mic
ropr
oces
sors
lead
to v
ersa
tile
prod
ucts
17
Mic
roco
ntro
llers
CPU
RA
MR
OM
I/OTI
MER
Seria
l Com
Po
rt
Mic
roco
ntro
ller
A m
icro
cont
rolle
r has
a C
PU in
add
ition
to a
fixe
d am
ount
of
RA
M, R
OM
, I/O
por
ts o
n on
e si
ngle
chi
p; th
is m
akes
them
idea
l fo
r app
licat
ions
in
whi
ch c
ost a
nd sp
ace
are
criti
cal
Exam
ple:
a T
V re
mot
e co
ntro
l doe
s not
the
com
putin
g po
wer
of a
48
6
18
Embe
dded
Sys
tem
s
•An
em
bedd
ed s
yste
m u
ses
a m
icro
cont
rolle
r or a
mic
ropr
oces
sor t
o do
one
task
and
one
task
onl
y–
Exam
ple:
toys
, gar
age
door
ope
ners
, ans
wer
ing
mac
hine
s, A
BS,
keyl
ess
entry
, etc
. –
Insi
de e
very
mou
se, t
here
is a
mic
roco
ntro
ller t
hat p
erfo
rms
the
task
of
findi
ng th
e m
ouse
pos
ition
and
sen
ds it
to th
e PC
•Al
thou
gh m
icro
cont
rolle
rs a
re th
e pr
efer
red
choi
ce fo
r em
bedd
ed
syst
ems,
ther
e ar
e tim
es th
at th
e m
icro
cont
rolle
r is
inad
equa
te fo
r th
e ta
sk•
Inte
l, M
otor
ola,
AM
D, C
yrix
hav
e al
so ta
rget
ed th
e em
bedd
ed
mar
ket w
ith th
eir g
ener
al p
urpo
se m
icro
proc
esso
rs•
For e
xam
ple,
Pow
er P
C m
icro
proc
esso
rs (I
BM M
otor
ola
join
t ve
ntur
e) a
re u
sed
in P
Cs
and
rout
ers/
switc
hes
toda
y•
Mic
roco
ntro
llers
diffe
r in
term
s of
thei
r RAM
,RO
M, I
/O s
izes
and
ty
pe.
–R
OM
: One
tim
e-pr
ogra
mm
able
, UV-
RO
M, f
lash
mem
ory
19
Stor
ed P
rogr
am C
once
pt
20
Stor
ed P
rogr
am C
once
pt•
Ther
e ar
e th
ree
maj
or p
arts
–Th
e C
PU(C
entra
l Pro
cess
ing
Uni
t) w
hich
act
s as
the
brai
n co
ordi
natin
g al
l act
iviti
es w
ithin
the
com
pute
r–
The
Mem
ory
Uni
twhe
re th
e pr
ogra
m in
stru
ctio
ns a
nd d
ata
are
stor
ed–
The
I/O (I
nput
/Out
put)
devi
ces
whi
ch a
llow
the
com
pute
r to
inpu
t in
form
atio
n fo
r pro
cess
ing
and
then
out
put t
he re
sult
•To
day
the
CPU
circ
uitry
has
bee
n re
duce
d to
ICs
calle
d th
e m
icro
proc
essi
ngun
it (M
PU) o
r the
mic
ropr
oces
sor,
the
entir
e co
mpu
ter w
ith th
e th
ree
parts
is c
alle
d a
mic
roco
mpu
ter
•Se
vera
l reg
iste
rs
•Th
e ba
sic
timin
g of
the
com
pute
r is
cont
rolle
d by
a s
quar
e w
ave
osci
llato
r or a
clo
ckge
nera
tor c
ircui
t.–
Sync
hron
izat
ion
–D
eter
min
es h
ow fa
st th
e pr
ogra
m c
an b
e fe
tche
d fro
m m
emor
y an
d ex
ecut
ed•
Mem
ory
Rea
d or
Fet
ch C
ycle
–IP
: Ins
truct
ion
Poin
ter
21
Stor
ed P
rogr
am C
once
pt•
Mem
ory
unit
cons
ists
of a
larg
e nu
mbe
r of s
tora
ge lo
catio
ns e
ach
with
its
own
addr
ess.
As
a Pr
ime
Mem
ory
it ca
n be
obs
erve
d as
:–
RAM
(Ran
dom
Acc
ess
Mem
ory)
and
its
vola
tility
. Typ
ical
ly 8
bit
wid
e–
RO
M (R
ead
Onl
y M
emor
y)
22
Inst
ruct
ion
Fetc
h
•The
mem
ory
unit’
s ad
dres
s se
lect
or/d
ecod
er c
ircui
t exa
min
es th
e bi
nary
nu
mbe
r on
the
addr
ess
line
and
sele
cts
the
prop
er m
emor
y lo
catio
n to
be
acce
ssed
.–I
n th
is e
xam
ple,
CPU
is re
adin
g fro
m m
emor
y, it
act
ivat
es it
s M
EMO
RY
REA
D c
ontro
l sig
nal
–Thi
s ca
uses
the
sele
cted
dat
a by
te in
mem
ory
to b
e pl
aced
ont
o th
e da
ta
lines
and
rout
ed to
the
inst
ruct
ion
regi
ster
in th
e C
PU
•Onc
e in
the
CPU
, the
inst
ruct
ion
is d
ecod
ed a
nd e
xecu
ted
–In
the
exa
mpl
e, in
stru
ctio
n ha
s th
e de
cim
al c
ode
64 w
hich
for a
8086
m
icro
proc
esso
r is
deco
ded
to b
e IN
C A
X–T
he A
LU (A
rithm
etic
Log
ic U
nit)
is in
stru
cted
to a
dd 1
to th
e co
nten
ts o
f the
AX
•The
cyc
le re
peat
s its
elf
23
Inst
ruct
ion
Set
•Th
e lis
t of a
ll re
cogn
izab
le in
stru
ctio
ns b
y th
e in
stru
ctio
n de
code
r is
calle
d th
e in
stru
ctio
n se
tin
stru
ctio
n se
t–
CIS
C (C
ompl
ex In
stru
ctio
n Se
t Com
pute
rs),
e.g.
, 80x
86 fa
mily
has
mor
e th
an 3
000
inst
ruct
ions
–R
ISC
(Red
uced
Inst
ruct
ion
Set C
ompu
ters
) -A
smal
l num
ber o
f ver
y fa
st e
xecu
ting
inst
ruct
ions
•M
ost m
icro
proc
esso
r chi
ps to
day
are
allo
wed
to fe
tch
and
exec
ute
cycl
es to
ove
rlap
–Th
is is
don
e by
div
idin
g th
e C
PU in
to•
EU (E
xecu
tion
Uni
t)•
BIU
(Bus
Inte
rface
Uni
t)–
BIU
fetc
hes
inst
ruct
ions
from
the
mem
ory
as q
uick
ly a
s po
ssib
le a
nd
stor
es th
em in
a q
ueue
, EU
then
fetc
hes
the
inst
ruct
ions
from
the
queu
e no
t fro
m th
e m
emor
y•
The
tota
l pro
cess
ing
time
is re
duce
d–
Mod
ern
mic
ropr
oces
sors
als
o us
e a
pipe
lined
exec
utio
n un
it w
hich
al
low
s th
e de
codi
ng a
nd e
xecu
tion
of in
stru
ctio
ns to
be
over
lapp
ed.
24
Thre
e B
us S
yste
m A
rchi
tect
ure
•A
colle
ctio
n of
ele
ctro
nic
sign
als
all d
edic
ated
to
parti
cula
r tas
k is
cal
led
a bu
s–
data
bus
–ad
dres
s bu
s–
cont
rol b
us•
Dat
a B
us–
The
wid
th o
f the
dat
a bu
s de
term
ines
how
muc
h da
ta th
e pr
oces
sor c
an re
ad o
r writ
e in
one
mem
ory
or I/
O c
ycle
(M
achi
ne C
ycle
)–
8-bi
t mic
ropr
oces
sor h
as a
n 8-
bit d
ata
bus
–80
386S
X 32
-bit
inte
rnal
dat
a bu
s, 1
6-bi
t ext
erna
l dat
a bu
s–
8038
6 32
-bit
inte
rnal
and
ext
erna
l dat
a bu
sses
–D
ata
Buse
s ar
e bi
dire
ctio
nal.
–M
ore
data
mea
ns m
ore
expe
nsiv
e co
mpu
ter h
owev
er fa
ster
pr
oces
sing
spe
ed.
25
Addr
ess
Bus
•Ad
dres
s B
us-U
nidi
rect
iona
l–
The
addr
ess
bus
is u
sed
to id
entif
y th
e m
emor
y lo
catio
n or
I/O
dev
ice
(als
o ca
lled
port)
the
proc
esso
r int
ends
to c
omm
unic
ate
with
–20
bits
for t
he 8
086
and
8088
–32
bits
for t
he 8
0386
/804
86 a
nd th
e Pe
ntiu
m–
36 b
its fo
r the
Pen
tium
Pro
•80
86 h
as a
20-
bit a
ddre
ss b
us a
nd th
eref
ore
addr
esse
s al
l co
mbi
natio
ns o
f add
ress
es fr
om a
ll 0s
to a
ll 1s
. Thi
s co
rresp
onds
to
2 20
add
ress
es o
r 1M
(1 M
eg) a
ddre
sses
or m
emor
y lo
catio
ns.
•Pe
ntiu
m: 4
Gby
te m
ain
mem
ory
Tota
l am
ount
of
mem
ory
is
4Mby
tes
26
Con
trol
Bus
•C
ontro
l bus
is U
ni-d
irect
iona
l•
How
can
we
tell
the
addr
ess
is a
mem
ory
addr
ess
or a
n I/O
por
t ad
dres
s–
Mem
ory
Rea
d–
Mem
ory
Writ
e–
I/O R
ead
–I/O
Writ
e•
Whe
n M
emor
y R
ead
or I/
O R
ead
are
activ
e, d
ata
is in
putt
o th
e pr
oces
sor.
•W
hen
Mem
ory
Writ
e or
I/O
Writ
e ar
e ac
tive,
dat
a is
out
put
from
the
proc
esso
r.•
The
cont
rol b
us s
igna
ls a
re d
efin
ed fr
om th
e pr
oces
sor’s
poi
nt o
f vi
ew.
27
Som
e Im
port
ant T
erm
inol
ogy
•Bi
t is
a bi
nary
dig
it th
at c
an h
ave
the
valu
e 0
or 1
•A
byte
is d
efin
es a
s 8
bits
•A
nibb
le is
hal
f a b
yte
•A
wor
d is
two
byte
s•
A do
uble
wor
d is
four
byt
es•
A ki
loby
te is
2^1
0 by
tes
(102
4 by
tes)
, The
abb
revi
atio
n K
is m
ost o
ften
used
–Ex
ampl
e: A
flop
py d
isk
hold
ing
356K
byte
s of
dat
a•
A m
egab
yte
or m
eg is
2^2
0 by
tes,
it is
exa
ctly
1,0
48,5
76
byte
s•
A gi
gaby
te is
2^3
0 by
tes
28
Inte
rnal
Wor
king
Of C
ompu
ters
Ass
ume:
A
n im
agin
ary
CPU
has
regi
ster
s A,B
,C,D
8 bi
t dat
a bu
s + 1
6 bi
t add
ress
bus
Add
ress
able
000
0
Mem
ory
FFFF
1000
0H lo
catio
ns =
2^
16 lo
catio
ns
Act
ion:
21
-> R
egA
;
Then
Add
42
and
12 to
Reg
A
29
AC
TIO
NC
ode
Dat
aM
ove
valu
e 21
into
regi
ster
AB
0H21
HA
dd v
alue
42H
to re
gist
er A
04H
42H
Add
val
ue 1
2H to
regi
ster
A04
H12
H
Inte
rnal
Wor
king
Of C
ompu
ters
Mem
ory
Add
ress
Con
tent
s of m
emor
y ad
dres
s14
00co
de -(
B0)
the
code
for m
ove
to A
1401
data
-(21
) the
val
ue fo
r A14
02co
de -(
04) t
he c
ode
for a
ddin
g a
valu
e to
A14
03da
ta -(
42) t
he v
alue
to b
e ad
ded
1404
code
-(04
) the
cod
e fo
r add
ing
a va
lue
to A
1405
data
-(12
) the
val
ue to
be
adde
d14
06co
de -(
F4) t
he c
ode
for h
alt
30
Inte
rnal
Wor
king
Of C
ompu
ters
1-th
e C
PU p
rogr
am c
ount
er c
an h
ave
any
valu
e be
twee
n 00
00
FFFF
H. T
his o
ne is
set t
o st
art w
ith 2
000
2-th
e C
PU p
uts o
ut 2
000.
The
mem
ory
circ
uitry
find
s the
lo
catio
n. A
ctiv
ates
the
read
sign
al, i
ndic
atin
g th
e m
emor
y lo
catio
n 14
00. B
0 is
put
on
the
bus a
nd b
roug
ht to
the
CPU
3-B
0 is
dec
oded
inte
rnal
ly it
now
kno
ws i
t nee
ds to
fetc
h th
e ne
xt b
yte!
. It b
rings
21h
from
140
1. T
he p
rogr
am c
ount
er
auto
mat
ical
ly in
crem
ents
itse
lf to
the
next
loca
tion
to fe
tch
the
next
dat
a/in
stru
ctio
n.
MEM
CPU
PC=2
000
Rea
d
B0
Inst
Dec
oder
B0 d
ecod
e
31
Bas
ic T
imin
g O
f The
Initi
al F
etch
PC INST
RU
CT
ION
OPC
OD
EFE
TC
H
Opc
ode
BO
32
Dat
a Fl
ow In
side
the
PC
33
Mot
herb
oard
34
Mot
herb
oard
•Th
e m
othe
rboa
rd i
s th
e he
art o
f the
PC
on
whi
ch a
ll co
mpo
nent
s th
at a
re a
bsol
utel
y ne
cess
ary
are
loca
ted.
•M
othe
rboa
rd a
nd s
ever
al s
lots
into
whi
ch th
e ci
rcui
t boa
rds
of th
e gr
aphi
cs a
dapt
er a
nd th
e in
terfa
ces
are
loca
ted.
•80
x86
is th
e ce
ntra
l uni
t of t
he b
oard
.–
It ex
ecut
es a
ll da
ta p
roce
ssin
g, th
at is
, num
bers
are
add
ed, s
ubtra
cted
, m
ultip
lied,
etc
. log
ic o
pera
tions
with
two
oper
atio
ns w
ith tw
o ite
ms
are
exec
uted
(log
ical
AN
D, X
OR
). •
For e
xten
sive
mat
hem
atic
al o
pera
tions
(lik
e th
e ta
ngen
t of a
real
nu
mbe
r), a
mat
hem
atic
al c
opro
cess
or is
ava
ilabl
e. In
tel c
alls
the
proc
esso
r as
80x8
7.•
Oth
er c
ompa
nies
als
o su
pply
cop
roce
ssor
s (W
eite
x, C
yrix
).•
May
be
100
times
fast
er th
an n
orm
al p
roce
ssor
s.•
Usu
ally
PC
s ar
e no
t equ
ippe
d w
ith a
cop
roce
ssor
whe
n sh
ippe
d, o
nly
with
a
sock
et fo
r it.
•Th
e 48
6DX
and
its s
ucce
ssor
s Pe
ntiu
m a
nd P
entiu
m P
ro a
lread
y im
plem
ent
an F
PU o
n-ch
ip s
o th
at a
cop
roce
ssor
is o
bsol
ete.
35
Mot
herb
oard
•An
othe
r im
porta
nt m
othe
rboa
rd c
ompo
nent
is th
e m
ain
mem
ory
or
RAM
. –
Usu
ally
, the
mai
n m
emor
y is
div
ided
into
sev
eral
ban
ks; e
ach
bank
has
to
be
fully
equ
ippe
d w
ith m
emor
y ch
ips.
–AT
-386
s m
ain
mem
ory
size
is ty
pica
lly 4
Mby
tes,
fully
equ
ippe
d Pe
ntiu
m P
Cs
have
at l
east
32
Mby
tes
of R
AM.
–C
PU s
tore
s da
ta a
nd in
term
edia
te re
sults
, as
wel
l as
prog
ram
s, in
its
mem
ory
and
read
them
late
r.–
Addr
ess:
hous
e nu
mbe
r of t
he d
ata
unit
requ
este
d–
Tran
sfer
ring
the
addr
ess
to th
e m
emor
y is
car
ried
out b
y an
add
ress
bu
san
d th
e tra
nsfe
r of d
ata
by a
dat
a bu
s.
–Bu
sm
eans
a n
umbe
r of l
ines
thro
ugh
whi
ch d
ata
and
sign
als
are
trans
ferre
d.
–Ad
dres
s bu
s is
•20
for P
C X
T/AT
•24
for A
T•
32 fo
r 386
, 486
, and
Pen
tium
•
Acce
ss ti
me:
Tim
e pe
riod
betw
een
the
CPU
’s c
omm
and
to th
e m
emor
y th
at
data
sho
uld
be re
ad a
nd th
is d
ata
bein
g tra
nsfe
rred
to th
e pr
oces
sor.
36
Mot
herb
oard
•Fa
st-c
lock
ed c
ompu
ters
abo
ve 1
50 M
hz h
ave
a ca
che
or c
ache
mem
ory
whi
ch is
sig
nific
antly
sm
alle
r tha
n th
e m
ain
mem
ory
but m
uch
fast
er (a
cces
s tim
e of
10-
20 n
s) (l
evel
1 o
r 2 in
toda
y’s
com
pute
rs)
–C
ache
hol
ds d
ata
that
is fr
eque
ntly
acc
esse
d by
the
CPU
.–
Use
s a
cach
e co
ntro
ller t
o ch
eck
if th
e re
quire
d da
ta is
in th
e ca
che.
–O
n th
e ne
w a
nd p
ower
ful 8
0x86
pro
cess
ors,
the
proc
esso
r, co
proc
esso
r, ca
che
mem
ory,
and
a c
ache
con
trolle
r are
all
inte
grat
ed o
n a
sing
le c
hip
to fo
rm th
e i4
86 o
r Pen
tium
. •
Mot
herb
oard
als
o in
clud
es R
ead
Onl
y M
emor
y (R
OM
)–
Loca
ted
on th
is c
hip
are
the
prog
ram
s an
d da
ta th
at th
e PC
nee
dsat
pow
er-u
p.–
In th
e R
OM
, the
re a
re a
lso
vario
us s
uppo
rt ro
utin
es fo
r acc
essi
ng th
e ke
yboa
rd,
grap
hics
ada
pter
, etc
. kno
wn
colle
ctiv
ely
as R
OM
-BIO
S.•
To c
ontro
l the
dat
a tra
nsfe
r pro
cess
, add
ition
al c
ontro
l sig
nals
are
requ
ired:
e.
g., w
rite-
enab
le s
igna
l for
whi
ch o
ne b
us li
ne is
rese
rved
.–
Dat
a bu
s, a
ddre
ss b
us, a
nd a
nd a
ll co
ntro
l lin
es a
re k
now
n as
the
syst
em b
us.
–62
con
tact
s fo
r the
XT
(XT’
s sy
stem
bus
) and
62
cont
acts
for t
heAT
•Bu
s sl
ots:
mem
ory
expa
nsio
n ca
rd m
ay b
e in
serte
d in
one
bus
slo
t.
37
Mot
herb
oard
•Fr
eque
ntly
, ext
ensi
ve a
mou
nts
of d
ata
mus
t be
trans
ferre
d fro
m a
hard
or f
lopp
y di
sk i
nto
the
mai
n m
emor
y (w
ord
proc
esso
r ap
plic
atio
n fo
r exa
mpl
e). F
or th
is p
urpo
se, t
he m
othe
rboa
rd h
as
seve
ral c
hips
opt
imiz
ed fo
r dat
a tra
nsfe
r with
in th
e co
mpu
ter -
the
DM
A ch
ips
(Dire
ct M
emor
y Ac
cess
).–
The
CPU
is b
ypas
sed
in th
is p
roce
ss.
•Ti
mer
chi
p fo
r mem
ory
refre
sh (D
ynam
ic R
AM) a
nd fo
r sup
porti
ng
DO
S ro
utin
es ti
me
and
date
.
38
Gra
phic
s Ad
apte
rs a
nd M
onito
rs
39
Driv
e C
ontr
olle
rs, F
lopp
y an
d H
ard
Dis
k D
rives
40
Para
llel I
nter
face
s an
d Pr
inte
rs
•I/O
chi
p on
the
inte
rface
car
d ac
cept
s ei
ght b
its to
geth
er a
nd tr
ansf
ers
them
toge
ther
(tha
t is
, in
para
llel)
to th
e co
nnec
ted
devi
ce (p
rinte
r).•B
esid
es th
e da
ta b
yte,
con
trol s
igna
ls a
re a
lso
pres
ent t
o in
dica
te w
heth
er th
e da
ta h
as
arriv
ed.
•Up
to 1
00 K
byte
s of
dat
a ca
n be
tran
sfer
red
per s
econ
d if
the
inte
rface
and
the
conn
ecte
d pe
riphe
ral a
re c
orre
ctly
ada
pted
.•O
n th
e in
terfa
ce is
a ja
ck w
ith 2
5 ho
les
whi
ch s
uppl
y si
gnal
s ac
cord
ing
to th
e C
entro
nix
stan
dard
.•T
he s
tand
ard
clai
ms
36 h
oles
, IBM
use
s 25
of t
hem
: de-
fact
o st
anda
rd
•The
max
dis
tanc
e be
twee
n th
e co
mpu
ter a
nd th
e pr
inte
r is
abou
t 5m
•D
ata
is e
xcha
nged
via
han
dsha
king
•Usu
ally
the
para
llel i
nter
face
onl
y su
pplie
s da
ta b
ut d
oes
not r
ecei
ve a
ny.
•New
ver
sion
s of
I/O
chi
ps c
an re
ceiv
e da
ta a
nd it
is th
us p
ossi
ble
to e
xcha
nge
data
be
twee
n co
mpu
ters
via
the
para
llel i
nter
face
and
a s
uita
ble
softw
are.
41
Seria
l Int
erfa
ces
and
Mod
ems
•A P
C u
sual
ly h
as o
ne o
r mor
e se
rial i
nter
face
s; th
ese
are
inte
grat
ed o
n an
inte
rface
ad
apte
r car
d to
geth
er w
ith a
par
alle
l int
erfa
ce.
•Th
e ce
ntra
l com
pone
nt is
a s
o-ca
lled
UAR
T w
hich
tran
smits
via
sin
gle
data
line
as
oppo
sed
to e
ight
as
in th
e ca
se fo
r the
par
alle
l int
erfa
ce.
•Old
er P
C/X
Ts h
ave
an 8
250
chip
, the
AT
has
the
mor
e ad
vanc
ed 1
6450
/165
50 c
hip.
•U
ART
adds
add
ition
al b
its; s
tart,
sto
p an
d pa
rity
bits
.•M
uch
long
er d
ista
nces
are
pos
sibl
e (u
p to
100
m) b
ut th
e tra
nsfe
r rat
e is
low
er.
•Ser
ial i
nter
face
s c
onfo
rm to
the
RS2
32 s
tand
ard
whi
ch re
quire
s25
con
tact
s; o
nly
14 a
t m
ost a
re u
sed.
•U
sed
in m
odem
s
42
Net
wor
k Ad
apte
rs a
nd L
ANs
•Net
wor
king
is e
ssen
tial.
•A n
etw
ork
adap
ter h
as tw
o in
terfa
ces:
one
to th
e PC
’s C
PU a
nd a
netw
ork
inte
rface
for
acce
ssin
g th
e ne
twor
k.•N
etw
ork
adap
ter c
an b
e in
serte
d in
any
free
slo
t.•T
he n
etw
ork
inte
rface
dep
ends
on
the
netw
ork
used
: Eth
erne
t, to
ken
ring,
or A
TM•1
0/10
0T E
ther
net
•I/O
chi
p co
nver
ts th
e da
ta in
to a
form
that
is a
dapt
ed fo
r tra
nsm
issi
on v
ia th
e ne
twor
k.
43
Bin
ary
and
Hex
adec
imal
Sys
tem
s -O
verv
iew
•C
onve
rsio
n to
dec
imal
:–
110.
101
b=
?–
6A.C
h =
?•
Con
vers
ion
from
dec
imal
–fo
r a w
hole
num
ber:
divi
de b
y th
e ra
dix
and
save
the
rem
aind
er a
s th
e si
gnifi
cant
dig
its–
10 =
? B
–10
= ?
8•
Con
verti
ng fr
om a
dec
imal
frac
tion
1.m
ultip
ly th
e de
cim
al fr
actio
n by
the
radi
x2.
save
the
who
le n
umbe
r par
t of t
he
resu
lt3.
repe
at a
bove
unt
il fra
ctio
nal p
art o
f st
ep 2
is 0
–0.
125
= ?
b–
0.04
6875
= ?
h
–11
0.10
1 b
= 6.
625
–6A
.C h
= 1
06.7
5
–10
= 1
010
b–
10 =
12
8
–0.
125
= 0.
001
b–
0.04
6875
= 0
.0C
h
44
•If
the
num
ber i
s po
sitiv
e m
ake
no c
hang
es•
If th
e nu
mbe
r is
nega
tive,
com
plem
ent a
ll bi
ts a
nd a
dd b
y 1
–-6
=>
0000
011
0 +
1 =
1111
100
1 +
1 =
FAh
•8
bit s
igne
d nu
mbe
rs–
0 to
7Fh
(+12
7) a
re p
ositi
ve n
umbe
rs–
80h
(-128
)to F
Fh (-
1) a
re n
egat
ive
num
bers
•C
onve
rsio
n of
sig
ned
bina
ry n
umbe
rs to
thei
r dec
imal
equ
ival
ent
–11
01 0
001
•11
01 0
001
+ 1
= 00
10 1
110
+ 1
= 00
10 1
111
= 2F
h =
> -4
7–
1000
111
1 01
01 1
101
•01
11 0
000
1010
001
0 +
1 =
0111
000
0 10
10 0
011
= 70
C3h
=>
-288
35
•Tw
o’s
com
plem
ent a
rithm
etic
–+1
4 -2
0–
0000
111
0 +
0001
010
0 +
1 =
FAh
•O
verfl
ow:W
hene
ver t
wo
sign
ed n
umbe
rs a
re a
dded
or s
ubtra
cted
th
e po
ssib
ility
exis
t tha
t the
resu
lt m
ay b
e to
o la
rge
for t
he n
umbe
r of
bits
allo
cate
d E
x: +
64 +
96 u
sing
8-b
it si
gned
num
bers
Two’
s C
ompl
emen
t
Sign
Fla
g in
dica
tes
the
pola
rity
45
ASC
II•
The
stan
dard
for t
ext
•In
this
cod
e ea
ch le
tter o
f the
alp
habe
t, pu
nctu
atio
n m
ark,
and
de
cim
al n
umbe
r is
assi
gned
a u
niqu
e 7-
bit c
ode
num
ber
•W
ith 7
bits
, 128
uni
que
sym
bols
can
be
code
d–
e.g.
, Upp
erca
se A
41
h•
Erro
r det
ectio
n co
des
–Pa
rity
•F
has
the
ASC
II co
de 4
6h o
r 100
011
0 •
Even
par
ity e
ncod
ed F
bec
omes
110
0 01
10 o
r C6h
•W
hich
of t
he fo
llow
ing
are
erro
red
trans
mis
sion
s if
even
par
ity is
us
ed?
–E1
h =
1110
000
1 –
20h
= 00
10 0
000
–
72h
= 01
11 0
010
•Pa
rity
met
hod
of e
rror d
etec
tion
can
only
be
used
to d
etec
t odd
nu
mbe
rs o
f erro
rs–
72h
=> 7
7h
use
mor
e so
phis
ticat
ed c
heck
sum
s
erro
r
46
BC
D
•BC
D c
ode
prov
ides
a w
ay fo
r dec
imal
num
bers
to b
e en
code
d in
bi
nary
form
that
is e
asily
con
verte
d ba
ck to
dec
imal
–26
=>
0010
011
0 (B
CD
) =>
1101
0 (u
nsig
ned
bina
ry)
–24
3 =>
001
0 01
00 0
011
(BC
D) =
> 11
11 0
011
(uns
igne
d bi
nary
) •
Use
d in
sev
en s
egm
ent d
ispl
ays
47
Com
pute
r Pro
gram
min
g•
Von
Neu
man
n m
achi
ne•
UN
IVAC
195
0 fir
st a
ssem
bly
lang
uage
use
d on
a m
achi
ne.
•M
achi
ne L
angu
age
vs A
ssem
bly
Lang
uage
–M
achi
ne la
ngua
ge o
r obj
ect c
ode
is th
e on
ly c
ode
a co
mpu
ter c
an
exec
ute
but i
t is
near
ly im
poss
ible
for a
hum
an to
wor
k w
ith–
E4 2
7 88
C3
E4 2
7 00
D8
E6 3
0 F4
the
obje
ct c
ode
for a
ddin
g tw
o nu
mbe
rs in
put f
rom
the
keyb
oard
•W
hen
prog
ram
min
g a
mic
ropr
oces
sor,
prog
ram
mer
s of
ten
use
asse
mbl
y la
ngua
ge–
This
invo
lves
3-5
lette
r abb
revi
atio
ns fo
r the
inst
ruct
ion
code
s (m
nem
onic
s) ra
ther
than
the
bina
ry o
r hex
obj
ect c
odes
Sour
ce c
ode
48
Edit,
Ass
embl
e, T
est,
and
Deb
ug C
ycle
•U
sing
an
edito
r, th
e so
urce
cod
e of
the
prog
ram
is c
reat
ed. T
his
mea
ns s
elec
ting
the
appr
opria
te in
stru
ctio
n m
nem
onic
s to
ac
com
plis
h th
e ta
sk•
A co
mpi
ler p
rogr
am w
hich
exa
min
es th
e so
urce
cod
e fil
e ge
nera
ted
by th
e ed
itor a
nd d
eter
min
es th
e ob
ject
cod
e fo
r eac
h in
stru
ctio
n in
th
e pr
ogra
m, i
s th
en ru
n. In
ass
embl
y la
ngua
ge p
rogr
amm
ing,
this
is
calle
d an
ass
embl
er.
•Th
e ob
ject
cod
e pr
oduc
ed b
y th
e co
mpu
ter i
s lo
aded
into
the
targ
et
com
pute
r’s m
emor
y an
d is
then
run.
•D
ebug
ging
: lo
catin
g an
d fix
ing
the
sour
ce o
f erro
r•
Hig
h-le
vel p
rogr
amm
ing
Lang
uage
s–
Basi
c–
C
49
Com
pute
r Ope
ratin
g Sy
stem
s
•W
hat h
appe
ns w
hen
the
com
pute
r is
first
turn
ed o
n?•
MS-
DO
S–
A st
artu
p pr
ogra
m in
the
BIO
S is
exe
cute
d–
This
pro
gram
in tu
rn a
cces
ses
the
mas
ter b
oot r
ecor
d on
the
flopp
y or
ha
rd d
isk
driv
e–
A lo
ader
then
tran
sfer
s th
e sy
stem
file
s IO
.SYS
and
MSD
OS.
SYS
from
th
e di
sk d
rive
to th
e m
ain
mem
ory
–Fi
nally
, the
com
man
d in
terp
rete
r CO
MM
AND
.CO
M is
load
ed in
to
mem
ory
whi
ch p
uts
the
DO
S pr
ompt
on
the
scre
en th
at g
ives
the
user
ac
cess
to D
OS’
s bu
ilt-in
com
man
ds li
ke D
IR, C
OPY
, VER
.•
The
640
K Ba
rrier
–D
OS
was
des
igne
d to
run
on th
e or
igin
al IB
M P
C–
8088
mic
ropr
oces
sor,
1Mby
tes
of m
ain
mem
ory
–IB
M d
ivid
ed th
is 1
Mb
addr
ess
spac
e in
to s
peci
fic b
lock
s•
640
K of
RAM
(use
r RAM
)•
384
K re
serv
ed fo
r RO
M fu
nctio
ns (c
ontro
l pro
gram
s fo
r the
vid
eosy
stem
, ha
rd d
rive
cont
rolle
r, an
d th
e ba
sic
inpu
t/out
put s
yste
m)
50
Mem
ory
Map
51
MS-
DO
S Fu
nctio
ns a
nd B
IOS
Serv
ices
•Pr
ogra
m S
uppo
rt•
BIO
S:us
ually
sto
red
in R
OM
thes
e ro
utin
es p
rovi
de a
cces
s to
the
hard
war
e of
the
PC•
Acce
ss to
the
BIO
S is
don
e th
roug
h th
e so
ftwar
e in
terru
pt in
stru
ctio
n In
t n•
For e
xam
ple,
the
BIO
S ke
yboa
rd s
ervi
ces
are
acce
ssed
usi
ng th
e in
stru
ctio
n IN
T 16
h•
In a
dditi
on to
BIO
S se
rvic
es D
OS
also
pro
vide
s hi
gher
leve
l fu
nctio
ns–
INT
21h
–M
ore
deta
ils la
ter
