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1 EE105 - Fall 2006 Microelectronic Devices and Circuits Prof. Jan M. Rabaey (jan@eecs) 2 What is this class all about? Introduction to semiconductor devices and integrated circuits. Circuit analysis and design techniques. Time and frequency domain analysis. Modern semiconductor devices (PN juntions, MOSFETs). Integrated passives. Single stage amplifiers. Differential amplifiers. Introduction to feedback. Frequency response of amplifiers. Multistage Amps What will you learn? Understanding, designing, and optimizing analog integrated circuits. Understanding the operation of semiconductor devices.

EE105 - Fall 2006 Microelectronic Devices and Circuitsee105/fa06/lectures/F06-Lecture1...EE105 - Fall 2006 Microelectronic Devices and ... Introduction to semiconductor devices and

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Page 1: EE105 - Fall 2006 Microelectronic Devices and Circuitsee105/fa06/lectures/F06-Lecture1...EE105 - Fall 2006 Microelectronic Devices and ... Introduction to semiconductor devices and

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EE105 - Fall 2006Microelectronic Devices and Circuits

Prof. Jan M. Rabaey (jan@eecs)

2

What is this class all about?

Introduction to semiconductor devices and integrated circuits.– Circuit analysis and design techniques. Time and frequency

domain analysis. Modern semiconductor devices (PN juntions, MOSFETs). Integrated passives. Single stage amplifiers. Differential amplifiers. Introduction to feedback. Frequency response of amplifiers. Multistage Amps

What will you learn?– Understanding, designing, and optimizing analog integrated

circuits. Understanding the operation of semiconductor devices.

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3

Practical InformationInstructor– Prof. Jan M. Rabaey

511 Cory Hall, 666-3102, jan@eecsOffice hours: Tu 3:30-5:30pm

TAs:– Nate Pletcher, pletch@eecs– Gerald (Guoqiang) Wang, weraldw@eecs– Ryan Roberts, [email protected]– TBD

Reader– Chuo Liu, [email protected]

Web page: – http://www-inst.eecs.berkeley.edu/~ee105/fa06/

4

Discussions and Labs (tentative)

Discussion sessions (293 Cory)– M 3-4 pm,

– We 9-10am

– Fr 11am-noon

Same material in all sessions!

Labs (353 Cory)– Tu 9am-noon,

– We 9am-noon

– We 3pm-6pm

– Fr 10am-1pm

Please choose one lab session and stick with it !

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5

Your EECS105 Week

6pm

5pm

4pmOffice Hours

Prof. Rabaey

511 Cory

Lab

353 Cory

Discussion

293 Cory

3pm

Lecture

203 McLaughlin

Lecture

203 McLaughlin

2pm

1pm

12pm

11am

Lab

353 Cory

10am Lab353 Cory

Lab353 Cory

9am

FrThWeTuMo

Discussion293 Cory

Discussion293 Cory

6

Class Organization

~ 10 Assignments

~ 10 Labs

2 midterms, 1 final– Midterm 1: Thursday, September 28, 6:30-8:00 pm

– Midterm 2: Thursday, November 9, 6:30-8:00 pm

– Final: Wednesday December 13, 12:30-3:30 pm

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7

Some Important Announcements

Please use the newsgroup to ask questions (ucb.class.ee105)Labs done in pairs, individual measurements, individual reports

Homework should be done individually

The only way to learn things is to do them yourselves. Don’t even think about cheating!

8

Grading Policy

Homeworks: 15%

Labs: 15%

Midterm-1: 15%

Midterm-2: 15%

Final: 40%

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9

Class Material

Textbook: – “Microelectronics: An Integrated Approach”, by R. Howe, C. Sodini

Class notes: Web page

Lab Reader:– Available on the web page!

– Selected material will be made available from Copy Central

Check web page for the availability of tools

10

The Web Site

Class and lecture notes

Assignments and solutions

Lab manual

Past exams, earlier class web pages

Many other goodies …

The sole source of information

http://www-inst.eecs.berkeley.edu/~ee105/fa06

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11

Software

HSPICE – Industry standard

– Online tutorials

There are free versions of WinSpice and PSPICE that you can use at home

12

Getting Started

Assignment 1: – Assigned next Tuesday, Due 9/12 (Tuesday), 5pm

NO discussion sessions or labs this week.

First discussion sessions in Week 2

First lab in Week 3

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13

EECS 105: Course Overview

Semiconductor physics (1 week)

PN Junction / BJT Physics/Model (1.5 weeks)

MOSFET Physics/Model (1 week)

Integrated Passives (R, C, L) (1 week)

Circuit analysis techniques (2 weeks)

Single Stage Amplifiers (2 weeks)

Feedback and Diff Amps (1 week)

Freq Resp of Single Stage Amps (1 week)

Multistage Amps (2.5 weeks)

Freq Resp of Multistage Amps (1 week)

14

EECS 105 in the Grand Scheme

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15

EECS 105 in the Grand Scheme

Example: Cell Phone

16

The First Integrated Circuits - 1958

R. N. NoyceFairchild Semiconductor

Co-Founder of both Fairchild and Intel(deceased 1990)

“Unitary Circuit” made of Si

Jack KilbyTexas Instruments

Invented IC during his first year at TI

(Nobel Prize 2000)

“Solid Circuit” made of Ge

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17

Intel Pentium 4 Microprocessor

90nm CMOS technology

18

EECS 105: Emphasis in Analog

14-bit analog-to-digital converter– Y. Chiu, IEEE Int’l Solid-State Circuits Conference 2004.

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Transistors are Bricks

Transistors are the building blocks (bricks) of the modern electronic world:

Focus of course:– Understand device physics

– Build analog circuits

– Learn electronic prototyping and measurement

– Learn simulations tools such as SPICE

Analog “Amp”

DigitalGate

MOS Cap

PN Junction

VariableCapacitor

20

SPICE

SPICE = Simulation Program with IC Emphasis

Invented at Berkeley (released in 1972)

.DC: Find the DC operating point of a circuit

.TRAN: Solve the transient response of a circuit (solve a system of generally non-linear ordinary differential equations via adaptive time-step solver)

.AC: Find steady-state response of circuit to a sinusoidal excitation

* Example netlistQ1 1 2 0 npnmodR1 1 3 1kVdd 3 0 3v.tran 1u 100u

SPICESPICE

stimulus netlist response

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21

BSIM

Transistors are complicated. Accurate sim requires 2D or 3D numerical sim (TCAD) to solve coupled PDEs (quantum effects, electromagnetics, etc)

This is slow … a circuit with one transistor will take hours to simulation

How do you simulate large circuits (100s-1000s of transistors)?

Use compact models. In EECS 105 we will derive the so called “level 1” model for a MOSFET.

The BSIM family of models are the industry standard models for circuit simulation of advanced process transistors.

BSIM = Berkeley Short Channel IGFET Model

22

Some of the circuits we will explore

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An Essential Skill: Circuit Analysis

Please review your EE40 knowledge!– Mesh / Nodal analysis

– Equivalent Circuits

– Time versus frequency domain analysis

– Phasors / complex numbers

Some short recap is probably useful(the summer was long …)

24

Basics of Circuit Analysis

Kirchoff’s Current Law (KCL)

Kirchoff’s Voltage Law (KVL)

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Nodal and Mesh Analysis

26

A simplified case – the voltage divider

V2 = ?

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Equivalent Circuits

28

Lecture Outline

Semiconductors

Si Diamond Structure

Bond Model

Intrinsic Carrier Concentration

Doping by Ion Implantation

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Resistivity for a Few Materials

Pure copper, 273K 1.56×10-6 ohm-cm

Pure copper, 373 K 2.24×10-6 ohm-cm

Pure germanium, 273 K 200 ohm-cm

Pure germanium, 500 K .12 ohm-cm

Pure water, 291 K 2.5×107 ohm-cm

Seawater 25 ohm-cm

What gives rise to this enormous range?

Why are some materials semi-conductive?

Why the strong temp dependence?

30

Periodic Table of Elements

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Electronic Properties of Silicon

Silicon is in Group IV (atomic number 14)– Atom electronic structure: 1s22s22p63s23p2

– Crystal electronic structure: 1s22s22p63(sp)4

– Diamond lattice, with 0.235 nm bond length

Very poor conductor at room temperature: why?

(1s)2

(2s)2

(2p)6 (3sp)4

Hybridized State

32

The Diamond Structure

3sp tetrahedral bond

o

A43.5

o

A35.2

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States of an Atom

Quantum Mechanics: The allowed energy levels for an atom are discrete (2 electrons with opposite spin can occupy a state)When atoms are brought into close contact, these energy levels splitIf there are a large number of atoms, the discrete energy levels form a “continuous” band

Ene

rgy

E1

E2

...E3

Forbidden Band Gap

AllowedEnergyLevels

Lattice ConstantAtomic Spacing

34

Energy Band DiagramThe gap between the conduction and valence band determines the conductive properties of the material

Metal– negligible band gap or overlap

Insulator – large band gap, ~ 8 eV

Semiconductor– medium sized gap, ~ 1 eV

Valence Band

Conduction Band

Valence Band

Conduction Band

e-

Electrons can gain energy from lattice (phonon) or photon to become “free”

band gap

e-

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Model for Good Conductor

The atoms are all ionized and a “sea” of electrons can wander about crystal:

The electrons are the “glue” that holds the solid together

Since they are “free”, they respond to applied fields and give rise to conductions

+ + + + + + + +

+ + + + + + + +

+ + + + + + + +

On time scale of electrons, lattice looks stationary…

36

Bond Model for Silicon (T=0K)Silicon Ion (+4 q)

Four Valence ElectronsContributed by each ion (-4 q)

2 electrons in each bond

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Bond Model for Silicon (T>0K)

Some bond are broken: free electron

Leave behind a positive ion or trap (a hole)

+

-

38

Holes

Notice that the vacancy (hole) left behind can be filled by a neighboring electron

It looks like there is a positive charge traveling around!

Treat holes as legitimate particles.

+-

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More About Holes

When a conduction band electron encounters a hole, the process is called recombinationThe electron and hole annihilate one another thus depleting the supply of carriers

In thermal equilibrium, a generation process counterbalances to produce a steady stream of carriers

40

Thermal Equilibrium (Pure Si)

Balance between generation and recombination determines no = po

Strong function of temperature: T = 300 oK

optth GTGG += )(

)( pnkR ×=

RG =)()( TGpnk th=×

)(/)( 2 TnkTGpn ith ==×

K300atcm10)( 310 −≅Tni

Mass-action law

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Doping with Group V Elements

P, As (group 5): extra bonding electron … lost to crystal at room temperature

+

ImmobileCharge

Left Behind

42

Donor Accounting

Each ionized donor will contribute an extra “free”electronThe material is charge neutral, so the total charge concentration must sum to zero:

By Mass-Action Law:

000 =++−= dqNqpqnρ

Free Electrons

Free Holes

Ions(Immobile)

)(2 Tnpn i=×

00

2

0 =++− di qN

n

nqqn

0022

0 =++− nqNqnqn di

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Donor Accounting (cont)

Solve quadratic:

Only positive root is physically valid:

For most practical situations:

2

4

0

22

0

20

20

idd

id

nNNn

nnNn

+±=

=−−

2

4 22

0idd nNN

n++

=

id nN >>

ddd

idd

NNNN

nNN

n =+≈⎟⎠⎞

⎜⎝⎛++

=222

412

0

44

Doping with Group III ElementsBoron: 3 bonding electrons one bond is unsaturatedOnly free hole … negative ion is immobile!

- +

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Mass Action Law

Balance between generation and recombination:

2ioo nnp =⋅

• N-type case:

• P-type case:

)cm10,K300( 310 −== inT

dd NNn ≅= +0

aa NNp ≅= −0

d

i

N

np

2

0 ≅

a

i

N

nn

2

0 ≅

46

Compensation

Dope with both donors and acceptors: – Create free electron and hole!

+

-

-

+

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Compensation (cont.)

More donors than acceptors: Nd > Na

iado nNNn >>−=ad

o NN

np i

−=

2

idao nNNp >>−=da

o NN

nn i

−=

2

More acceptors than donors: Na > Nd