Electrical operational interlocks for a fossil-fired

power station auxiliary systemD. Lidgate, B.Eng., PhD., D. Acock, B.Sc, B.M.N.Khalid, B.Eng., M.Sc, and

F. Psomadellis, M.Sc.

Indexing terms: Power systems, Circuit breakers, Microprocessors

Abstract: The paper reviews the derivation of interlock logic and the resultant interlock circuits for conven-tional double-busbar substations. Some of the assumptions made in deriving this logic are then shown to beinvalid for highly complex circuits, complicated by the presence of generators and large induction motors,such as may be found in a power-station auxiliary system. A method of interlocking such a system so that itsfault levels are always within the capacity of the circuit breakers is then proposed. This method, based on asemi-empirical approach to fault level computation, relies on a microprocessor to compute fault levels for allbusbars on the system. Operation of a switch is then only permitted if no rated fault level would be exceededas a result. The application of this technique to the Drax coal-fired power station is then given as an exampleand shown to be both sufficiently fast and accurate to be used as an online interlocking device.

1 Introduction

An electrical operational interlock is, when applied to high-voltage switching stations, circuitry which will prevent theinadvertent connection of hazardous switch configurationsduring normal operation of the station. For conventionaldouble-busbar stations, such as that shown in Fig. 1, theelectrical operational interlocks are required to preventcircuit connection or interruption by an isolator, onloadoperation being permitted only if there is a parallel circuit.The interlocking is normally accomplished by linking variouscombinations of the auxiliary contacts (low voltage contactsdriven by the main operating shafts) of the isolators andcircuit breakers to each isolator operating mechanism.Operation of each isolator is then only permitted when asafe situation will result. Thus, for the busbar isolator XI04shown in Fig. 1, operation is only permitted if either theno-power-flow circuit shown in Fig. 2a or the parallel-path-check circuit shown in Fig. 2b is completed by the correctsequence of auxiliary contacts.1

Several methods have been proposed for the derivationof the interlock logic on which the circuits shown in Fig. 2are based,2'3'4 and, for conventional substations, thedesign of these interlocks has been proved in practice manytimes. Inherent in all these applications, however, are the

main busbar 1400 kV busbar

X124 X120 X126 ma in busbar 2

X168 X169

X106 /XlO4/X136/X13yX2CfyX2Oy

XX)5 X

1X103

(13A/X

J i^X

I

(

busbar 2

X116 /X114

X13OX2O5 X

X203

X216/X2V

X110x.

X113

X210XI

X213

Fig. 1 Circuit diagram of double-busbar sub station

Paper 808C, first received 26th October 1979 and in revised form6th May 1980Dr. Lidgate, Mr. Khalid and Mr. Psomadellis are with the Departmentof Electrical Engineering & Electronics, University of ManchesterInstitute of Science and Technology, Manchester M60 1QD,England, and Mr. Acock is with the Central Electricity GeneratingBoard, Generation Development & Construction Division, Barnwood,Gloucester GL4 7RS, England

IEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

assumptions that isolators have no fault (or load) interrup-tion capability, and that the fault level (or short-circuitcapacity5) of the switching station will not vary greatlywith system configurati6n. Conversely, it could be assumedthat the circuit breakers are sufficiently dimensioned tocater for any configuration.

There are several situations where these assumptions areno longer valid, one of the commonest being when theswitchgear forms part of the 11 kV auxiliary system of alarge fossil-fired power station. A typical example of such asystem is shown in Fig. 3. For this system, the fault levelsof all the busbars are strongly dependent on system con-figuration, and are further complicated by the presence ofgenerators and large induction motors. Although the

X105

X106 X10A

X103 X10A X106

X130

X)06| I X136| X2O6J XII61 X216IX168 X169

F ig. 2 Electrical interlock circuitsa No-power-flow circuitb Parallel-path-check circuit

317

0143- 7046/80/0531 7+07 $01-50/0

400 kV and 132 kV circuit-breakers are capable of inter-rupting the maximum possible fault level, it would beuneconomical to provide 11 kV and 3-3 kV circuit-breakerswith equivalent capabilities. Consequently, electrical opera-tional interlocks are required to restrict the system faultlevels to the capacity of the respective circuit-breakers. Tomaintain maximum operational flexibility of such a station,it is clear that an interlocking scheme must incorporatesome arithmetic capability to compute the fault level forthe system configuration required before permitting opera-tion. Unfortunately, the provision of a digital computerlarge enough to carry out online fault level studies for asystem as complex as that shown in Fig. 3 would also beuneconomical. However, the obvious alternative to this, amicroprocessor, has very limited direct arithmetic capabili-

ties. In this application, to achieve a sufficiently rapidcomputation time, these are assumed to be only logicoperations and simple addition.

This paper, therefore, proposes an interlocking schemebased on fault level computation but which is within thecapabilities of a microprocessor. The scheme retainsmaximum operational flexibility and incorporates faultlevel contributions from all generators in the station, fromthe supply network, and from induction motors at both11 kVand3-3kV.

2 Auxiliary system design

The power station diagram shown in Fig. 3 is, in fact, thatof Drax power station in Yorkshire as it will be when units

33kV

ID 9 11kV

3 3kV

Fig. 3 Drax power station circuit diagramSB = station boardsUB = unit boardsST = station transformersMG = main generatorsGT = gas turbines

M_3_JP Mix MLlT30 29 28

Fig. 4 IPSA circuit diagram

318

4, 5 and 6 are completed in 1984, and is the system forwhich this study was initiated. The power station consistsof six 660 MW generators, the output of each being fed tothe 400 kV supply network via a 23-5/400 kV transformer.During normal operation, the auxiliary motors necessaryfor the operation of each unit, which since this is a coal-fired power station, drive coal mills, pumps and fans etc.,are supplied from the main generator via the 23-5/11 kVunit transformer. The 11 kV auxiliary motors are connecteddirectly to each unit board whereas the 3-3 kV motors areconnected to two 3-3 kV unit boards, each of which issupplied by an 11/3-3 kV transformer. When starting, orwhen maximum power is required from the station, eachunit board can be supplied directly by a 35 MW gas-turbinepowered generator synchronised to the supply network viathe unit transformer. For normal starting, however,auxiliary supplies are obtained from one of the stationtransformers and the appropriate interconnection of the11 kV station boards. The station boards also supplypower necessary for the operation of the station, such aslighting, coal conveyors, and compressors etc. The majority

IEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

of these motors are at 3-3 kV and are supplied from stationboards 1 A and 2 A via 11/3-3 kV transformers.

The existing interlocks for units 1, 2 and 3 are of theconventional electromechanical type and are based on thefact that during normal operation no more than two powersources need be connected to a unit board. By ensuringthat the 11 kV switchgear is capable of handling thesesources, and their associated motors, a satisfactory interlockcan be achieved by only permitting two of the respectivecircuit breakers, shown on each unit board in Fig. 3, to beclosed simultaneously. Although this always results in asafe operating situation, it does, however, limit operationalflexibility.

3 Fault level study

Before attempting to develop an interlocking scheme basedon fault levels, it is clearly necessary to study the behaviourof the system under various operating conditions. To dothis, the IPSA (Interactive Power System Analysis) suite ofcomputer programs developed at UMIST6 was used on aCyber 72 computer system. This enabled the fault levels ofall busbars on the system to be calculated rapidly and, moreimportantly, enabled the system configuration to be alteredand fault levels recalculated very quickly.

As is normal for studies of this type, a three-phase shortcircuit was the fault condition selected.5 The other maindecision to be made at the outset of the fault study waswhether to select the make or break circuit breaker duty.Clearly, since no interlocks would be permitted for thebreak duty, as otherwise automatic operation under faultconditions could be impaired, the break fault level mustalways be within the capacity of the circuit breakers. There-fore, before any circuits breaker is closed, the resultantbreak fault level for all other closed circuit-breakers mustbe checked. However, it is quite possible for a circuit-breaker to be required to close onto a fault. Under thesecircumstances the presence of generators increases the faultlevel because of their lower subtransient reactances, and thepresence of motors provides an extra fault infeed. (In thecase of motors, their contribution after the 50-100 msrequired to trip a circuit-breaker can normally beneglected.)7

Therefore, although in this station the 11 kV circuit-breakers have a higher make than break capability, it is themake duty which is most important. As will be discussedlater, the break duty is important but only under certainsystem configurations.

The system actually studied with the aid of IPSA is shownin Fig. 4. As can be seen, motors have been neglected at thisstage since the particular program used permitted onlyfourteen fault sources to-be incorporated. To calculate thefault level of each busbar on this system, the programrequired all line and transformer impedances, externalsystem fault level, generator transient and subtransientreactances, and rated voltages and MVA. It will be notedthat no 3-3 kV connections were considered. These couldbe ignored because:

(a) Although it is possible to connect the 11 kV stationboards 1A and 2A via the 33 kV network shown in Fig. 3,this is not a required operating condition. Therefore, asimple two out of three interlock on the interconnectingcircuit breakers using conventional techniques will preventthis without loss of operational flexibility,

(b) The two 3-3 kV unit auxiliary boards supplied byIEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

each 11 kV unit board may be interconnected thus parallel-ing the two 11/3-3 kV transformers. In this case, the 3-3kV fault level would be exceeded for the maximum faultlevel at 11 kV. Again this may be prevented without loss ofoperational flexibility by conventional means.

Thus, the 3-3 kV, and lower, voltage networks may beneglected in the fault study apart, of course, from theirmotor contributions. Since there is an almost infinitenumber of possible system interconnections, it would havebeen unrealistic to attempt to calculate fault levels for all ofthese. The study therefore concentrated on determininggross parameters from which the interlock constraints couldbe deduced. The main results of this study were:

(i) The fault level limits for the 400 kV and 132 kVsystems (35 000 MVA and 3500 MVA, respectively)cannot be exceeded for any system configuration.Variations in the 400 kV fault level have a negli-gible effect on the 11 kV fault level, regardless ofsystem configuration.

(ii) The 11 kV system fault level depends on the 400/132/11 kV interconnections and on the con-figuration of the auxiliary system.

(iii) The three main contributors to the 11 kV systemfault levels are the main generators, gas-turbinegenerators, and 132/11 kV station transformers.Only two of these sources may be connected tothe same 11 kV point without exceeding the ratedfault level at that point.

(iv) The main generators and gas-turbine generatorscontribute a constant fault level to the 11 kVsystem but the station transformer contribution isstrongly dependent on both 400/132 kV and132/11 kV transformer interconnections.

(v) Fault level contributions from one 11 kV board toanother via two 132/11 kV transformers in seriesare negligible.

(vi) A form of superposition computation may be usedto compute net fault levels at any 11 kV board.

This last result is particularly useful. Consider unit boards5 and 6 as shown in Fig. 4. If unit 6 is operating indepen-dently of the station auxiliary system, then it contributes378 MVA via its unit transformer to the fault level of unitboard 6. Gas turbine 6 contributes 292 MVA to unit board6 and, therefore, by superposition, the total fault level ofunit board 6 is 378 + 292 = 670 MVA which agrees withthe correct solution obtained by using Thevenin'stheorem.5 If unit board 6 is now connected to unit board 5via two station boards, the total fault level at each board isthe sum of all the independent fault sources. Although thisis a particularly simple example, the basic principle holdsfor most configurations of the system.

Motor contributions may also be included in this simpleapproach since each motor also contributes a constant faultlevel to the 11 kV system. These fault levels are obtainedfrom the rated kVA of each motor simply by multiplyingby a constant.8'9 Therefore, an interlocking scheme withlimited arithmetic capabilities would be feasible, providedthat a means of simplifying the four 132/11 kV stationtransformers fault contributions could be found. In fact,this is comparatively simple since there are a very limitednumber of 400/132 kV and 132/11 kV transformer inter-connections which do not in themselves exceed the 11 kVfault level limit. Thus, a simple table stored in the interlocksystem memory would provide the fault level contributionfor each transformer configuration.

319

4 Proposed interlocking scheme

It was shown in Section 3 that the 3-3 kV network could beinterlocked by conventional means, whereas the 132 kVand 400 kV network fault levels are always within thecapacity of their circuit breakers. The few isolators shownin Fig. 3 can, of course, be interlocked by no-power-flowcircuits of the type shown in Fig. 2a. Therefore, for thisauxiliary system, an interlocking scheme is required onlyfor the 11 kV network. Since no interlocks are permittedfor the break duty, the prevention of hazardous switchconfigurations can only be accomplished by examiningthe effect on system fault levels of a particular switchclosure (in this particular application, circuit-breakerclosure) before that closure.

Therefore, the aim of the interlocking scheme proposedhere is to calculate, before an operation, the resultant faultlevels for all 11 kV busbars in the system and then prohibitoperation if the rated fault level, make or break, would beexceeded. The method of accomplishing this has beendesigned to be within the capacity of an 8-bit micropro-cessor such as the Intel 8080A or Motorola 6800.

To determine the configuration of the auxiliary system,the microprocessor requires as its state inputs the state ofthe relevant circuit breakers and isolators on the auxiliarysystem. These would be supplied by an auxiliary contact oneach switch in a similar manner to conventional interlocks.To identify the switch to be operated, the microprocessorrequires operate inputs for each switch. These would besupplied by the discrepancy diagram in the power-stationcontrol room or from the local control on the switch itself.Finally, the operate outputs of the interlocking schemewould be command signals to the control mechanism ofeach switch which would only be initiated if the interlockconstraints were satisfied. It should be noted that theproposed interlocking scheme is a true interlock that is, itactually prevents operation if a potentially hazardoussituation would result and does not act in a purely advisorycapacity.

To enable the microprocessor to perform interlockingduties, the input data required are the constant motorand generator fault contributions and the table of stationtransformer fault contributions. The computation of faultlevels can then be accomplished by the interlock programswhich are described in Section 5. Basically, the micro-processor uses logic functions to determine the systemconfiguration, and then sums the effect of all fault sourceson every 11 kV busbar. A comparison of each fault levelwith the rated fault level then determines whether theoperation should be permitted or not.

5 Interlock programs

The interlock programs have been divided into three sectionsto facilitate programming and prevent unnecessary compu-tation. The first section is a purely advisory routine one ofwhose most important functions is to ensure that a faultlevel computation is actually required. If for example, itis required to close the circuit breaker at one end of a linewhen that at the other end is still open, this would beimmediately permitted. Otherwise, the program wouldproceed to the second section which is the first of theactual interlocks.

This program, known as Lock 1, is based on the sameprinciple as the existing conventional interlocks, namely,that only two main fault sources may be connected to the

same 11 kV point regardless of any motor contributions orsystem interconnections. Thus the program initiallyconsiders the six station boards, IB, 1C, ID, 2B, 2C and 2Dwhich may be directly connected to a unit board. If theunit board is not connected, determined, of course, fromthe state inputs, that station board is ignored and the nextconsidered. If it is connected, the program counts thenumber of main fault sources (main generators or gasturbines) connected to it. The four station boards whichmay be directly connected to a 132/11 kV station trans-former, 1A, 1C, 2A and 2C are then considered and thenumber of fault sources connected to each increased by oneif the respective station transformer is in service. Some ofthe station boards, for example, 3A and 4A will have nofault sources assigned to them at this stage because they arenot in either of the categories examined. The effect of thestation board interconnections must now be included todetermine the actual number of fault sources connected toeach station board. This is performed by means of a tracesubroutine.10 Consider, for example, station board 1C asshown in Fig. 4. If main generator 2, station transformerIB, and line 23 are all connected then the number of faultsources connected to 1C is 2. This number of fault sourceswill be added to those assigned to ID if

L(12) or L(6) and L(13) and L(7) = 1

which is more normally written as

L(12) + L(6) .L(13) .L(7)=1

(1)

(2)

where L(12) = 1 means that line 12, Fig. 4 is in service. Inthis particular case this means that the circuit breakerconnecting 1C to ID is closed. 1C will also have ID's initialnumber added to its own if eqn. 2 is satisfied, and similarequations sum the effect of 1C on all other station boardsand their effect on 1C.

Lock 1 then operates if any station board is found tohave more than two main fault sources connected to it.Under these circumstances, no more checking is performedand operation is blocked. The main advantage that thismethod of interlocking gives over the conventional method,even at this stage, is that any two main fault sources, notonly an adjacent pair, are permitted to be connected. Ofcourse, it is possible for this interlock not to be violatedbut for system fault levels to be exceeded. This can only beovercome by calculating actual fault levels and incorporatinginduction motor contributions.

This is achieved by the third section of the program, thesecond of the actual interlocks, which is known as Lock 2,and which initially functions in a very similar way toLock 1. It examines station boards IB, 1C, ID, 2B,2C and2D as before, but instead of counting fault sources it nowsums actual fault levels knowing that a main generatorcontributes 378 MVA to the 11 kV system and a gasturbine 292 MVA. By determining the configuration ofthe 400/132 kV system and the states of the station trans-formers, the table (which has approximately 150 entries) orstation transformers fault contributions stored in the micro-processor provides the extra fault-level contributions to bethen added to station boards 1A, 1C, 2A and 2C. The tracesubroutine is then called again and sums the effect of allthese fault sources on the entire 11 kV network usingexactly the same equations as before. Although no fault

320 IEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

levels should be exceeded at this point, operation is againblocked if any are.

The induction motor contributions must now be incor-porated to obtain the final system fault levels. Using thesimple approach to calculate individual fault infeeds out-lined in Section 3, the motor fault-level contribution ateach 11 kV board (from directly connected 11 kV and3-3 kV motors) is summed using the data stored in themicroprocessor. These levels are then summed for thewhole 11 kV network using, again, the tracing subroutineand when added to those already calculated, give the finalfault level. If no 11 kV fault level exceeds the rated faultlevel (900 MVA), then the operation is permitted. If,however, the circuit breaker selected for closure is not at11 kV or below, a further check must be made beforeoperation can take place.

It was shown in Section 3 that the operation of a 400 kVor 132kV circuit breaker can strongly affect the make faultlevel at 11 kV. This, however, is irrelevant to an 11 kV circuitbreaker which is already closed. In these circumstancesit is the resultant break fault level which must beconsidered. To do this, the interlock program, havingcompleted Lock 2 immediately repeats Lock 2 but uses thedata for the generators corresponding to transient insteadof subtransient reactances and omits the motor contribu-tions. The calculated fault levels are then compared withthe rated fault level (750 MVA) before operation takesplace. (Since it is not required to combine the interlocks ofthe 400 kV and 11 kV networks, a break fault level beingexceeded would merely sound an alarm.

The major advantage that this method of interlockinghas over any conventional hardwired scheme is the easewith which the interlock programs may be modified atcomparatively low cost, to cater for system changes oralterations in operating procedure. As a simple exampleconsider the gas turbine powered generators. As can beseen from Fig. 3 all six could, if none of the maingenerators were in service, transmit their power to thesupply network via the four station transformers. However,Lock 1 prevents this even though there are configurationsto do so in which no rated fault levels are exceeded. There-fore, a simple check facility in the advisory routine todetermine this condition would enable Lock 1 to bebypassed. Lock 2 would then calculate the actual faultlevels as usual, and operation permitted if safe.

A block diagram of the entire set of interlock programsis given in Fig. 5.

6 Validation of the interlocking scheme

It would have been uneconomical, especially when con-sidering the time available for this project, to construct amicroprocessor system coupled to a mimic of the auxiliarysystem to prove the proposed interlocking scheme. Unlikeprevious complex interlocking schemes,4 the logic useddoes not require sophisticated validation techniques, sincethe number of interconnections is restricted. The importantpoints to validate are that the scheme can be programmed,that computation times are acceptable for online operation,and that the accuracy of the predicted fault levels comparewell with a normal fault study.

A simulation program, therefore, was written in FortranIV for use on a CDC 7600 computer, but using only thosefacilities assumed to be available on a microprocessor.Apart from convenience, this had the advantage of allowing

IEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

microprocessor computation times to be more easily esti-mated, and of course, subsequent programming of themicroprocessor to be less complex. The simulation programfollowed broadly the block diagram shown in Fig. 5, andrequired the same permanent data as outlined in Section 4.The only other concessions made were that individualswitches were not considered, only line states were supplied,and that the lines states were those after the desiredoperation had taken place and represent, therefore, thesystem configuration that the interlock system shouldexamine before allowing operation.

Using this program, a representative number of testswere carried out with the system in a normal operatingcondition but including some rather unusual configurations.The accuracy of the predicted fault levels was found to bevery good with errors ranging from less than 1 MVA for asimple condition to 20 MVA for a more complex condition.Consideration of the equivalent circuit of the system showsthat errors will increase with the complexity of intercon-nection since there are then more alternative fault pathswhich are effectively neglected by the interlock program.Nevertheless, the accuracy of this system is considered tobe adequate for interlocking purposes as, in any case, togive a margin of safety, the most pessimistic tolerance intransformer reactance allowed by the appropriate BritishStandard11 has been assumed.

The actual Fortran program, including the trace sub-routine but considering only the make duty, required some600 statements and took 30 ms to execute. Adding thebreak duty to this lengthens the program very slightly,since the main change is to the data used, but extends theexecution time to some 50 ms. Because of the way theinterlock programs were written it is believed that an 8-bitmicroprocessor program would require about 3000 to 5000statements. Thus, even incorporating both make and breakduties, the execution time online should be of the order of10 ms which is well within accepted limits for onlineoperation.

7 Conclusions

An interlocking scheme suitable for the 11 kV auxiliarysystem of a large fossil-fired power station has been pro-posed in this paper. This scheme is considerably moreflexible than a conventional electromechanical scheme inthis application, allowing some desirable configurationswhich would otherwise be impossible, but still preventingall potentially hazardous situations. The scheme essentiallyuses a semi-empirical method of fault-level calculationwhich reduces the mathematical requirements of a conven-tional fault study5 to those directly available on a micro-processor. By comparing calculated fault levels with ratedfault capacity, the microprocessor can also perform itsinterlocking function more accurately than conventionalelectromechanical schemes. It is believed that the use ofa microprocessor can be justified in this application for theincreased flexibility alone and also that it may be justifiedeconomically.

One of the main disadvantages of any interlockingscheme so far applied is the limited amount of informationavailable during or after an operation. Normally, in fact,this may only be a Go/No-Go signal. A microprocessorinterlocking scheme, however, can indicate the fault levelsof each busbar on the system before an operation, after aproposed operation and any busbar whose fault-level limit(s)

321

would be exceeded. Since this is a true interlocking devicethis latter operation would, of course, be prevented. Theincreased information provided, however, enables correctiveaction to be taken, for example, the disconnection of non-essential motors to reduce the fault level, so that a desiredoperation may be made.

During normal operation, of the station, switching dutiesare undertaken fairly infrequently and thus the micropro-cessor would be idle for considerable periods. This time canbe used for repeated cycling of the interlock program, each

open switch being closed in turn (a simulated closure) andthen reopened to indicate the next switch to exceed ratedlimits. Thus, the system operator in addition to the existingfault levels would also have a display of all the switcheswhich, if closed, would cause a rated fault level to beexceeded.

The validation of the interlocking program has shownthat the online computation time and the accuracy of thecalculated fault levels are both acceptable for interlockingpurposes. Although this method has been illustrated for the

initiate

identify switch

1I call advisory routine |

read moke-fault parameters |

read break -faultparameters

Yes are allmam units out

of service?

replace fault sourcesby fault levels

sum main fault sourcesconnected to IB, 1C. 1D.2B. 2C.2D

add station transformercontribution to 1A 2A 1C 2C

call trace

call lock IJNo

number of faultsou rces > 2 ?

Yes sum motorcontributions to

likV boards

Yes

Yes

blockoperation

No

doesfault level

exceed ratedlevel?

Yes

[permit operation |

F ig. 5 Flo w chart of in terlock programs

322 IEEPROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980

specific example of the Drax power station auxiliarysystem, it is believed that the basic principles are applicableto any such system. Research is now continuing so that theamount of study required before implementation of thismethod may be reduced and, hence, more easily applied toother systems.

The programming of a microprocessor to perform theinterlock function is not expected to provide any unsur-mountable problems a similar exercise having already beensatisfactorily completed.12 The construction of an actualmicroprocessor system is now proceeding with a view toinstallation in the power station in 1981 for evaluation.

8 Acknowledgments

The authors wish to thank the University of ManchesterInstitute of Science and Technology and the CentralElectricity Generating Board, Station Design Department,Barnwood, Gloucester, for the use of their facilities and forpermission to present this paper. In particular they wish tothank A. Brameller (UMIST), Mr. W. Homer, and R. Stout(CEGB) and P.W. Aitchison of the Department of AppliedMathematics, University of Manitoba, Canada, for theiradvice and assistance during this project. B.M.N. Khalidwould like to thank the University of Malaysia, KualaLumpur, Malaysia, for his financial support during thecourse of this project.

9 References

1 CEGB Standard 993320: 'Electrical and mechanical interlockingfor 400 kV double busbar substations with adjacent 275 kV and132 kV substations'

2 CORY, B.J.: 'An approach by means of mathematical logic tothe switching of power system networks', Proc. IEE, 1963 110(1), pp. 185-196

3 HUTCHINSON, G.P.: 'Interlocking in large electricity supplysubstations', ibid, 1966, 113, (6), pp.1063-1074

4 LIDGATE, D., AITCHISON, P.W., and ACOCK, D.: 'Electricalinterlock design for complex high-power switching networks,ibid., 1979, 126, (2), pp. 152-158

5 ELGERD, O.I.: 'Electrical energy systems theory', (McGraw-Hill, 1971)

6 LYNCH, C.A., and EFTHYMIADIS, A.E.: 'Network graphicsbased interactive power system analysis'. Proceedings of theIEEE winter meeting, New York, Paper 79-047

7 COOPER, C.B., MACLEAN, D.M., and WILLIAMS, K.G.:'Application of test results to the calculation of short-circuitlevels in large industrial systems with concentrated induction-motor loads', iVoc./£•£", 1969, 116,(11), pp.1900-1906

8 BS4999: 'General requirements for rotating electrical machines'9 Electricity Supply Industry Standard 44-3, 1975

10 KHALID, B.M.N.: 'An interlocking scheme for a thermal powerstation auxiliary system using a digital computer', M.Sc. disserta-tion, University of Manchester Institute of Science and Tech-nology, 1978

11 BS171: 'Power transformers'12 LIDGATE, D., and PSOMADELLIS, F.: The application of a

microprocessor to complex electrical interlocks', Presented atthe IF AC Symposium on Computer Applications in. Large-ScalePower Systems, New Delhi, India, 1979

D.Acock is the Electrical System Designand Co-ordination Engineer with theGeneration Development and Con-struction Division of the CEGB atGloucester. He was a student apprenticewith GEC Engineering Ltd. at Wittonand obtained a B.Sc. in electricalengineering at the University of Astonin Birmingham. In 1964 he joined theCEGB at Midlands Project Group andbecame involved in power station

design and construction work, particularly in connectionwith Drakelow 'C and Didcot Power Stations. On theformation of GDCD, he joined the Electrical Branch ofStation Design Department and was appointed to his presentposition in 1978, responsible for the design of electricaldistribution systems for power stations under constructionby the Division.

D. Lidgate is a lecturer in electricalpower systems in the Department ofElectrical Engineering & Electronics atthe University of Manchester Instituteof Science and Technology.

He was a student apprentice withA.Reyrolle & Co. Ltd., and obtaineda B.Eng. with 1st class Honours inelectrical engineering at the Universityof Liverpool in 1968. After a graduateapprenticeship, he was appointed to

the position of research engineer in Reyrolle's SwitchgearResearch Department in 1970, and was responsible forbasic research into arc phenomena in gas blast circuit-breakers. He was awarded a Ph.D. by the University ofLiverpool in 1974, for research into high current arcs inorifice air-flows.

He was appointed to his present position in 1975 andlectures on power system operation, protection and engin-eering management. He is an associate member of the IEE.

F.Psomadellis is a postgraduate studentin the Department of ElectricalEngineering & Electronics at the Uni-versity of Manchester Institute ofScience and Technology, studying fora Ph.D. He graduated in electricalengineering from the National Tech-nical University of Athens, Greece, .in1977. He then obtained an M.Sc. incontrol engineering from the ControlSystem Centre at UMIST in 1979.

His research work at UMIST has been mainly into theapplication of microprocessors in power station environ-ments, particularly for switchgear interlocking. His presentwork concerns fault studies for complex networks using amicroprocessor as an interlocking device.

IEE PROC, Vol. 127, Pt. C, No. 5, SEPTEMBER 1980 323