Electroless Nickel Plating of Printed Wiring Boards For Solderability and Uire Bonding

David E. Crotty, Ph.D. Joseph Greene 011 ied Kel ite

Division of Uitco Corporation 29111 Milford Road

New Hudson, MI 48165

Tonya Jackson Lexaark International, Inc.

740 New Circle Road Lexington, KY 40511

Introduction

The copper traces of printed wiring boards and several electroplated coatings (1) are easily soldered by conventional asseably and solder flow techniques. However, applications that require wire bonding require gold or electroless nickel/boron (2,3,4) for a reliable bonding to take place. Gold cannot be plated directly on copper due to the tendency of the tuo metals to alloy, so some undercoating is required. Those appl icat ions where corrosion protection is required definitely need a substantial undercoat. Electroless nickel/phosphorus is often chosen as the undercoat that provides corrosion protection as well as a barrier coating for gold.

Wire bonding, long an internal construction method for devices, has become more important for certain chip on board and surface mount applications ( 5 ) . Harman ( 6 ) has provided a discussion of the test methods and failure d e s of the full range of uire bonding techniques. electroplated sul famate nickel or electroless plated nickel/boron as a base for bonding of aluminua wire is considered to be more reliable for aluminum wire bonding than aluminum-silver and aluarinua-gold bonding. However, in- house studies of the reliability of the aluminum-nickel bond have not been published by the device manufacturers.

The use of

CIctivation of the copper for electroless plating can be accomplished in several ways, including the use of palladium (7,8) or an electroless nickellboron strike <2,3). some t i e . populated and the traces become thinner and closer together several characteristics of the boards become important enough to make re l iable act i vat ion d i f f icul t .

Both methods have been used successfully for However, as the printed wiring boards become more densely

The popular epoxy-fiberglass boards are porous and trap 5-11 a”ts of treatment chemicals. photoresist and excess copper is removed by the copper etch, even

Metallic copper remains on the board after the

995

The Proceedings ob i he 79th AESF Annual Technical Conference SUWFI'NB w=z S M N

k

- -~ ~

Junrr 22SE-Z51 1s-ll Atlanta, Georgia

The American Electroplaters and Surface Finishers Society, Inc. (AESF) is an international, individual- membership, professional, technical and educational society for the advancement of electroplating and surface finishing. AESF fosters this advancement through a broad research program and comprehensive educational programs, which benefit its members and all persons involved in this widely diversified industry, as well as govemment agencies and the general public. AESF dissemi- nates technical and practical information through its monthly joumai, Plating and Surface finishing, and through reports and other publications, meetings, symposia and conferences. Membership in AESF is open to all surface finishing professionals as well as to those who provide services, supplies, equipment, and support to the industry.

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though the copper is not visible to the optical or scanning electron microscopes. In addition, thin foil5 of copper may sometimes remain attached to the traces due to poor copper etching. All of these characteristics make it difficult to activate the copper traces without causing bridging between close circuit traces. Also, as the traces become smaller in surface area it becomes more likely that a few copper pads may be driven anodic and these few do not plate.

The chip on board (COB) method of electronic packaging eliminates a level of packaging by mounting a chip directly on the circuit board. One of the present options for metallurgy is electroplated gold over electroplated nickel. technology cost prohibitive. 4 more economical system employs a thin immersion gold over electroless nickel/phosphorus. plating systems have been explored. nickel/boron over nickel/phosphorus as well as single layer nickel/boron will be discussed.

The electroless nickel plating metallurgy consists of approximately 200 microinches of electroless nickel/phosphorus (10-12X by weight) followed by approximately 75 microinches of nickel/boron (0.1-0.5X by weight) plated on the copper of the standard epoxy-fiberglass circuit boards after activation. For the COB application, reliable wire bonding and acceptable solderability of the electroless nickel layer is important.

This paper will discuss some of the requirements for successful activation and plating of printed wiring boards and the results of reliability testing of wirebonding and soldering of the resulting surfaces.

Printed Wirina Boards_

This is an expensive metallurgical system which w w l d make the COB

More cost-effective An examination of electroless

Host of the boards used in the printed wiring board industry are the epoxy- fiberglass type. The surface of these boards tends to be more porous, Figure 1, than other types like the polyimide (PI) or polyetherimide (PEI) type boards. While the Pi and PEI boards may be preferred for this reason, they are much more expensive. The methods described here are required for the epoxy-fiberglass boards but processing is somewhat simpler for the less porous; substrates.

The copper traces are usually sheet copper that is bonded to the board or "through hole" plated copper. well to activation and plating.

Both of these copper surfaces lend themselves

Several types of solder masks are used and only a few of these are able to withstand the chemistry of pretreatment and plating. Three commonly used solder masks are the epoxy, acrylic and screened types. Solder masks are applied to the board after the copper etch steps as a film or as a liquid coating, and then oven cured. in all areas except over copper traces that are to be soldered. With the other methods the excess mask is removed by a photographic-like development

The screening method places the solder mask

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process that uses e i ther a solvent based or aqueous developer. various methods the masks that are epoxy or acry l ic and that are solvent-. developed tend t o be the most re l iab le . f r o m the board or otheruise degraded by the chemistry or heat o f the processing.

Of these

The other types tend t o be l i f t e d

Act ivat ion o f Copper

Copper and i t s a l l oys are not ca ta l y t i c to most electroless n icke l processes, thus some form o f act ivat ion i s required t o s t a r t the p la t i ng process. A f te r the ac t iva t ion the electroless n icke l i s autocatalytic, continuing t o form the deposit t o the desired thickness. Sometimes the copper surface can be act ivated galvanical ly by touching the surface uith another metal that i s cata ly t ic , l i k e a n icke l or steel wire. This method i s impractical for p r in ted wi r ing boards due t o the numerous separate pads and traces.

D i l u te so lut ions o f palladium chlor ide have been used (7,B) u i t h some success over the years t o act ivate copper and t h i s i s the most common method o f ac t i va t ing plast ics. Careful control i s required t o avoid absorption of the palladium i n t o the poros i ty o f the nonconductor areas o f the wir ing board since the e lect ro less process w i l l ac t ivate wherever palladium i s present . Some elect ro less nickel/boron processes are catalyzed by copper and i t s alloys, a t least uhen the p la t i ng baths are fresh. A feu nickel/boron processes have been developed that are catalyzed by copper over the l i f e o f the bath.

The chemistry o f boron reduced electroless n icke l processes has been discussed i n de ta i l over the years (9-18) for processes that use borohydride or amine borane as the reducing agents. The most successful processes have used amine boranes. The deposits prepared can range i n boron content from 0.1-0.5% by weigh (12), t o 2-5% by weight (17,191. The higher boron conten t a l l oys are most useful for t he i r high hardness characteristics, while the Lover content a l l oys are of ten used for t h e i r so lderab i l i t y characteristics. tend t o be the lower content alloys.

The processes that are most r e l i a b l e for copper act ivat ion

The current technology has been successful in act ivat ing copper traces on a wide range of p l a s t i c and ceramic u i r i n g boards. Houever, i t vas found that as the copper pads and traces became smaller and closer together the d i f f i c u l t y increased for ac t i va t ing a l l the traces and not overplating the nonconductor. Recognizing t h i s problem, the authors began a search for a process that uas ac t ive enough t o catch a l l the small pads of the wi r ing boards without bridging. amine borane process uith a unique complexor blend. The key t o success, however, l i e s w i th the discovery o f a material that aids i n the act ivat ion. The operating parameters that can be disclosed for th is process are l i s t e d i n Table I .

The process that vas developed by t h i s e f f o r t i s a

3

While the development of the act ivat ion step was important, other f ine points were also addressed during the development o f the process cycle. Some o f these points are addressed below.

Pretreatment and P la t inq

The pretreatment steps described here w i l l provide information that i s needed t o design a p l a t i n g l i n e for s ingle sided or "through hole" plated double sided epoxy-fiberglass w i t h or without sui table solder masks. Perhaps i t should go without saying that r i ns ing i s important i n t h i s process. also be "room temperature" or above for best results. We have not used ul t rasonic r inses except for the very porous ceramic type c i r c u i t boards, however ul t rasonic r inses could well be applied t o improve r ins ing i f the board loads are stacked closely.

Table 11 l i s t s the steps and some o f the conditions for the cycle. Some important po ints f o r each o f the steps are made below.

The r inses should be clean, f lowing deionized uater and should

Cleaner. steps from the copper surface. The cleaner i s special ly formulated for t h i s purpose t o avoid materials that may soften the board surface and sensi t ize i t t o over p l a t i n g during the electroless nickel steps. temperature and time are important for r e l i a b l e work. the board may be sensi t ive t o a lka l ine chemistry. In these few cases an acid cleaner i s available.

The a l ka l i ne cleaner removes residues of previous board production

The high Occasionally part of

Etch. The etch i s a most important step and i s a propr ietary solut ion .

designed t o replace the normal su l fu r i c acid and persul fate etch. su l fur ic /persu l fa te etch works most of the time, we found i t t o be unrel iable i n the long run. The etch deoxidizes the copper surface and removes f i n a l t races o f materials from previous board making steps. etch also removes copper from the board. This copper i s not usually v is ib le t o the op t i ca l or scanning electron microscope but i s detected using Electron Dispersive X-ray (EDX), Figure 2. Final ly, we of ten encounter thin f o i l s o f copper protruding from the traces, Figure 3, and the etch step must dissolve these fo i l s . Long immersion times, up t o 20 minutes, are often required t o remove surface copper and copper f o i l s and el iminate the chances o f overplate during the electroless nickel steps.

While the

The

Acid Rinse. from the board porosity. porous board types.

The acid r i n s e at t h i s point i s required t o remove chemicals Perhaps t h i s step could be eliminated for less

Activation. The electroless nickel/boron act ivat ion s t r i k e is special iy designed t o provide the a c t i v i t y required t o act ivate a l l the traces without act ivat ing the copper that may s t i l l be imbedded i n the board. act ivat ion t ime should be j us t long enough t o insure act ivat ion of a l l pads and traces on the board.

The

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Acid Rinse. The s u l f u r i c acid r i nse between the electroless nickel baths i s deyigned t o improve surface ac t i v i t y .

Electroless Nickel/Phosphorus. used fo r the undercoat layer may be chosen from the normal range o f processes that are available. The 10-122 phosphorus process should be chosen i f the working environment of the c i r c u i t may be somewhat harsh. The 3-4X phosphorus or the 6-8% phosphorus processes may be chosen t o shorten p la t i ng time i f the working environment i s not so severe. 500 microinches o f deposit i s required.

The electroless nickel/phosphorus process

Usually about 200-

Acid Rinse. nickel/phosphorus deposition and the electroless nickel/boron step. Occasionally the nickel/phosphorus deposit w i l l become passive i f the transfer time i s long. T h i s acid r i nse a t th is point may be required t o react ivate the surface t o ensure that the next electroless process w i l l s t a r t on a l l pads and traces.

Another acid r i n s e may be required between the electroless

Electroless Nickel/Boron. I f act ive RA or milder RMA solder fluxes are acceptable for the c i r c u i t boards, the electroless nickel/boron topcoat may be eliminated. However, for many applications and especial ly for wire bonding, a 50-70 microinch deposit i s required. One o f the electroless nickel/boron processes that have long been used for so lderabi l i ty and wire bonding may be chosen for t h i s step.

After processing the f inished wir ing board w s t be ca re fu l l y r insed and dried. Chemicals l e f t on the surface or i n the holes can cause corrosion or staining that can cause fa i l u res during assembly or service.

Solderabi l i tv o f Electroless Nickel

Electroless nickel surfaces are actual ly eas i ly soldered i f fresh, and certair l high phosphorus deposits have been known t o remain solderable for several months or a f t e r cer ta in aging tests. However, i n general, electroless nickel requires the properly activated RMA type f lux t o ensure r e l i a b l e soldering, and the deposits do not lend themselves t o wire bonding, a l l due t o the tendency t o form a surface oxide layer. Electroless nickel/boron deposits have been long known (2,3,5) for t h e i r a b i l i t y t o remain solderable and wire bondable for extended periods of time.

One qual i ty control concern has been that i t i s d i f f i c u l t t o assure that the electroless nickel/boron top coat has actual ly been plated on the traces. This i s important since the accidental absence of t h i s topcoat can cause a dramatic increase i n solder or wire bond defects. Boron i s d i f f i c u l t t o detect i n small quanti ty by most avai lable methods but three ind i rect methods have been found that assure the presence o f the electroless nickel/boron layer.

5

First, the electroless nickel/boron layer may be detected with some difficulty by cross sectioning.

Second, Electron Dispersive X-ray (EDX) may be used to determine the presence of the layer indirectly. A thin coating of electroless nickel/boron over a nickel/phosphorus layer can hide the phosphorus peak, Figure 4, thus assuring the presence of the nickellboron topcoat even though the boron itself is not detected. This EDX technique is usually easier and quicker than cross sectioning and can be used without destroying a board i f the dimensions of the board are small.

Finally, the boron layer is less bright than most phosphorus electroless nickels so that, with experience, a visual inspection is adequate. In the case where some traces may have failed to initiate it will appear that some traces are bright and some are dull.

Wire Bondins Studies

Aluminum ultrasonic wirebonding testing was performed using the plated circuit boards. The long term reliability of the wirebond joint was measured by the destructive pull test at time zero and after 2000 hours of temperature humidity ( 8 5 * C and 81X RH). time zero destructive pull strength of 3 grams. The aluminum wire was approximately 0.00125 inches in diameter, 99% A1 - 1% Si, 19-21 grams tensile strength.

Five samples consisting of Ni-B over Ni-P at the thicknesses previously mentioned were tested, Figure 5. All samples ranged from 13.5-14.0 gram at time zero. By the end of the 2000 hour aging these samples ranged from 11.0- 12.5 grams.

The amorphous Ni-P layer is known to be corrosion resistant but the Ni-B is somewhat less so, especially under the conditions of 80”C/81% RH for 2000 hours. When difficulties were encountered in reliably plating the Ni-B layer on the Ni-P layer a decision was made to determine if the Ni-El layer would be reliable for wirebonding and soldering without the Ni-P undercoat. For this study samples were plated at thicknesses of 90, 190 and 210 microinches. It was understood that a 210 microinch Ni-El layer could be cost prohibitive but the thicker Ni-B deposit was included for comparison of corrosion resistance. Figure 5 shows the data of pull strength at different plating thicknesses after the temperature and humidity exposure. zero the samples ranged from 12.5 to 14.5 gram pull strength. By the end o f the 2000 hour test all samples recorded a pull strength between 12-13 grams.

The MIL-STD 883 specifies a minimum

At time

Both the Ni-B over Ni-P metallurgy and the single iayer of Ni-B passed the 2000 hours temperature and humidity reliability tests.

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Solderability

Solderability of Ni-B over Ni-P, single layer Ni-B, and Ni-P as top layer were investigated qualitatively. Each electroless nickel plated sample was brushed with an RFICI flux and inserted into a eutectic composition of 63/37 tin/lead solder at a set rate for a dwell time of 3-4 seconds. After the sample was withdrawn from the solder pot, the solder was allowed to solidify by air cooling. A visual examination followed. Such defects as blouholes or pinholes in the soldered pin-through-holes were noted. considered acceptable i f solder completely vetted and covered the plated

A sample was

holes and lands around the end of the holes. . I

Many more defects were noted on samples with Ni-P as and overcoat. includes low, medium and high phosphorus electroless nickels. This indicated that under a normal storage environment, Ni-P as a top layer metallurgy would be unacceptable for solderability with this RllA flux. is important to note that a stronger flux will allow more removal of oxidation and will probably permit defect free soldering. However, all the samples with Ni-B as a top layer passed the solderability visual inspection.

This

It

A limited number of Ni-B over Ni-P samples were soldered on the production line using normal manufacturing processes. This investigation used wave soldering with an RtlA flux. showed no difference between production hot air solder levelling panels and the electroless nickel panels.

Functional testing on the production line

While the solderability of the Ni-B over Ni-P and the single layer of Ni-B was acceptable, the electroless nickel systems have a decided advantage over gold plated systems. Solder bath contamination and solder joint embrittlement problems present with gold systems are not present with electroless nickel systems. Therefore, solder bath 1 i fe can be prolonged using the electroless nickel systems.

I

Summary

An activation process has been developed to permit electroless nickel plating of closely spaced but isolated copper traces and pads o f printed circuit boards.

Problems associated with overactivation of the board materials have been identified and methods have been described to correctly treat the printed wiring boards.

Methods have been described to insure the activation of successive layers of electroless nickel.

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The activation system described eliminates the problems with unactivated sites as well as over activation or bridging which is commonly seen with palladium based activation systems.

~.

Both the Ni-B over Ni-P and the single layer of Ni-B systems passed temperature humidity testing for wire bonding and met solderability requirements . The electroless nickel system is cost effective and has been proven to be reliable. to designs which use surface mount technology (SMT) or pin through hole (PTH).

In addition to COB technology, this metallurgy could be applied

Ac know1 edqment s

The authors gratefully acknowledge the support of this work by the Allied Kelite Division of Witco Corporation and Lexmark International, Inc. The authors wish to recognize the helpful discussions with Bill Karases and Carl Steinecker, both of Allied Kelite, during the course of this work. The authors would also like to thank Todd Chiles, Russ Steward, Phyllis Surgener, Bob Tucker and Tom Vogel, all of Lexmark International, Inc. for their contributions to this project.

Disc 1 ai mer

The conclusions and opinions expressed in this paper are those of the authors and not necessarily those of Lexmark International, Inc.

Step

A1 ka l ine C1 eaner Rinse Etch Rinse Sul fur ic Ckid 10% Rinse EN S t r i ke Rinse Sul fur ic Ckid 10% EN Ni/P Rinse EN Ni/B Rinse Dry

Table I Operating Parameters

Nickel/Boron kt ivator

Condition Typical

Nickel 6 gm/L D W 20 gr/L PH 9-10 Teaper a t u re 100-120 * F Immersion Time 0.5-3.0 min

Table I1 Act ivat ion cycle for Pr inted Wiring Boards

Temperature Time

1W0F RT RT RT RT RT 100-l1O0F RT RT 185-190°F RT 160-1706 F

9

5-10 m i n 1-3 min 5-20 m i n 1-3 min 5 m i n 1-3 min 0.5-3 n i n 1-3 m i n 1-3 a i n 30-60 min 1-3 m i n 10-20 m i n

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Re fer enc es

1. Rothschild, B.F., net. Fin., 7 8 ( 5 ) , 35 (1980). 2. Baudrand, D.W., Plat. Surf. Fin., 63(12), 57 (1981). 3. Baudrand, D.W., F in ishinq Industries, 6(5), 22 (1982). 4. Fe i l , H., Brazinq Solderinq, 66 (1986). 5. Baker, H., Christiansen, B., Toon, H., Surface Mount Technoloqy,

6. Harman, G.G., " R e l i a b l i t i t y and Yield Problems o f Wire Bonding in 5_(9), 26 (1991 1.

Microelectronics", International Society for Hybrid Microelectronics, Reston, VA, 1991.

7. Brandenburger, J., Ger. Offen., DE 3827983, (1990). 8. Darken, J., Hoxley, J.H., Zone, K.R., Eur. Pat. Appl . , EP 317092,

9. Narcus, H., Platinq, 54(4), 380 (1967). 10. Mallory, G.O., Platinq, 53(4), 319 (1971). 11. Gorbunova, K.H., Ivanov, H.V., Moiseev, V.P., J. Electrochem.

12. Hallory, G.O., US Pat., 4,019,910, (1977). 13. Hallory, G.O., Lloyd, V.A., 68th AESF Ann. Tech. Conf. 1981. 14. Duncan, R.N., arney, T.L., Plat. Surf . Fin., 71(12), 49 (1984). 15. Shrivastava, P. B., et. a1 , Met. Fin., 83(2), 65 (1985). 16. Hallory, G.O., Lloyd, V.A., Plat. Sur f . Fin., 72(8), 64 (1985). 17. Hallory, G.O., Eur. Pat. Appl., EP 73583, (1983). 18. Baudrand, D.W., Eur. Pat. App l . , EP 84937, (1983).

(1989).

SA 120(5), 613 (1973).

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Figure 1 Board Porosity

1005

.Figure 2 Copper Presence

In Epoxy Board Surface

EDX Scan

Figure 3 Copper Foil Attached

To Traces

Foil

Figure 4 EDX of Plated Surface

With and Without Ni/B Layer B = W i t h o u t

f

I I

Ni/B T 5 p c o a t

I.

oi

kl;

I

0

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